Super capacitor module

Abstract

The utility model relates to the technical field of energy storage devices, in particular to a super capacitor module. The super capacitor comprises a plurality of series-connected super capacitor monomers and a plurality of passive equalization circuits, and each monomer corresponds to one passive equalization circuit. A voltage dividing network of the passive equalization circuit is formed by connecting resistors R1 and R2 in series and is in bridge connection with the positive electrode and the negative electrode of the super capacitor monomer, and the reference end of the voltage reference chip is connected with a voltage dividing node and used for monitoring monomer voltage. And when the single voltage exceeds a set threshold value, the voltage reference chip drives the Darlington tube, so that the resistors R61 and R62 establish an energy dissipation loop until the voltage falls back. The module also has the functions of overvoltage alarm and internal temperature monitoring, overvoltage alarm is realized through an LED and an optocoupler, and temperature is led out through voltage division of an NTC sensor. The module adopts the switch resistance type passive equalization circuit, so that the circuit structure is simplified, the number of elements and the hardware cost are reduced, and the overall energy utilization rate and the working performance of the module in a high-power multi-cascade scene are improved.

Description

Technical Field

[0001] This utility model relates to the field of energy storage device technology, specifically to a supercapacitor module. Background Technology

[0002] With the rapid development of new energy power generation, smart grids, and electric vehicles, supercapacitors are playing an increasingly important role in power-type energy storage scenarios due to their advantages such as high power density, fast charge and discharge characteristics, and long cycle life. In recent years, to meet the requirements of high-voltage platforms, modular integration solutions consisting of dozens of supercapacitor cells connected in series have become the mainstream technical approach. To address the voltage imbalance caused by differences in the capacitance of individual cells in a series system, the industry commonly adopts passive balancing technology, which achieves voltage balance by connecting a discharge resistor or switching network in parallel across the cells and utilizing energy dissipation. This technical approach, with its simple structure and rapid response, has been widely used in high-power scenarios such as energy recovery in rail transit and UPS power supplies.

[0003] However, traditional passive equalization circuits often employ fixed-value bleeder resistors or analog comparator circuits built with discrete components, resulting in inherent drawbacks such as continuous energy loss, high component redundancy, and difficulties in thermal management. Particularly in multi-cascaded applications, fixed bleeder resistors cause the equalization process to be coupled throughout the charging cycle, leading to a system energy waste of up to 15%-20%. While active monitoring schemes based on operational amplifier comparators can achieve threshold triggering, they require multiple voltage reference sources and logic control chips, significantly increasing circuit complexity. Utility Model Content

[0004] The purpose of this invention is to provide a supercapacitor module to solve the problems of high energy loss and high component redundancy in the passive equalization circuit of traditional supercapacitor modules, which lead to low overall energy utilization and poor reliability.

[0005] To achieve the above objectives, a supercapacitor module is provided, comprising multiple supercapacitor cells connected in series and multiple passive equalization circuits. Each supercapacitor cell is connected to a corresponding dynamic equalization circuit. The passive equalization circuit includes a voltage reference chip and a voltage divider network, wherein:

[0006] The voltage divider network is composed of resistors R1 and R2 connected in series and is connected across the positive and negative terminals of the corresponding supercapacitor cells. The reference terminal of the voltage reference chip is connected to the voltage divider node of resistors R1 and R2.

[0007] The cathode of the voltage reference chip is connected to the base of the Darlington transistor Q3, and the emitter of the Darlington transistor Q3 is grounded through parallel resistors R6_1 and R6_2.

[0008] When the voltage of a single supercapacitor cell exceeds a set threshold, the voltage reference chip is turned on, driving the Darlington transistor Q3 to turn on, so that the parallel resistors R6_1 and R6_2 establish an energy dissipation circuit until the voltage falls back below the threshold.

[0009] In the above technical solution, the voltage divider network (i.e., resistors R1 and R2) sets the overvoltage threshold by the resistance ratio. The voltage reference chip acts as a precision voltage comparator, triggering the Darlington transistor to conduct only when a single unit is overvoltaged, forming a dynamic switching energy consumption path. This breaks through the traditional continuous energy consumption mode of fixed discharge resistors, and only starts balancing at the moment of overvoltage, avoiding energy waste under normal operating conditions.

[0010] Based on this, the parallel resistors R6_1 and R6_2 reduce the power carrying pressure of a single resistor and improve heat dissipation efficiency, ensuring thermal stability during high current discharge, solving the problem of easy overheating failure of a single resistor, and optimizing the energy dissipation rate by matching the parallel resistance values.

[0011] In another technical solution, the cathode of the voltage reference chip is connected to the resistor R3 and the base of the transistor Q1, the resistor R3 and the emitter of the transistor Q1 are connected to the positive terminal of the supercapacitor cell, and the collector of the transistor Q1 is connected to the base of the Darlington transistor Q3 through the resistor R5.

[0012] In this technical solution, the voltage reference chip drives the Darlington transistor Q3 through the transistor Q1. The transistor Q1 serves as the pre-drive stage, and the Darlington transistor Q3 serves as the power switch stage. By utilizing the high current gain characteristics of the Darlington transistor, a high-power load is driven with extremely low control current, reducing the power consumption of the control circuit, while avoiding the driving voltage matching problem caused by directly using MOSFETs.

[0013] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0014] 1. This supercapacitor module employs a switched-resistor passive equalization circuit, using a TL431AI voltage reference chip to accurately monitor the voltage of each individual cell. When the voltage of any individual cell exceeds a preset value, the TL431 turns on, driving the Darlington transistor Q3, along with power resistors R6_1 and R6_2, to form an energy dissipation circuit. This promptly dissipates excess energy from overvoltaged cells, preventing energy loss from higher-capacity cells due to overcharging obstruction, and improving the overall energy utilization and performance of the module in high-power multi-cascade scenarios.

[0015] 2. This supercapacitor module utilizes a passive balancing design (containing only basic components such as a voltage reference chip, transistors, and power resistors), eliminating the need for complex energy conversion modules, significantly simplifying the circuit structure and reducing the number of components and hardware costs. Simultaneously, the compact circuit layout effectively reduces the module size, meeting the application requirements of cost- and space-sensitive fields and improving the economics of large-scale production. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the overall structure of this utility model;

[0017] Figure 2 This is a simplified circuit diagram of the TL431 of this utility model;

[0018] Figure 3 This is a schematic diagram of the passive equalization circuit of this utility model. Detailed Implementation

[0019] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0020] Please see Figure 1 As shown, the purpose of this embodiment is to provide a supercapacitor module, which consists of multiple supercapacitors connected in series and multiple passive equalization circuits forming the main body of the module. Overvoltage alarms and temperature information will be output to the outside. The design specifications for the high-reliability, low-internal-resistance supercapacitor module are: rated voltage 48V, capacitance 160F, and operating temperature range of -45℃ to 60℃. The module design needs to consider the internal resistance, capacitance, and operating temperature range of individual cells. The individual cell part uses a 2.7V, 3000F supercapacitor cell unit. For the circuit part, a switched resistor equalization method is used as the module circuit design, and the circuit construction needs to consider actual working conditions, such as operating temperature, electrostatic discharge protection, and heat dissipation.

[0021] like Figure 2As shown in the simplified schematic, the overvoltage detection core uses a TL431AI voltage reference chip, which operates in a temperature range of -40℃ to 85℃, with a reference voltage accuracy of ±1% at 25℃. Its maximum adjustable voltage is 36V, making it suitable for high-voltage scenarios in supercapacitor modules. The TL431AI's cathode (CATHODE) is connected to the input power supply V_SUP (taken from the supercapacitor's individual voltage) via a current-limiting resistor R_SUP. The anode (ANODE) ​​is directly grounded (GND), and the reference terminal (REF) is connected to a voltage divider network composed of resistors R1 and R2. By adjusting the resistance ratio of R1 and R2, the threshold value of the output voltage Vo is set. The relationship is as follows:

[0022] Vo = Vref × (1 + R1 / R2);

[0023] The TL431AI has an internal reference voltage Vref of 2.5V. For example, when R1 = 1kΩ and R2 = 12kΩ, Vo = 2.5V × (1 + 1kΩ / 12kΩ) ≈ 2.7V, meaning the overvoltage protection threshold is 2.7V, consistent with the safe upper limit of a single supercapacitor cell. A filter capacitor CL is connected in parallel between the output Vo and ground to suppress high-frequency noise.

[0024] Each unit is independently configured with a passive equalization circuit, and its core function is achieved through the coordinated operation of multiple circuit stages. For example... Figure 3 As shown, in the single-unit module, the positive input port IN+ is connected to the positive terminal of the supercapacitor, and the negative input port IN- serves as the system reference ground (GND), directly connected to the negative terminal of the supercapacitor. The voltage detection and reference circuit consists of voltage divider resistors R1 and R2 connected in series across the positive input port IN+ and the negative input port IN-. The voltage divider node is connected to the reference terminal Vref of the voltage reference chip. The voltage divider node of resistors R1 and R2 is also connected to capacitor C1, used to filter out high-frequency noise in the input voltage, stabilize the reference voltage of the voltage reference chip, and prevent false triggering of overvoltage protection. By adjusting the resistance ratio of resistors R1 and R2, the trigger threshold can be precisely set to 2.7V. The anode (A) of the voltage reference chip is grounded, and the cathode (K) is connected to resistor R3 and the base of PNP transistor Q1, forming a switch control circuit. The emitter of transistor Q1 is directly connected to the positive input port IN+, and the collector is connected in series with a current-limiting resistor R4 and an LED indicator before being grounded, achieving optical indication of the overvoltage state.

[0025] like Figure 3As shown, the construction of the balanced current path depends on the drive signal of transistor Q1. When transistor Q1 is turned on, its collector simultaneously provides drive current to the base of Darlington transistor Q3 through resistor R5. Resistor R5 is also connected to an overvoltage protection component (OVP) to prevent circuit damage due to sudden increases in power supply voltage or other reasons. The collector of Darlington transistor Q3 is connected to the positive input port IN+, and its emitter is grounded through two parallel power resistors R6_1 and R6_2, forming a discharge circuit. To protect Darlington transistor Q3 from base current overload, an NPN transistor Q2 is provided. Its base is connected in parallel with the base of Darlington transistor Q3, its collector is connected to the base of Darlington transistor Q3, and its emitter is grounded. This shunt effect limits the base current of Darlington transistor Q3, improving circuit stability.

[0026] The module's overall architecture adopts a layered design. All individual modules and their equalization modules are connected in series to form a high-voltage link. An NTC temperature sensor and a fixed resistor are connected in series at the positive and negative output terminals to form a voltage divider circuit. The voltage divider node transmits temperature signals to the battery management system through the module's side interface, enabling real-time monitoring of the module's temperature and supporting temperature compensation within a range of -45℃ to 60℃. Overvoltage alarm integration is achieved through optocoupler isolation technology. The LED branches of all transistor Q1 collectors (i.e., resistor R4 and LED indicator lights) are connected in parallel and converted into electrically isolated signals by optocouplers before being output to the external controller, preventing interference from the high-voltage module to the low-voltage control circuit.

[0027] In terms of heat dissipation and protection design, power resistors R6_1 and R6_2 are axially encapsulated with metal film and directly soldered to the enhanced heat dissipation copper foil area on the PCB board. The copper foil area is used to enhance heat diffusion. Darlington tube Q3 is fixed to the aluminum heat sink on the side wall of the module with thermally conductive silicone to ensure that the core operating temperature of the device is always below the safe threshold of 150℃ under a balanced current of 500mA.

[0028] When the voltage of a single cell exceeds 2.7V, the voltage reference chip turns on, triggering transistor Q1, which drives the LED to light up and activates Darlington transistor Q3, creating a discharge path between resistors R6_1 and R6_2. This process continues until the single cell voltage falls below the threshold, at which point the voltage reference chip exits the conducting state, transistors Q1 and Q3 turn off, the discharge circuit is broken, energy dissipation stops, and the system automatically returns to normal operation.

[0029] Working principle: When the voltage of a single supercapacitor cell exceeds the reference threshold (2.7V) set by the voltage reference chip, the voltage reference chip is triggered to conduct and provides a drive signal to the base of transistor Q1. After transistor Q1 conducts, it drives Darlington transistor Q3 into saturation through resistor R5, so that a discharge circuit is formed between the positive terminal (IN+) of the cell and ground (IN-) through parallel power resistors R6_1 and R6_2. At this time, the excess energy stored in the cell is converted into heat energy in the form of current through resistors R6_1 and R6_2, causing the cell voltage to gradually decrease. When the voltage falls back below the reference threshold (2.7V) of the voltage reference chip, the voltage reference chip returns to the off state, transistors Q1 and Q3 are turned off, the discharge circuit is broken, and the equalization process is automatically terminated. This mechanism realizes closed-loop voltage control through hardware circuitry, without the need for external command intervention, and completes the dynamic energy dissipation of overvoltage cells.

[0030] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the utility model. Various changes and modifications can be made to this utility model without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed utility model. The scope of protection of this utility model is defined by the appended claims and their equivalents.

Claims

1. A supercapacitor module comprising a plurality of supercapacitor cells connected in series and a plurality of passive balancing circuits, each of the supercapacitor cells being connected to a passive balancing circuit, characterized in that: The passive equalization circuit includes a voltage reference chip and a voltage divider network, wherein: The voltage divider network is composed of resistors R1 and R2 connected in series and is connected across the positive and negative terminals of the corresponding supercapacitor cells. The reference terminal of the voltage reference chip is connected to the voltage divider node of resistors R1 and R2. The cathode of the voltage reference chip is connected to the base of the Darlington transistor Q3, and the emitter of the Darlington transistor Q3 is grounded through parallel resistors R6_1 and R6_2.

2. The ultracapacitor module of claim 1, wherein: The voltage divider node of resistors R1 and R2 is also connected to capacitor C1, and the other end of capacitor C1 is grounded.

3. The ultracapacitor module of claim 1, wherein: The cathode of the voltage reference chip is connected to the resistor R3 and the base of the transistor Q1. The resistor R3 and the emitter of the transistor Q1 are connected to the positive terminal of the supercapacitor cell. The collector of the transistor Q1 is connected to the base of the Darlington transistor Q3 through the resistor R5.

4. The ultracapacitor module of claim 3, wherein: The collector of transistor Q1 is connected to resistor R4, the other end of resistor R4 is connected to an LED indicator, and the other end of the LED indicator is grounded, forming an optical indication path for overvoltage conditions.

5. The ultracapacitor module of claim 4, wherein: In the passive equalization circuit, the LED indicator corresponding to each supercapacitor cell is connected in series with resistor R4 to form an indicator branch. All indicator branches are connected in parallel and then connected to the input terminal of the optocoupler. The output terminal of the optocoupler constitutes an overvoltage alarm signal interface.

6. The ultracapacitor module of claim 3, wherein: The resistor R5 is also connected to an overvoltage protection component.

7. The ultracapacitor module of claim 1, wherein: A transistor Q2 is disposed between the base of the Darlington transistor Q3 and ground. The base of the transistor Q2 is connected in parallel with the base of the Darlington transistor Q3. The collector of the transistor Q2 is connected to the base of the Darlington transistor Q3, and the emitter of the transistor Q2 is grounded.

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