Leakage current test board and leakage current test system
By designing a leakage current test board and system, and using the switching unit in the circuit switching device to switch the test path, the efficiency and reliability problems of UFS memory chip pin leakage current testing were solved, and efficient leakage current testing was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HOSIN GLOBAL ELECTRONICS CO LTD
- Filing Date
- 2025-05-16
- Publication Date
- 2026-04-28
AI Technical Summary
Existing technologies make it difficult to efficiently and reliably test the leakage current of each pin of a UFS storage chip, and adjustments are required for pins in different states.
A leakage current test board and test system were designed. The test path between the leakage current detection circuit and the connection device is switched by the switching unit in the circuit switching device to achieve efficient leakage current testing of UFS memory chips.
It simplifies the testing process, improves testing efficiency and reliability, and enables flexible leakage current testing of pins in different states.
Smart Images
Figure CN224176717U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit testing technology, specifically to a leakage current test board and a leakage current test system. Background Technology
[0002] Leakage current typically refers to a small current that should not appear in a conductive current path, such as in insulating materials or closed switches. In electronic devices and circuit design, excessive leakage current can lead to increased power consumption, signal interference, and even device damage. Leakage current control is particularly important in high-density integrated circuits. In the storage field, to prevent excessive leakage current in UFS (Universal Flash Memory) chips, which can cause charge in the floating gate to gradually leak out, leading to data loss or bit errors, the requirements for leakage current control are even higher. Leakage current testing for UFS chips requires measurement of each pin, and adjustments to other pins are also necessary. Therefore, there is an urgent need to design a chip leakage current testing device to perform leakage current testing on UFS chips and other devices. Utility Model Content
[0003] Therefore, this application provides a leakage current test board and a leakage current test system to achieve high-efficiency leakage current testing.
[0004] This application provides a leakage current test board, which includes a first connecting device, a leakage current detection circuit, a signal transmission device, a circuit switching device, and a second connecting device.
[0005] The first connection device is connected to the test motherboard, the leakage current detection circuit, the signal transmission device, and the circuit switching device respectively; the signal transmission device is connected to the circuit switching device; the second connection device is connected to the circuit switching device and the chip carrier board for carrying the chip under test respectively.
[0006] The first connection device is used to receive the first control signal sent by the test motherboard;
[0007] The signal transmission device is used to receive the first control signal and output a second control signal to the circuit switching device;
[0008] The circuit switching device includes switching units corresponding to multiple test units in the chip under test. Each switching unit is used to switch the test path constructed between the leakage current detection circuit and the first connection device and the second connection device according to the corresponding second control signal.
[0009] The leakage current detection circuit is used to perform leakage current testing on the test unit of the chip under test through the second connection device using the switched test path.
[0010] Optionally, the signal transmission device includes a signal output terminal corresponding to each of the switching units; the signal transmission device is further configured to obtain a second control signal for testing the corresponding test unit according to the first control signal, and output the second control signal to the switching unit corresponding to the test unit.
[0011] Optionally, the circuit switching device includes a first switching unit, which includes a first control terminal, a first signal terminal, a second signal terminal, and a first test terminal; the first control terminal is connected to the first output terminal of the signal transmission device; the first signal terminal is connected to the first connection device; the second signal terminal is connected to the second connection device; the second signal terminal is used to construct a test path when the first test terminal is connected; the first switching unit is used to switch the original path between the first signal terminal and the second signal terminal to a test path between the second signal terminal and the first test terminal when the first control terminal is connected to a high level.
[0012] Optionally, the circuit switching device further includes a second switching unit, which includes a second control terminal, a first adjustment terminal, a first floating terminal, and a first preset terminal; the second control terminal is connected to the second output terminal of the signal transmission device, the first adjustment terminal is connected to the first test terminal, and the first floating terminal is in an unconnected state; the second switching unit is used to adjust the first adjustment terminal from an unconnected state to be connected to the first preset terminal when the second control terminal is connected to a high level.
[0013] Optionally, the circuit switching device further includes a third switching unit, which includes a third control terminal, a second adjustment terminal, a first ground terminal, and a second preset terminal. The third control terminal is connected to the third output terminal of the signal transmission device. The second adjustment terminal is connected to the first preset terminal, and the second adjustment terminal is used to switch the test mode when connected to the second preset terminal. The first ground terminal is grounded. The third switching unit is used to connect the second adjustment terminal to the first ground terminal when the third control terminal is connected to a high level, and to control the second adjustment terminal to connect to the second preset terminal when the third control terminal is connected to a low level, so as to switch the test mode.
[0014] Optionally, the circuit switching device further includes a fourth switching unit, which includes a fourth control terminal, a third adjustment terminal, a second ground terminal, and a voltage input terminal; the fourth control terminal is connected to the fourth output terminal of the signal transmission device; the voltage input terminal is used to provide a test voltage signal; the third adjustment terminal is connected to the second preset terminal; the second ground terminal is grounded; the fourth switching unit is used to connect the third adjustment terminal to the voltage input terminal when the fourth control terminal is connected to a high level, and to control the third adjustment terminal to be connected to the second ground terminal when the fourth control terminal is connected to a low level.
[0015] This application also provides a chip and a leakage current testing system, the leakage current testing system comprising a test motherboard, a chip carrier board and at least one of the above-mentioned leakage current test boards.
[0016] Optionally, the test motherboard includes a controller, a third connection device, and at least one memory; the third connection device is connected to the first connection device of the leakage current test board; the memory is used to store test instructions and / or test results; the controller is used to receive test instructions issued by the host computer, generate a first control signal according to the test instructions, and upload the test results to the host computer.
[0017] Optionally, the chip carrier includes a fourth connection device; the fourth connection device is connected to the second connection device of the leakage current test board and is used to connect the chip under test.
[0018] In the leakage current test board and leakage current test system described in this application, the circuit switching device includes switching units corresponding to multiple test units in the chip under test. Each switching unit can switch the test path constructed between the leakage current detection circuit and the first connection device and the second connection device according to the corresponding second control signal, so that the leakage current detection circuit can use the switched test path to perform leakage current testing on the test unit connected to the second connection device, which can simplify the test process, improve test efficiency and test reliability. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a schematic diagram of the leakage current testing system according to an embodiment of this application;
[0021] Figure 2 This is a schematic diagram of a leakage current test board structure according to an embodiment of this application;
[0022] Figure 3a and Figure 3b This is a schematic diagram of a signal transmission device chip according to an embodiment of this application;
[0023] Figure 4a This is a schematic diagram of the structure of a first connecting device according to an embodiment of this application;
[0024] Figure 4b This is a schematic diagram of the structure of the second connecting device according to an embodiment of this application;
[0025] Figure 5a and Figure 5b This is a schematic diagram of the switching unit structure according to an embodiment of this application;
[0026] Figure 6a and Figure 6b This is a schematic diagram of the switching unit structure according to an embodiment of this application;
[0027] Figure 7a and Figure 7b This is a schematic diagram of the switching unit structure according to an embodiment of this application;
[0028] Figure 8a and Figure 8b This is a schematic diagram of the switching unit structure according to an embodiment of this application;
[0029] Figure 9 This is a schematic diagram of the power supply module structure according to an embodiment of this application;
[0030] Figure 10 This is a schematic diagram of the measurement module structure according to an embodiment of this application;
[0031] Figure 11 This is a schematic diagram of a leakage current test board frame according to an embodiment of this application;
[0032] Figure 12 This is a schematic diagram of a leakage current testing system according to an embodiment of this application. Detailed Implementation
[0033] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.
[0034] The first aspect of this application provides a leakage current test board, which can be used to perform leakage current testing on a chip under test carried by a chip carrier such as a UFS load board. Specifically, refer to... Figure 1 As shown, the leakage current test board 100 can be connected to the test motherboard 200 and the chip carrier board 300. The test motherboard 200 can be connected to a host computer to obtain test commands issued by the host computer, issue relevant control signals according to the test commands, and obtain the test results obtained by the leakage current test board 100, and upload the test results to the host computer. The chip carrier board 300 can be connected to the chip under test so that the leakage current test board 100 can perform leakage current tests on the chip under test.
[0035] refer to Figure 2 As shown, the leakage current test board includes a first connection device 110, a leakage current detection circuit 120, a signal transmission device 130, a circuit switching device 140, and a second connection device 150.
[0036] The first connection device 110 is connected to the test motherboard 200, the leakage current detection circuit 120, the signal transmission device 130 and the circuit switching device 140 respectively; the signal transmission device 130 is connected to the circuit switching device 140; the second connection device 150 is connected to the circuit switching device 140 and the chip carrier board 300 for carrying the chip under test respectively. Specifically, the first connection device 110, the leakage current detection circuit 120, the signal transmission device 130, the circuit switching device 140, and the second connection device 150 have multiple ports, and each of the above components is connected to other components through different ports; for example, the signal receiving end of the first connection device 110 is connected to the test motherboard, the first output end is connected to the signal input end of the signal transmission device 130, the second output end is connected to the signal input end of the circuit switching device 140, and the result acquisition end is connected to the output end of the leakage current detection circuit 120; for another example, the multiple signal output ends of the signal transmission device 130 are respectively connected to the switching control end of a switching unit in the circuit switching device 140; for yet another example, one output end of the second connection device 150 is connected to the circuit switching device 140, and the chip access end is connected to the chip carrier board 300 used to carry the chip under test; and so on.
[0037] The first connection device 110 is used to receive the first control signal sent by the test motherboard 200.
[0038] The signal transmission device 130 is used to receive the first control signal and output a second control signal to the circuit switching device 140.
[0039] The circuit switching device 140 includes switching units corresponding to multiple test units in the chip under test. Each switching unit is used to switch the test path constructed between the leakage current detection circuit 120 and the first connection device 110 and the second connection device 150 according to the corresponding second control signal, so as to provide a test path for the test unit in the chip under test connected to the second connection device 150. In some examples, the test unit may include at least one pin in the chip under test that needs to be tested for leakage current; in other examples, the test unit may also include at least some of the functions associated with a pin in the chip under test that needs to be tested.
[0040] The leakage current detection circuit 120 is used to perform leakage current testing on the test unit of the chip under test through the second connection device 150 using the switched test path to obtain test results.
[0041] Optionally, the leakage current detection circuit 120 can also upload the test results to the test motherboard 200 through the first connection device 110, so that the test motherboard 200 can obtain the test results in real time.
[0042] In the leakage current test board provided in this embodiment, the circuit switching device 140 includes switching units corresponding to multiple test units in the chip under test. Each switching unit can switch the test path constructed between the leakage current detection circuit 120 and the first connection device 110 and the second connection device 150 according to the corresponding second control signal. This allows the leakage current detection circuit 120 to use the switched test path to perform leakage current testing on the test unit in the chip under test connected to the second connection device 150. This has the advantages of simple testing process and high testing efficiency.
[0043] In some embodiments, the signal transmission device 130 includes signal output terminals corresponding to each of the switching units. The signal transmission device is further configured to acquire a second control signal for testing the corresponding test unit based on the first control signal, and output the second control signal to the switching unit corresponding to the test unit, so that the switching unit corresponding to the test unit can connect and / or switch to the required test path according to the second control signal, thereby improving testing efficiency and ensuring reliability during the testing process.
[0044] Specifically, the signal transmission device 130 can be implemented using a chip capable of receiving a first control signal from the test motherboard 200 via the first connection device 110, generating a corresponding second control signal, and having multiple signal output terminals, through which the corresponding second control signal is output. For example, see reference. Figure 3aAs shown, the signal transmission device 130 may include a chip 131 for generating a second control signal. This chip 131 includes multiple signal output terminals such as P00, P01, P02, P03, P14, and P15. Specifically, P00 can output the second control signal GPIO_SW, P01 can output the second control signal GPIO_1, P02 can output the second control signal GPIO_2, P03 can output the second control signal GPIO_3, P14 can output the second control signal GPIO_12, and P15 can output the second control signal GPIO_13. For example, see reference... Figure 3b As shown, the signal transmission device 130 may further include a chip 132 for generating a second control signal. The chip 132 includes multiple signal output terminals such as P00, P01, P02, P03, P14 and P15. Among them, P00 can output the second control signal GPIO_CM, P01 can output the second control signal GPIO_A_1, P02 can output the second control signal GPIO_A_2, P03 can output the second control signal GPIO_A_3, and P14 can output the second control signal.
[0045] Optionally, the first connection device 110 can be implemented using a chip capable of signal transmission with the test motherboard 200 and transmitting the first control signal issued by the test motherboard 200 to the signal transmission device 130; for example, refer to Figure 4a As shown, the first connection device 110 may include a chip 111, which may include ports for transmitting first control signals such as GPIO_B_H, and ports for transmitting signals such as RST_N, REF_CLK, DOUT_C, and / or DOUT_T; optionally, the chip 111 may also include relevant power supply terminals and / or ground terminals, etc. Optionally, the second connection device 150 may be implemented using a chip capable of signal transmission with the chip carrier 300 and transmitting relevant signals from the chip carrier 300 to components such as the leakage current detection circuit 120; for example, refer to Figure 4b As shown, the second connection device 150 may include a chip 151, which may include a port for transmitting UFS_LSS_DUT and other test chip signals, and may also include a port for transmitting signals such as RST_N_DUT, REF_CLK_DUT, DOUT_C_DUT and / or DOUT_T_DUT; optionally, the chip 151 may also include relevant power supply terminals and / or ground terminals, etc.
[0046] In some examples, the circuit switching device 140 includes a first switching unit 141, referenced to Figure 5aAs shown, the first switching unit 141 includes a first control terminal G11, a first signal terminal G12, a second signal terminal G13, and a first test terminal G14.
[0047] The first control terminal G11 is connected to the first output terminal of the signal transmission device 130 to receive the second control signal GPIO_SW. The first signal terminal G12 is connected to the first connection device 110 and can receive the signal REF_CLK transmitted by the first connection device 110; the second signal terminal G13 is connected to the second connection device 150 and can receive the signal REF_CLK_DUT transmitted by the second connection device 150; the second signal terminal G13 is used to construct a test path when connecting the first test terminal G14. Optionally, the first test terminal G14 can receive signals such as REF_CLK_SW to assist the first switching unit 141 in connecting the corresponding test path.
[0048] The first switching unit 141 is used to switch the original path between the first signal terminal G12 and the second signal terminal G13 to the test path between the second signal terminal G13 and the first test terminal G14 when the second control signal GPIO_SW connected to the first control terminal G11 is at a high level, so as to connect the corresponding test path to the leakage current detection circuit 120 and enable the leakage current detection circuit 120 to perform leakage current test on the corresponding test unit.
[0049] Optionally, the first switching unit 141 can be implemented using components such as a relay module, a resistor, and / or related transistors, for example, as shown in the reference. Figure 5b As shown, the first switching unit 141 includes components such as a first resistor R1, a first transistor M1, a first diode Q1, a second resistor R2, and a first relay module K1. The first end of the first resistor R1 serves as the first control terminal G11, connected to the gate of the first transistor M1; the second end of the first resistor R1 is used to connect to a first voltage; the source of the first transistor M1 is grounded, and its drain is connected to the first pin of the first relay module K1 and the input terminal of the first diode Q1, respectively; the output terminal of the first diode Q1 is connected to the second pin of the first relay module K1 and the first end of the second resistor R2, respectively; the second end of the second resistor R2 is used to connect to a second voltage; the third pin of the first relay module K1 serves as the first signal terminal G12; the fourth pin of the first relay module K1 serves as the first signal terminal G12; and the fifth pin of the first relay module K1 serves as the first test terminal G14.
[0050] In some examples, the circuit switching device 140 further includes a second switching unit 142, see reference. Figure 6aAs shown, the second switching unit 142 includes a second control terminal G21, a first adjustment terminal G22, a first floating terminal (not shown in the figure) and a first preset terminal G23; optionally, the first preset terminal G23 can be connected to the signal RST_N_SW_A.
[0051] The second control terminal G21 is connected to the second output terminal of the signal transmission device 130 to receive the second control signal GPIO_1. The first adjustment terminal G22 is connected to the first test terminal G14 and has received the signal REF_CLK_SW at the first test terminal G14. The first floating terminal is in an unconnected state.
[0052] The second switching unit 142 is used to adjust the first adjustment terminal G22 from an unconnected state to a connection to the first preset terminal G23 when the second control signal GPIO_1 connected to the second control terminal G21 is high. That is, when a high level is input to the second control terminal G21, the unconnected state of the signal REF_CLK_SW is changed to the connected signal RST_N_SW_A.
[0053] Optionally, the second switching unit 142 can be implemented using components such as relay modules, resistors, and / or related transistors, for example, as shown in the reference. Figure 6b As shown, the second switching unit 142 includes components such as a third resistor R3, a second transistor M2, a second diode Q2, a fourth resistor R4, and a second relay module K2. The first end of the third resistor R3 serves as the second control terminal G21, connected to the gate of the second transistor M2; the second end of the third resistor R3 is used to connect to a first voltage; the source of the second transistor M2 is grounded, and its drain is connected to the first pin of the second relay module K2 and the input terminal of the second diode Q2, respectively; the output terminal of the second diode Q2 is connected to the second pin of the second relay module K2 and the first end of the fourth resistor R4, respectively; the second end of the fourth resistor R4 is used to connect to a second voltage; the third pin of the second relay module K2 serves as the first adjustment terminal G22; and the fourth pin of the second relay module K2 serves as the first preset terminal G23.
[0054] In some examples, the circuit switching device 140 further includes a third switching unit 143, see reference. Figure 7a As shown, the third switching unit 143 includes a third control terminal G31, a second adjustment terminal G33, a first grounding terminal G34, and a second preset terminal G32.
[0055] The third control terminal G31 is connected to the third output terminal of the signal transmission device 130 to receive the third control signal GPIO_A_1. The second adjustment terminal G33 is connected to the first preset terminal G23 to receive the signal RST_N_SW_A at the first preset terminal G23; the second adjustment terminal G33 is used to switch the test mode when connected to the second preset terminal G32, and the first ground terminal G34 is grounded.
[0056] The third switching unit 143 is used to connect the second adjustment terminal G33 to the first ground terminal when the third control terminal G31 is connected to a high level (i.e., the third control signal GPIO_A_1 is high level), so that the signal RST_N_SW_A is connected to the ground terminal; when the third control terminal G31 is connected to a low level (i.e., the third control signal GPIO_A_1 is low level), it controls the second adjustment terminal G33 to connect to the second preset terminal G32, so that the signal RST_N_SW_A is connected to the second preset terminal G32 (i.e., the port corresponding to the signal CM), so as to switch the test mode and enter the leakage current measurement of the corresponding test unit.
[0057] Optionally, the third switching unit 143 can be implemented using components such as relay modules, resistors, and / or related transistors, for example, as shown in the reference. Figure 7b As shown, the third switching unit 143 includes components such as a fifth resistor R5, a third transistor M3, a third diode Q3, a sixth resistor R6, and a third relay module K3. The first end of the fifth resistor R5 serves as the third control terminal G31, connected to the gate of the third transistor M3; the second end of the fifth resistor R5 is used to connect to a first voltage; the source of the third transistor M3 is grounded, and its drain is connected to the first pin of the third relay module K3 and the input terminal of the third diode Q3, respectively; the output terminal of the third diode Q3 is connected to the second pin of the third relay module K3 and the first end of the sixth resistor R6, respectively; the second end of the sixth resistor R6 is used to connect to a second voltage; the third pin of the third relay module K3 serves as the second adjustment terminal G33; the fourth pin of the third relay module K3 serves as the second preset terminal G32; and the fifth pin of the third relay module K3 serves as the first ground terminal G34.
[0058] In some examples, the circuit switching device 140 further includes a fourth switching unit 144, see reference. Figure 8a As shown, the fourth switching unit 144 includes a fourth control terminal G41, a third adjustment terminal G43, a second ground terminal G42, and a voltage input terminal G44.
[0059] The fourth control terminal G41 is connected to the fourth output terminal of the signal transmission device 130 to receive the fourth control signal GPIO_CM; the voltage input terminal G44 is used to provide the test voltage signal Pwrin; the third adjustment terminal G43 is connected to the second preset terminal G32 to receive the corresponding signal CM_SW; the second ground terminal G42 is grounded.
[0060] The fourth switching unit 144 is used to connect the third adjustment terminal G43 to the voltage input terminal to receive the test voltage signal Pwrin when the fourth control terminal G41 is at a high level (i.e., the fourth control signal GPIO_CM is at a high level); and to control the third adjustment terminal G43 to connect to the second ground terminal G42 when the fourth control terminal G41 is at a low level (i.e., the fourth control signal GPIO_CM is at a low level).
[0061] Optionally, when the third adjustment terminal G43 is connected to the test voltage signal Pwrin, the corresponding pin in the chip under test can be tested for leakage high (power supply leakage current), and other ports can be connected to Floating (floating terminals); when the third adjustment terminal G43 is connected to the ground terminal, the corresponding pin in the chip under test can be tested for leakage low (ground leakage current), and other ports can be connected to Floating (floating terminals).
[0062] Optionally, the fourth switching unit 144 can be implemented using components such as relay modules, resistors, and / or related transistors, for example, as shown in the reference. Figure 8b As shown, the fourth switching unit 144 includes components such as a seventh resistor R7, a fourth transistor M4, a fourth diode Q4, an eighth resistor R8, and a fourth relay module K4. The first terminal of the seventh resistor R7 serves as the fourth control terminal G41, connected to the gate of the fourth transistor M4; the second terminal of the seventh resistor R7 is used to connect to a first voltage; the source of the fourth transistor M4 is grounded, and its drain is connected to the first pin of the fourth relay module K4 and the input terminal of the fourth diode Q4, respectively; the output terminal of the fourth diode Q4 is connected to the second pin of the fourth relay module K4 and the first terminal of the eighth resistor R8, respectively; the second terminal of the eighth resistor R8 is used to connect to a second voltage; the third pin of the fourth relay module K4 serves as the second ground terminal G42; the fourth pin of the fourth relay module K4 serves as the third adjustment terminal G43; and the fifth pin of the fourth relay module K4 serves as the voltage input terminal G44.
[0063] In some examples, the circuit switching device 140 may also include other switching units to switch to other test paths based on the aforementioned examples. The switched test paths are then used to perform corresponding tests on other test units in the chip under test. This allows the circuit switching device 140 to flexibly test the leakage current of pins and other test units of the chip under test in different modes. Optionally, the aforementioned switching units may be implemented using components such as relay modules, resistors, and / or related transistors to switch to the test path required by the currently tested test unit after receiving the corresponding second control signal.
[0064] In some embodiments, the leakage current detection circuit 120 may include components such as a power supply module and a measurement module.
[0065] Optionally, the power supply module can be implemented using a power supply chip such as the SY8061. This type of power supply chip can adjust the 5V power supply voltage to a stable 600mV low voltage, providing the required test voltage signal Pwrin for the leakage current detection circuit 120 and related components, thus providing an accurate test voltage signal Pwrin for the leakage current testing process. Optionally, refer to... Figure 9 As shown, the power supply module may include a SY8061 chip and a corresponding matching and adjustment network. The SY8061 chip can be connected to a 5V DC voltage, and after processing by the matching and adjustment network, it outputs the corresponding test voltage signal Pwrin.
[0066] Optionally, the measurement module can be implemented using a detection chip such as the INA219. With the assistance of a corresponding switching unit, the INA219-type detection chip constructs test paths for testing each test unit in the chip under test, thereby enabling leakage current detection of the corresponding test unit. Optionally, refer to... Figure 10 As shown, the measurement module may include an INA219 chip and related resistors and other components; the INA219 chip can connect to signals such as CM and / or CM_SW under the control of the corresponding switching unit to connect the corresponding test path.
[0067] Specifically, the architecture of the leakage current test board can be referenced. Figure 11 As shown, the first connection device 110 transmits signals to the test motherboard 200, and the second connection device 150 transmits signals to the chip under test carried on the chip carrier 300; the leakage current detection circuit 120, the signal transmission device 130, and the circuit switching device 140 are disposed between the first connection device 110 and the second connection device 150. Figure 11The first connection device 110 and the second connection device 150 are shown to represent the signal transmission device 130 and the test paths corresponding to each switching unit. The test motherboard 200 sends a first control signal to the test units such as specific pins on the chip under test. The signal transmission device 130 receives the first control signal, generates a second control signal to instruct the corresponding switching unit to switch to the required test path, and sends the second control signal to the corresponding switching unit. The switching unit receives the second control signal and can then connect the corresponding test path so that the test path can perform leakage current testing on the corresponding test unit.
[0068] In the above leakage current test board, the circuit switching device 140 includes switching units corresponding to multiple test units in the chip under test. Each switching unit can switch the test path constructed between the leakage current detection circuit 120 and the first connection device 110 and the second connection device 150 according to the corresponding second control signal. This allows the leakage current detection circuit 120 to perform leakage current testing on the test unit connected to the second connection device 150 using the switched test path, which simplifies the testing process, improves testing efficiency, and enhances testing reliability. In addition, each test unit can switch the signal connected to its corresponding pin through the switching unit, making the testing more flexible and allowing for more diverse test combinations.
[0069] A second aspect of this application provides a leakage current testing system, with reference to... Figure 12 As shown, the leakage current testing system includes a test motherboard 200, a chip carrier board 300, and at least one leakage current test board 100 as described in any of the above embodiments.
[0070] The test motherboard 200 is used to send the first control signal to the test units such as specific pins on the chip under test.
[0071] The chip carrier board 300 is used to carry the chip under test so that the test path in the leakage current test board 100 can perform corresponding tests.
[0072] In the leakage current test board 100, the first connection device 110 transmits the first control signal to the signal transmission device 130. The signal transmission device 130 generates a second control signal based on the first control signal to instruct the corresponding switching unit to switch to the test path required for testing. The second control signal is sent to the corresponding switching unit so that the switching unit receives the second control signal and connects the corresponding test path. The test path can perform leakage current testing on the corresponding test unit in the chip under test on the chip carrier board 300 through the second connection device 150.
[0073] In some embodiments, the test motherboard 200 includes a controller 210, a third connection device 230, and at least one memory 220.
[0074] The third connection device 230 is connected to the first connection device 110 of the leakage current test board 100 so as to transmit signals with the leakage current test board 100 through the first connection device 110.
[0075] The memory 220 is used to store test instructions and / or test results; specifically, the memory 220 may include random access memory (LPDDR) and persistent memory (eMMC), which can store test instructions and / or test results according to relevant data characteristics.
[0076] The controller 210 is used to receive test commands issued by the host computer, generate a first control signal according to the test commands, and upload the test results to the host computer. Specifically, the controller 210 can be connected to the host computer via a Type-C port, thereby enabling the controller 210 to obtain test commands from the host computer and transmit the test results to the host computer.
[0077] In some embodiments, the chip carrier 300 includes a fourth connection device 310; the fourth connection device 310 is connected to the second connection device 150 of the leakage current test board 100 so as to transmit signals through the test path connected by the leakage current test board 100 via the second connection device 150; the chip carrier 300 is also used to connect the chip under test so as to perform leakage current testing on the corresponding test unit in the chip under test via the corresponding test path.
[0078] The above-described leakage current testing system includes the leakage current testing board described in any of the above embodiments, and has all the beneficial effects of the leakage current testing board described in any of the aforementioned embodiments, which will not be repeated here.
[0079] Although this application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on a reading and understanding of this specification and drawings. This application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the aforementioned components, the terminology used to describe such components is intended to correspond to any component (unless otherwise indicated) that performs the specified function of said component (e.g., is functionally equivalent to it), even if structurally not equivalent to the disclosed structure performing the functions in the exemplary implementations of this specification shown herein.
[0080] That is, the above description is only an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, such as the combination of technical features between different embodiments, or direct or indirect application in other related technical fields, are similarly included within the patent protection scope of this application.
[0081] Furthermore, it should be understood that in the description of this application, the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Additionally, for structural elements with the same or similar characteristics, this application may use the same or different reference numerals for identification. Moreover, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0082] In this application, the term "exemplary" is used to mean "serving as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as more preferred or advantageous than other embodiments. This application has been provided above to enable any person skilled in the art to implement and use it. Various details have been set forth in the above description for purposes of explanation. It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed herein.
Claims
1. A leakage current test board, characterized in that, The leakage current test board includes a first connection device, a leakage current detection circuit, a signal transmission device, a circuit switching device, and a second connection device. The first connecting device is connected to the test motherboard, the leakage current detection circuit, the signal transmission device, and the circuit switching device respectively; the signal transmission device is connected to the circuit switching device. The second connection device is connected to the circuit switching device and the chip carrier board for carrying the chip under test, respectively. The first connection device is used to receive the first control signal sent by the test motherboard; The signal transmission device is used to receive the first control signal and output a second control signal to the circuit switching device; The circuit switching device includes switching units corresponding to multiple test units in the chip under test. Each switching unit is used to switch the test path constructed between the leakage current detection circuit and the first connection device and the second connection device according to the corresponding second control signal. The leakage current detection circuit is used to perform leakage current testing on the test unit of the chip under test through the second connection device using the switched test path.
2. The leakage current test board according to claim 1, characterized in that, The signal transmission device includes signal output terminals corresponding to each of the switching units; The signal transmission device is further configured to acquire a second control signal for testing the corresponding test unit based on the first control signal, and output the second control signal to the switching unit corresponding to the test unit.
3. The leakage current test board according to claim 2, characterized in that, The circuit switching device includes a first switching unit, which includes a first control terminal, a first signal terminal, a second signal terminal, and a first test terminal. The first control terminal is connected to the first output terminal of the signal transmission device; the first signal terminal is connected to the first connection device; the second signal terminal is connected to the second connection device; the second signal terminal is used to construct a test path when connecting the first test terminal; The first switching unit is used to switch the original path between the first signal terminal and the second signal terminal to a test path between the second signal terminal and the first test terminal when the first control terminal is connected to a high level.
4. The leakage current test board according to claim 3, characterized in that, The circuit switching device further includes a second switching unit, which includes a second control terminal, a first adjustment terminal, a first floating terminal, and a first preset terminal; The second control terminal is connected to the second output terminal of the signal transmission device, the first adjustment terminal is connected to the first test terminal, and the first floating terminal is in an unconnected state. The second switching unit is used to adjust the first adjustment terminal from an unconnected state to a connection to the first preset terminal when the second control terminal is connected to a high level.
5. The leakage current test board according to claim 4, characterized in that, The circuit switching device further includes a third switching unit, which includes a third control terminal, a second adjustment terminal, a first grounding terminal, and a second preset terminal. The third control terminal is connected to the third output terminal of the signal transmission device; the second adjustment terminal is connected to the first preset terminal, and the second adjustment terminal is used to switch the test mode when connected to the second preset terminal; the first grounding terminal is grounded. The third switching unit is used to connect the second adjustment terminal to the first ground terminal when the third control terminal is connected to a high level, and to control the second adjustment terminal to connect to the second preset terminal when the third control terminal is connected to a low level, so as to switch the test mode.
6. The leakage current test board according to claim 5, characterized in that, The circuit switching device further includes a fourth switching unit, which includes a fourth control terminal, a third adjustment terminal, a second grounding terminal, and a voltage input terminal; The fourth control terminal is connected to the fourth output terminal of the signal transmission device; the voltage input terminal is used to provide a test voltage signal; the third adjustment terminal is connected to the second preset terminal; the second grounding terminal is grounded; The fourth switching unit is used to connect the third adjustment terminal to the voltage input terminal when the fourth control terminal is connected to a high level, and to control the third adjustment terminal to be connected to the second ground terminal when the fourth control terminal is connected to a low level.
7. A leakage current testing system, characterized in that, The leakage current testing system includes a test motherboard, a chip carrier board, and at least one leakage current test board as described in any one of claims 1 to 6.
8. The leakage current testing system according to claim 7, characterized in that, The test motherboard includes a controller, a third connection device, and at least one memory. The third connection device is connected to the first connection device of the leakage current test board; the memory is used to store test instructions and / or test results. The controller is used to receive test instructions from the host computer, generate a first control signal according to the test instructions, and upload the test results to the host computer.
9. The leakage current testing system according to claim 7, characterized in that, The chip carrier includes a fourth connection device; The fourth connection device is connected to the second connection device of the leakage current test board and is used to connect the chip under test.