Wafer baking chamber and semiconductor equipment

Abstract

According to the wafer baking chamber and the semiconductor device, a first heating unit of the wafer baking chamber is arranged in a partition structure and is used for heating the partition structure for separating different process chambers; meanwhile, a base for bearing the wafer is arranged in each process chamber, and a second heating unit is arranged in the base, so that the wafer and a supporting structure of the wafer can be directly heated, and the wafer is ensured to obtain uniform baking temperature; in addition, third heating units are arranged on all the wall parts of the cavity and used for heating the edges of all the process cavities and conducting edge temperature compensation at the same time, and possible edge heat loss is made up. The heating units are respectively arranged in the partition structure, the interior of the base and the wall part of the cavity, so that multi-point and distributed heating of different key areas of the process cavity is formed, and the temperature uniformity of the interiors of a plurality of vertically stacked process cavities and wafer bearing areas thereof can be more effectively controlled and maintained by the combination mode.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor equipment, and more particularly to a wafer baking chamber and semiconductor equipment. Background Technology

[0002] Dry chemical etching is an important process step in integrated circuit manufacturing. This process selectively removes the dielectric material on the wafer surface by using chemical reactions under specific temperature conditions, thereby forming the desired pattern structure. This has a significant impact on the performance and yield of integrated circuits.

[0003] Currently, the industry commonly uses a method where wafers that have undergone dry chemical etching are placed in a baking chamber for subsequent processing. During this process, an inert gas is introduced into the chamber and a specific temperature environment is maintained to remove any unwanted dielectric material from the wafer surface. The wafer baking process places high demands on the temperature environment.

[0004] However, in actual production, existing baking chambers suffer from problems such as low space utilization and low production efficiency. In particular, in terms of temperature control, the unreasonable arrangement of heating units leads to uneven temperature distribution within the chamber, affecting product quality. Utility Model Content

[0005] The problem solved by this utility model embodiment is to provide a wafer baking chamber and semiconductor equipment, which is beneficial to improving temperature uniformity.

[0006] To address the aforementioned problems, this utility model provides a wafer baking chamber, comprising: a chamber including an internal space; at least one partition structure disposed within the internal space, dividing the internal space into at least two process chambers arranged vertically; a first heating unit disposed within the partition structure for heating the partition structure; a base disposed within the process chamber for supporting the wafer; a second heating unit disposed within the base for heating the wafer; and a third heating unit disposed on each wall of the chamber.

[0007] Optionally, the wafer baking chamber further includes: a temperature sensing unit, including multiple detectors, the detectors being disposed on the wall of the chamber, the partition structure, and the base; and a controller connected to the temperature sensing unit, the first heating unit, the second heating unit, and the third heating unit, the controller being used to receive temperature information from the temperature sensing unit and to adjust the output power of at least one of the first heating unit, the second heating unit, and the third heating unit.

[0008] Optionally, the process chamber has a transfer port; the wafer baking chamber further includes: a valve frame disposed at the transfer port of the process chamber; the third heating unit further includes: at least one heater disposed on the valve frame; and a detector disposed on the valve frame.

[0009] Optionally, the cavity includes a first direction in the plane and a second direction perpendicular to the first direction, the first direction being the opening direction of the delivery port; the number of heaters on the valve frame is multiple, and they are disposed at the top and bottom of the second-direction sidewall of the valve frame; the detector is located on the second-direction sidewall of the valve frame, and is disposed at the middle position in the height direction.

[0010] Optionally, two heaters are provided on each sidewall of the valve frame in the second direction, and the detector is located between the two heaters in the height direction.

[0011] Optionally, the process chamber has a transfer port; the chamber includes a first direction in a plane and a second direction perpendicular to the first direction, the first direction being the opening direction of the transfer port; the top of the chamber includes a cover plate; the third heating unit further includes at least one heater disposed on each side wall of the cover plate in the first direction; and at least one detector disposed on the top of the cover plate.

[0012] Optionally, the process chamber has a transfer port; the chamber includes a first direction in a plane and a second direction perpendicular to the first direction, the first direction being the opening direction of the transfer port; the third heating unit includes: at least one heater disposed on each side wall of the chamber in the second direction; and at least one detector disposed on the side wall of the chamber in the second direction.

[0013] Optionally, the cavity has two process chambers: a lower chamber and an upper chamber located above the lower chamber; the heater on the second-direction sidewall of the cavity is located on the sidewall of the lower chamber near the bottom of the lower chamber, and on the sidewall of the upper chamber near the bottom of the upper chamber.

[0014] Optionally, the cavity includes a first direction in the plane and a second direction perpendicular to the first direction; the third heating unit further includes: a plurality of heaters disposed at the bottom of the cavity, with some of the heaters disposed on one side of the bottom of the cavity in the first direction and the remaining heaters disposed on the other side of the bottom of the cavity in the first direction; the temperature sensing unit further includes: a detector located at the bottom of the cavity.

[0015] Optionally, the cavity has two process chambers: a lower chamber and an upper chamber located above the lower chamber; the upper chamber includes a transfer port and a buffer chamber located at both ends in a first direction; the detector is located near the buffer chamber and away from the transfer port.

[0016] Optionally, the process chamber has a transfer port; the cavity body has two process chambers, namely a lower chamber and an upper chamber located on the lower chamber; the wafer baking chamber further includes: a buffer chamber, disposed at the end of the upper chamber away from the transfer port; the third heating unit further includes: at least one heater, disposed on the side wall of the buffer chamber; at least one detector, located on the same side wall as the heater on the buffer chamber.

[0017] Optionally, the partition structure includes: a partition body; a groove structure disposed on the top of the partition body; a groove cover plate disposed on the groove structure, the groove cover plate and the groove structure at least forming a connecting space, and a wiring channel communicating with the connecting space; the first heating unit is disposed inside the partition body, the first heating unit has a connecting end exposed in the connecting space, and the connecting wire of the first heating unit is disposed in the wiring channel.

[0018] Optionally, the groove structure includes: a first groove located at the top of the partition body, and the bottom surface of the first groove abutting against the groove cover plate; a second groove located in a portion of the bottom surface of the first groove; a third groove located in a portion of the bottom surface of the second groove, and the third groove communicating with the area directly above the third groove, the remaining area of ​​the second groove and the groove cover plate forming a wiring channel.

[0019] Optionally, the partition body includes: a central area and an outer perimeter area surrounding the central area; a first heating unit is located in the partition body, and the first heating unit in the central area is disposed away from the third groove, and the first heating unit in the outer perimeter area is disposed in multiple circles around the central area.

[0020] Optionally, the base includes: a wafer carrier disk; and a support portion located at the bottom of the wafer carrier disk;

[0021] In the adjacent process chambers, the second heating unit in the upper process chamber is located in the wafer carrier tray and is arranged around the center of the wafer carrier tray. The connecting line of the second heating unit passes through the support portion and is arranged in the connection space and wiring channel. The wafer baking chamber also includes a temperature sensing unit, and the detector of the temperature sensing unit is arranged in the wafer carrier tray of the base.

[0022] Optionally, the first heating unit includes a heating wire, and the second heating unit includes a heating wire.

[0023] Optionally, the heater includes a heating rod.

[0024] This utility model embodiment also provides a semiconductor device, including: the aforementioned wafer baking chamber.

[0025] Compared with the prior art, the technical solution of this utility model embodiment has the following advantages:

[0026] This utility model provides a wafer baking chamber, including a cavity with an internal space. At least one partition structure is provided in the internal space, dividing it into at least two process chambers arranged vertically. This allows multiple process chambers to be accommodated within a single cavity, effectively utilizing vertical space and improving space utilization. Furthermore, the wafer baking chamber includes multiple heating units: a first heating unit is disposed in the partition structure to heat the partition structure separating the different process chambers, helping to establish a uniform temperature transition between adjacent process chambers in the vertical direction; simultaneously, a base for supporting the wafer is provided in each process chamber, and a second heating unit is disposed inside the base, enabling direct heating of the wafer and its supporting structure to ensure uniform baking temperature for the wafer; additionally, a third heating unit is disposed on each wall of the cavity to heat the edges of each process chamber while simultaneously compensating for edge temperature, thus mitigating potential edge heat loss. By setting heating units in the partition structure, the base, and the cavity wall, multi-point, distributed heating of different key areas of the process chamber is formed. This combination can more effectively control and maintain the temperature uniformity of the interior of multiple vertically stacked process chambers and the areas of the wafers they support. Attached Figure Description

[0027] Figure 1 This is an isometric view of a wafer baking chamber according to an embodiment of the present invention;

[0028] Figure 2 This is a cross-sectional view of the wafer baking chamber according to an embodiment of the present invention;

[0029] Figure 3 This is a cross-sectional view of the top process chamber in a wafer baking chamber according to an embodiment of the present invention;

[0030] Figure 4 This is a cross-sectional view of the bottom process chamber in a wafer baking chamber according to an embodiment of the present invention;

[0031] Figure 5 This is a left view of the wafer baking chamber according to an embodiment of the present invention;

[0032] Figure 6 This is a right view of the wafer baking chamber according to an embodiment of the present invention;

[0033] Figure 7 This is an isometric drawing of a cover plate according to an embodiment of this utility model;

[0034] Figure 8 This is a left side view of the cover plate according to an embodiment of this utility model;

[0035] Figure 9 This is a bottom view of the wafer baking chamber according to an embodiment of the present invention;

[0036] Figure 10 This is a cross-sectional view of the partition structure in the wafer baking chamber of an embodiment of the present invention along the extension direction of the groove structure;

[0037] Figure 11 This is an axonometric view of the partition structure in the wafer baking chamber according to an embodiment of the present invention;

[0038] Figure 12 This is a cross-sectional view of the partition structure in the wafer baking chamber of an embodiment of the present invention in a horizontal plane;

[0039] Figure 13 This is a cross-sectional view of the partition structure in the wafer baking chamber according to an embodiment of the present invention.

[0040] Figure 14 This is a schematic diagram of the arrangement of the second heating unit in the base of the upper chamber according to an embodiment of the present invention;

[0041] Figure 15 This is a schematic diagram of the arrangement of the second heating unit in the base of the lower chamber according to an embodiment of the present invention. Detailed Implementation

[0042] As the background technology indicates, existing wafer baking chambers suffer from low space utilization and low production efficiency in actual production. Particularly in terms of temperature control, the unreasonable arrangement of heating units leads to uneven temperature distribution within the chamber, affecting product quality.

[0043] To address the aforementioned technical problems, this utility model provides a wafer baking chamber, comprising a cavity with an internal space. At least one partition structure is provided within the internal space, dividing it into at least two process chambers arranged vertically. This allows multiple process chambers to be accommodated within a single cavity, effectively utilizing vertical space and improving the equipment's space utilization rate. Furthermore, the wafer baking chamber includes multiple heating units: a first heating unit is disposed within the partition structure to heat the partition structure separating the different process chambers, helping to establish a uniform temperature transition in the vertical direction; simultaneously, a base for supporting the wafer is provided within each process chamber, and a second heating unit is disposed within the base, enabling direct heating of the wafer and its supporting structure, ensuring the wafer receives a uniform baking temperature; additionally, a third heating unit is disposed on each wall of the cavity to heat the edges of each process chamber while simultaneously compensating for edge temperature, mitigating potential edge heat loss. By setting heating units in the partition structure, the base, and the cavity wall, multi-point, distributed heating of different key areas of the process chamber is formed. This combination can more effectively control and maintain the temperature uniformity of the interior of multiple vertically stacked process chambers and the areas of the wafers they support.

[0044] To make the above-mentioned objectives, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0045] Combination Figures 1 to 15 This utility model embodiment provides a wafer baking chamber, including: a cavity 100, including an internal space; at least one partition structure 101 disposed in the internal space, dividing the internal space into at least two process chambers 102 arranged in the vertical direction Z; and a first heating unit 201 (e.g., Figure 12 As shown), a heating unit 102 is disposed in the partition structure 101 for heating the partition structure 101; a base 103 is disposed in the process chamber 102 for supporting the wafer; a second heating unit 202 (as shown) is disposed in the partition structure 101 for heating the partition structure 101; a base 103 is disposed in the process chamber 102 for supporting the wafer; a second heating unit 202 is disposed in the partition structure 101 for heating the partition structure Figure 10 As shown, a third heating unit 203 is disposed inside the base 103 for heating the wafer; the third heating unit 203 is disposed on each wall of the cavity 100.

[0046] This utility model provides a wafer baking chamber, including a cavity 100 with an internal space; at least one partition structure 101 is provided in the internal space to divide the internal space into at least two process chambers 102 arranged in the vertical direction Z, so that multiple process chambers 102 can be accommodated in a single cavity 100, effectively utilizing vertical space and improving space utilization; in addition, the wafer baking chamber includes multiple heating units: a first heating unit 201 is disposed in the partition structure 101 for heating the partition structure 101 that separates the different process chambers 102. Heat helps establish a uniform temperature transition in the vertical Z direction between adjacent process chambers 102. Simultaneously, a base 103 for supporting the wafer is provided within each process chamber 102, and a second heating unit 202 is installed inside the base 103. This allows direct heating of the wafer and its supporting structure, ensuring a uniform baking temperature for the wafer. Furthermore, a third heating unit 203 is installed on each wall of the cavity 100 to heat the edges of each process chamber 102 while simultaneously compensating for edge temperature losses. By installing heating units in the partition structure 101, inside the base 103, and on the cavity walls, multi-point, distributed heating of different key areas of the process chambers 102 is achieved. This combination method can more effectively control and maintain the temperature uniformity within the multiple vertically stacked process chambers 102 and the areas supporting the wafers.

[0047] The cavity 100 has an internal space that provides process space for wafer baking.

[0048] In this embodiment, the cavity 100 includes a first direction X in the plane, a second direction Y perpendicular to the first direction X, and a height direction Z perpendicular to the plane containing the first direction X and the second direction Y.

[0049] At least one partition structure 101 is provided in the internal space of the cavity 100 to divide the internal space into at least two process chambers 102 in the vertical direction Z. This allows multiple wafers to be processed simultaneously or in batches while maintaining a small footprint in the cavity 100, thereby improving the production efficiency of the wafer baking chamber. In addition, the partition structure 101 also serves to support the base 103.

[0050] In this embodiment, there is one partition structure 101, and there are two process chambers 102 in the cavity 100, namely a lower chamber 102b and an upper chamber 102a located on the lower chamber 102b.

[0051] In this embodiment, the first heating unit 201 (e.g.) Figure 12As shown, it is installed in the partition structure 101 for heating the partition structure 101. Because the partition structure 101 serves as both the bottom plate of the upper chamber 102a and the top plate of the lower chamber 102b, heating the partition structure 101 makes it easy to provide a consistent temperature environment for the upper chamber 102a and the lower chamber 102b.

[0052] In this embodiment, the process chamber 102 has a transfer port (not shown in the figure). The transfer port is a channel for wafers to enter and exit the process chamber 102, used to place wafers to be baked into the process chamber 102, and also used to remove baked wafers from the process chamber 102.

[0053] As an example, the opening direction of the conveyor is a first direction X. In other embodiments, the opening direction of the conveyor can also be a second direction Y.

[0054] In this embodiment, the wall of the cavity 100 includes: the side wall of the cavity 100, the top of the cavity 100, and the bottom of the cavity 100.

[0055] Specifically, the top of the cavity 100 includes a cover plate 112. The cover plate 112 serves as a component of the upper chamber 102a, making the upper chamber 102a easy to maintain.

[0056] In this embodiment, the wafer baking chamber further includes a valve frame 113, which is disposed at the transfer port of the process chamber 102 (not shown in the figure).

[0057] There are two process chambers 102, namely an upper chamber 102a and a lower chamber 102b. Correspondingly, an upper valve 108 and a lower valve 109 are slidably arranged on the valve frame 113. During the sliding process, the upper valve 108 opens and closes the upper chamber 102a, and the lower valve 109 opens and closes the lower chamber 102b.

[0058] It should be noted that the upper chamber 102a includes: transfer ports (not shown in the figure) and a buffer chamber 114 disposed at both ends in the first direction X. The transfer ports are channels for the wafer to enter and leave the upper chamber 102a, allowing the wafer to be accurately fed into the chamber for baking and safely removed after baking; the buffer chamber 114 is provided with an exhaust port 106 (e.g., Figure 3 As shown), it is used to extract impurity gases during the baking process. Because the opening and closing of the valve frame 113 during the wafer's entry and exit from the chamber will cause airflow disturbance in the upper chamber 102a, the heat of the buffer chamber 114 will also be carried away during the extraction process. Since the transfer port (not shown in the figure) and the buffer chamber 114 are located at both ends of the first direction X, it is beneficial to reduce the heat loss of the upper chamber 102a.

[0059] Specifically, the buffer chamber 114 is located at the end of the upper chamber 102a away from the delivery port.

[0060] In this embodiment, the third heating unit 203 (e.g.) Figures 5 to 9 As shown), the third heating unit 203 is installed on each wall of the cavity 100 to heat the edge area of ​​the process chamber 102 to achieve temperature compensation, thereby making up for the heat loss due to the edge of the cavity 100 itself and improving the temperature uniformity of the entire internal space of the cavity 100.

[0061] It should be noted that the wafer baking chamber also includes: an air inlet 105 (such as...) Figure 3 As shown), it communicates with the process chamber 102 and is located on one side of the process chamber 102 in the first direction X; the exhaust port 106 (as shown) Figure 3 As shown), it is connected to the process chamber 102 and is located on the other side of the process chamber 102 in the first direction X.

[0062] The air inlet 105 and the air outlet 106 are used to introduce process gas into the process chamber 102 and exhaust waste gas, respectively, to realize gas circulation and renewal within the process chamber 102. The air inlet 105 and the air outlet 106 are located on both sides of the process chamber 102 in the first direction X, forming an airflow path, which is beneficial to the uniform distribution of process gas and the rapid discharge of waste gas.

[0063] The process chamber 102 employs multiple air inlets 105, which allows for a more uniform gas distribution within the chamber, increasing the contact area between the gas and the wafer and thus improving baking efficiency. The exhaust port 106 is located on the same side of the multiple air inlets 105, creating a unidirectional airflow. This facilitates the timely removal of waste gas after the reaction, preventing its accumulation within the process chamber 102 and ensuring the stability of the baking process. Consequently, it improves the baking effect and product quality.

[0064] refer to Figures 5 to 11 In this embodiment, the third heating unit 203 includes a plurality of heaters 203a, which are distributed on the wall of the cavity 100.

[0065] In this embodiment, the heater includes a heating rod with a power of 200W to 500W, for example, 350W.

[0066] It should be noted that the cavity wall includes a valve frame 113, an upper chamber 102a, and a lower chamber 102b. Correspondingly, the third heating unit 203 is disposed on the valve frame 113, the upper chamber 102a, and the lower chamber 102b.

[0067] In this embodiment, the wafer baking chamber further includes: a temperature sensing unit, which includes multiple detectors 111, which are disposed on the wall of the cavity 100, the partition structure 101, and the base 103; and a controller (not shown in the figure), which is connected to the temperature sensing unit, the first heating unit 201, the second heating unit 202, and the third heating unit 203. The controller is used to receive temperature information from the temperature sensing unit and adjust the output power of at least one of the first heating unit 201, the second heating unit 202, and the third heating unit 203.

[0068] The combination of the temperature sensing unit and the controller constitutes a closed-loop temperature control system for the wafer baking chamber. Detectors 111 are respectively installed on the chamber wall, the partition structure 101, and the base 103, thereby monitoring the temperature status of various key parts in the process chamber 102. The controller receives this temperature information in real time, and can therefore precisely adjust the output power of the first heating unit 201, the second heating unit 202, and the third heating unit 203 based on the deviation between the actual temperature and the target temperature, ensuring the temperature uniformity of the process chamber 102 and ensuring that the wafers obtain a uniform baking temperature.

[0069] In this embodiment, the detector 111 can be a thermocouple (TC). Thermocouples have the advantages of wide measurement range, simple structure, robustness and durability, and low cost.

[0070] In this embodiment, the controller includes a programmable logic controller (PLC), which features high reliability and ease of programming and maintenance.

[0071] like Figure 5 and Figure 6 As shown, the third heating unit 203 further includes: at least one heater 203a, disposed on the valve frame 113; and a detector 111, disposed on the valve frame 113.

[0072] In this embodiment, providing at least one heater 203a and a detector 111 on the valve frame 113 facilitates local temperature control. The heater 203a continuously heats the area of ​​the valve frame 113, and the detector 111 monitors the temperature changes in real time, thereby achieving precise control of the temperature near the transfer port (not shown in the figure). This prevents temperature fluctuations at the transfer port (not shown in the figure) from affecting the temperature field distribution within the process chamber 102, making the entire baking process more controllable and improving the uniformity of wafer baking and product quality.

[0073] Specifically, there are multiple heaters 203a on the valve frame 113, and they are located at the top and bottom of the second direction Y sidewall of the valve frame 113; the detector 111 is located on the second direction Y sidewall of the valve frame 113, and is positioned at the middle position in the height direction Z (e.g., Figure 6 (As shown).

[0074] By symmetrically arranging multiple heaters 203a on the top and bottom of the Y-side wall of the valve frame 113 in the second direction, and setting a detector 111 at the middle position in the Z-direction of the side wall, precise control of the temperature of the valve frame 113 is achieved, thereby ensuring the uniformity and stability of the temperature in the valve frame 113 region during the wafer's entry and exit from the process chamber 102, which is beneficial to improving the yield and reliability of the wafer baking process.

[0075] It should be noted that there are four heaters 203a on the valve frame 113, two on each side wall of the valve frame 113 in the second direction Y, and one on the top of the side wall of the valve frame 113 and the first on the bottom of the side wall of the valve frame 113.

[0076] In this embodiment, two heaters 203a are provided on each side wall of the valve frame 113 in the second direction Y, and the detector 111 is located between the two heaters 203a in the height direction Z.

[0077] By setting two heaters 203a on each sidewall of the valve frame 113 in the second direction Y and setting a temperature detector 111 between them, precise control and uniform heating of the temperature in the valve frame 113 area can be achieved, which helps to ensure the temperature stability of the wafer during the baking process and improve the overall quality and consistency of wafer baking.

[0078] like Figure 5 and Figure 6 As shown, the third heating unit 203 includes: at least one heater 203a disposed on each side wall of the cavity 100 in the second direction Y; and at least one detector 111 disposed on the side wall of the cavity 100 in the second direction Y.

[0079] By providing at least one heater 203a and at least one temperature detector 111 on each side wall of the cavity 100 along the second direction Y, the process chamber 102 can be heated and its temperature monitored in real time and uniformly in the side wall region of the second direction Y. This enables the controller to form a closed-loop feedback control loop for the side wall of the second direction Y based on the temperature information obtained by the side wall detector 111, and can independently and accurately adjust the output power of the heater 203a on each side wall of the second direction Y.

[0080] Specifically, the heater 203a on the second direction Y side wall of the cavity 100 is located on the side wall of the lower chamber 102b near the bottom of the lower chamber 102b, and on the side wall of the upper chamber 102a near the bottom of the upper chamber 102a.

[0081] The heater 203a on the second Y-side wall of the cavity 100 is located near the bottom of the side wall of the lower chamber 102b and the same location near the bottom of the side wall of the upper chamber 102a. This allows for targeted heat input to the lateral boundaries of the upper chamber 102a and the lower chamber 102b, effectively compensating for heat loss or low temperature in the bottom area of ​​each process chamber 102 (near the bottom plate of the cavity or the partition structure 101). Furthermore, combined with the detector 111 on the second Y-side wall of the cavity 100 and the controller adjustment, the heat on the second Y-side walls of the upper chamber 102a and the lower chamber 102b can be controlled more precisely and independently.

[0082] In this embodiment, as Figure 6 As shown, the third heating unit 203 further includes: at least one heater 203a, disposed on the side wall of the buffer chamber 114; and at least one detector 111, located on the same side wall as the heater 203a on the buffer chamber 114, which facilitates precise control of the temperature of the buffer chamber 114. Specifically, the heater 203a directly heats the side wall of the buffer chamber 114 to compensate for heat loss in that area and ensure the uniformity of the internal temperature of the buffer chamber 114; while the detector 111 monitors the temperature near the heater 203a in real time and feeds the data back to the controller, enabling the controller to precisely adjust the output power of the heater 203a, thereby maintaining the temperature of the buffer chamber 114 within the set range.

[0083] like Figure 7 and Figure 8 As shown, the third heating unit 203 further includes: at least one heater 203a, disposed on each side wall of the cover plate 112 in the first direction X; and at least one detector 111, disposed on the top of the cover plate 112.

[0084] At least one heater 203a is disposed on each side wall of the cover plate 112 in the first direction X, and at least one detector 111 is arranged on the top of the cover plate 112 along the height direction Z. This enables active regulation and precise monitoring of the heat distribution in the top region of the cavity 100, thereby enabling targeted heating of the edge of the cover plate 112 to compensate for heat loss caused by the cover plate 112 in contact with the external environment, thereby reducing the temperature gradient between the edge and the center region of the cover plate 112. This ensures the uniformity of the temperature field at the top of the cavity 100, making the heat distribution in the cavity 100 more balanced, which is beneficial to reducing uneven wafer baking caused by temperature differences on the wafer surface.

[0085] In this embodiment, three spaced heaters 203a are provided on each side wall of the cover plate 112 in the first direction X.

[0086] like Figure 9 As shown, the third heating unit 203 further includes: a plurality of heaters 203a, disposed at the bottom of the cavity 100, with some heaters 203a disposed on one side of the bottom of the cavity 100 in the first direction X, and the remaining heaters 203a disposed on the other side of the bottom of the cavity 100 in the first direction X; the temperature sensing unit further includes: a detector 111, located at the bottom of the cavity 100.

[0087] Multiple heaters 203a are provided at the bottom of the cavity 100, with some heaters 203a located on one side of the bottom of the cavity 100 in the first direction X, and the remaining heaters 203a located on the other side of the bottom of the cavity 100 in the first direction X, thereby enabling multi-point heating of the bottom of the cavity 100. At the same time, a detector 111 is provided at the bottom of the cavity 100 to monitor the actual temperature of the bottom in real time and feed the information back to the controller. Therefore, the controller can accurately adjust the output power of the heaters 203a at the bottom of the cavity 100 according to the feedback signal of the detector 111, so as to maintain the temperature consistency of the lower chamber 102b during the baking process.

[0088] Specifically, the detector 111 at the bottom of the cavity 100 is located near the buffer chamber 114 and away from the transmission port.

[0089] By placing the detector 111 in the temperature sensing unit closer to the buffer chamber 114 in the upper chamber 102a, the actual temperature of the end of the upper chamber 102a away from the conveying port can be reflected more sensitively and accurately. This allows the temperature gradient or fluctuation of the buffer chamber 114 to be monitored. Therefore, the controller can precisely adjust the heater 203a located on the side wall of the buffer chamber 114 based on the temperature data obtained by the detector 111, so that the temperature of the buffer chamber 114 area can be maintained within the range required by the process. This helps to reduce the temperature non-uniformity caused by heat exchange between the buffer chamber 114 and the main process chamber 102a.

[0090] In this embodiment, a base 103 is provided in each process chamber 102. The base 103 is used to support the wafer to be baked. The base 103 is located inside the process chamber 102 and is the direct carrier of the wafer.

[0091] refer to Figure 10 and Figure 11 Partition structure 101 (e.g.) Figure 11 (As shown) includes: a partition body 1011; a groove structure 1012 disposed on the top of the partition body 1011; and a groove cover plate 104 (as shown). Figure 10As shown), it is disposed on the groove structure 1012, and the groove cover plate 104 and the groove structure 1012 at least enclose a connecting space 101a (as shown). Figure 10 As shown), and wiring channel 101b communicating with connection space 101a (as shown). Figure 10 (as shown); First heating unit 201 (as shown) Figure 12 As shown, the first heating unit 201 is disposed inside the partition body 1011. The first heating unit 201 has a connection end 110, which is exposed in the connection space 101a. The connection line of the first heating unit 201 is connected to the connection end 110, and the connection line of the first heating unit 201 is disposed in the wiring channel 101b.

[0092] The connecting space 101a, formed by the groove structure 1012 and the groove cover plate 104, provides a place for the installation and connection of the connection end 110 of the first heating unit 201. At the same time, the wiring channel 101b, which is connected to the connecting space 101a, provides a safe and orderly wiring path for the connection line of the first heating unit 201, avoiding interference between the connection line and other components in the cavity 100 or the influence of high temperature. Therefore, the temperature of the partition structure 101 can be precisely controlled to ensure the temperature uniformity of the upper cavity 102a and the lower cavity 102b, and ultimately improve the quality and consistency of wafer baking.

[0093] In this embodiment, the first heating unit 201 includes a heating wire and a heating power of 250W to 750W.

[0094] It should be noted that the groove structure 1012 is positioned close to the air extraction port 106 in the first direction X.

[0095] Setting the groove structure 1012 close to the exhaust port 106 is beneficial for directing any trace pollutants or gases that may be generated in the connection space 101a and wiring channel 101b directly to the exhaust port 106, thereby reducing their diffusion in the process chamber 102.

[0096] In this embodiment, the groove structure 1012 extends along the first direction X, and one end of the groove structure 1012 in the first direction X is an open end 1013. The open end 1013 is connected to the side wall of the partition body 1011 in the first direction X. The first direction X is perpendicular to the second direction Y.

[0097] The groove structure 1012 extends along the first direction X, so that the connection space 101a and the wiring channel 101b also extend along the first direction X, providing a wiring path for the connection line. The open end 1013 of the groove structure 1012 reduces the installation difficulty of the groove cover plate 104.

[0098] In this embodiment, the first direction X is the length direction of the horizontal cavity 100. In other embodiments, the first direction X in this embodiment is the width direction of the horizontal cavity.

[0099] In this embodiment, the partition structure 101 further includes a wiring channel outlet 1014, located at the bottom of the wiring channel 101b away from the connection space 101a. The cavity 100 further includes a first wire-passing hole 107, located below the wiring channel outlet 1014 and corresponding to the wiring channel outlet 1014, that is, located directly below the wiring channel outlet 1014. This facilitates the first connecting line led out from the bottom of the base 103 and the second connecting line led out from the partition structure 101 to pass through the wiring channel outlet 1014 and the first wire-passing hole 107, and then penetrate the side wall of the lower cavity 100 in the height direction, and finally lead out to the outside of the cavity 100.

[0100] Specifically, such as Figure 12 and Figure 13 As shown, the partition body 1011 includes: a central region I and a peripheral region II located around the central region I; a first heating unit 201 located in the partition body 1011, and the first heating unit 201 in the central region I avoids the third groove 10123 (e.g., Figure 13 As shown, the first heating unit 201 in the outer area II is arranged in multiple circles around the central area I.

[0101] The partition body 1011 is divided into a central region I and an outer region II, and different heating wires are used for different regions, achieving fine control of the temperature distribution of the partition structure 101 and more effectively improving the overall temperature uniformity of the cavity 100. Specifically, the first heating unit 201 is designed as a strip, which facilitates its arrangement inside the partition body 1011, and it is positioned in the central region I to avoid interference with the third groove 10123, thus ensuring the mechanical strength and stability of the partition structure 101. At the same time, a multi-ring arrangement is used in the outer region II, increasing the heating density in the outer region II and compensating for heat loss at the edge of the cavity 100, thereby reducing the temperature difference between the edge of the cavity 100 and the central region I, and thus improving the overall temperature uniformity of the cavity.

[0102] It should also be noted that the partition body 1011 includes: an upper partition 1011a and a lower partition 1011b located below the upper partition 1011a, and the upper partition 1011a and the lower partition 1011b are fixedly connected.

[0103] As an example, the upper partition 1011a and the lower partition 1011b are connected by welding.

[0104] In this embodiment, the first heating unit 201 is disposed between the upper partition 1011a and the lower partition 1011b of the partition body 1011.

[0105] like Figure 13 As shown, the groove structure 1012 includes: a first groove 10121, located at the top of the partition body 1011, with the bottom surface of the first groove 10121 abutting against the groove cover plate 104; a second groove 10122, located in a portion of the bottom surface of the first groove 10121; and a third groove 10123, located in a portion of the bottom surface of the second groove 10122. The third groove 10123 and the area of ​​the second groove 10122 directly above the third groove 10123 form a connecting space 101a (e.g., ...). Figure 10 As shown), the remaining area of ​​the second groove 10122 and the groove cover plate 104 form a wiring channel 101b (as shown). Figure 10 (As shown). The multi-level groove morphology of the first groove 10121, the second groove 10122, and the third groove 10123 makes it so that when the groove cover plate 104 abuts against the bottom surface of the first groove 10121 of the groove structure 1012, there is a connection space 101a and a wiring channel 101b between the groove cover plate 104 and the groove structure 1012 for accommodating the connecting wires of the first heating unit 201 and the second heating unit 202.

[0106] Specifically, the third groove 10123 and the area of ​​the second groove 10122 directly above the third groove 10123 constitute the connecting space 101a, and the remaining area of ​​the second groove 10122, together with the groove cover plate 104, constitutes the wiring channel 101b. The connecting space 101a and the wiring channel 101b are used to set the first connecting line and the second connecting line.

[0107] The groove structure 1012 is a multi-layered stepped groove, which can not only fix the groove cover plate 104, but also arrange the connection lines of the first heating unit and the connection lines of the second heating unit in an orderly manner, thereby avoiding the problem of messy and disordered wiring, improving the performance and reliability of the wafer baking chamber, and improving the space utilization rate inside the wafer baking chamber.

[0108] like Figure 14 As shown, a schematic diagram of the structure of the base 103 in the upper chamber 102a is illustrated. Figure 15 The diagram shows a schematic of the structure of the base 103 in the lower chamber 102b. The second heating unit 202 is disposed inside the base 103, directly heating the base 103 and transferring the heat to the wafer through the base 103, thereby heating the wafer.

[0109] In this embodiment, the second heating unit 202 includes a heating wire and a heating power of 500W to 1500W.

[0110] Specifically, the base 103 includes: a wafer carrier disk 1031; a support portion 1032 located at the bottom of the wafer carrier disk 1031; a second heating unit 202 located in the upper process chamber of the adjacent process chamber, situated in the wafer carrier disk 1031 and surrounding the center of the wafer carrier disk 1031, with the connecting wire of the second heating unit 202 passing through the support portion 1032 and disposed in the connection space 101a and the wiring channel 101b; and a detector 111 disposed in the wafer carrier disk 1031 of the base 103.

[0111] The connecting wires of the second heating unit 202 in the upper process chamber of the adjacent process chamber 102 pass through the support portion 1032 and are disposed in the connection space 101a and wiring channel 101b. This provides a routing path for the connecting wires of the second heating unit 202, avoiding interference or damage caused by the exposed connecting wires inside the cavity 100. This ensures stable power supply and precise temperature control for the second heating unit 202, enabling direct and uniform baking of the wafer. Furthermore, the second heating unit 202 is arranged around the center of the wafer carrier 1031. This arrangement allows for more even heat transfer to the wafer surface, further improving the uniformity of wafer baking. During wafer baking, the detector 111 measures the temperature of the wafer carrier 1031 and feeds the data back to the controller, enabling the controller to precisely adjust the output power of the heater 203a, thereby maintaining the temperature of the wafer carrier 1031 within the set range.

[0112] In this embodiment, the groove cover plate 104 has an opening 1041 (e.g., Figure 10 As shown), a first line channel 1033 is provided in the support portion of the base 103 in the upper chamber 102a (as shown). Figure 14 (As shown); the connecting wire of the second heating unit 202 of the base in the upper chamber 102a passes through the first wire channel 1033, the opening 1041, the connecting space 101a, the wiring channel 101b, the wiring channel outlet 1014, and the first wire hole 107, and is finally led to the outside of the cavity 100.

[0113] In this embodiment, a second wire channel 1034 (e.g., in the support portion of the base 103 in the lower chamber 102b) is provided. Figure 15 (as shown); the bottom of the cavity 100 also includes: a second wire hole 115 (as shown). Figure 9 As shown), it passes through the bottom of the lower chamber 102b and communicates with the outside of the cavity 100. The second wire hole 115 is located at the bottom of the base 103 in the lower chamber 102b and is used to lead the first connecting wire of the second heating unit in the base 103 in the lower chamber 102b to the outside of the cavity 100 through the second wire channel 1034 and the second wire hole 115.

[0114] This utility model also provides a semiconductor device. The semiconductor device includes a wafer baking chamber, a chamber 100, including an internal space: at least one partition structure 101 disposed in the internal space, dividing the internal space into at least two process chambers 102 arranged in the vertical direction Z; a first heating unit 201 disposed in the partition structure 101 for heating the partition structure 101; a base 103 disposed in the process chamber 102 for supporting the wafer; a second heating unit 202 disposed inside the base 103 for heating the wafer; and a third heating unit 203 disposed on each wall of the chamber 100.

[0115] The wafer baking chamber of the semiconductor equipment provided in this embodiment of the present invention includes a cavity 100 with an internal space; at least one partition structure 101 is provided in the internal space to divide the internal space into at least two process chambers 102 arranged in the vertical direction Z, so that multiple process chambers 102 can be accommodated in a single cavity 100, effectively utilizing vertical space and improving the space utilization rate of the equipment; in addition, the wafer baking chamber includes multiple heating units: a first heating unit 201 is disposed in the partition structure 101 for heating the partition separating the different process chambers 102. Heating the partition structure 101 helps establish a uniform temperature transition in the vertical Z direction. Simultaneously, a base 103 for supporting the wafer is provided within each process chamber 102, and a second heating unit 202 is installed inside the base 103. This allows direct heating of the wafer and its supporting structure, ensuring a uniform baking temperature for the wafer. Furthermore, a third heating unit 203 is installed on each wall of the cavity 100 to heat the edges of each process chamber 102 while simultaneously compensating for edge temperature losses. By installing heating units in the partition structure 101, inside the base 103, and on the cavity walls, multi-point, distributed heating of different key areas of the process chamber 102 is achieved. This combination method can more effectively control and maintain the temperature uniformity within the multiple vertically stacked process chambers 102 and the areas supporting the wafers.

[0116] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A wafer baking chamber, characterized in that, include: Cavity, including internal space: At least one partition structure is disposed in the internal space to divide the internal space into at least two process chambers arranged in the vertical direction; A first heating unit is disposed in the partition structure and is used to heat the partition structure; A base, disposed within the process chamber, is used to support the wafer; The second heating unit is disposed inside the base and is used to heat the wafer; The third heating unit is installed on each wall of the cavity.

2. The wafer baking chamber as described in claim 1, characterized in that, The wafer baking chamber further includes a temperature sensing unit, comprising multiple detectors, which are disposed on the walls of the chamber, the partition structure, and the base. A controller is connected to the temperature sensing unit, the first heating unit, the second heating unit, and the third heating unit. The controller is used to receive temperature information from the temperature sensing unit and adjust the output power of at least one of the first heating unit, the second heating unit, and the third heating unit.

3. The wafer baking chamber as described in claim 2, characterized in that, The process chamber has a transfer port; The wafer baking chamber further includes: a valve frame disposed at the transfer port of the process chamber; The third heating unit further includes: at least one heater disposed on the valve frame; The detector is mounted on the valve frame.

4. The wafer baking chamber as described in claim 3, characterized in that, The cavity includes a first direction in the plane and a second direction perpendicular to the first direction, wherein the first direction is the opening direction of the conveying port; The number of heaters on the valve frame is multiple, and they are disposed at the top and bottom of the second-direction sidewall of the valve frame; The detector is located on the side wall of the valve frame in the second direction and is positioned at the middle of the height direction.

5. The wafer baking chamber as described in claim 4, characterized in that, Two heaters are provided on each side wall of the valve frame in the second direction, and the detector is located between the two heaters in the height direction.

6. The wafer baking chamber as described in claim 2, characterized in that, The process chamber has a transfer port; the chamber includes a first direction in a plane and a second direction perpendicular to the first direction, the first direction being the opening direction of the transfer port; The top of the cavity includes a cover plate; the third heating unit further includes at least one heater disposed on each side wall of the cover plate in the first direction. At least one detector is disposed on top of the cover plate.

7. The wafer baking chamber as described in claim 2, characterized in that, The process chamber has a transfer port; the chamber includes a first direction in a plane and a second direction perpendicular to the first direction, the first direction being the opening direction of the transfer port; The third heating unit includes: at least one heater disposed on each side wall of the cavity in the second direction; At least one detector is disposed on the side wall of the cavity in the second direction.

8. The wafer baking chamber as described in claim 7, characterized in that, The cavity has two process chambers: a lower chamber and an upper chamber located above the lower chamber. The heater on the second-direction sidewall of the cavity is located on the sidewall of the lower chamber near the bottom of the lower chamber, and on the sidewall of the upper chamber near the bottom of the upper chamber.

9. The wafer baking chamber as described in claim 2, characterized in that, The cavity includes a first direction in the plane and a second direction perpendicular to the first direction; The third heating unit further includes: a plurality of heaters disposed at the bottom of the cavity, with some of the heaters disposed on one side of the bottom of the cavity in a first direction and the remaining heaters disposed on the other side of the bottom of the cavity in the first direction; The temperature sensing unit also includes a detector located at the bottom of the cavity.

10. The wafer baking chamber as described in claim 2, characterized in that, The cavity has two process chambers: a lower chamber and an upper chamber located above the lower chamber. The upper chamber includes a delivery port and a buffer chamber located at both ends in the first direction; The detector is positioned close to the buffer chamber and away from the transmission port.

11. The wafer baking chamber as described in claim 2, characterized in that, The process chamber has a transfer port; The cavity has two process chambers: a lower chamber and an upper chamber located above the lower chamber; the wafer baking chamber further includes a buffer chamber located at the end of the upper chamber away from the transfer port. The third heating unit further includes: at least one heater disposed on the side wall of the buffer chamber; At least one detector is located on the same side wall as the heater on the buffer chamber.

12. The wafer baking chamber as described in claim 1, characterized in that, The partition structure includes: Partition body; A groove structure is provided on the top of the partition body; A groove cover plate is disposed on the groove structure, and the groove cover plate and the groove structure at least enclose a connecting space and a wiring channel communicating with the connecting space; The first heating unit is disposed inside the partition body. The first heating unit has a connection end exposed in the connection space. The connection wire of the first heating unit is disposed in the wiring channel.

13. The wafer baking chamber as described in claim 12, characterized in that, The groove structure includes: The first groove is located at the top of the partition body, and the bottom surface of the first groove abuts against the groove cover plate; The second groove is located in a portion of the bottom surface of the first groove; The third groove is located in a part of the bottom surface of the second groove, and the third groove communicates with the area directly above the third groove. The remaining area of ​​the second groove and the groove cover plate form a wiring channel.

14. The wafer baking chamber as described in claim 13, characterized in that, The partition body includes: a central area and an outer area located around the central area; The first heating unit is located in the partition body, and the first heating unit in the central area is arranged to avoid the third groove, while the first heating unit in the peripheral area is arranged to surround the central area in multiple circles.

15. The wafer baking chamber as described in claim 12, characterized in that, The base includes: Wafer carrier disk; The support portion is located at the bottom of the wafer carrier disk; In the adjacent process chambers, the second heating unit in the upper process chamber is located in the wafer carrier tray and is arranged around the center of the wafer carrier tray. The connecting line of the second heating unit passes through the support portion and is arranged in the connection space and wiring channel. The wafer baking chamber also includes a temperature sensing unit, and the detector of the temperature sensing unit is arranged in the wafer carrier tray of the base.

16. The wafer baking chamber as described in claim 1, characterized in that, The first heating unit includes a heating wire, and the second heating unit includes a heating wire.

17. The wafer baking chamber as described in claim 3, characterized in that, The heater includes a heating rod.

18. A semiconductor device, characterized in that, Includes the wafer baking chamber as described in any one of claims 1 to 17.

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