Display substrate and display device

Abstract

The utility model discloses a display substrate and a display device. The display substrate comprises a display area, a transition area and a hole area, the transition area surrounds the hole area, and the display area surrounds the transition area. The array substrate further comprises a substrate and a plurality of first signal lines located on one side of the substrate. Part of the first signal line comprises a first section, a first connecting section and a second section which are connected in sequence, the first section and the second section are located in the display area and extend in the first direction, and the first connecting section is located in the transition area and surrounds the hole area. The second signal lines and the first signal lines are located on the same side of the substrate. Wherein the first direction intersects with the second direction. In the transition area, the orthographic projection of the second signal line in the thickness direction of the display substrate and the first connecting section are not overlapped. The second signal line can be prevented from being coupled with the first signal line when outputting the signal, and normal work of the first signal line is not affected.

Description

Display substrate and display device Technical Field

[0001] This utility model relates to the field of display technology, and in particular to a display substrate and a display device. Background Technology

[0002] With the development of devices such as mobile phones and tablets, users have increasingly higher demands for screen-to-body ratio. In order to improve the screen-to-body ratio of display devices, openings are usually made in the display area of ​​the display device, and cameras or sensors are placed below the openings, which can increase the screen-to-body ratio of the display device.

[0003] However, one of the problems with this design is that the openings in the display device can cause display mura (a phenomenon where the brightness of the display is uneven, resulting in various marks) in some areas of the display panel. Summary of the Invention

[0004] The purpose of this application is to provide a display substrate and display device with good display performance.

[0005] This application discloses a display substrate, which includes a display area, a transition area, and an aperture area, wherein the transition area surrounds the aperture area and the display area surrounds the transition area;

[0006] The display substrate includes:

[0007] Base;

[0008] A plurality of first signal lines are located on one side of the substrate; some of the first signal lines include a first segment, a first connecting segment and a second segment connected in sequence, the first segment and the second segment are located in the display area and both extend along a first direction, and the first connecting segment is located in the transition area and surrounds the hole area;

[0009] A plurality of second signal lines extending along the second direction are located on the same side of the substrate as the first signal line; the first direction intersects the second direction;

[0010] Within the transition zone, the orthographic projection of the second signal line in the thickness direction of the display substrate does not overlap with the first connection segment.

[0011] In some alternative embodiments, the first signal line includes a data signal line; the second signal line includes a light emission control signal line and / or a scan signal line.

[0012] In some optional embodiments, a portion of the light-emitting control signal line includes a fifth segment, a third connecting segment, and a sixth segment connected in sequence. The fifth segment and the sixth segment are located in the display area and both extend along the second direction. The third connecting segment is located in the transition area and surrounds the hole area. The orthographic projection of the third connecting segment in the thickness direction of the display substrate has no overlapping area with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

[0013] In some alternative embodiments, a portion of the light-emitting control signal line includes a fifth segment and a sixth segment that are insulated from each other, the fifth segment and the sixth segment being located on opposite sides of the display area and the transition area along a second direction; both the fifth segment and the sixth segment extend along the second direction.

[0014] In some optional embodiments, the number of hole regions is multiple, namely a first hole region to an nth hole region; the first hole region to the nth hole region are arranged sequentially;

[0015] The first hole area is surrounded by a plurality of first connecting segments, wherein the number of first connecting segments on the side of the first hole area away from the nth hole area is less than the number of first connecting segments on the side of the nth hole area; and / or, the nth hole area is surrounded by a plurality of first connecting segments, wherein the number of first connecting segments on the side of the nth hole area away from the first hole area is less than the number of first connecting segments on the side of the first hole area.

[0016] In some optional embodiments, the display substrate further includes a first conductive layer located on one side of the substrate, a second conductive layer located on the side of the first conductive layer away from the substrate, a first source / drain metal layer located on the side of the second conductive layer away from the first conductive layer, and a second source / drain metal layer located on the side of the first source / drain metal layer away from the substrate, wherein an insulating structure is provided between the first conductive layer, the second conductive layer, the first source / drain metal layer, and the second source / drain metal layer;

[0017] In one portion of the first signal lines, the first segment and the second segment are located in the second source / drain metal layer, and the first connection segment is located in the second source / drain metal layer; in another portion of the first signal lines, the first segment and the second segment are located in the second source / drain metal layer, and the first connection segment is located in the first conductive layer.

[0018] In some alternative embodiments, the display substrate further includes a shielding signal line located in the first source / drain metal layer or the second conductive layer; the orthographic projection of the shielding signal line in the thickness direction of the display substrate at least partially overlaps with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

[0019] In some alternative embodiments, the display substrate further includes a metal conductive layer, an active layer, and shielded signal lines;

[0020] The metal conductive layer is located on the side of the substrate close to the first conductive layer, and the active layer is located on the side of the metal conductive layer close to the first conductive layer; the shielded signal line is disposed on the metal conductive layer; the orthographic projection of the shielded signal line in the thickness direction of the display substrate at least partially overlaps with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

[0021] In some optional embodiments, the display substrate further includes a first conductive layer located on one side of the substrate, a second conductive layer located on the side of the first conductive layer away from the substrate, a first source / drain metal layer located on the side of the second conductive layer away from the first conductive layer, and a second source / drain metal layer located on the side of the first source / drain metal layer away from the substrate, wherein an insulating structure is provided between the first conductive layer, the second conductive layer, the first source / drain metal layer, and the second source / drain metal layer;

[0022] The scan signal line includes a third segment, a second connecting segment, and a fourth segment connected in sequence; the third segment and the fourth segment are both located in the first conductive layer; the third segment and the fourth segment are both located in the display area and extend along a first direction; the second connecting segment is located in the first source / drain metal layer or the second conductive layer; the second connecting segment is located in the transition region and surrounds the hole region.

[0023] In some alternative embodiments, the orthographic projection of the second connecting segment in the thickness direction of the display substrate has no overlapping area with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

[0024] In some alternative embodiments, the orthographic projection of the second connecting segment in the thickness direction of the display substrate at least partially overlaps with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

[0025] In some alternative embodiments, the first connection segments of adjacent first signal lines are located in different film layers.

[0026] In some alternative embodiments, the first signal line is a data signal line; the first connection segment of the data signal line connected to the red sub-pixel and the blue sub-pixel is located in one of the second source / drain metal layer and the first conductive layer, and the first connection segment of the data signal line connected to the green sub-pixel is located in the other of the second source / drain metal layer and the first conductive layer.

[0027] This application also provides a display device, which includes the display substrate described above.

[0028] Compared with related technologies, the second signal line of this application has no overlapping area with the first connection segment when projected onto the thickness direction of the display substrate. This avoids coupling between the second signal line and the first signal line during signal output, thus preventing interference with the normal operation of the first signal line.

[0029] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0030] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this specification and, together with the description, serve to explain the principles of this specification.

[0031] Figure 1 is a planar schematic diagram of the display substrate of this application.

[0032] Figure 2 is a schematic diagram of partial circuit connections of the display substrate of this application.

[0033] Figure 3 is a schematic diagram of the pixel driving circuit of the display substrate of this application.

[0034] Figure 4 is a schematic diagram of the layer hierarchy of the display substrate of this application in one embodiment.

[0035] Figure 5 is a partially enlarged schematic diagram of region A in Figure 1 in one embodiment.

[0036] Figure 6 is a partially enlarged schematic diagram of region A in Figure 1 in one embodiment.

[0037] Figure 7 is a partially enlarged schematic diagram of region B in Figure 1 in one embodiment.

[0038] Figure 8 is a schematic diagram of the layer hierarchy of the display substrate of this application in one embodiment.

[0039] Figure 9 is a partially enlarged schematic diagram of region A in Figure 1 in one embodiment.

[0040] Figure 10 is a partially enlarged schematic diagram of region A in Figure 1 in one embodiment.

[0041] Figure 11 is a schematic diagram of a portion of the film layer in Figure 10 in one embodiment.

[0042] Figure 12 is a schematic diagram of a portion of the film layer in Figure 10 in one embodiment.

[0043] Figure 13 is a schematic diagram of a portion of the film layer in Figure 10 in one embodiment. Detailed Implementation

[0044] The technical solutions in the embodiments (or "implementations") of this application will be clearly and completely described herein with reference to the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.

[0045] If the embodiments of this application contain terms relating to directional indications or positional relationships (such as up, down, left, right, front, back, inside, outside, top, bottom, center, vertical, horizontal, longitudinal, transverse, length, width, counterclockwise, clockwise, axial, radial, circumferential, etc.), such terms are only used to explain the relative positional relationships and movements between components in a specific posture (as shown in the attached figures); if the specific posture changes, the directional indications or positional relationships will also change accordingly. Furthermore, the terms "first" and "second" used in the embodiments of this application are only for descriptive convenience and should not be construed as indicating or implying relative importance.

[0046] As shown in Figure 1, the display substrate includes a display area 1000 and a bezel area 4000. Some display substrates have holes drilled within the display area 1000 to form hole areas 3000. These hole areas 3000 can be used to house front-facing cameras or certain sensors. The display panel also includes a transition area 2000 located between the display area 1000 and the hole areas 3000. The traces originally located in the hole areas 3000 on the display substrate are bypassed by the transition area 2000, so that the original circuit function is not affected during the drilling process. Optionally, the display substrate has raceway-shaped vias, i.e., multiple adjacent hole areas 3000 are surrounded by the same transition area 2000.

[0047] As shown in Figure 1, the display substrate includes a plurality of first signal lines 100 extending along a first direction F1. Some of the first signal lines 100 include a first segment 110, a first connecting segment 120, and a second segment 130 connected in sequence. Both the first segment 110 and the second segment 130 are located in the display area 1000 and extend along the first direction F1. The first connecting segment 120 is located in the transition area 2000 and is disposed around the hole area 3000, and its shape matches the shape of a portion of the edge of the hole area 3000. For example, please also refer to Figure 5, which is a partially enlarged schematic diagram of area A in Figure 1. In an optional embodiment, the hole area 3000 is a circular hole area, and the side of the first segment 110 and the second segment 130 closest to the hole area 3000 continues the extending direction of the first segment 110 and the second segment 130. The first connecting segment 120 may be arc-shaped and surround the circular hole area. When the hole area 3000 has other shapes, the first connecting segment 120 may also be in other suitable shapes and surround the hole area 3000. The first section 110 and the second section 130 are connected by the first connecting section 120.

[0048] The display substrate also includes a plurality of second signal lines extending along the second direction F2. The first direction F1 intersects the second direction F2. Optionally, the first direction F1 can be the length direction of the display substrate, and the second direction F2 can be the width direction of the display substrate. Optionally, the first signal line 100 can be a data signal line, and the second signal line can be at least one of a scan signal line 200 and a light emission control signal line 300.

[0049] Optionally, a portion of the scanning signal line 200 includes a third segment 210, a second connecting segment 220, and a fourth segment 230 connected in sequence. The third segment 210 and the fourth segment 230 are located in the display area 1000 and both extend along the second direction F2. The second connecting segment 220 is located in the transition area 2000 and surrounds the aperture area 3000. A portion of the light emission control signal line 300 includes a fifth segment 310, a third connecting segment 320, and a sixth segment 330 connected in sequence. The fifth segment 310 and the sixth segment 330 are located in the display area 1000 and both extend along the second direction F2. The third connecting segment 320 is located in the transition area 2000 and surrounds the aperture area 3000.

[0050] As shown in Figures 1 and 2, when the first signal line 100 is a data signal line 100, and the second signal line is a scan signal line 200 and a light emission control signal line 300, several data signal lines 100, several scan signal lines 200, and several light emission control signal lines 300 jointly control the pixels on the control panel. Specifically, referring to Figure 2, the data signal lines 100 extend along the first direction F1, and several data signal lines 100 (D1, D2, ...) are arranged along the second direction F2. The scan signal lines 200 extend along the second direction F2, and several scan signal lines 200 (G1, G2, ...) are arranged along the first direction F1. The light emission control signal lines 300 extend along the second direction F2, and light emission control signal lines 300 (not shown in the figure) are arranged along the first direction F1. Each data signal line 100 cooperates with each scan signal line 200 and a light emission control signal line 300 to control the light emission of a sub-pixel 400. For example, D1 and G1 work together, D1 and G2 work together, D2 and G2 work together, and so on.

[0051] The scan signal line 200 can be connected to a shift register unit GOA disposed in the bezel area 4000. Specifically, one shift register unit GOA is connected to one scan signal line 200 to control the light-emitting units 500 located in the same row on the display panel. Of course, shift register units GOA can be disposed at both opposite ends of the display substrate, and a pair of shift register units GOA in opposite positions can be connected to the same scan signal line 200 to obtain more stable driving.

[0052] The light emission control signal line 300 can be connected to a shift register unit GOA disposed in the bezel area 4000. Specifically, one shift register unit GOA is connected to the light emission control signal line 300 to control the light emission units 500 located in the same row of the display panel. Of course, shift register units GOA can be disposed at both ends of the display substrate. A pair of shift register units GOA in opposite positions can be connected to the same light emission control signal line 300 to obtain more stable driving. In this case, the light emission control signal line 300 connected to a pair of shift register units GOA can be configured to drive two rows of sub-pixels.

[0053] The data signal lines can be connected to the source driver module IC located in the border area 4000. Specifically, data signal line D1 is connected to the second terminal of a source driver transistor, the control terminal of which is connected to the multiplexed signal line MUX1, and the first terminal of which is connected to the source signal line S1. The source signal line S1 is then connected to the source driver module IC. Thus, data signal line D1 is connected to the source driver module IC under the control of the multiplexed signal in the multiplexed signal line MUX1. Other data signal lines are also connected to the source driver module IC through this configuration. Optionally, the same source signal line S1 can output data signals to four data signal lines 100 through four multiplexed signal lines MUX and four source driver transistors. Each pair of the four data signal lines 100 drives one column of sub-pixels 400, with one line configured to drive the odd-numbered rows of sub-pixels 400 and the other configured to drive the even-numbered rows of sub-pixels 400.

[0054] As shown in Figure 3, Figure 3 illustrates a pixel driving circuit for a display substrate pixel in one embodiment. The pixel driving circuit includes first transistors T1 to seventh transistors T7. The third transistor T3 is a driving transistor. Scan signal line 200 is connected to the gate of the fourth transistor T4, and data signal line 100 is connected to the first terminal (Data) of the fourth transistor T4. Thus, the scan signal can control the data signal to be written to the first node N1. The first node N1 is connected to the gate of the third transistor T3, so the data signal (Data) can control the on / off state of the driving transistor T3. Light emission control signal line 300 is connected to the gates (EM) of the fifth transistor T5 and the sixth transistor T6. The scan signal can control the on / off state of the fifth transistor T5 and the sixth transistor T6. Thus, the scan signal and the light emission control signal can control the light emission of the light-emitting unit 500, i.e., control the light emission of the sub-pixel 400. Of course, in other embodiments, the pixel driving circuit can be a circuit with other structures, such as a 4T1C, 8T1C, or 9T1C circuit, etc.

[0055] As shown in Figure 4, the display substrate may include a substrate 10, an active layer 11 located on the side of the substrate 10 near the display side, a first gate insulating layer 12 located on the side of the active layer 11 away from the substrate 10, a first conductive layer 20 located on the side of the first gate insulating layer 12 away from the active layer 11, a second gate insulating layer 21 located on the side of the first conductive layer 20 away from the first gate insulating layer 12, a second conductive layer 30 located on the side of the second gate insulating layer 21 away from the first conductive layer 20, and interlayer insulation located on the side of the second conductive layer 30 away from the second gate insulating layer 21. The system comprises: a layer 31; a first source / drain metal layer 40 located on the side of the interlayer insulating layer 31 away from the second conductive layer 30; a passivation layer 41 located on the side of the first source / drain metal layer 40 away from the interlayer insulating layer 31; a first planarization layer 42 located on the side of the passivation layer 41 away from the first source / drain metal layer 40; a second source / drain metal layer 50 located on the side of the first planarization layer 42 away from the passivation layer 41; a second planarization layer 51 located on the side of the second source / drain metal layer 50 away from the first planarization layer 42; a light-emitting device located on the side of the second planarization layer 51 away from the second source / drain metal layer 50; and a packaging structure 60. The third direction F3 can be the thickness direction of the display substrate. The first signal line 100 and the second signal lines 200, 300, etc., of this application can all be disposed in at least one of the first conductive layer 20, the second conductive layer 30, the first source / drain metal layer 40, and the second source / drain metal layer 50.

[0056] In this embodiment, the first segment 110 and the second segment 130 of the first signal line 100 are both disposed on the second source / drain metal layer 50, and the third segment 210 and the fourth segment 230 of the scan signal line 200 and the fifth segment 310 and the sixth segment 330 of the light emission control signal line 300 are both disposed on the first conductive layer 20, as an example.

[0057] Optionally, some of the first connection segments 120 of the first signal lines 100 can be disposed on the second source / drain metal layer 50, and some of the first connection segments 120 of the first signal lines 100 can be disposed on the first conductive layer 20. The first connection segments 120 located on different film layers can be connected to the first segment 110 and the second segment 130 through vias. Optionally, the first connection segments 120 of adjacent first signal lines 100 are located on different film layers. For example, the first connection segment 120 of one of adjacent first signal lines 100 is located on the first conductive layer 20, and the first connection segment 120 of the other is located on the second source / drain metal layer 50. The first signal lines 100 near the via region 3000 are relatively dense. This arrangement can avoid mutual interference between adjacent first signal lines 100. Optionally, when the first signal line 100 is a data signal line, the first connection segment 120 of the data signal line connected to the red sub-pixel and the blue sub-pixel is located on one of the second source / drain metal layer 50 and the first conductive layer 20. The first connection segment 120 of the data signal line connected to the green sub-pixel is located in another layer between the second source / drain metal layer 50 and the first conductive layer 20.

[0058] Optionally, the portion of the second signal line located in the display area 1000 can be disposed on the first conductive layer 20, and the portion located in the transition area 2000 can be disposed on the first source / drain metal layer 40 or the second conductive layer 30. The portion located in the display area 1000 and the portion located in the transition area 2000 can be connected via vias. That is, the second connection segment 220 of the scan signal line 200 is disposed on the first source / drain metal layer 40 or the second conductive layer 30, and the second connection segment 220 can be connected to the third segment 210 and the fourth segment 230 via vias. The third connection segment 320 of the light emission control signal line 300 is disposed on the first source / drain metal layer 40 or the second conductive layer 30, and the third connection segment 320 of the light emission control signal line 300 can be connected to the fifth segment 310 and the sixth segment 330 via vias.

[0059] As shown in Figures 1 and 5, within the transition zone 2000, the orthographic projection of the second signal line onto the thickness direction of the display substrate, i.e., the third direction F3, has no overlap with the first connecting segment 120. That is, the orthographic projections of the second connecting segment 220 and the third connecting segment 320 onto the third direction F3 have no overlap with the orthographic projection of the first connecting segment 120 onto the third direction F3. This avoids coupling between the second signal line and the first signal line 100 during signal output, thus preventing interference with the normal operation of the first signal line 100. Simultaneously, since the scan signal line 200 and the light emission control signal line 300 are not disconnected within the transition zone 2000, display defects caused by the interruption of the scan signal line 200 and the light emission control signal line 300 due to the raceway hole are avoided.

[0060] Optionally, when shift register units GOA are provided at both opposite ends of the display substrate, and a pair of shift register units GOA at opposite positions can be connected to the same light-emitting control signal line 300, part of the light-emitting control signal line 300 includes a fifth segment 310 and a sixth segment 330 connected in sequence, without a third connecting segment 320. The fifth segment 310 and the sixth segment 330 are located in the display area 1000 and on opposite sides of the transition area 2000 along the second direction F2, and both the fifth segment 310 and the sixth segment 330 extend along the second direction F2. That is, the fifth segment 310 and the sixth segment 330 are respectively connected to a pair of shift register units GOA at opposite positions. In this way, omitting the third connecting segment 320 can greatly reduce the width of the transition area 2000, reduce the occupation of the display area 1000 of the display substrate, and thus improve the display effect. Furthermore, since the same light-emitting control signal line 300 is driven from both ends, there will be no obvious display defects without setting a third connection segment 320.

[0061] As shown in Figure 1, in an optional embodiment, there are multiple hole areas 3000, namely, the first hole area to the nth hole area. The first hole areas to the nth hole area are arranged sequentially, for example, they can be arranged sequentially along the second direction F2. A plurality of first connecting segments 120 surround the first hole area, and the number of first connecting segments 120 on the side of the first hole area away from the nth hole area is less than the number of first connecting segments 120 on the side of the first hole area closer to the nth hole area. Alternatively, a plurality of first connecting segments 120 surround the nth hole area, and the number of first connecting segments 120 on the side of the nth hole area away from the first hole area is less than the number of first connecting segments 120 on the side of the nth hole area closer to the first hole area. Or the display substrate has both of the above situations. That is, the first signal line 100 makes more use of the space between the multiple hole areas 3000 for winding, and makes as little use as possible of the boundary between the hole area 3000 and the display area 1000 for winding. In this way, the width of the transition area 2000 can be greatly reduced, the occupation of the display area 1000 of the display substrate can be reduced, thereby improving the display effect. In this embodiment, the number of hole regions 3000 is 2. The number of first connecting segments 120 between two hole regions 3000 is greater than the number of first connecting segments 120 outside the two hole regions 3000.

[0062] As shown in Figures 6 and 7, in an optional embodiment, the display substrate further includes a shielding signal line 102, which is located in the first source / drain metal layer 40 or the second conductive layer 30. The orthogonal projection of the shielding signal line 102 in the thickness direction of the display substrate, i.e., the third direction F3, at least partially overlaps with the orthogonal projection of the first connecting segment 120 in the thickness direction of the display substrate. Optionally, the shielding signal line 102 may be connected to a first power signal line VDD, a second power signal line VSS, a reset signal line Vinit, or other power signals capable of providing a constant voltage source.

[0063] Specifically, taking the connection between the shielded signal line 102 and the second power signal line VSS as an example, the second power signal line VSS is disposed on the first source / drain metal layer 40 in the display area 1000. The shielded signal line 102 may include an overlap segment 1021, a loop segment 1022, and a shielding segment (which overlaps with the first connecting segment 120 in the figure and is therefore not shown). The loop segment 1022 is disposed between the second connecting segment 220 and / or the third connecting segment 320 and the first connecting segment 120, and the loop segment 1022 also surrounds the hole area 3000 and is disposed on the first source / drain metal layer 40 or the second conductive layer 30. The overlap segment 1021 is located in the first conductive layer 20 or the second source / drain metal layer 50. One end of the overlap segment 1021 is connected to the second power signal line VSS through a via, and the other end is connected to the loop segment 1022 through a via. The second power signal line VSS bypasses the second connecting section 220 and / or the third connecting section 320 via the overlapping section 1021, thereby connecting to the loop section 1022. A shielding section is disposed on the first source / drain metal layer 40 or the second conductive layer 30; optionally, the shielding section can be disposed on the same layer as the loop section 1022. The shielding section can at least partially overlap with the first connecting section 120 in the thickness direction and the third direction F3 of the display substrate to achieve shielding between the first connecting sections 120 located between different film layers. For example, when the first signal line 100 is a data signal line, the first connecting section 120 of the data signal line connected to the red and blue sub-pixels is located in one of the second source / drain metal layers 50 and the first conductive layer 20. The first connecting section 120 of the data signal line connected to the green sub-pixel is located in the other layer of the second source / drain metal layer 50 and the first conductive layer 20. The shielding section can achieve shielding between the data signal line connected to the green sub-pixel and the data signal lines connected to the red and blue sub-pixels.

[0064] As shown in Figures 8 and 9, in an optional embodiment, the display substrate further includes a metal conductive layer 101 disposed between the substrate 10 and the active layer 11. A shielding signal line 102 may be disposed on the metal conductive layer 101. In this case, the shielding signal line 102 can be connected to the first power signal line VDD. In the display area 1000, the shielding signal line 102 can reduce interference to the transistors in the pixel driving circuit. In the display area 1000, the first power signal line VDD may be disposed on the first source / drain metal layer 40 and the second source / drain metal layer 50. In the transition area 2000, the shielding signal line 102 at least partially overlaps with the first connection segment 120 in the thickness direction and the third direction F3 of the display substrate to achieve shielding of the first connection segment 120.

[0065] As shown in Figures 10 to 13, Figure 11 is a schematic diagram of the first source / drain metal layer 40 of the display substrate, Figure 12 is a schematic diagram of the first conductive layer 20 of the display substrate, Figure 13 is a schematic diagram of the second source / drain metal layer 50 of the display substrate, and Figure 10 is a schematic diagram of the first conductive layer 20, the first source / drain metal layer 40, and the second source / drain metal layer 50 of the display substrate stacked together. In an optional embodiment, shift register units GOA are provided at opposite ends of the display substrate, and a pair of shift register units GOA at opposite positions can be connected to the same light emission control signal line 300. Optionally, part of the light emission control signal line 300 includes a fifth segment 310 and a sixth segment 330 connected in sequence, without providing a third connecting segment 320. Optionally, a portion of the scan signal line 200 includes a third segment 210, a second connecting segment 220, and a fourth segment 230 connected in sequence. The third segment 210 and the fourth segment 230 are located in the display area 1000 and both extend along the second direction F2. The second connecting segment 220 is located in the transition area 2000 and surrounds the via area 3000. The second connecting segment 220 is located in the second conductive layer 30 or the first source / drain metal layer 40. The first connecting segment 120 of a portion of the first signal line 100 can be disposed in the second source / drain metal layer 50, and the first connecting segment 120 of a portion of the first signal line 100 can be disposed in the first conductive layer 20. The first connecting segment 120 located in different film layers can be connected to the first segment 110 and the second segment 130 through vias. Since the signal on the scan signal line 200 is at a low potential most of the time, only a portion of the segments has a 1H transition in one frame. Optionally, the orthographic projection of the second connecting segment 220 onto the thickness direction (F3) of the display substrate can at least partially overlap with the orthographic projection of the first connecting segment 120 onto the thickness direction (F3) of the display substrate. In this way, the second connecting segment 220 can act as a shielding layer between the first connecting segments 120 of different film layers. Only timing adjustments are needed to ensure that the second connecting segment 220 couples with the first connecting segment 120 with minimal or no coupling. This significantly reduces the width of the transition region 2000, reducing the occupancy of the display area 1000 on the display substrate, thereby improving the display effect.

[0066] To solve the above-mentioned technical problems, this application provides a display device, which includes the above-mentioned display substrate.

[0067] In one embodiment, the display device further includes a housing, and the display panel is disposed within the housing.

[0068] The display device provided in this application embodiment can be any device with display function, such as a mobile phone, tablet computer, television, laptop computer, or vehicle-mounted equipment.

[0069] It should be noted that the technical solutions or features described in the above embodiments can be combined or supplemented with each other without conflict. The scope of protection of this application is not limited to the precise structures described in the above embodiments and shown in the accompanying drawings; all modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A display substrate, characterized in that, The display substrate includes a display area, a transition area, and an aperture area, wherein the transition area surrounds the aperture area and the display area surrounds the transition area; the display substrate includes: a substrate; a plurality of first signal lines located on one side of the substrate; some of the first signal lines include a first segment, a first connecting segment, and a second segment connected in sequence, wherein the first segment and the second segment are located in the display area and both extend along a first direction, and the first connecting segment is located in the transition area and surrounds the aperture area; a plurality of second signal lines extending along a second direction and located on the same side of the substrate as the first signal lines; the first direction and the second direction intersect; within the transition area, the orthographic projection of the second signal lines in the thickness direction of the display substrate has no overlapping area with the first connecting segment.

2. The display substrate according to claim 1, characterized in that, The first signal line includes a data signal line; the second signal line includes a light emission control signal line and / or a scan signal line.

3. The display substrate according to claim 2, characterized in that, The light-emitting control signal line includes a fifth segment, a third connecting segment, and a sixth segment connected in sequence. The fifth segment and the sixth segment are located in the display area and both extend along the second direction. The third connecting segment is located in the transition area and surrounds the hole area. The orthographic projection of the third connecting segment in the thickness direction of the display substrate has no overlapping area with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

4. The display substrate according to claim 2, characterized in that, The light-emitting control signal line includes a fifth segment and a sixth segment that are insulated from each other. The fifth segment and the sixth segment are located on opposite sides of the display area and the transition area along the second direction. Both the fifth segment and the sixth segment extend along the second direction.

5. The display substrate according to claim 1, characterized in that, The number of hole regions is multiple, namely, the first hole region to the nth hole region; the first hole region to the nth hole region are arranged sequentially; a plurality of first connecting segments surround the first hole region, and the number of first connecting segments on the side of the first hole region away from the nth hole region is less than the number of first connecting segments on the side of the first hole region closer to the nth hole region; and / or, a plurality of first connecting segments surround the nth hole region, and the number of first connecting segments on the side of the nth hole region away from the first hole region is less than the number of first connecting segments on the side of the first hole region closer to the first hole region.

6. The display substrate according to claim 1, characterized in that, The display substrate further includes a first conductive layer located on one side of the substrate, a second conductive layer located on the side of the first conductive layer away from the substrate, a first source / drain metal layer located on the side of the second conductive layer away from the first conductive layer, and a second source / drain metal layer located on the side of the first source / drain metal layer away from the substrate. An insulating structure is provided between the first conductive layer, the second conductive layer, the first source / drain metal layer, and the second source / drain metal layer. In a portion of the first signal lines, the first segment and the second segment are located in the second source / drain metal layer, and the first connecting segment is located in the second source / drain metal layer. In another portion of the first signal lines, the first segment and the second segment are located in the second source / drain metal layer, and the first connecting segment is located in the first conductive layer.

7. The display substrate according to claim 6, characterized in that, The display substrate further includes a shielded signal line, which is located in the first source / drain metal layer or the second conductive layer; the orthographic projection of the shielded signal line in the thickness direction of the display substrate at least partially overlaps with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

8. The display substrate according to claim 6, characterized in that, The display substrate further includes a metal conductive layer, an active layer, and a shielded signal line; the metal conductive layer is located on the side of the substrate close to the first conductive layer, and the active layer is located on the side of the metal conductive layer close to the first conductive layer; the shielded signal line is disposed on the metal conductive layer; the orthographic projection of the shielded signal line in the thickness direction of the display substrate at least partially overlaps with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

9. The display substrate according to claim 2, characterized in that, The display substrate further includes a first conductive layer located on one side of the substrate, a second conductive layer located on the side of the first conductive layer away from the substrate, a first source / drain metal layer located on the side of the second conductive layer away from the first conductive layer, and a second source / drain metal layer located on the side of the first source / drain metal layer away from the substrate. An insulating structure is provided between the first conductive layer, the second conductive layer, the first source / drain metal layer, and the second source / drain metal layer. A portion of the scan signal line includes a third segment, a second connecting segment, and a fourth segment connected in sequence. The third segment and the fourth segment are both located on the first conductive layer. The third segment and the fourth segment are both located in the display area and extend along a first direction. The second connecting segment is located on the first source / drain metal layer or the second conductive layer. The second connecting segment is located in the transition area and surrounds the hole area.

10. The display substrate according to claim 9, characterized in that, The orthographic projection of the second connecting segment in the thickness direction of the display substrate has no overlapping area with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

11. The display substrate according to claim 9, characterized in that, The orthographic projection of the second connecting segment in the thickness direction of the display substrate at least partially overlaps with the orthographic projection of the first connecting segment in the thickness direction of the display substrate.

12. The display substrate according to claim 6, characterized in that, The first connection segments of adjacent first signal lines are located in different film layers.

13. The display substrate according to claim 6, characterized in that, The first signal line is a data signal line; the first connection segment of the data signal line connected to the red sub-pixel and the blue sub-pixel is located in one of the second source / drain metal layers and the first conductive layer, and the first connection segment of the data signal line connected to the green sub-pixel is located in the other of the second source / drain metal layers and the first conductive layer.

14. A display device, characterized in that, The display device includes a display substrate as described in any one of claims 1-13.

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