Electronic device

Abstract

The utility model relates to an electronic device. An electronic device comprising: a body of semiconductor material having a surface and N-type conductivity; a switching region having P-type conductivity, the switching region extending from the surface into the body; the semiconductor device comprises a main body, a plurality of switch regions arranged on the main body, and ohmic contact regions arranged at the switch regions, and further comprises a surface part with P-type conductivity, and the surface part extends at least between the switch regions at the surface of the main body; and a metal layer over a surface of the body, the metal layer being in electrical contact with the body through the surface portion and in electrical contact with the switching region through the ohmic contact region.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Italian patent application No. 102024000003835, filed on February 23, 2024, entitled “METODO PER LA REGOLAZIONE DELL'ALTEZZA DELLA BARRIERA SCHOTTKY IN UN DIODO DIPOTENZA IN CARBURO DI SILICIO, EDIODO DIPOTENZA”, which is hereby incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] This disclosure relates to electronic devices and their manufacturing processes, and particularly to a method for adjusting the Schottky barrier height in a silicon carbide power diode and the power diode thereof. Background Technology

[0004] Electronic devices known as JBS (Junction Barrier Schottky) or MPS (Merged PiN Schottky) diodes are known. These devices are typically fabricated in a silicon carbide (SiC) substrate and include implantation regions with conductivity opposite to that of the substrate (e.g., P-type for an N-type substrate). In these devices, two different types of contacts exist: ohmic contacts at the implantation regions and Schottky contacts contained within the regions between the implantation regions.

[0005] These characteristics make JBS diodes particularly suitable for operation in high-voltage power devices.

[0006] Today, minimizing conduction losses in discrete power devices is a key requirement for reducing the overall power consumption of modern power circuits and modules. Therefore, the ability to control the Schottky barrier height (SBH) is a crucial aspect of adjusting the voltage drop of Schottky diodes. Reducing the SBH leads to a significant reduction in voltage drop. As a negative consequence, reducing the SBH results in a substantial increase in leakage current in reverse mode.

[0007] Therefore, there is a need for a JBS diode that has high efficiency under forward bias without the drawback of high loss under reverse mode or reverse bias. Summary of the Invention

[0008] The purpose of this disclosure is to provide a device and a method for manufacturing the same that overcomes the shortcomings of the prior art and meets the above-mentioned needs.

[0009] According to this disclosure, electronic devices and manufacturing processes thereof are provided, as claimed in the appended claims.

[0010] According to one aspect of this disclosure, an electronic device is provided, comprising: a body of semiconductor material having a surface and N-type conductivity; a switching region having P-type conductivity extending from the surface into the body; and an ohmic contact region located at the switching region, wherein the device further comprises: a surface portion having P-type conductivity extending at least between the switching regions on a surface of the body; and a metal layer located above the surface of the body, the metal layer being electrically contacted with the body through the surface portion and electrically contacted with the switching region through the ohmic contact region.

[0011] According to some embodiments of this disclosure, the surface portion extends along the entire surface in an electrically continuous manner.

[0012] According to some embodiments of this disclosure, the surface portion is in direct electrical contact with the switching area.

[0013] According to some embodiments of this disclosure, the contact metal layer is in direct electrical contact with the surface portion.

[0014] According to some embodiments of this disclosure, the metal layer is made of a metal for forming a Schottky contact with the surface portion, the barrier height of the Schottky contact being included between 0.7 and 1.2 eV, particularly equal to 0.9 eV.

[0015] According to some embodiments of this disclosure, the contact metal layer is one of the following: TiN, Mo, MoN, WN, WC, Ta, or TaN.

[0016] According to some embodiments of this disclosure, the body is made of silicon carbide (SiC).

[0017] According to some embodiments of this disclosure, the body includes an epitaxial layer on a substrate, the surface being part of the epitaxial layer, and the surface portion having a depth in the epitaxial layer that is smaller than the depth of the switching region.

[0018] According to some embodiments of this disclosure, the surface portion has been included in 10 11 and 10 14 at / cm 3 The P-type doping values ​​between.

[0019] According to some embodiments of this disclosure, a junction barrier Schottky JBS diode or a combined PiN Schottky MPS diode is formed.

[0020] According to another aspect of this disclosure, a method of manufacturing an electronic device is provided, comprising: forming, in a solid body of a semiconductor material having a surface and N-type conductivity, a switching region having P-type conductivity, the switching region extending from the surface into the body and being defined between regions on the surface of the solid body; forming a surface layer having P-type conductivity, the surface layer extending at least between the switching regions at the surface; forming an ohmic contact region at the switching region; and forming a metal layer above the surface and in electrical contact with the ohmic contact region and a portion of the surface.

[0021] According to some embodiments of this disclosure, the surface layer extends along the surface in an electrically continuous manner.

[0022] According to some embodiments of this disclosure, the surface layer and the switching region are formed to be in electrical contact with each other.

[0023] According to some embodiments of this disclosure, the metal layer is formed to be in direct electrical contact with the surface portion.

[0024] According to some embodiments of this disclosure, the metal layer is made of a metal for forming a Schottky contact with the surface layer, the barrier height of the Schottky contact being included between 0.7 and 1.2 eV, particularly equal to 0.9 eV, and the metal layer is particularly made of a material from the following: TiN, Mo, MoN, WN, WC, Ta, TaN.

[0025] According to some embodiments of this disclosure, the surface layer is included in 10 12 and 10 15 at / cm 2 The implantation dose is formed by implanting P-type dopant. Attached Figure Description

[0026] To better understand this disclosure, preferred embodiments thereof will now be described with reference to the accompanying drawings by way of non-limiting example only, in which:

[0027] Figure 1 A cross-section of the principle physical structure of a semiconductor device including a JBS diode is shown.

[0028] Figures 2A-2F It shows Figure 1 The cross-section of the die through the semiconductor material during subsequent manufacturing steps of the JBS diode; and

[0029] Figure 3A and Figure 3B It shows Figure 2A and Figure 2B Variations of the manufacturing process steps shown. Detailed Implementation

[0030] Figure 1 An embodiment of an electronic device 100 in a triaxial system with mutually orthogonal X, Y, and Z axes is illustrated. The electronic device 100 forms a JBS (“junction barrier Schottky”) diode or an MPS (“combined PiN Schottky”) diode and may typically be part of an integrated device that includes other electronic components (not shown). Thus, the electronic device 100 is typically formed in an active region in a manner known per se, for example, by an oxide field region or an edge-terminating region or edge-guarding ring (e.g., a P-type implantation region).

[0031] Electronic device 100 includes a silicon carbide (SiC) substrate 101 with N-type conductivity (particularly 4H-SiC). The substrate 101 is formed from an N+ type substrate 101A with low resistivity and an N-type epitaxial layer 101B. For example, the thickness of substrate 101A is between 40 and 500 μm, typically 180 μm, and the resistivity is between 10 and 30 mΩ·cm, typically 20 mΩ·cm; the thickness of epitaxial layer 101B is between 3 and 15 μm, and the doping is between 10 and 10 μm. 15 and 5x10 16 Between. Doping can go up to 10. 17 Depending on manufacturing and application requirements, the thickness and conductivity of the substrate 101A and the epitaxial layer 101B may differ from those indicated above. The body 101 has a first (front) surface 103 and a second (back) surface 109. Interspaced P-type implantation regions 102 extend from the first surface 103 into the interior of the epitaxial layer 101B. The implantation regions 102 may extend longitudinally in a direction perpendicular to the plane of the drawing in the form of strips, or they may extend along the edges of regular or irregular geometries.

[0032] According to this disclosure, the upper portion of the epitaxial layer 101B has a P-type surface layer 104. For example, the doping level of the surface layer 104 can be included in 10... 11 and 10 14 at / cm 3 The depth of surface layer 104 is less than the depth of injection region 102; for example, the depth of surface layer 104 is 0.1 μm, and the depth of injection region 102 is typically included between 0.4 and 0.8 μm, for example, about 0.5 μm. According to embodiments where injection is performed using a channeling effect, a depth of injection region 102 up to 2 μm is also envisioned. The depth here is considered to be parallel to the Z-axis, starting from surface 103 and moving towards surface 109.

[0033] A first metal layer 110 extends over a first surface 103 of the body 101. A Schottky contact or Schottky diode is formed in the first metal layer 110 in the region between the implantation regions 102 of the epitaxial layer 101B (i.e., at region 104). A JB diode is formed in the first metal layer 110 at the implantation region 102. The region of the device 100 including the JB element and the Schottky diode is the active region of the device 100.

[0034] The thickness of the first metal layer 110 can be, for example, between 50 and 400 nm, particularly between 200 and 400 nm. The first metal layer 110 is made of a material that allows the formation of Schottky contacts with a voltage range between 0.7 and 1.2 eV (e.g., about 0.9 eV). For example, the first metal layer 110 is made of TiN. Other materials for the first metal layer 110 include, for example, Mo, MoN, WN, WC, Ta, and TaN.

[0035] A thicker second metal layer 112 extends over the first metal layer 110. The second metal layer 112 is made of, for example, an alloy containing aluminum (Al) (e.g., AlSiCu), and its thickness is, for example, between 2 and 10 μm (typically about 5 μm).

[0036] In addition, the back contact metal layer 116 extends onto the second surface 109 of the body 101.

[0037] Figure 1 The electronic device 100 can be referenced below in this article. Figures 2A-2F The method described is implemented.

[0038] initial, Figure 2A The epitaxial layer 101B, having an upper surface 105, undergoes a step of adjusting its surface conductivity. For this purpose, blanket ("unmasked") surface implantation is performed. Figure 2A Arrow 120 indicates this. According to this disclosure, doping atoms, such as boron or aluminum atoms, are introduced to be included in 10... 12 and 10 15 at / cm 2 The dose between (including the boundary) and the injection energy included between 10 keV and 200 keV (including the boundary) are used to generate a layer with P-type conductivity. Thus, a surface layer 104 with P-type conductivity is formed.

[0039] After that, Figure 2B A hard mask 121 with a window 122 is formed on the upper surface 105 of the main body 101. Using the window 122, a P-type injection is performed (schematically indicated by arrow 123), for example, with a 10... 12 at / cm 2The dosage and implantation energy in the range of 10-50 keV are used to perform p-type implantation of aluminum or boron atoms. This forms a p-type region 125. Generally, the process parameters are optimized so that the depth of the implanted region 102 is greater than the depth of the surface layer 104, as indicated.

[0040] Then, Figure 2C The hard mask 121 is removed, and a thermal process for activating implanted ions is performed. This process is performed at a temperature above 1500°C (e.g., 1600°C) and allows activation of the implantation region 102 in FIG2.

[0041] Subsequently, Figure 2D The upper surface 105 is covered with a mask layer 126, and a back metal layer is deposited on the second surface 109 of the body 101 to form a back contact metal layer 116. This step may include forming a post-ohmic contact (optional).

[0042] After removing the mask layer 126 from the upper surface 105 of the main body 101, Figure 2E Further steps are performed to form an ohmic contact 129 on the front of the device, including forming a nickel region only at the implantation region 102, specifically using a silicon oxide mask to cover a region of surface 105 different from the implantation region 102. Subsequent high-temperature thermal annealing (between 900°C and 1000°C, at time intervals from 1 minute to 120 minutes) allows the formation of the nickel silicide Ni2Si ohmic contact 129 through a chemical reaction between the deposited nickel and the silicon of the substrate 101 (more specifically, the epitaxial layer 101B). The nickel in contact with the mask oxide does not react. Subsequently, the unreacted metal and mask are removed. Alternatively to what has been described, other modes of forming ohmic contacts can be used. For example, according to the teachings of patent application EP3896719A1, the ohmic contact 129 can be formed by heating the implantation region 125 using a laser source.

[0043] Then, Figure 2F A front contact metal layer (first metal layer 110), such as TiN (or alternatively, one of Mo, MoN, WN, WC, Ta, or TaN), is deposited over surface 105 and ohmic contact 129. The first metal layer 110 forms a continuous layer. As described above, the first metal layer 110 is configured to form a Schottky contact with implanted layer 104, the barrier height of which is, for example, 0.9 eV.

[0044] Finally, a second metal layer 111 is deposited over the first metal layer 110. The deposition of the first metal layer 110 and the second metal layer 111 occurs, for example, by sputtering.

[0045] A passivation layer is also formed on the second metal layer 111 in a manner not shown in the figure to protect the second metal layer 111. The passivation layer includes openings or windows that expose selective portions of the second metal layer 111 for electrical contact therewith.

[0046] according to Figure 3A and Figure 3B In the variant shown, the injection step of the P-type region 125 occurs before the injection step of the P-type surface layer 104. Therefore, initially, Figure 3A A hard mask 121 with a window 122 is formed on the upper surface 105 of the epitaxial layer 101B. Using the window 122, a P-type region 125 is injected, as schematically indicated by arrow 123.

[0047] After removing hard mask 121 Figure 3B A blanket implantation step (“unmasked”) is performed to modify the conductivity of the epitaxial layer 101B lateral to the surface region of the implantation region 125. For this purpose, p-type dopant ions are implanted into the epitaxial layer 101B close to its upper surface 105 (as schematically indicated by arrow 120), thereby forming a surface layer 104. This is followed by a dopant activation step at a temperature above 1500°C. According to the referenced... Figures 2C-2E The described steps complete the device.

[0048] The described electronic device 100 has many advantages.

[0049] In particular, this disclosure allows for a reduction in losses under reverse bias while minimizing the increase in SBH.

[0050] Finally, it is obvious that modifications and variations can be made to the devices and manufacturing processes described and illustrated herein without departing from the scope of this disclosure as claimed in the appended claims.

[0051] Furthermore, the substrate 101 can be made of one of 4H-SiC, 6H-SiC, 3C-SiC, or 15R-SiC. Alternatively, it can be silicon or another semiconductor material.

[0052] Electronic device 100 may alternatively be one of the following: a combined PiN Schottky (MPS) diode, a Schottky diode, a JBS diode, a MOSFET, an IGBT, a JFET, or a DMOS.

Claims

1. An electronic device, characterized in that, The electronic device includes: The main body of the semiconductor material has surface and N-type conductivity; A switching region having P-type conductivity, the switching region extending from the surface into the body; and The ohmic contact area located in the switching area, The electronic device further includes: A surface portion having P-type conductivity, said surface portion extending at least between the switching regions at the surface of the body; and A metal layer located above the surface of the body, the metal layer being electrically contacted with the body through the surface portion and electrically contacted with the switching area through the ohmic contact area.

2. The electronic device as described in claim 1, characterized in that, The surface portion extends along the entire surface in an electrically continuous manner.

3. The electronic device as described in claim 1, characterized in that, The surface portion therein is in direct electrical contact with the switching area.

4. The electronic device as described in claim 1, characterized in that, The contact metal layer is in direct electrical contact with the surface portion.

5. The electronic device as described in claim 1, characterized in that, The metal layer is made of a metal for forming a Schottky contact with the surface portion, the barrier height of which is between 0.7 and 1.2 eV.

6. The electronic device as described in claim 5, characterized in that, The metal layer is made of a metal used to form a Schottky contact with the surface portion, the barrier height of which is equal to 0.9 eV.

7. The electronic device as claimed in claim 1, characterized in that, The contact metal layer is one of the following: TiN, Mo, MoN, WN, WC, Ta, or TaN.

8. The electronic device as claimed in claim 1, characterized in that, The main body is made of silicon carbide (SiC).

9. The electronic device as claimed in claim 1, characterized in that, The body comprises an epitaxial layer on a substrate, the surface being part of the epitaxial layer, and the surface portion having a depth in the epitaxial layer that is smaller than the depth of the switching region.

10. The electronic device as claimed in claim 1, characterized in that, The electronic device forms a junction barrier Schottky JBS diode or a combined PiN Schottky MPS diode.

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