Packaging structure

Abstract

The utility model provides a packaging structure, which is applied to the technical field of semiconductor packaging. According to the utility model, the wiring layer and the conductive structure can be arranged on the surface and / or in the substrate, so that partition shielding and double-sided packaging can be realized while warping of the packaging structure is avoided without arranging balls and grinding; the purposes of reducing the size of the packaging piece, shortening the packaging process and reducing the packaging cost are achieved, and the purpose of thinning is achieved.

Description

Technical Field

[0001] This utility model relates to the field of communication technology, and in particular to a packaging structure. Background Technology

[0002] With the rapid development of the semiconductor industry, fan-out wafer level package (FOWLP) packaging structures are widely used. Generally, a single chip is cut from a wafer and then packaged onto a carrier wafer. Its main advantages include high-density integration, small package size, superior product performance, and high signal transmission frequency. Fan-out technology primarily enables multi-pin output and smaller pin spacing. Traditional fan-out packaging structures are mainly formed on both sides of the same substrate. Because multiple packaging materials are used in forming double-sided packaging structures on the substrate, and different materials are used for different packages, the CTE coefficients between the materials differ. During reliability testing, warping issues can occur, easily leading to delamination between the molding compound and the chip surface, as well as delamination between the molding compound and the substrate.

[0003] Meanwhile, traditional through-hole molding methods can only utilize via formation techniques and methods. Laser drilling is costly, and mechanical drilling is prone to causing positional tolerances in the vias. Furthermore, existing stacking methods not only result in larger package sizes but also require additional cleaning processes during packaging, such as flux cleaning and plasma cleaning, making the manufacturing process more complex and increasing packaging costs. Moreover, molding on both sides of the same substrate limits the substrate's wiring density, making it impossible to achieve higher wiring density requirements. Additionally, existing double-sided packaging structures cannot achieve wire bonding stacking with chips placed on the same side, significantly limiting chip mounting methods and wiring patterns. Utility Model Content

[0004] The purpose of this invention is to provide a packaging structure that reduces the size of the package, shortens the packaging process, reduces the risk of warping, lowers packaging costs, and ultimately achieves thinner designs.

[0005] To solve the above-mentioned technical problems, this utility model provides a packaging structure, including:

[0006] A first substrate, including a first surface;

[0007] A first wiring layer is disposed on the first surface;

[0008] A conductive structure is disposed on the first substrate to form a partitioned shielding structure;

[0009] Multiple first pads are disposed on the first surface of the first substrate.

[0010] In some examples, the encapsulation structure may further include:

[0011] Multiple conductive pillars are disposed within the first substrate, and include a first end that passes through a portion of the first substrate and is exposed on the first surface, and a second end disposed opposite to the first end, wherein the first end is electrically connected to the first pad.

[0012] In some examples, the encapsulation structure may further include:

[0013] A first groove is disposed within the first substrate from the first surface side;

[0014] A first filter chip is disposed in the first groove and has a first gap with the first substrate.

[0015] In some examples, the encapsulation structure may further include:

[0016] The first molding layer covers the sidewalls and surface of the first filter chip and the surface of the first substrate on both sides of the first filter chip to encapsulate the first gap and the first groove, thereby forming a sealed cavity between the first filter chip and the first substrate.

[0017] In some examples, the encapsulation structure may further include:

[0018] Multiple conductive pillars are disposed within the first substrate, including a first end located on the first surface of the first substrate and a second end disposed opposite to the first end, and the first end is electrically connected to the first pad.

[0019] In some examples, the encapsulation structure may further include:

[0020] A second pad spans across the plurality of first pads to electrically connect the plurality of first pads, wherein the width of the second pad in the horizontal direction is greater than the width of the first pad in the horizontal direction.

[0021] In some examples, the encapsulation structure may further include:

[0022] The third pad is disposed above the conductive pillars within the first substrate and electrically connected to the second ends of the plurality of conductive pillars. The width of the third pad in the horizontal direction is greater than the width of the first pad in the horizontal direction and is the same as the width of the second pad in the horizontal direction.

[0023] In some examples, the encapsulation structure may further include:

[0024] A first shielding wall is disposed on the outer surface of the first filter chip and extends to the inner surface of the first groove on both sides of the first filter chip and on part of the first surface, so as to be electrically connected to a plurality of first pads.

[0025] The conductive structure includes:

[0026] The third pad is disposed within the first substrate above the first groove and is electrically connected to the first shielding wall that extends onto the inner surface of a portion of the first groove on both sides of the first filter chip.

[0027] In some examples, the encapsulation structure may further include:

[0028] The second substrate is disposed opposite to the first substrate and includes a second surface opposite to the first surface of the first substrate;

[0029] The second wiring layer is disposed on the second surface of the second substrate and is electrically connected to the first wiring layer, and has a second gap between it and the first substrate;

[0030] The second substrate includes a PCB board.

[0031] In some examples, the encapsulation structure may further include:

[0032] The first molding layer also extends laterally to cover the first wiring layer on the first substrate;

[0033] The packaging structure further includes:

[0034] A third wiring layer is disposed on a portion of the first molding layer;

[0035] The conductive structure includes:

[0036] Multiple conductive pillars are disposed within the first substrate, including a first end located on the first surface of the first substrate and a second end disposed opposite to the first end, wherein the first end is electrically connected to the first pad.

[0037] A third pad is disposed on a portion of the first molding compound and penetrates the first molding compound to be electrically connected to the plurality of first pads respectively. The width of the third pad in the horizontal direction is greater than the width of the first pad in the horizontal direction.

[0038] In some examples, the encapsulation structure may further include:

[0039] The third substrate is disposed opposite to the first substrate and includes a third surface opposite to the first surface of the first substrate and a second groove disposed in the third substrate from the third surface side.

[0040] The second filter chip is disposed in the second groove and flip-mounted onto the first surface of the first substrate by a plurality of bumps, and has gaps between itself and both the first substrate and the third substrate.

[0041] A fourth wiring layer is disposed on the third surface of the third substrate and is electrically connected to the first wiring layer.

[0042] In some examples, the conductive structure may include:

[0043] Multiple conductive pillars are disposed within the first substrate, including a first end located on the first surface of the first substrate and a second end disposed opposite to the first end, and the first end is electrically connected to the first pad.

[0044] In some examples, the encapsulation structure may further include:

[0045] A second shielding wall surrounds the second filter chip and extends onto a portion of the third surface of the third substrate to be electrically connected to the plurality of first pads.

[0046] The third substrate includes a PCB board.

[0047] In some examples, the second shielding wall is disposed on the inner surface of the second groove on both sides of the second filter chip and communicates with a portion of the third surface extending on the third substrate.

[0048] In some examples, the second shielding wall is disposed within the third substrate on both sides and below the second filter chip, and communicates with a portion of the third surface extending on the third substrate.

[0049] As described above, in this invention, by setting wiring layers and conductive structures on the surface and / or inside the substrate, it is possible to achieve partition shielding and double-sided packaging without the need for ball-mounting or grinding, thus avoiding warping of the packaging structure. This achieves the goals of reducing the size of the package, shortening the packaging process, and lowering packaging costs, while also achieving thinner profiles. Attached Figure Description

[0050] The accompanying drawings are provided to further illustrate the present application and form part of the specification. They are used together with the following detailed description to explain the present application, but do not constitute a limitation thereof. In the drawings:

[0051] Figure 1 This is a cross-sectional schematic diagram of an example of the packaging structure in the first embodiment of this utility model.

[0052] Figure 2 This is a cross-sectional schematic diagram of an example of the packaging structure in the second embodiment of the present invention.

[0053] Figure 3 This is a cross-sectional schematic diagram of an example of the packaging structure in the third embodiment of this utility model.

[0054] Figure 4 This is a cross-sectional schematic diagram of an example of the packaging structure in the fourth embodiment of the present invention.

[0055] Figure 5 This is a cross-sectional schematic diagram of an example of the packaging structure in the fifth embodiment of this utility model.

[0056] Figure 6 This is a cross-sectional schematic diagram of an example of the packaging structure in the sixth embodiment of this utility model.

[0057] Figures 7-10 In response to Figure 1 The diagram shows the structural schematic corresponding to the steps of the packaging method of the packaging structure provided in the first embodiment of this utility model.

[0058] The reference numerals in the attached figures are explained as follows:

[0059] 10 / 20 / 30 / 40 / 50 / 60 - Package structure, 100 - First substrate, 100a - First surface, 111 - First wiring layer, 111.1 - First contact area, 101 - First recess, 120 - First filter chip, 102 - First gap, 130 - Conductive pillar, 141 - First pad, 150 - First molding layer, 200 - Second substrate, 200a - Second surface, 210 - Second wiring layer, 220 - Second pad, 103 - Second gap, 160 - Module molding compound, 113 - Third wiring layer, 113.1 - Second contact area, 115 - Fourth wiring layer, 121 - First bump, 122 - Second bump, 143 - Third pad, 180 - First shielding wall, 190 - Second shielding wall, 300 - Third substrate, 300a - Third surface, 104 - Second groove, 320 - Second filter chip, 123 - Third bump.

[0060] In the accompanying drawings, the same parts are referred to by the same reference numerals, and the drawings are not drawn to scale. Detailed Implementation

[0061] To make the technical solutions and advantages of the embodiments of this utility model clearer, the technical solutions of this utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary implementation methods of this utility model are shown in the accompanying drawings, it should be understood that this utility model can be implemented in various forms and should not be limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough understanding of this utility model and to fully convey the scope of this utility model to those skilled in the art. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the purpose of illustrating the embodiments of this utility model.

[0062] Example 1

[0063] Please refer to Figure 1 The illustration shown is a cross-sectional schematic diagram of an example of the packaging structure in the first embodiment of this utility model. The packaging structure of this utility model can be used to prepare a fan-out double-sided packaging structure. Without departing from the spirit of this utility model, this utility model can also be applied to other types of packaging structures or double-sided packaging structures, and features in the embodiments of this utility model can be combined with each other without conflict.

[0064] like Figure 1 As shown, the packaging structure may include: a first substrate 100, a first wiring layer 111, a first filter chip 120, a conductive structure (including multiple conductive pillars 130), a first molding compound 150, a second substrate 200, a second wiring layer 210, and a second pad 220. The first substrate 100 may contain circuit structures, such as a piezoelectric layer (not shown), an interdigital transducer (not shown), a substrate (not shown), a trap layer (not shown), and one or more dielectric layers (not shown), but is not limited thereto. Specifically, the first substrate 100 may be formed of or include at least one of insulating materials. For example, the first substrate 100 may include photosensitive epoxy resin. More specifically, the first substrate 100 may include photoimaging dielectric (PID), but is not limited thereto. The first substrate 100 may include two opposing surfaces, such as a first surface 100a facing the second substrate 200 and another surface (not shown) away from the second substrate 200. The second substrate 200 may be a printed circuit board (PCB), and may also have two surfaces disposed opposite to each other, such as a second surface 200a opposite to the first surface 100a of the first substrate 100.

[0065] In one embodiment, at least one first groove 101 is formed in the insulating material on the first surface 100a side of the first substrate 100, extending from the first surface 100a side within the first substrate 100. The first filter chip 120 can be mounted within the first groove 101, for example, by flip-chip bonding with the surface of the first substrate 100 exposed within the first groove 101 using a first bump 121. Specifically, the first filter chip 120 can be electrically connected to the first substrate 100 via flip-chip die bonding (FC Die Bond) or similar methods, thereby fixing the first filter chip 120 onto the first substrate 100. Because the first bump 121 has a certain height, a gap, i.e., the first gap 102, exists between the front surface of the first filter chip 120 and the first substrate 100. Exemplarily, the first filter chip 120 can also be a WB chip, but is not limited thereto.

[0066] Furthermore, a conductive post 130, i.e., the conductive structure, can be respectively provided in the first substrate 100 on both sides of the first groove 101 to serve as a partitioned shielding structure for the first filter chip 120. The conductive post 130 can be elongated in the direction perpendicular to the first surface 100a of the first substrate 100 (hereinafter referred to as the vertical direction), and it has two opposite ends in the vertical direction. For example, a first end (not marked) located on the first surface 100a of the first substrate 100, and a second end disposed opposite to the first end and embedded in the first substrate 100. The first end is physically contacted, i.e. electrically connected, with the first pad 141 disposed on the first surface 100a of the first substrate 100. It should be understood that the number of the first pads 141 disposed on the first surface 100a of the first substrate 100 can be determined according to the number of conductive posts 130 disposed therein, for example, the two numbers are the same.

[0067] Furthermore, the first wiring layer 111 may be disposed on the first surface 100a of the first substrate 100, and the second wiring layer 210 may be disposed on the second surface 200a of the second substrate 200. Since both the first wiring layer 111 and the second wiring layer 210 have a certain thickness in the vertical direction, when they are electrically connected, there is a gap between them and the first substrate 100 and the second substrate 200, such as the second gap 103. It should be understood that the wiring layer may include a plurality of block-shaped contact areas arranged at intervals, such as the first contact area 111.1 in the first wiring layer 111. Wiring layers may also be disposed on the other surface of the first substrate 100 in this embodiment of the present invention (disposed opposite to the first surface 100a). For ease of understanding, the wiring layers disposed on the surface of the first substrate 100 can all be referred to as the first wiring layer and are all identified by the reference numeral "111". Similarly, the wiring layers located on different surfaces of the second substrate 200 can also be identified by the reference numeral "210". The first wiring layer 111 on the first surface 100a of the first substrate 100 and the second wiring layer 210 on the second surface 200a of the second substrate 200 are electrically connected to encapsulate the first substrate 100 and the second substrate 200. A second pad 220 is also provided on the second surface 200a of the second substrate 200 at the position of the first groove 101 of the first substrate 100. The width of the second pad 220 in the direction parallel to the second surface 200a of the second substrate 200 (hereinafter referred to as the horizontal direction) is greater than the width of the first pad 141 in the horizontal direction, so that the two ends of the second pad 220 extending in the horizontal direction can be electrically connected to the first pad 141 that is aligned with its ends, that is, it spans across the plurality of first pads 141, thereby forming a partitioned shielding device surrounding the first filter chip 120 with the conductive post 130 and the first pad 141, but not limited thereto. Since the first substrate 100 and the second substrate 200 in this embodiment can be electrically connected through the wiring layer, double-sided packaging can be achieved without setting up ball bearings or grinding the substrate, thus avoiding warping of the packaging structure.

[0068] Furthermore, the first molding layer 150 covers the sidewalls and surface of the first filter chip 120 and the surfaces of the first substrate 100 on both sides of the first filter chip 120 to encapsulate the first gap 102, thereby forming a sealed cavity between the first filter chip 120 and the first substrate 100, thus ensuring the performance of the first filter chip 120. The material of the first molding layer 150 can be a thermoplastic molding compound containing inorganic fillers. Specifically, the inorganic fillers can be one or more of alumina, titanium dioxide, silicon nitride, aluminum nitride, and silicon dioxide, with the aim of enhancing the hardness of the thermoplastic molding compound, improving processing performance, and reducing costs, but are not limited thereto.

[0069] It should be understood that other components and / or devices, such as module encapsulation 160, may be further disposed on the non-first surface 100a of the first substrate 100, and other components and / or devices, such as wiring layers (not identified), may also be disposed within the first substrate 100 to realize electrical connections between different components and / or devices, but are not limited thereto.

[0070] Those skilled in the art will readily understand that, to meet actual product requirements, the packaging structure of this utility model may have other forms and is not limited to those described above. The following will further describe other embodiments or variations of the packaging structure of this utility model. For the sake of simplicity, identical components in each embodiment of this utility model are designated with the same reference numerals to facilitate comparison between embodiments.

[0071] Example 2

[0072] Please refer to Figure 2 The illustration shown is a cross-sectional schematic diagram of an example of the packaging structure in the second embodiment of this utility model. Figure 2 As shown, the structure of the packaging structure 20 in the second embodiment of this utility model is largely the same as that of the packaging structure 10 in the first embodiment, including the first substrate 100, the first groove 101, the first wiring layer 111, the first filter chip 120, the conductive structure (including multiple conductive pillars 130 and a third pad 143), the first molding compound 150, the second substrate 200, the second wiring layer 210, and the second pad 220. The two ends of the second pad 220 can also be electrically connected to the first pad 141 aligned with its ends, thereby forming a partitioned shielding device surrounding the first filter chip 120 with the conductive pillars 130 and the multiple first pads 141 disposed in the first substrate 100. The similarities will not be repeated here. The main difference between the packaging structure 20 in the second embodiment of this utility model and the first embodiment is that the conductive structure includes not only multiple conductive pillars 130, but also a third pad 143. Figure 2 (The area outlined by the red dashed box in the middle); wherein, the third pad 143 can be disposed within the first substrate 100 and electrically connected to the second ends of the two conductive pillars 130 located on both sides of the first groove 101, that is, the third pad 143 is located above the plurality of conductive pillars 130 within the first substrate 100; since the third pad 143 is located above the area of ​​the first groove 101, and its width in the horizontal direction is not less than the width of the second pad 220 in the horizontal direction, and also equal to the width of the first pad 141 in the horizontal direction, it, together with the conductive pillars 130, the first pad 141, and the second pad 220, can constitute a closed partitioned shielding device surrounding the first filter chip 120.

[0073] Example 3

[0074] Please refer to Figure 3 The illustration shown is a cross-sectional schematic diagram of an example of the packaging structure in the third embodiment of this utility model. Figure 3 As shown, the structure of the packaging structure 30 in the third embodiment of this utility model is largely the same as that of the packaging structures (10, 20) in the first or second embodiments described above. For example, it includes the first substrate 100, the first groove 101, the first wiring layer 111, the first filter chip 120, the second substrate 200, and the second wiring layer 210. The first filter chip 120 is also mounted within the first groove 101. The similarities will not be repeated here. The main difference between the packaging structure 30 in the third embodiment of this utility model and the first or second embodiments described above is that the conductive structure is different; that is, the conductive structure only includes the third pad 143, which results in a different partitioned shielding device surrounding the first filter chip 120.

[0075] Specifically, the partitioned shielding device in the third embodiment of this utility model includes two first pads 141, a first shielding wall 180, and a conductive structure, namely a third pad 143. The first pads 141 are disposed on the first surfaces 100a of the first substrate 100 exposed on both sides of the first groove 101. The first shielding wall 180 is conformally disposed on the outer surface of the first filter chip 120 and extends to the inner surfaces (bottom and sidewalls) of the first groove 101 on both sides of the first filter chip 120 and a portion of the first surface 100a of the first substrate 100, to be electrically connected to the plurality of first pads 141. The third pad 143 is disposed within the first substrate 100 above the first groove 101 and is electrically connected to the first shielding wall 180 extending to a portion of the inner surfaces of the first groove 101 on both sides of the first filter chip 120, thus forming a closed partitioned shielding device surrounding the first filter chip 120. It should be noted that in this embodiment, the first gap 102 between the first filter chip 120 and the first substrate 100 is filled with the first molding layer 150 to ensure the performance of the first filter chip 120, but this is not a limitation.

[0076] It should be understood that "common shape" in the embodiments of this utility model refers to the construction of a continuous structural shape by utilizing the morphological similarity and correlation between two or more shapes.

[0077] Example 4

[0078] Please refer to Figure 4 The illustration shown is a cross-sectional schematic diagram of an example of the packaging structure in the fourth embodiment of this utility model. Figure 4As shown, the structure of the packaging structure 40 in the fourth embodiment of this utility model is largely the same as that of the packaging structure 10 in the first embodiment, such as including the first substrate 100, the first groove 101, the first wiring layer 111, the first filter chip 120, the conductive structure, and the first molding layer 150, etc. The similarities will not be described again here. The main difference between the packaging structure 40 of the fourth embodiment of this utility model and the first embodiment is that: the conductive structure includes a plurality of conductive pillars 130 and a third pad 143, without a second substrate 200 and a second wiring layer 210, and the first filter chip 120 is mounted on the bottom of the first groove 101 through the extension of the first molding layer 150, while the surface of the first filter chip 120 facing away from the bottom of the first groove 101 is connected to the first wiring layer 111 disposed on the first surface 100a of the first substrate 100 through the second bump 122; furthermore, in the fourth embodiment of this utility model, the first molding layer 150 also extends laterally to cover the first wiring layer 111 on the first substrate 100, so as to bury the first filter chip 120 and the first wiring layer 111 at the same time, and then the third wiring layer 113 and the third pad 143 are formed on the surface of the extended first molding layer 150. In one embodiment, the third pad 143 is located on the surface of the first molding compound 150 extending from the first groove 101, and the third wiring layer 113 is located on the surface of the first molding compound 150 exposed on both sides of the third pad 143. The third wiring layer 113 also has at least one block-shaped contact area, such as a second contact area 113.1, so as to electrically connect with the corresponding first contact area 111.1 in the first wiring layer 111 through the block-shaped contact area in the third wiring layer 113, but is not limited thereto.

[0079] Example 5

[0080] Please refer to Figure 5 The illustration shown is a cross-sectional schematic diagram of an example of the packaging structure in the fifth embodiment of this utility model. Figure 5As shown, the packaging structure 50 in the fifth embodiment of this utility model has the same structure as the packaging structures (10, 20, 30, 40) in the first, second and fourth embodiments mentioned above. The same part is that they all include a first substrate 100, the first substrate 100 has a first surface 100a, and a conductive structure, namely a plurality of conductive pillars 130, is provided in the first substrate 100 corresponding to the first surface 100a. The first end of the conductive pillar 130 that passes through the first substrate 100 and is exposed on the first surface 100a is electrically connected to a first pad 141. A first wiring layer 111 is formed on the first surface 100a of the first substrate 100, and a plurality of corresponding first contact areas 111.1 are provided in the first wiring layer 111. The similarities will not be described again here.

[0081] The main difference between the packaging structure 50 of the fifth embodiment of this utility model and the aforementioned first, second, and fourth embodiments is that: the conductive structure only includes a plurality of conductive pillars 130; the packaging structure 50 includes a third substrate 300, the third substrate 300 including a third surface 300a disposed opposite to the first surface 100a of the first substrate 100; the third substrate 300 may be a PCB board; a second groove 104 is provided in the substrate material on the third surface 300a side of the third substrate 300, and the second groove 104 extends from the third surface 300a into a portion of the third substrate 300; a filter chip, such as a second filter chip 320, is mounted in the second groove 104; the second filter chip 320 may be the same as the first filter chip 120, but is not limited thereto. The second filter chip 320 may be mounted on the first surface 100a of the first substrate 100 by a plurality of bumps, such as a third bump 123, and has gaps between itself and both the first substrate 100 and the third substrate 300.

[0082] Furthermore, the packaging structure 50 also includes a fourth wiring layer 115 and a second shielding wall 190. Specifically, the fourth wiring layer 115 is disposed on the third surface 300a of the third substrate 300 and electrically connected to the first wiring layer 111 on the first surface 100a of the first substrate 100 (corresponding bump electrical connection). The second shielding wall 190 surrounds the second filter chip 320 and extends to a portion of the third surface 300a of the third substrate 300 to be electrically connected to the plurality of first pads 141 disposed on the first substrate 100. For example, the second shielding wall 190 is disposed on the inner surface (bottom and sidewall) of the second groove 104 on both sides of the second filter chip 320 and communicates with the portion extending to the portion of the third surface 300a of the third substrate 300, thereby forming a partitioned shielding device surrounding the second filter chip 320, but not limited thereto.

[0083] Example 6

[0084] Please refer to Figure 6 The illustration shown is a cross-sectional schematic diagram of an example of the packaging structure in the sixth embodiment of this utility model. Figure 6 As shown, the structure of the packaging structure 60 in the sixth embodiment of this utility model is largely the same as that of the packaging structure 50 in the fifth embodiment, including the first substrate 100, the first wiring layer 111, the second filter chip 320, the third substrate 300, the second groove 104, the conductive structure (including multiple conductive pillars 130), and the second shielding wall 190. The multiple conductive pillars 130, the multiple first pads 141, and the second shielding wall 190 are also arranged around the second filter chip 320. The similarities will not be repeated here. The main difference between the packaging structure 60 of the sixth embodiment of this utility model and the fifth embodiment is that the conductive structure only includes multiple conductive pillars 130, and the position of the second shielding wall 190 is different. Specifically, in this embodiment, the second shielding wall 190 is disposed within the third substrate 300 on both sides and below the second filter chip 320, and communicates with a portion extending onto the third surface 300a of the third substrate 300, but this is not a limitation.

[0085] To enable those skilled in the art to easily understand the packaging structures in the first to sixth embodiments of this utility model, this utility model also provides a packaging method for the packaging structure, which will be described below. Figure 1 Taking the aforementioned packaging structure as an example, and combining it with the structural schematic diagrams of the packaging method during the preparation process, the packaging method of the packaging structure proposed in this utility model will be further explained.

[0086] in, Figures 7-10 In response to Figure 1 The diagram shows the structural schematic corresponding to the steps of the packaging method of the packaging structure provided in the first embodiment of this utility model.

[0087] Please refer to Figure 7First, a first substrate 100 is provided. The first substrate 100 may contain circuit structures, such as a piezoelectric layer (not shown), an interdigital transducer (not shown), a substrate (not shown), a trap layer (not shown), and one or more dielectric layers (not shown), but is not limited thereto. Specifically, the first substrate 100 may be formed of or include at least one of insulating materials. For example, the first substrate 100 may include photosensitive epoxy resin. More specifically, the first substrate 100 may include photoimaging dielectric (PID), but is not limited thereto. Other components and / or devices may be disposed within the first substrate 100, such as circuit structures like piezoelectric layers (not shown), and wiring layers for electrically connecting different circuit structures, but are not limited thereto.

[0088] Then, using processes such as deposition, photolithography, and etching, a first wiring layer 111 can be formed on the first surface 100a of the first substrate 100 and on another surface opposite to the first surface. A module molding compound 160 is then further formed on the first wiring layer 111 on the other surface. Then, using an etching process, such as at least one of dry etching or wet etching, a groove, namely the first groove 101, is formed in the substrate material on the first surface 100a side of the first substrate 100. Then, conductive pillars 130 are formed in the first substrate 100 on both sides of the first groove 101 using deposition, photolithography, etching and other processes. The conductive pillars 130 have a first end exposed from the first surface 100a side of the first substrate 100 and a second end disposed opposite to the first end and embedded in the first substrate 100. In this configuration, the first end of the conductive pillar 130 is flush with the surface of the first wiring layer 111 on the first surface 100a. Then, a first pad 141 is provided in the area corresponding to the first end of the conductive pillar 130, so that the electrically connected conductive pillars 130 and the first pad 141 form the shielding wall of the partitioned shielding device of the subsequently formed first filter chip 120.

[0089] In one embodiment, the conductive pillar 130 can be formed using suitable processing techniques, such as sputtering, printing, electroplating, electroless plating, CVD, etc. Furthermore, the conductive pillar 130 can be formed from a variety of suitable materials, including but not limited to metallic materials such as copper, titanium, nickel, gold, and combinations thereof or alloys thereof.

[0090] It should be understood that if the packaging method provided in the embodiments of this utility model is used to prepare... Figure 5 or Figure 6 The encapsulation structure can be formed by using a preparation method that is substantially the same as that used to form the first groove 101, to form a corresponding second groove 104 in the substrate material on the third surface 300a side of the third substrate 300.

[0091] Please refer to Figure 8 At least one first filter chip 120 is provided. One side of the first filter chip 120, for example, the front side, has a plurality of first bumps 121. The first bumps 121 on the front side of the first filter chip 120 are mounted into a first groove 101 of the first substrate 100 by means of flip-chip bonding or similar methods, and a first gap 102 is formed between the first filter chip 120 and the substrate material of the first groove 101. It should be understood that... Figure 8 Only one first filter chip 120 is shown in the figure. In other embodiments, multiple first grooves 101 may be formed on the first substrate 100, and at least one first filter chip 120 may be mounted in each first groove 101 to achieve partitioned shielding of multiple chips.

[0092] Please refer to Figure 9 The first molding compound 150 is formed by encapsulating the first gap 102 using, for example, C-mold process, so that a sealed cavity is formed between the first filter chip 120 and the first substrate 100. The material of the first molding compound 150 may be a thermoplastic molding compound containing inorganic fillers. The inorganic fillers may be one or more of alumina, titanium oxide, silicon nitride, aluminum nitride and silicon dioxide, but are not limited thereto.

[0093] Please refer to Figure 10 and combined Figure 9 A second substrate 200 is provided, and a second wiring layer 210 and a second pad 220 are formed on the second surface 200a of the second substrate 200. Then, the first wiring layer 111 on the first substrate 100 and the second wiring layer 210 on the second substrate 200 can be used to achieve electrical connection between the two substrates without grinding or setting up ball bearings. This reduces packaging costs and difficulty, and ultimately achieves the goal of thinning.

[0094] In summary, by setting wiring layers and conductive structures on the surface and / or inside the substrate, it is possible to achieve partition shielding and double-sided packaging without the need for ball-mounting or grinding, while avoiding warping of the packaging structure. This achieves the goals of reducing the size of the package, shortening the packaging process, and reducing packaging costs, while also achieving thinner profiles.

[0095] In this application, references to "one embodiment" or "some embodiments" mean that a feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment or at least some embodiments of this application. Therefore, the appearance of the phrases "in one embodiment" or "in some embodiments" throughout this application does not necessarily refer to the same or the same embodiments. Furthermore, in one or more embodiments, features, structures, or characteristics can be combined in any suitable combination and / or sub-combination.

[0096] While specific embodiments of this application have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and not for limiting the scope of this application. The embodiments of this application can be combined in any way without departing from the spirit and scope of this application. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of this application. The scope of this application is defined by the appended claims.

Claims

1. A packaging structure, characterized in that, include: A first substrate, including a first surface; A first wiring layer is disposed on the first surface; A conductive structure is disposed on the first substrate to form a partitioned shielding structure; Multiple first pads are disposed on the first surface of the first substrate.

2. The packaging structure as described in claim 1, characterized in that, Also includes: A first groove is disposed within the first substrate from the first surface side; A first filter chip is disposed in the first groove and has a first gap with the first substrate.

3. The packaging structure as described in claim 2, characterized in that, Also includes: The first molding layer covers the sidewalls and surface of the first filter chip and the surface of the first substrate on both sides of the first filter chip to encapsulate the first gap and the first groove, thereby forming a sealed cavity between the first filter chip and the first substrate.

4. The packaging structure as described in claim 3, characterized in that, The conductive structure includes: Multiple conductive pillars are disposed within the first substrate, including a first end located on the first surface of the first substrate and a second end disposed opposite to the first end, and the first end is electrically connected to the first pad.

5. The packaging structure as described in claim 4, characterized in that, Also includes: A second pad spans across the plurality of first pads to electrically connect the plurality of first pads, wherein the width of the second pad in the horizontal direction is greater than the width of the first pad in the horizontal direction.

6. The packaging structure as described in claim 5, characterized in that, The conductive structure further includes: The third pad is disposed above the conductive pillars within the first substrate and electrically connected to the second ends of the plurality of conductive pillars. The width of the third pad in the horizontal direction is greater than the width of the first pad in the horizontal direction and is the same as the width of the second pad in the horizontal direction.

7. The packaging structure as described in claim 3, characterized in that, Also includes: A first shielding wall is disposed on the outer surface of the first filter chip and extends to the inner surface of the first groove on both sides of the first filter chip and on part of the first surface, so as to be electrically connected to a plurality of first pads. The conductive structure includes: The third pad is disposed within the first substrate above the first groove and is electrically connected to the first shielding wall that extends onto the inner surface of a portion of the first groove on both sides of the first filter chip.

8. The packaging structure as described in claim 4 or 7, characterized in that, Also includes: The second substrate is disposed opposite to the first substrate and includes a second surface opposite to the first surface of the first substrate; The second wiring layer is disposed on the second surface of the second substrate and is electrically connected to the first wiring layer, and has a second gap between it and the first substrate; The second substrate includes a PCB board.

9. The packaging structure as described in claim 3, characterized in that, The first molding layer also extends laterally to cover the first wiring layer on the first substrate; The packaging structure further includes: A third wiring layer is disposed on a portion of the first molding layer; The conductive structure includes: Multiple conductive pillars are disposed within the first substrate, including a first end located on the first surface of the first substrate and a second end disposed opposite to the first end, wherein the first end is electrically connected to the first pad. A third pad is disposed on a portion of the first molding compound and penetrates the first molding compound to be electrically connected to the plurality of first pads respectively. The width of the third pad in the horizontal direction is greater than the width of the first pad in the horizontal direction.

10. The packaging structure as described in claim 1, characterized in that, Also includes: The third substrate is disposed opposite to the first substrate and includes a third surface opposite to a first surface of the first substrate and a second groove disposed in the third substrate from the third surface side. The second filter chip is disposed in the second groove and flip-mounted onto the first surface of the first substrate by a plurality of bumps, and has gaps between itself and both the first substrate and the third substrate. A fourth wiring layer is disposed on the third surface of the third substrate and is electrically connected to the first wiring layer.

11. The packaging structure as described in claim 10, characterized in that, The conductive structure includes: Multiple conductive pillars are disposed within the first substrate, including a first end located on the first surface of the first substrate and a second end disposed opposite to the first end, and the first end is electrically connected to the first pad.

12. The packaging structure as described in claim 11, characterized in that, Also includes: A second shielding wall surrounds the second filter chip and extends onto a portion of the third surface of the third substrate to be electrically connected to the plurality of first pads. The third substrate includes a PCB board.

13. The packaging structure as described in claim 12, characterized in that, The second shielding wall is disposed on the inner surface of the second groove on both sides of the second filter chip and communicates with a portion of the third surface extending on the third substrate.

14. The packaging structure as described in claim 12, characterized in that, The second shielding wall is disposed within the third substrate on both sides and below the second filter chip, and communicates with a portion of the third surface extending on the third substrate.

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