Infrared light source based on CMOS manufacturing process

The infrared light source structure using CMOS manufacturing process solves the incompatibility problem between MEMS light sources and CMOS process, realizing a high-volume, low-cost, and high-yield infrared light source that supports single-chip integration and has the advantages of miniaturization and high integration.

CN224242704UActive Publication Date: 2026-05-15SUZHOU SINAN SENSOR TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
SUZHOU SINAN SENSOR TECH CO LTD
Filing Date
2025-06-06
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

MEMS infrared light sources are incompatible with CMOS processes, leading to mass production bottlenecks and high costs.

Method used

Using CMOS manufacturing process, a combination structure of semiconductor substrate, support layer, first metal layer, dielectric layer and second metal layer is used. The dielectric layer serves as the infrared radiation layer, replacing the traditional blackbody radiation layer. Combined with the back cavity design, heat loss is reduced and the electrical modulation response speed is improved.

Benefits of technology

It achieves compatibility with CMOS processes, improves production capacity and yield, reduces costs, and supports single-chip integration, offering advantages in miniaturization and high integration.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to an infrared light source based on a CMOS manufacturing process. The infrared light source comprises a semiconductor substrate, a supporting layer, a first metal layer, a dielectric layer and a second metal layer. The supporting layer is arranged on the semiconductor substrate and is used for providing mechanical stability; the first metal layer is arranged on the supporting layer and is used for electrifying and heating; the dielectric layer is arranged on the first metal layer, is used for high-temperature protection and serves as an infrared radiation layer to replace a traditional blackbody radiation layer; the second metal layer is arranged on the dielectric layer and is used for lead interconnection; a cavity is formed in the back surface of the semiconductor substrate, so that heat loss is reduced, and the electric modulation response speed is increased; the structure does not comprise a traditional blackbody radiation layer, but adopts the dielectric layer in the CMOS technology to replace the traditional blackbody radiation layer, the CMOS technology is completely compatible, the problems that an MEMS light source is low in productivity, low in yield and high in cost are solved, meanwhile, single-chip integrated manufacturing of the MEMS light source and a light source driving circuit is supported, and the MEMS light source has a larger prospect in the aspects of miniaturization and integration.
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Description

Technical Field

[0001] This utility model relates to the field of infrared technology, and specifically to an infrared light source based on CMOS manufacturing process. Background Technology

[0002] Non-dispersive infrared (NDIR) gas sensors based on the principle of spectral absorption mainly consist of four parts: an infrared light source, a gas cell, a filter, and an infrared photodetector. Among these, the infrared light source is one of the key components determining the performance of an integrated NDIR gas sensor, directly influencing its size, power consumption, and detection performance. Traditional infrared light sources (such as tungsten filament lamps or laser diodes) suffer from problems such as large size, high power consumption, or complex manufacturing processes. MEMS radiation sources, due to their excellent electrical modulation performance, have become a popular choice in the current application market.

[0003] However, MEMS radiation sources are typically manufactured using MEMS processes, which, due to their inclusion of a blackbody radiation layer structure with specialized fabrication techniques, are incompatible with CMOS processes. Compared to standard CMOS processes, MEMS processes suffer from lower throughput, lower yields, and higher costs, making them unsuitable for large-scale mass production. Utility Model Content

[0004] The purpose of this invention is to overcome the shortcomings of the prior art by providing an infrared light source based on CMOS manufacturing process and its manufacturing method, thereby solving problems such as mass production bottlenecks caused by the incompatibility between MEMS light sources and CMOS processes.

[0005] To achieve the above objectives, the technical solution adopted by this utility model is: an infrared light source based on CMOS manufacturing process, comprising a semiconductor substrate, a support layer, a first metal layer, a dielectric layer, and a second metal layer;

[0006] The support layer is disposed on the semiconductor substrate to provide mechanical stability of the structure;

[0007] The first metal layer is disposed on the support layer and is used for chip heating and temperature rise;

[0008] The dielectric layer is disposed on the first metal layer and is used for front protection, while also serving as an infrared radiation layer.

[0009] The second metal layer is disposed on the dielectric layer and is used for lead interconnection of the structure, serving as a pad;

[0010] The back side of the semiconductor substrate has a cavity, which reduces heat loss from the infrared light source and improves the electrical modulation response speed of the structure.

[0011] Preferably, the semiconductor substrate is silicon or other substrates.

[0012] Preferably, the support layer is one of silicon oxide, silicon nitride, or a composite film, and its thickness is 0.3um-10um.

[0013] Preferably, the first metal layer is one of tungsten (W), aluminum (Al), or polycrystalline silicon (Poly-Si), and its thickness is 0.1µm-1µm.

[0014] Preferably, the dielectric layer is one of silicon oxide, silicon nitride, or a composite film, and its thickness is 0.3um-10um.

[0015] Preferably, the radiation wavelength of the dielectric layer covers the 3-14μm band, and the operating temperature is ≥500℃.

[0016] Preferably, the second metal layer is aluminum, and its thickness is 0.1um-1um.

[0017] Preferably, the cavity is formed by wet or dry etching.

[0018] Due to the application of the above technical solution, this utility model has the following advantages compared with the prior art:

[0019] Because this invention does not include a traditional blackbody radiation layer, but instead uses a dielectric layer from CMOS technology, it is fully compatible with CMOS technology. At the same time, the dielectric layer in the structure can also serve as an infrared radiation layer to a certain extent, and the wavelength range covered can basically meet the needs of conventional applications. Compared with MEMS technology, this infrared light source based on CMOS manufacturing technology has the advantages of high production capacity, high yield, and low cost. Furthermore, it supports single-chip integrated manufacturing with the light source driving circuit, and has greater prospects in terms of miniaturization and integration. Attached Figure Description

[0020] The technical solution of this utility model will be further described below with reference to the accompanying drawings:

[0021] Appendix Figure 1 This is a flowchart illustrating the fabrication process of the infrared light source based on CMOS manufacturing technology described in this utility model.

[0022] Appendix Figure 2 This is a cross-sectional view of the substrate after initial growth in this invention.

[0023] Appendix Figure 3 This is a cross-sectional view of the structure after the deposition of the support layer in this utility model.

[0024] Appendix Figure 4 This is a cross-sectional schematic diagram of the first metal layer after deposition in this utility model;

[0025] Appendix Figure 5 This is a schematic cross-sectional view of the deposition medium layer in this utility model;

[0026] Appendix Figure 6 This is a cross-sectional schematic diagram of the second metal layer after deposition in this utility model;

[0027] Appendix Figure 7 This is a cross-sectional schematic diagram of the infrared light source formed after etching a cavity on the back side of the substrate in this utility model.

[0028] Wherein: 1. Semiconductor substrate; 2. Support layer; 3. First metal layer; 4. Dielectric layer; 5. Second metal layer; 6. Cavity. Detailed Implementation

[0029] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0030] Appendix Figure 7 The infrared light source based on CMOS manufacturing process described in this utility model includes a semiconductor substrate 1, a support layer 2, a first metal layer 3, a dielectric layer 4, and a second metal layer 5.

[0031] The support layer 2 is deposited over the entire surface and is located above the semiconductor substrate 1, providing mechanical stability to the light source structure;

[0032] The first metal layer 3 is deposited above the support layer 2 and patterned by photolithography. The first metal layer 3 is a heating resistor. When the light source is working, it is energized and the generated Joule heat causes the temperature of the working area of ​​the light source to rise, thereby generating infrared radiation to the outside.

[0033] The dielectric layer 4 is deposited above the first metal layer 3 and patterned by photolithography. The dielectric layer 4 serves two purposes: firstly, it protects the front surface because the surface temperature of the light source exceeds 500°C during operation. The dielectric layer 4 ensures that the first metal layer 3 and the light source structure are not corroded during high-temperature operation, providing good long-term reliability for the light source; secondly, it acts as an infrared radiation layer. Its infrared emissivity is lower than that of an ideal blackbody radiation layer, but its radiation wavelength range can basically meet the needs of conventional applications.

[0034] The second metal layer 5 is used for lead interconnection of the structure, serving as a solder pad;

[0035] The back side of the semiconductor substrate 1 is etched with a cavity 6 to reduce heat loss during the operation of the light source, and also to improve the electrical modulation response speed of the structure.

[0036] like Figure 1-7 As shown, the manufacturing method of the infrared light source based on CMOS manufacturing process of this utility model includes the following steps:

[0037] S01. Provide a semiconductor substrate 1 for growth;

[0038] S02. Deposit a support layer 2 on the semiconductor substrate 1;

[0039] S03. Deposit a first metal layer 3 on top of the support layer 2 and perform photolithography patterning;

[0040] S04. Deposit a dielectric layer 4 on top of the first metal layer 3 and perform photolithography patterning;

[0041] S05. Deposit a second metal layer 5 on top of the dielectric layer 4 and perform photolithography patterning;

[0042] S06. Etch the back side of the substrate to form a cavity 6.

[0043] In this embodiment of the present invention, the semiconductor substrate 1 in step S01 is silicon.

[0044] In this embodiment of the invention, the support layer 2 deposited in step S02 is one of silicon oxide, silicon nitride, or a composite film, with a thickness of 0.3µm-10µm. A cross-sectional view after the deposition of the support layer 2 is shown below. Figure 3 As shown, the support layer 2 is deposited on the entire surface without patterning, which effectively ensures the mechanical stability of the light source structure.

[0045] In this embodiment of the present invention, the first metal layer 3 deposited in step S03 is one of the materials that conform to the standard CMOS processing technology, such as tungsten (W), aluminum (Al), or polycrystalline silicon (Poly-Si), and its thickness is 0.1um-1um.

[0046] In this embodiment of the present invention, the dielectric layer 4 deposited in step S04 is one of silicon oxide, silicon nitride, or a composite film, and its thickness is 0.3um-10um.

[0047] In this embodiment of the present invention, the second metal layer 5 deposited in step S05 is aluminum (Al) with a thickness of 0.1um-1um.

[0048] In this embodiment of the present invention, the silicon etching method used in step S06 is wet etching or dry etching.

[0049] The above are merely specific application examples of this utility model and do not constitute any limitation on the scope of protection of this utility model. All technical solutions formed by equivalent transformations or equivalent substitutions fall within the scope of protection of this utility model.

Claims

1. An infrared light source based on CMOS manufacturing process, characterized in that: It includes a semiconductor substrate, a support layer, a first metal layer, a dielectric layer, and a second metal layer; The support layer is disposed on the semiconductor substrate to provide mechanical stability; The first metal layer is disposed on the support layer and is used for electric heating; The dielectric layer is disposed on the first metal layer and is used for high temperature protection and as an infrared radiation layer. The second metal layer is disposed on the dielectric layer and is used for lead interconnection; The back side of the semiconductor substrate has a cavity to reduce heat loss and improve response speed.

2. The infrared light source based on CMOS manufacturing process according to claim 1, characterized in that: The semiconductor substrate is silicon.

3. The infrared light source based on CMOS manufacturing process according to claim 1, characterized in that: The support layer is one of silicon oxide, silicon nitride, or a composite film, and its thickness is 0.3um-10um.

4. The infrared light source based on CMOS manufacturing process according to claim 1, characterized in that: The first metal layer is one of tungsten, aluminum, or polycrystalline silicon, and its thickness is 0.1um-1um.

5. The infrared light source based on CMOS manufacturing process according to claim 1, characterized in that: The dielectric layer is one of silicon oxide, silicon nitride, or a composite film, and its thickness is 0.3um-10um.

6. The infrared light source based on CMOS manufacturing process according to claim 1, characterized in that: The radiation wavelength of the dielectric layer covers the 3-14μm band, and the operating temperature is ≥500℃.

7. The infrared light source based on CMOS manufacturing process according to claim 1, characterized in that: The second metal layer is aluminum, with a thickness of 0.1µm-1µm.

8. The infrared light source based on CMOS manufacturing process according to claim 1, characterized in that: The cavity is formed by wet or dry etching.