Quantum chip post-preparation device

Abstract

The utility model discloses a quantum chip post-preparation device, and belongs to the technical field of quantum chip manufacturing. The quantum chip post-preparation device comprises a cavity provided with a first window on the side wall, wherein the cavity comprises a first space for applying an annealing process to the quantum chip by laser annealing equipment and a second space for applying a resistance measuring process to the quantum chip by resistance measuring equipment and communicating with the first space; the moving device is arranged in the cavity and is used for transferring the quantum chip between the first space and the second space; and the vacuum device is connected with the cavity through the first window and is used for providing a vacuum environment for the interior of the cavity. Through the above mode, the annealing process and the resistance measurement process can be completed in the cavity, and the vacuum environment in the cavity does not need to be damaged in the process, so that the quality or performance of the quantum chip is prevented from being interfered by the external environment.

Description

Technical Field

[0001] This application belongs to the field of quantum chip manufacturing technology, and in particular relates to a quantum chip post-fabrication apparatus. Background Technology

[0002] The core of a superconducting quantum chip is the use of superconducting components such as superconducting Josephson junctions to construct qubits. By applying specific microwave pulses and other operations to the superconducting qubits, functions such as qubit initialization, logic gate operations, and readout can be achieved.

[0003] The fabrication of superconducting quantum chips involves processes such as thin film deposition, photolithography, laser annealing, and resistance measurement. However, during these processes, unexpected changes in the resistance of the quantum chip may occur, leading to substandard performance or quality. Utility Model Content

[0004] The purpose of this application is to provide a quantum chip post-fabrication apparatus to solve the problem in the prior art where the resistance of a quantum chip changes unexpectedly during fabrication, resulting in substandard performance or quality of the quantum chip. The apparatus enables annealing and resistance measurement processes to be completed within the same vacuum chamber.

[0005] To solve the above-mentioned technical problems, this utility model provides a quantum chip post-fabrication apparatus, comprising:

[0006] A cavity with a first window on its sidewall includes a first space where a laser annealing device applies an annealing process to the quantum chip, and a second space where a resistance measurement device applies a resistance measurement process to the quantum chip and is connected to the first space.

[0007] A movable device disposed within the cavity is used to transfer the quantum chip between the first space and the second space;

[0008] A vacuum device connected to the cavity through a first window is used to provide a vacuum environment for the interior of the cavity.

[0009] Preferably, the cavity is provided with a stage for carrying the quantum chip;

[0010] The mobile device is connected to the platform.

[0011] Preferably, the moving device is a support arm, used to transfer the quantum chip within the first space and the second space by changing the support shape;

[0012] Alternatively, the moving device is a slide rail, and the platform is slidably mounted on the slide rail. The platform carries the quantum chip and transfers it between the first space and the second space by sliding on the slide rail.

[0013] Preferably, it further includes a cooling device disposed inside the cavity, the cooling device being used to reduce or maintain the temperature of the stage at a preset temperature.

[0014] Preferably, the laser annealing device is disposed outside the cavity in a region close to the first space;

[0015] The side wall of the cavity is also provided with a second window;

[0016] The second window is sealed by a transparent element that allows the laser generated by the laser annealing device to pass through.

[0017] Preferably, the transparent element is a quartz sheet.

[0018] Preferably, the vacuum device is a molecular pump that is connected to the first window via a bellows.

[0019] Preferably, the cavity sidewall is further provided with a third window for the quantum chip to enter;

[0020] It also includes a gate for sealing or opening the third window.

[0021] Preferably, the gate is rotatably connected to the cavity, and the third window is sealed or opened by rotation.

[0022] Preferably, the cavity also includes a valve disposed on the side wall of the cavity, the valve being used to control the connection or isolation between the inside and outside of the cavity.

[0023] Compared with existing technologies, this application designs a quantum chip post-fabrication device, whose cavity includes a first space where the quantum chip is annealed by a laser annealing device, and a second space connected to the first space where the quantum chip is subjected to a resistance measurement process by a resistance measurement device. A vacuum device can be used to achieve a vacuum inside the cavity, and a moving device can be used to transfer the quantum chip between the first and second spaces, so as to complete the annealing and resistance measurement processes of the quantum chip inside the cavity. Moreover, this process does not require the disruption of the vacuum environment inside the cavity, thus avoiding interference from the external environment on the quality or performance of the quantum chip. Attached Figure Description

[0024] Figure 1 This is an overall schematic diagram of the post-processing apparatus provided in the embodiments of this application;

[0025] Figure 2 A schematic diagram of a cavity containing a stage and a moving device, provided in an embodiment of this application;

[0026] Figure 3 This is a schematic diagram of a cavity with a gate on its sidewall, provided in an embodiment of this application.

[0027] Figure 4 This is a schematic diagram of a cavity with a valve on its sidewall, provided in an embodiment of this application.

[0028] Explanation of reference numerals in the attached drawings: 1-cavity, 11-first window, 12-second window, 2-vacuum device, 3-stage, 4-moving device, 5-gate, 6-valve. Detailed Implementation

[0029] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0030] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0031] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0032] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0033] After a superconducting quantum chip is fabricated using conventional manufacturing processes, some of its qubits require annealing to achieve the expected performance level due to various defects or discrepancies with the intended performance.

[0034] Laser annealing is an important post-fabrication process. This is because some processes in quantum chip fabrication, such as thin-film deposition and photolithography, can introduce stress, defects, or impurities into the material, affecting the performance of superconducting materials and the quality of qubits. Laser annealing utilizes a high-energy-density laser beam to irradiate the chip, causing localized high temperatures to eliminate stress, repair defects, and remove impurities.

[0035] To evaluate the effect of laser annealing and test the performance of quantum chips, it is common practice to measure the resistance of the annealed chip and use the measured resistance to determine the effectiveness of the annealing process and the performance of the quantum chip itself.

[0036] Specifically, since qubits are superconducting quantum circuits built on the Josephson junction, the Josephson junction is a key site for annealing. For example, laser annealing can locally heat-treat the oxide layer of the Josephson junction, causing oxygen atoms to diffuse and thus changing the parameters of the Josephson junction to optimize the performance of the qubit, such as extending the coherence time of the qubit, improving its stability and accuracy, and thus enhancing the computing power and reliability of the entire quantum chip.

[0037] Furthermore, characterizing the resistance of the annealed quantum chip is an important means of evaluating its performance. The measured resistance value is compared with the theoretical design value or previous experimental data. If the resistance value is within the expected range, it indicates that the annealing process has basically achieved the goal of controlling the chip's resistance characteristics, and the chip's basic performance is relatively good. If the resistance value deviates from the expectation, it may mean that there is a problem with the annealing process, such as the chip being interfered with by external factors after annealing.

[0038] Through numerous experiments, the inventors of this application discovered that after annealing, the quantum chip needs to be transferred from the annealing equipment to a resistance measurement device. However, during this transfer process, the quantum chip is exposed to the natural environment, and environmental factors inevitably cause changes in the quantum chip's materials, with oxidation and contamination being particularly detrimental. For example, when the quantum chip is exposed to air during transfer, the surface of the superconducting materials (such as niobium nitride, aluminum, etc.) may oxidize or adsorb moisture, dust, and organic pollutants from the air, thus forming a non-superconducting layer and increasing the resistance of the quantum chip. Furthermore, if the annealed quantum chip is not cooled in a controlled environment, the temperature change during transfer may cause relaxation of the material's lattice structure (such as grain boundary recombination) or phase transition (such as a transition from an amorphous state to a crystalline state), which will undoubtedly alter the superconducting properties of the superconducting materials. Even worse, mechanical vibration or improper handling during the transfer process can cause microcracks or dislocations in the quantum chip, thereby disrupting the continuity of the superconducting thin film and leading to an increase in local resistance.

[0039] Therefore, in order to avoid unexpected negative effects caused by various external factors during the transfer of quantum chips to the resistance measurement device after annealing, this application provides a quantum chip post-fabrication device. Post-fabrication usually refers to a series of processing steps or operations after the initial manufacturing of the quantum chip is completed.

[0040] These post-fabrication processes are generally used to further optimize the performance of quantum chips, improve their stability and reliability, or to achieve specific functional requirements. For example, laser annealing is a post-fabrication technique. By performing laser annealing on the quantum chip, the parameters of the Josephson junction can be changed, thereby improving the performance of the quantum chip and solving problems such as multi-qubit expansion. In addition, post-fabrication may also include chip packaging, electrode connection, surface treatment, and various testing and calibration operations to ensure that the quantum chip can function properly in practical applications.

[0041] refer to Figure 1 According to one embodiment of this application, the post-fabrication apparatus includes a sealed cavity 1. The main material of cavity 1 can be high-strength steel, aluminum alloy, etc., to ensure overall mechanical properties and airtightness. The cavity 1 includes a first space and a second space. Depending on the requirements of the post-fabrication apparatus, the quantum chip can be annealed in the first space using a laser annealing device, and the quantum chip can be measured using a resistance measurement device in the second space. It is worth noting that whether annealing or measuring the resistance of the quantum chip, the cavity 1 maintains a vacuum level sufficient for the annealing process. To achieve this, the post-fabrication apparatus also includes a vacuum device 2, with a through-hole first window 11 on the side wall of cavity 1. The vacuum device 2 communicates with the interior of cavity 1 through the first window 11 and extracts air from the cavity 1 to create a vacuum environment inside cavity 1.

[0042] For the aforementioned post-fabrication device, the inventors integrated a first space for applying an annealing process to the quantum chip and a second space for applying a resistance measurement process to the quantum chip within the cavity 1. The first space and the second space are connected, so that the quantum chip can always maintain the same vacuum environment during the annealing process, the resistance measurement process, and the transfer between the two, thereby avoiding interference from external factors to the quantum chip.

[0043] Furthermore, in order to transfer the quantum chip between the first space and the second space without disrupting the vacuum state inside the cavity 1, a moving device 4 is also provided inside the cavity. The moving device is used to transfer the quantum chip between the first space and the second space.

[0044] Please refer to Figure 2 The cavity 1 is also equipped with a platform 3 for carrying the quantum chip, and the platform 3 is connected to the mobile device 4, so that the mobile device 4 can drive the platform 3 and the quantum chip it carries to transfer between the first space and the second space.

[0045] The movable device 4 is disposed inside the cavity 1 and connected to the platform 3. In actual use, the movable device 4 can be a support arm that can change its support shape. By changing the support shape of the support arm, one end of the platform 3 can be moved between the first space and the second space. Alternatively, the movable device 4 can also be a slide rail. The platform 3 moves between the first space and the second space by sliding on the slide rail, and after sliding to a preset position, the platform 3 is locked in the slide rail.

[0046] In the description of the foregoing embodiments, the first space and the second space are connected. In one respect, the first space and the second space are connected, so the first window 11, the first space and the second space are naturally connected. This arrangement allows the vacuum device 2 to better evacuate or maintain the vacuum state inside the cavity 1, and the vacuum state in the first space and the second space is consistent, which better avoids the impact on the quantum chip caused by the inconsistency of the environment in the first space and the second space.

[0047] Based on the aforementioned description of laser annealing, the oxide layer of the Josephson junction undergoes localized heat treatment, while the remaining areas do not require heating. Excessive heat to non-processed areas could even lead to material deformation, resulting in decreased or failed qubit performance. To avoid such negative impacts on the quantum chip, the post-fabrication apparatus includes a cooling device, such as water cooling, inside cavity 1. This cooling device lowers the temperature of the stage 3 and the quantum chip placed on its surface, reducing or maintaining the temperature of the stage 3 at a preset temperature, which can be defined as below 0°C, such as -20°C. This ensures that during or after the annealing process, the temperature of non-target areas on the quantum chip is insufficient to negatively affect its material properties or performance.

[0048] For example, when performing an annealing process on a quantum chip located in the first space, a laser annealing device is generally chosen. This device includes at least a high-energy-density laser beam, an optical system composed of lenses and mirrors, a motion control system for precisely moving the laser head, and a temperature control system. In practice, laser annealing devices are relatively large. If installed inside cavity 1, cavity 1 would require a relatively large internal space, which significantly increases the difficulty of achieving and maintaining a vacuum condition inside cavity 1. Therefore, the laser annealing device is positioned outside cavity 1, near the first space. To allow the laser annealing device to perform the annealing process on the quantum chip inside cavity 1 from outside, a second window 12, sealed by a transparent element, is provided on the side wall of cavity 1 near the first space. The transparent element allows the laser emitted by the laser annealing device to pass through, so that the laser emitted by the laser annealing device enters the first space through the second window 12 to anneal the quantum chip.

[0049] It is worth noting that the material sealing the second window 12 must have high optical transmittance, such as quartz, to reduce laser energy loss and ensure sufficient energy reaches the chip surface for annealing. Therefore, the material's transmittance should be above 90%. The material also needs good thermal stability. During annealing, although the chip is the primary object of heating, the window material may also be subject to some thermal radiation. Therefore, the material needs to maintain stable performance within a certain temperature range, or its absorption and dissipation of laser energy should be as low as possible to avoid heat generation due to laser energy absorption, which could lead to a decrease in the material's performance. Furthermore, the aforementioned material must have sufficient mechanical strength. Because the cavity 1 is a vacuum environment, there is a strong pressure difference between the inside and outside of the cavity 1. Therefore, the material used to seal the window must have sufficient mechanical strength to withstand this pressure difference.

[0050] In order to anneal the quantum chip in the cavity 1 through a transparent second window 12, the first space can be made relatively small so that the second window 12 described above is close to the quantum chip, so that the power of the laser irradiation on the chip surface is closest to the released power, and finally the expected laser annealing effect is achieved.

[0051] In one embodiment of this application, a resistance measurement device can be set in the second space to realize the resistance measurement process of the quantum chip within cavity 1. The probe system is one of the core components of the resistance measurement device, consisting of a non-destructive probe arm and probes. The non-destructive probe arm achieves micron-level thin-film non-destructive testing through a micro-force sensor, precisely controlling the insertion depth and force, thus better protecting the quantum chip and avoiding damage during testing. The probes are used to make electrical connections with the surface of the quantum chip, transmitting test signals to the chip and acquiring the chip's electrical response signals, providing a physical connection for accurately measuring parameters such as resistance.

[0052] Specifically, a known voltage is applied to the quantum chip using a probe, and the current flowing through the chip is measured. Ohm's law is then used to calculate the chip's resistance. In actual measurements, the resistance measuring device precisely controls the applied voltage and accurately measures the corresponding current to determine the resistance value.

[0053] The probes enable excellent electrical contact with the surface of the quantum chip. The design and fabrication of the probes ensure a stable connection without damaging the chip, minimizing variations in contact resistance and thus guaranteeing the stability and repeatability of the measurement results.

[0054] Furthermore, the probes in the resistance measurement device are consumables, such as tungsten needles. Using tungsten needles to test the resistance of quantum chips yields more accurate results, but tungsten needles are relatively soft and have a short lifespan. Therefore, testing a single chip may require multiple tungsten needles. Since the cavity 1 is in a vacuum environment during the post-fabrication process, with a volume reaching 500L, it typically requires several hours of evacuation to maintain this vacuum. If each tungsten needle replacement is performed outside cavity 1, cavity 1 would need to undergo multiple evacuation, de-vacuuming, and testing steps, which would undoubtedly waste a significant amount of time. Therefore, after a limited number of resistance measurement operations, the probes need to be replaced. To avoid disrupting the overall vacuum environment within cavity 1, a quick probe replacement device can be installed inside cavity 1, allowing for probe replacement within cavity 1. Therefore, the second space is relatively larger than the first space to facilitate the installation of the resistance measurement device within it.

[0055] In one embodiment of this application, a molecular pump can be selected as the vacuum device 2. When the rotor of the molecular pump rotates at high speed, the impeller drives the gas molecules to move together, giving the gas molecules directional momentum. Under the action of the impeller, the gas molecules flow from the inlet to the outlet. Due to the high rotational speed of the impeller, the gas molecules are rapidly pushed towards the outlet, thereby forming a low pressure at the inlet and achieving the suction effect on the gas. As the gas molecules flow towards the outlet, the gas is gradually compressed inside the pump. At the outlet, the gas pressure increases to a level that can be drawn away by the backing pump, and then discharged into the atmosphere by the backing pump. In this way, the molecular pump can continuously extract gas from the evacuated system, thereby improving the vacuum level of the system.

[0056] The molecular pump includes a gate valve. After the molecular pump operates for a period of time and extracts the gas in the cavity 1 to the expected vacuum level, the gate valve closes the channel between the molecular pump and the cavity 1, that is, it blocks the first window 11, so that the vacuum environment in the cavity 1 can be maintained.

[0057] Furthermore, one reason for choosing a molecular pump as the vacuum device 2 in the post-preparation apparatus is that it can rapidly raise the system's vacuum level, making it suitable for equipment requiring high vacuum and quick vacuum acquisition. For example, a vacuum level typically reaching 10... -6 Pa-10 -11 Pa range.

[0058] It is worth noting that the vacuum device 2 will generate a certain amount of vibration during operation, which is not negligible. Tests have shown that this level of vibration will cause errors in the operation of the aforementioned resistance measuring equipment, resulting in inaccurate resistance measurement or resistance measurement failure.

[0059] To avoid this situation, based on the aforementioned embodiments, the molecular pump is further connected to the first window 11 via a bellows. The bellows includes at least a corrugated portion and connecting ends. The corrugated portion is the core structure of the bellows, composed of a series of pleats. These pleats give the bellows good flexibility and extensibility. The shape, size, and density of the corrugations vary according to different application requirements. The connecting ends are located at both ends of the bellows and are used to connect to the first window 11 and the molecular pump, respectively. Vibrations generated by the molecular pump are absorbed and filtered by the bellows, thereby eliminating the impact of vibration on the internal process of the cavity 1.

[0060] Furthermore, a third window, such as a rectangular window, is provided on the side wall of cavity 1. This third window is used to place the quantum chip to be processed into cavity 1 for annealing and / or resistance measurement processes, and also to remove the quantum chip from cavity 1 after the processing is complete. Specifically, the third window primarily serves as a transfer channel for the quantum chip relative to cavity 1.

[0061] like Figure 3 As shown, during the post-fabrication process of the quantum chip within cavity 1, a vacuum state needs to be maintained inside cavity 1, so cavity 1 must be sealed. Therefore, the third window is also equipped with a gate 5, one edge of which can be rotatably connected to one edge of the third window via a hinge, and the third window can be sealed or opened by rotation.

[0062] like Figure 4 As shown, based on the aforementioned embodiment, a valve 6 is further provided on the side wall of the cavity 1. The valve 6 is used to control the connection or isolation between the inside and outside of the cavity 1. For example, the valve can be selected as a gate valve, ball valve, butterfly valve, or plug valve. In practical applications, when the gate 5 is in the closed state of the third window, and the inside and outside of the cavity 1 are isolated, the inside of the cavity 1 can be evacuated to a vacuum state by a vacuum device. When the inside of the cavity 1 is in a vacuum state, the outside and inside of the cavity 1 are respectively the natural environment and the vacuum environment. In this case, the atmospheric pressure may prevent the gate 5 from being opened by rotation. Therefore, by providing a valve 6 on the side wall of the cavity 1, closing the valve 6 can isolate the inside of the cavity 1 from the external natural environment, and opening the valve 6 can connect the inside of the cavity 1 with the external natural environment, so as to balance the pressure inside and outside the cavity 1, so that the aforementioned gate 5 can be opened for the removal and placement of the quantum chip.

[0063] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0064] The above description, based on the embodiments shown in the drawings, details the structure, features, and effects of this application. The above description is only a preferred embodiment of this application, but this application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of this application, or modifications to equivalent embodiments, that do not exceed the spirit covered by the specification and drawings, should be within the protection scope of this application.

Claims

1. A quantum chip fabrication apparatus, characterized in that, include: A cavity (1) with a first window (11) on its sidewall includes a first space where a quantum chip is annealed by a laser annealing device and a second space where a quantum chip is subjected to a resistance measurement process by a resistance measurement device and is connected to the first space. A mobile device (4) disposed within the cavity (1) is used to transfer the quantum chip between the first space and the second space; A vacuum device (2) connected to the cavity (1) through a first window (11) is used to provide a vacuum environment for the interior of the cavity (1).

2. The quantum chip fabrication apparatus according to claim 1, characterized in that, The cavity (1) is provided with a platform (3) for carrying the quantum chip; The mobile device (4) is connected to the platform (3).

3. The quantum chip fabrication apparatus according to claim 2, characterized in that, The mobile device (4) is a support arm used to transfer the quantum chip in the first space and the second space by changing the support shape; Alternatively, the moving device (4) is a slide rail, and the platform (3) is slidably mounted on the slide rail. The platform (3) carries the quantum chip and transfers it between the first space and the second space by sliding on the slide rail.

4. The quantum chip fabrication apparatus according to claim 2, characterized in that, It also includes a cooling device disposed inside the cavity (1), the cooling device being used to reduce or maintain the temperature of the stage (3) at a preset temperature.

5. The quantum chip fabrication apparatus according to claim 1, characterized in that, The laser annealing device is located outside the cavity (1) in a region close to the first space; The side wall of the cavity (1) is also provided with a second window (12); The second window (12) is sealed by a transparent element that allows the laser generated by the laser annealing device to pass through.

6. The quantum chip fabrication apparatus according to claim 5, characterized in that, The transparent component is a quartz sheet.

7. The quantum chip fabrication apparatus according to claim 1, characterized in that, The vacuum device (2) is a molecular pump that is connected to the first window (11) via a bellows.

8. The quantum chip fabrication apparatus according to any one of claims 1 to 7, characterized in that, The cavity (1) is also provided with a third window for the quantum chip to enter; It also includes a gate (5) for sealing or opening the third window.

9. The quantum chip fabrication apparatus according to claim 8, characterized in that, The gate (5) is rotatably connected to the cavity (1) and can seal or open the third window by rotation.

10. The quantum chip fabrication apparatus according to any one of claims 1 to 7, characterized in that, It also includes a valve (6) disposed on the side wall of the cavity (1), the valve (6) being used to control the connection or isolation between the inside and outside of the cavity (1).

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