Ceramic substrate and power module
By setting a protective coating on the metal layer of the ceramic substrate and using a thermal interface material, the reliability issues of soldering chips and bonding conductive lines are solved, and the corrosion resistance and thermal conductivity of the ceramic substrate are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JIGUANG SEMICON (SHAOXING) CO LTD
- Filing Date
- 2025-04-30
- Publication Date
- 2026-05-15
AI Technical Summary
The existing ceramic substrates have poor reliability for soldered chips or bonded conductive lines, are susceptible to corrosion, and affect product reliability.
A protective plating layer is applied to the metal layer of the ceramic substrate to cover the surface except for the conductive connection area, and a thermal interface material layer is used in conjunction to achieve a reliable connection.
It improves the corrosion resistance of the metal layer, ensures the reliability of welding and bonding processes, and enhances thermal conductivity and heat dissipation.
Smart Images
Figure CN224250160U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a ceramic substrate and a power module. Background Technology
[0002] A power module is a key component that integrates power semiconductor devices with their drive circuits, protection circuits, and heat dissipation structures into a single functional module to achieve efficient power conversion and control. Power semiconductor devices include, for example, insulated-gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs). The core advantage of power modules lies in their modular design, which simplifies the development process of complex power electronic systems and improves reliability.
[0003] To achieve high thermal conductivity, low expansion, and high reliability, many power modules utilize ceramic substrates. In existing technologies, ceramic substrates typically employ a sandwich structure: an upper metal layer carries current and provides thermal conductivity, a middle ceramic layer provides insulation, and a lower metal layer provides thermal conductivity. However, existing ceramic substrates suffer from poor reliability when bonding chips or conductive wires. Utility Model Content
[0004] In view of this, this application provides a ceramic substrate and a power module to solve at least one problem existing in the prior art.
[0005] To achieve the above objectives, the technical solution of this application is implemented as follows:
[0006] In a first aspect, embodiments of this application provide a ceramic substrate, comprising:
[0007] The ceramic layer includes a first surface and a second surface that are opposite to each other;
[0008] A first metal layer is disposed on the first surface and includes a back side that contacts the first surface and a front side that is disposed opposite to the back side. The front side is used to place a chip and includes a conductive connection area.
[0009] A second metal layer is disposed on the second surface;
[0010] A protective coating covers the first metal layer and the second metal layer, and exposes the front side of the first metal layer in the conductive connection area.
[0011] In conjunction with a first aspect of this application, in an alternative embodiment, the ceramic substrate further includes a passivation layer that covers the first metal layer exposed by the conductive connection region.
[0012] In conjunction with a first aspect of this application, in an alternative embodiment, the first metal layer includes a side surface connecting the front and the back surfaces; for the first metal layer, the protective coating covers only the side surface.
[0013] In conjunction with the first aspect of this application, in an alternative embodiment, the protective coating is a nickel plating.
[0014] In conjunction with the first aspect of this application, in an optional embodiment, the thickness of the nickel plating layer is 0.1 μm to 1.0 μm.
[0015] In conjunction with the first aspect of this application, in an optional embodiment, the ceramic substrate further includes:
[0016] A thermal interface material layer is disposed on the third surface of the second metal layer facing away from the ceramic layer and covering the protective coating.
[0017] In conjunction with the first aspect of this application, in an optional embodiment, the thermal conductivity of the thermal interface material layer is greater than 0.8 W / (m·K).
[0018] In conjunction with the first aspect of this application, in an optional embodiment, the coating thickness of the thermal interface material layer is 80 μm-120 μm.
[0019] In conjunction with the first aspect of this application, in an optional embodiment, the thermal interface material layer is made of thermally conductive silicone grease.
[0020] Secondly, embodiments of this application provide a power module, including:
[0021] Any of the ceramic substrates described above;
[0022] A heat dissipation base plate is configured to support the ceramic substrate and is thermally connected to the ceramic substrate;
[0023] The chip is soldered onto the conductive connection area of the first metal layer;
[0024] Conductive lines are bonded to the conductive connection area of the first metal layer.
[0025] The ceramic substrate and power module provided in this application include: a ceramic layer comprising a first surface and a second surface opposite to each other; a first metal layer disposed on the first surface, including a back surface in contact with the first surface and a front surface disposed opposite to the back surface, the front surface being used to mount a chip and including a conductive connection area; a second metal layer disposed on the second surface; and a protective plating layer covering the first metal layer and the second metal layer, exposing the front surface of the first metal layer in the conductive connection area. It is evident that the ceramic substrate and power module of this application, by providing a protective plating layer covering the first metal layer and the second metal layer, and exposing the front surface of the first metal layer in the conductive connection area, improves the corrosion resistance of the first metal layer without affecting the bonding of chips or conductive wires. Therefore, the ceramic substrate and power module of this application can solve the technical problem of poor reliability in chip bonding or conductive wire bonding.
[0026] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0027] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0028] Figure 1 This is a schematic diagram of a ceramic substrate in the prior art;
[0029] Figure 2 This is a schematic diagram of another ceramic substrate in the prior art;
[0030] Figure 3 A schematic diagram of a ceramic substrate provided in an embodiment of this application;
[0031] Figure 4 This is a schematic diagram of a power module provided in an embodiment of this application.
[0032] Explanation of reference numerals in the attached figures:
[0033] 10. Ceramic substrate; 11. Ceramic layer; 12. First metal layer; 13. Second metal layer; 14. Protective coating; 15. Thermal interface material layer; 16. Passivation layer; 20. Heat dissipation base plate; 30. Chip; 40. Conductive line; 50. Housing; 60. Electrode. Detailed Implementation
[0034] To make the technical solution and beneficial effects of this application more apparent and understandable, a detailed description is provided below by listing specific embodiments. The accompanying drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features; unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application pertains.
[0035] In the description of this application, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "height", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only used for the purpose of simplifying the description of this application and do not indicate that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. In other words, they should not be construed as limitations on this application.
[0036] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating the relative importance of the indicated features or the number of indicated technical features. Therefore, a feature specified as "first" or "second" may explicitly include at least one of those features. In the description of this application, "multiple" means at least two, such as two, three, etc.; "several" means at least one, such as one, two, three, etc., unless otherwise explicitly specified.
[0037] In this application, unless otherwise expressly defined, the terms "installation," "connection," "linking," "fixing," "setting," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can also refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0038] In this application, unless otherwise expressly defined, the terms "above," "on top of," "over," "above," "below," "below," "below," or "below" for "first feature over second feature" can refer to the first and second features being in direct contact, or to the first and second features being in indirect contact through an intermediate medium. Furthermore, "above," "over," and "below" for "first feature over second feature" can mean the first feature is directly above or diagonally above the second feature, or simply indicates that the horizontal height of the first feature is higher than the horizontal height of the second feature. Similarly, "below," "below," and "below" for "first feature over second feature" can mean the first feature is directly below or diagonally below the second feature, or simply indicates that the horizontal height of the first feature is lower than the horizontal height of the second feature.
[0039] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solution of this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.
[0040] The applicant of this application discovered during the research and development that existing ceramic substrates 10 often employ two technical solutions. (Reference) Figure 1 One approach uses copper for both the upper and lower metal layers, and to achieve good soldering and bonding, no protective plating layer 14 is applied to the copper surface—a "bare copper" solution. This solution is susceptible to corrosion by hydrogen sulfide (H2S), which can form sulfide dendrites in the ceramic trenches, leading to short-circuit failure. (Reference) Figure 2 Another option is to provide a protective coating 14, such as a nickel coating, on the surfaces of both the upper and lower metal layers. This approach reduces the possibility of corrosion, but the poor bonding strength between nickel and copper or aluminum affects the reliability of the welding and bonding processes.
[0041] Therefore, based on further research and development by the applicant, the following technical solution was proposed.
[0042] To address the technical problems in related technologies, this application provides a ceramic substrate 10. (See reference...) Figure 3 The ceramic substrate 10 includes:
[0043] Ceramic layer 11 includes a first surface and a second surface that are opposite to each other;
[0044] A first metal layer 12 is disposed on the first surface and includes a back surface in contact with the first surface and a front surface disposed opposite to the back surface. The front surface is used to place the chip 30 and includes a conductive connection area.
[0045] A second metal layer 13 is disposed on the second surface;
[0046] A protective plating layer 14 covers the first metal layer 12 and the second metal layer 13, and exposes the front side of the first metal layer 12 in the conductive connection area.
[0047] Understandably, the ceramic substrate 10 can be a DBC (Direct Bonding Copper) substrate or an AMB (Active Metal Bonding) substrate. That is, for DBC or AMB, the ceramic layer 11 can be a ceramic substrate. Specifically, for the DBC substrate, the ceramic substrate can be alumina (Al2O3), zirconia-toughened alumina ceramics (ZTA), and aluminum nitride (AlN); for AMB, the ceramic substrate can be silicon nitride (Si3N4) and aluminum nitride.
[0048] Understandably, the first metal layer 12 and the second metal layer 13 can be made of copper. Specifically, the first metal layer 12 and the second metal layer 13 can be fixed to the ceramic layer 11 by direct sintering or welding, which will not be described in detail.
[0049] The front side of the first metal layer 12 is used to mount the chip 30 and mainly serves to conduct electricity; therefore, a conductive connection area is provided. In addition, the first metal layer 12 and the second metal layer 13 also serve to conduct heat, such as dissipating the heat generated by the chip 30 during operation.
[0050] Understandably, in order to reduce the corrosion or oxidation of the first metal layer 12 and the second metal layer 13, a protective plating layer 14 can be provided. However, in order to increase the reliability of the welding and bonding process, the protective plating layer 14 does not achieve full coverage, that is, it does not cover the conductive connection area, exposing the front side of the first metal layer 12.
[0051] The ceramic substrate 10 of this application embodiment is provided with a protective plating layer 14, which covers the first metal layer 12 and the second metal layer 13, and exposes the front side of the first metal layer 12 in the conductive connection area, thereby improving the corrosion resistance of the first metal layer 12 and not affecting the welding of the chip 30 or the bonding of the conductive line 40.
[0052] In some other embodiments of this application, the ceramic substrate 10 may further include a passivation layer 16 that covers the first metal layer 12 exposed by the conductive connection region.
[0053] Understandably, the protective plating 14 exposes the front side of the first metal layer 12 in the conductive connection area, which can improve the reliability of the welding and bonding processes. However, it also increases the possibility of corrosion or oxidation. Therefore, a passivation layer is added. It should be noted that the passivation layer provides protection before welding or bonding. During the welding or bonding process, the passivation layer can be removed due to factors such as increased temperature, without affecting the conductive connection formed by welding or bonding. It should also be noted that the passivation layer is relatively thin and only covers the conductive connection area; therefore, the dimensions shown in the figure are not drawn to scale.
[0054] It should be noted that the front side of the first metal layer 12 includes both conductive connection areas and non-conductive connection areas. Figure 3 The front side of the first metal layer 12 is not covered by the protective plating layer 14. It can be understood that the protective plating layer 14 may partially cover the front side of the first metal layer 12 (not shown in the figure).
[0055] In other embodiments of this application, the first metal layer 12 may include a side surface connecting the front and the back surfaces; for the first metal layer 12, the protective plating layer 14 covers only the side surface.
[0056] Understandably, the back side abuts against the ceramic layer 11, meaning it is covered by the ceramic layer 11 and cannot come into contact with the corrosion source, so there is no need to set a protective plating layer 14. On the other hand, the front side has a conductive connection area that needs to be exposed, so the entire front side is not set with a protective plating layer 14 to simplify the plating process. Specifically, the plating process may include electroplating, chemical plating, etc.
[0057] Similarly, the surface of one end of the second metal layer 13 also abuts against the ceramic layer 11, so there is no need to provide a protective coating 14. The surface of the other parts of the second metal layer 13 is provided with a protective coating 14.
[0058] In some other embodiments of this application, the protective coating 14 may be a nickel coating.
[0059] Understandably, in addition to its excellent corrosion resistance, nickel plating also offers good wear resistance, electromagnetic shielding, electrical and thermal conductivity, environmental friendliness, and safety, all at a relatively low cost.
[0060] In some other embodiments of this application, the thickness of the nickel plating layer may be 0.1 μm-1.0 μm.
[0061] After numerous experiments, it was found that setting the thickness of the nickel plating layer within the above range can achieve good technical results, such as corrosion resistance and wear resistance, and the process is stable and low in cost.
[0062] In other embodiments of this application, the ceramic substrate 10 may further include:
[0063] A thermal interface material layer 15 is disposed on the third surface of the second metal layer 13 facing away from the ceramic layer 11 and covering the protective coating layer 14.
[0064] At the bottom of the ceramic substrate 10 in the power module, specifically on the third surface of the second metal layer 13, a heat sink base plate 20 needs to be connected. Due to the unstable solderability of the protective plating layer 14, this application creatively proposes the use of a thermal interface material. This material enables reliable interconnection between the second metal layer 13 and the heat sink base plate 20 without the need for soldering. It should be noted that the thermal interface material layer 15 primarily serves for interconnection and heat conduction, and does not function as a protective layer for the plating layer 14. Therefore, the third surface of the second metal layer 13 is covered by the protective plating layer 14; that is, the thermal interface material layer 15 is located between the protective plating layer 14 and the heat sink base plate 20.
[0065] In some other embodiments of this application, the thermal conductivity of the thermal interface material layer 15 may be greater than 0.8 W / (m·K).
[0066] In this way, the thermal conductivity of the ceramic substrate 10 and the heat dissipation capacity of the heat sink 20 can be improved in the power module.
[0067] In some other embodiments of this application, the thermal interface material layer 15 may be made of thermally conductive silicone grease.
[0068] Thermal grease has high thermal conductivity, such as extremely low thermal resistance, which can quickly transfer heat. It also has the advantages of strong interface adaptability, such as high viscosity, which ensures stable adhesion, vibration resistance, extrusion resistance, and is not easily displaced when installed vertically or in high-temperature environments.
[0069] In some other embodiments of this application, the coating thickness of the thermal interface material layer 15 can be 80μm-120μm. This sufficient thickness ensures adequate thermal conductivity and viscosity.
[0070] This application also provides a power module, see reference. Figure 4 The power module includes:
[0071] The ceramic substrate 10 as described above;
[0072] The heat dissipation base plate 20 is configured to support the ceramic substrate 10 and is thermally connected to the ceramic substrate 10.
[0073] Chip 30 is soldered to the conductive connection area of the first metal layer 12;
[0074] Conductive wire 40 is bonded to the conductive connection area of the first metal layer 12.
[0075] The power module of this application embodiment is provided with a protective plating layer 14, which covers the first metal layer 12 and the second metal layer 13, and exposes the front side of the first metal layer 12 in the conductive connection area, thereby improving the corrosion resistance of the first metal layer 12 and not affecting the welding of the chip 30 or the bonding of the conductive line 40.
[0076] Specifically, the power module further includes:
[0077] The housing 50 is used to encapsulate components such as the chip 30 and the conductive wire 40.
[0078] Electrode 60 is used to introduce electrical energy.
[0079] It should be understood that the above embodiments are exemplary and are not intended to encompass all possible implementations of the technical solutions of this application. Various modifications and changes can be made to the above embodiments without departing from the scope of this application. Similarly, the various technical features of the above embodiments can be arbitrarily combined to form other embodiments of this application that may not be explicitly described. Therefore, the above embodiments merely illustrate several implementations of this application and do not limit the scope of protection of this patent application.
Claims
1. A ceramic substrate, characterized in that, include: The ceramic layer includes a first surface and a second surface that are opposite to each other; A first metal layer is disposed on the first surface and includes a back side that contacts the first surface and a front side that is disposed opposite to the back side. The front side is used to place a chip and includes a conductive connection area. A second metal layer is disposed on the second surface; A protective coating covers the first metal layer and the second metal layer, and exposes the front side of the first metal layer in the conductive connection area.
2. The ceramic substrate according to claim 1, characterized in that, The ceramic substrate further includes a passivation layer that covers the first metal layer exposed in the conductive connection region.
3. The ceramic substrate according to claim 1, characterized in that, The first metal layer includes a side surface connecting the front and the back sides; for the first metal layer, the protective coating only covers the side surface.
4. The ceramic substrate according to claim 1, characterized in that, The protective coating is a nickel plating.
5. The ceramic substrate according to claim 4, characterized in that, The thickness of the nickel plating is 0.1μm-1.0μm.
6. The ceramic substrate according to claim 1, characterized in that, The ceramic substrate further includes: A thermal interface material layer is disposed on the third surface of the second metal layer facing away from the ceramic layer and covering the protective coating.
7. The ceramic substrate according to claim 6, characterized in that, The thermal conductivity of the thermal interface material layer is greater than 0.8 W / (m·K).
8. The ceramic substrate according to claim 6, characterized in that, The coating thickness of the thermal interface material layer is 80μm-120μm.
9. The ceramic substrate according to claim 6, characterized in that, The thermal interface material layer is made of thermally conductive silicone grease.
10. A power module, characterized in that, include: The ceramic substrate as described in any one of claims 1-9; A heat dissipation base plate is configured to support the ceramic substrate and is thermally connected to the ceramic substrate; The chip is soldered onto the conductive connection area of the first metal layer; Conductive lines are bonded to the conductive connection area of the first metal layer.