High-frequency driving circuit and H-bridge driving circuit
By using a high-frequency drive circuit and an H-bridge drive circuit, and utilizing the push-pull circuit of PMOS and NMOS transistors to output a high-frequency drive signal, the problems of low efficiency and high cost of IGBT gate drive circuits are solved, achieving frequency increase and cost reduction, while also enhancing safety performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHONGQING CLOUDCHILD TECH CO LTD
- Filing Date
- 2025-04-09
- Publication Date
- 2026-05-19
AI Technical Summary
Existing IGBT gate drive circuits have low switching frequency, low efficiency, and high cost, and require multiple sets of drive signals.
It employs a high-frequency drive circuit and an H-bridge drive circuit, and utilizes a push-pull circuit composed of PMOS and NMOS transistors to output two high-frequency drive signals. The signals are amplified and inverted through inverters, reducing the number of drive signal paths and protecting the gate of the IGBT transistor.
The switching frequency of the IGBT was increased, the driving cost was reduced, and the safety performance of the IGBT was enhanced, protecting the gate from overvoltage.
Smart Images
Figure CN224264850U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of power circuits, specifically relating to a high-frequency drive circuit and an H-bridge drive circuit. Background Technology
[0002] IGBTs (Insulated Gate Bipolar Transistors) are power semiconductor devices widely used in power electronic equipment, characterized by high efficiency, high switching speed, and low conduction losses. To ensure the reliability and performance of IGBTs, the design of the gate drive circuit often determines their application performance. It is a voltage-driven device, where conduction and turn-off are controlled by the voltage applied between the gate and emitter. The main task of the gate drive circuit is to provide an appropriate voltage signal to control the switching state of the IGBT and ensure its safe operation. In existing technologies, the switching frequency of the control gate is low, resulting in low efficiency; four sets of drive signals are required, leading to high cost. Utility Model Content
[0003] To address the aforementioned technical problems of low efficiency and high cost, this application proposes a high-frequency drive circuit and an H-bridge drive circuit.
[0004] In a first aspect, a high-frequency driving circuit is provided for outputting two high-frequency driving signals, comprising: a first push-pull circuit and a first inverter connected in sequence;
[0005] The first push-pull circuit includes a PMOS transistor VT1, an NMOS transistor VT2, a first resistor R1, a second resistor R2, a third resistor R3, a first power supply VCC1, and a second power supply VCC2. The gates of the PMOS transistor VT1 and the NMOS transistor VT2 are connected and are both connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the input signal of the high-frequency drive circuit. The source of the PMOS transistor VT1 is connected to the first power supply VCC1, and the drain of the PMOS transistor VT1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is connected to the input terminal of the first inverter. The source of the NMOS transistor VT2 is connected to the second power supply VCC2, and the drain of the NMOS transistor VT2 is connected to one end of the third resistor R3. The other end of the third resistor R3 is connected to the input terminal of the first inverter.
[0006] The other end of the second resistor R2 and the other end of the third resistor R3 in the first push-pull circuit are connected and used as the output of the first high-frequency drive signal.
[0007] The output of the first inverter serves as the output of the second high-frequency drive signal.
[0008] Preferably, the first inverter includes a second push-pull circuit;
[0009] The second push-pull circuit includes: a PMOS transistor VT3, an NMOS transistor VT4, a third power supply VCC3, and a fourth power supply VCC4; the gates of the PMOS transistor VT3 and the NMOS transistor VT4 are connected and both are connected to the output of the first high-frequency drive signal through a sixth resistor R6; the third power supply VCC3 is connected to the source of the PMOS transistor VT3, and the fourth power supply VCC4 is connected to the source of the NMOS transistor VT4; the drain of the PMOS transistor VT3 is connected to the drain of the NMOS transistor VT4, and is used as the output of the second high-frequency drive signal through a seventh resistor R7.
[0010] Preferably, the first inverter includes a third push-pull circuit;
[0011] The third push-pull circuit includes: a PNP transistor Q1, an NPN transistor Q2, a fifth power supply VCC5, an eighth resistor R8, and a ninth resistor R9; the base of the PNP transistor Q1 and the base of the NPN transistor Q2 are connected to the output of the first high-frequency drive signal through the eighth resistor R8; the emitter of the PNP transistor Q1 is connected to the fifth power supply VCC5; the collector of the PNP transistor Q1 is connected to the collector of the NPN transistor Q2, and outputs a second high-frequency drive signal through the ninth resistor R9; the emitter of the NPN transistor Q2 is connected to ground GND.
[0012] In a second aspect, an H-bridge driving circuit is provided, comprising an H-bridge circuit including four power transistors: U1, U2, U3, and U4, and further comprising a high-frequency driving circuit as described in any of the above technical solutions; a first high-frequency driving signal of the high-frequency driving circuit is output to the gate of transistor U2 and the gate of transistor U3 of the H-bridge, and a second high-frequency driving signal is output to the gate of transistor U1 and the gate of transistor U4 of the H-bridge.
[0013] Preferably, it further includes: a transient voltage suppression diode (TVS) VD1 connecting the gate and emitter of transistor U1 in the H-bridge, a transient voltage suppression diode (TVS) VD2 connecting the gate and emitter of transistor U2 in the H-bridge, a transient voltage suppression diode (TVS) VD3 connecting the gate and emitter of transistor U3 in the H-bridge, and a transient voltage suppression diode (TVS) VD4 connecting the gate and emitter of transistor U4 in the H-bridge.
[0014] Preferably, it further includes: a filter capacitor C1 connecting the gate and emitter of transistor U1 of the H-bridge, a filter capacitor C2 connecting the gate and emitter of transistor U2 of the H-bridge, a filter capacitor C3 connecting the gate and emitter of transistor U3 of the H-bridge, and a filter capacitor C4 connecting the gate and emitter of transistor U4 of the H-bridge.
[0015] Preferably, it further includes: filter capacitors C5 and C6 disposed between the first power supply VCC1 and the second power supply VCC2 and the ground terminal GND, respectively.
[0016] Thirdly, an H-bridge driving circuit is also provided, comprising an H-bridge circuit including four power transistors: U1, U2, U3, and U4, and further including a high-frequency driving circuit, a second inverter, and a third inverter as described in any of the above technical solutions; a first high-frequency driving signal of the high-frequency driving circuit is output to the gate of transistor U2 of the H-bridge and the input of the second inverter, and a second high-frequency driving signal is output to the gate of transistor U1 of the H-bridge and the input of the third inverter; the output of the second inverter is connected to transistor U4 of the H-bridge circuit, and the output of the third inverter is connected to transistor U3 of the H-bridge circuit.
[0017] Preferably, it further includes: a transient voltage suppression diode (TVS) VD1 connecting the gate and emitter of transistor U1 in the H-bridge, a transient voltage suppression diode (TVS) VD2 connecting the gate and emitter of transistor U2 in the H-bridge, a transient voltage suppression diode (TVS) VD3 connecting the gate and emitter of transistor U3 in the H-bridge, and a transient voltage suppression diode (TVS) VD4 connecting the gate and emitter of transistor U4 in the H-bridge.
[0018] Preferably, it further includes: a filter capacitor C1 connecting the gate and emitter of transistor U1 of the H-bridge, a filter capacitor C2 connecting the gate and emitter of transistor U2 of the H-bridge, a filter capacitor C3 connecting the gate and emitter of transistor U3 of the H-bridge, and a filter capacitor C4 connecting the gate and emitter of transistor U4 of the H-bridge.
[0019] In summary, this application includes at least one of the following beneficial technical effects: using MOSFETs in push-pull circuits increases the switching frequency of IGBTs; reduces one or even two drive signals, saving drive costs; and protects the gate of the IGBT from overvoltage, resulting in stronger safety performance. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of a high-frequency drive circuit;
[0021] Figure 2 This is a first embodiment diagram of a high-frequency drive circuit;
[0022] Figure 3 This is a second embodiment of a high-frequency drive circuit;
[0023] Figure 4 This is a schematic diagram of an H-bridge driver circuit;
[0024] Figure 5 This is a first embodiment diagram of an H-bridge driver circuit;
[0025] Figure 6 This is a second embodiment of an H-bridge driver circuit;
[0026] Figure 7 This is a third embodiment of an H-bridge driver circuit;
[0027] Figure 8 This is a diagram of another embodiment of the H-bridge driver circuit. Detailed Implementation
[0028] Terminology Explanation:
[0029] Push-pull circuit: A push-pull circuit typically consists of two complementary transistors (such as NPN and PNP transistors, or PMOS and NMOS transistors). These two transistors work alternately; when one is on, the other is off, thus achieving bidirectional pushing of the load.
[0030] H-bridge circuit: A motor drive circuit that uses four switching elements to form an "H"-shaped current path structure. This circuit can control the direction of current to a load (such as a DC motor), thereby enabling forward and reverse rotation and speed regulation. H-bridges are widely used in applications requiring direction control, especially in robot drives and automated equipment.
[0031] Firstly, such as Figure 1 As shown, a high-frequency driving circuit is provided for outputting two high-frequency driving signals, including: a first push-pull circuit and a first inverter connected in sequence;
[0032] The first push-pull circuit includes a PMOS transistor VT1, an NMOS transistor VT2, a first resistor R1, a second resistor R2, a third resistor R3, a first power supply VCC1, and a second power supply VCC2. The gates of the PMOS transistor VT1 and the NMOS transistor VT2 are connected and both are connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the input signal of the high-frequency drive circuit. The source of the PMOS transistor VT1 is connected to the first power supply VCC1, and the drain of the PMOS transistor VT1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is connected to the input terminal of the first inverter. The source of the NMOS transistor VT2 is connected to the second power supply VCC2, and the drain of the NMOS transistor VT2 is connected to one end of the third resistor R3. The other end of the third resistor R3 is connected to the input terminal of the first inverter. The push-pull circuit is essentially an amplifier, belonging to the Class B amplifier category. In this embodiment, the signal to be amplified is a PWM signal, i.e., a pulse width adjustable signal. The push-pull circuit amplifies the PWM signal and then outputs a PWM signal with a larger amplitude. The push-pull circuit is implemented using a combination of PMOS and NMOS transistors because their switching frequencies are higher than those of NPN and PNP transistors. MOS transistors are voltage-controlled devices, relying on the electric field effect to control the channel's on / off state. Their switching process primarily depends on the movement of majority carriers, resulting in faster switching speeds, especially in high-frequency applications. PNP and NPN transistors, on the other hand, are current-controlled devices, relying on the injection and recombination of minority carriers. This physical mechanism leads to slower switching speeds, particularly during the transition from saturation to cutoff, with storage time and fall time limiting their high-frequency performance.
[0033] The other end of the second resistor R2 and the other end of the third resistor R3 in the first push-pull circuit are connected and used as the output of the first high-frequency drive signal.
[0034] The output of the first inverter serves as the output of the second high-frequency drive signal. Thus, two high-frequency drive signals have been obtained, and these two high-frequency drive signals are complementary to each other.
[0035] Preferred, such as Figure 2 As shown, the first inverter includes a second push-pull circuit;
[0036] The second push-pull circuit includes: a PMOS transistor VT3, an NMOS transistor VT4, a third power supply VCC3, and a fourth power supply VCC4; the gates of the PMOS transistor VT3 and the NMOS transistor VT4 are connected and both are connected to the output of the first high-frequency drive signal through a sixth resistor R6; the third power supply VCC3 is connected to the source of the PMOS transistor VT3, and the fourth power supply VCC4 is connected to the source of the NMOS transistor VT4; the drain of the PMOS transistor VT3 is connected to the drain of the NMOS transistor VT4, and is used as the output of the second high-frequency drive signal through a seventh resistor R7. The first inverter also uses a push-pull circuit; however, the connection order of the NMOS transistor and the PMOS transistor causes the input positive level signal to become a negative level signal, or vice versa. Here, the push-pull circuit serves both to amplify and invert the signal.
[0037] Preferred, such as Figure 3 As shown, the first inverter includes a third push-pull circuit;
[0038] The third push-pull circuit includes: a PNP transistor Q1, an NPN transistor Q2, a fifth power supply VCC5, an eighth resistor R8, and a ninth resistor R9. The bases of the PNP transistor Q1 and the NPN transistor Q2 are connected to the output of the first high-frequency drive signal through the eighth resistor R8. The emitter of the PNP transistor Q1 is connected to the fifth power supply VCC5. The collector of the PNP transistor Q1 is connected to the collector of the NPN transistor Q2, and outputs a second high-frequency drive signal through the ninth resistor R9. The emitter of the NPN transistor Q2 is connected to ground GND. This push-pull circuit is implemented using a PNP transistor and an NPN transistor. In this embodiment, the push-pull circuit amplifies the signal and also inverts it. This causes a positive input level to become a negative output level; furthermore, the amplitude of the output signal is greater than the amplitude of the input signal.
[0039] Secondly, such as Figure 4As shown, an H-bridge driving circuit is provided, including an H-bridge circuit comprising four power transistors: U1, U2, U3, and U4, and a high-frequency driving circuit as described in any of the above technical solutions. The power transistors are any one of MOSFET, SiC MOSFET, GaN, and IGBT; in this embodiment, IGBT is preferred. A first high-frequency driving signal of the high-frequency driving circuit is output to the gates of transistors U2 and U3 of the H-bridge, and a second high-frequency driving signal is output to the gates of transistors U1 and U4 of the H-bridge. Using the high-frequency driving circuit in the H-bridge circuit allows the two diagonally opposite power transistors (U1 and U4, U2 and U3) to be turned on or off when needed, making the direction of the current flowing through the H-bridge controllable, thus facilitating the load of the H-bridge circuit to obtain current in the required direction.
[0040] Preferred, such as Figure 5 As shown, the system also includes: a transient voltage suppressor diode (TVS) VD1 connecting the gate and emitter of transistor U1 in the H-bridge; a transient voltage suppressor diode (TVS) VD2 connecting the gate and emitter of transistor U2 in the H-bridge; a transient voltage suppressor diode (TVS) VD3 connecting the gate and emitter of transistor U3 in the H-bridge; and a transient voltage suppressor diode (TVS) VD4 connecting the gate and emitter of transistor U4 in the H-bridge. A transient voltage suppressor diode (TVS) is a protective device used to protect electronic circuits from transient and overvoltage threats. Its working principle is based on the avalanche breakdown effect of a PN junction. It can protect the gates of transistors U1, U2, U3, and U4 from extreme high voltages, preventing gate breakdown.
[0041] Preferred, such as Figure 6 As shown, it also includes: a filter capacitor C1 connecting the gate and emitter of transistor U1 in the H-bridge; a filter capacitor C2 connecting the gate and emitter of transistor U2 in the H-bridge; a filter capacitor C3 connecting the gate and emitter of transistor U3 in the H-bridge; and a filter capacitor C4 connecting the gate and emitter of transistor U4 in the H-bridge. The filter capacitors are used to prevent high-frequency current from entering U1, U2, U3, or U4 from the PWM signal, filtering out high-frequency components to prevent high-frequency interference at the gates of the aforementioned MOSFETs.
[0042] Preferred, such as Figure 7 As shown, it also includes: filter capacitors C5, C6, C7, and C8 disposed between the first power supply VCC1 and the second power supply VCC2 and the ground terminal GND, respectively. The filter capacitors are used to prevent high-frequency current from entering U1, U2, U3, or U4 from the power supply terminals, filter out high-frequency components, and prevent high-frequency interference from occurring on the gate of the aforementioned MOS transistors.
[0043] Thirdly, such as Figure 8 As shown, an H-bridge drive circuit is also provided, including an H-bridge circuit comprising four power transistors: U1, U2, U3, and U4, and further including a high-frequency drive circuit, a second inverter, and a third inverter as described in any of the above technical solutions; the power transistors are any one of MOSFET, SiC MOSFET, GaN, and IGBT; in this embodiment, the power transistors are preferably IGBTs; the first high-frequency drive signal of the high-frequency drive circuit is output to the gate of transistor U2 of the H-bridge and the input of the second inverter, the second high-frequency drive signal is output to the gate of transistor U1 of the H-bridge and the input of the third inverter; the output of the second inverter is connected to transistor U4 of the H-bridge circuit, and the output of the third inverter is connected to transistor U3 of the H-bridge circuit. Because the conduction and cutoff control of the H-bridge circuit requires very precise signal control, improper control can lead to large current damage to transistors U1 and U2 on the same side, or transistors U3 and U4. Therefore, one PWM signal can be used to obtain the other three PWM signals, so that a total of four signals can uniformly control the four power transistors. The power transistor can be any one of MOSFET, SiC MOSFET, GaN, or IGBT; in this embodiment, the power transistor is preferably an IGBT. Normally, the H-bridge circuit is in one of the following states: U1 and U4 are on, or U2 and U3 are on. By amplifying and inverting one PWM signal as described in this embodiment, the switching of the above-mentioned on-state can be achieved.
[0044] Preferably, it further includes: a transient voltage suppression diode (TVS) VD1 connecting the gate and emitter of transistor U1 in the H-bridge, a transient voltage suppression diode (TVS) VD2 connecting the gate and emitter of transistor U2 in the H-bridge, a transient voltage suppression diode (TVS) VD3 connecting the gate and emitter of transistor U3 in the H-bridge, and a transient voltage suppression diode (TVS) VD4 connecting the gate and emitter of transistor U4 in the H-bridge.
[0045] Preferably, it further includes: a filter capacitor C1 connecting the gate and emitter of transistor U1 of the H-bridge, a filter capacitor C2 connecting the gate and emitter of transistor U2 of the H-bridge, a filter capacitor C3 connecting the gate and emitter of transistor U3 of the H-bridge, and a filter capacitor C4 connecting the gate and emitter of transistor U4 of the H-bridge.
[0046] In summary, this application includes at least one of the following beneficial technical effects: using MOSFETs in push-pull circuits increases the switching frequency of IGBTs; reduces one or even two drive signals, saving drive costs; and protects the gate of the IGBT from overvoltage, resulting in stronger safety performance.
[0047] The above are all preferred embodiments of this application and are not intended to limit the scope of protection of this application. Any feature disclosed in this specification (including the abstract and drawings) may be replaced by other equivalent or similar features unless specifically stated otherwise. That is, unless specifically stated otherwise, each feature is only one example of a series of equivalent or similar features.
Claims
1. A high-frequency driving circuit, characterized in that, It is used to output two high-frequency drive signals, including: a first push-pull circuit and a first inverter connected in sequence; The first push-pull circuit includes a PMOS transistor VT1, an NMOS transistor VT2, a first resistor R1, a second resistor R2, a third resistor R3, a first power supply VCC1, and a second power supply VCC2. The gates of the PMOS transistor VT1 and the NMOS transistor VT2 are connected and are both connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the input signal of the high-frequency drive circuit. The source of the PMOS transistor VT1 is connected to the first power supply VCC1, and the drain of the PMOS transistor VT1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is connected to the input terminal of the first inverter. The source of the NMOS transistor VT2 is connected to the second power supply VCC2, and the drain of the NMOS transistor VT2 is connected to one end of the third resistor R3. The other end of the third resistor R3 is connected to the input terminal of the first inverter. The other end of the second resistor R2 and the other end of the third resistor R3 in the first push-pull circuit are connected and used as the output of the first high-frequency drive signal. The output of the first inverter serves as the output of the second high-frequency drive signal.
2. The high-frequency driving circuit according to claim 1, characterized in that, The first inverter includes a second push-pull circuit, a sixth resistor R6, and a seventh resistor R7; The second push-pull circuit includes: a PMOS transistor VT3, an NMOS transistor VT4, a third power supply VCC3, and a fourth power supply VCC4; the gates of the PMOS transistor VT3 and the NMOS transistor VT4 are connected and both are connected to the output of the first high-frequency drive signal through a sixth resistor R6; the third power supply VCC3 is connected to the source of the PMOS transistor VT3, and the fourth power supply VCC4 is connected to the source of the NMOS transistor VT4; the drain of the PMOS transistor VT3 is connected to the drain of the NMOS transistor VT4, and is used as the output of the second high-frequency drive signal through a seventh resistor R7.
3. The high-frequency driving circuit according to claim 1, characterized in that, The first inverter includes a third push-pull circuit; The third push-pull circuit includes: a PNP transistor Q1, an NPN transistor Q2, a fifth power supply VCC5, an eighth resistor R8, and a ninth resistor R9; the base of the PNP transistor Q1 and the base of the NPN transistor Q2 are connected to the output of the first high-frequency drive signal through the eighth resistor R8; the emitter of the PNP transistor Q1 is connected to the fifth power supply VCC5; the collector of the PNP transistor Q1 is connected to the collector of the NPN transistor Q2, and outputs a second high-frequency drive signal through the ninth resistor R9; the emitter of the NPN transistor Q2 is connected to ground GND.
4. An H-bridge driving circuit, comprising an H-bridge circuit, wherein the H-bridge circuit includes four power transistors: U1, U2, U3, and U4, characterized in that, It also includes a high-frequency driving circuit as described in any one of claims 1 to 3; the first high-frequency driving signal of the high-frequency driving circuit is output to the gate of the U2 transistor of the H-bridge and the gate of the U3 transistor of the H-bridge, and the second high-frequency driving signal is output to the gate of the U1 transistor of the H-bridge and the gate of the U4 transistor of the H-bridge.
5. The H-bridge drive circuit according to claim 4, characterized in that, Also includes: Transient voltage suppression diode VD1 is connected between the gate and emitter of transistor U1 in the H-bridge; transient voltage suppression diode VD2 is connected between the gate and emitter of transistor U2 in the H-bridge; transient voltage suppression diode VD3 is connected between the gate and emitter of transistor U3 in the H-bridge; and transient voltage suppression diode VD4 is connected between the gate and emitter of transistor U4 in the H-bridge.
6. The H-bridge driving circuit according to claim 4, characterized in that, Also includes: The filter capacitor C1 connects the gate and emitter of transistor U1 in the H-bridge; the filter capacitor C2 connects the gate and emitter of transistor U2 in the H-bridge; the filter capacitor C3 connects the gate and emitter of transistor U3 in the H-bridge; and the filter capacitor C4 connects the gate and emitter of transistor U4 in the H-bridge.
7. The H-bridge drive circuit according to any one of claims 4-6, characterized in that, Also includes: Filter capacitors C5 and C6 are respectively installed between the first power supply VCC1 and the second power supply VCC2 and the ground terminal GND.
8. An H-bridge driving circuit, comprising an H-bridge circuit, said H-bridge circuit including four power transistors: U1, U2, U3 and U4, characterized in that, It also includes the high-frequency driving circuit, the second inverter, and the third inverter as described in any one of claims 1 to 3; the first high-frequency driving signal of the high-frequency driving circuit is output to the gate of the U2 transistor of the H-bridge and the input of the second inverter, the second high-frequency driving signal is output to the gate of the U1 transistor of the H-bridge and the input of the third inverter; the output of the second inverter is connected to the U4 transistor of the H-bridge circuit, and the output of the third inverter is connected to the U3 transistor of the H-bridge circuit.
9. The H-bridge drive circuit according to claim 8, characterized in that, Also includes: Transient voltage suppression diode VD1 is connected between the gate and emitter of transistor U1 in the H-bridge; transient voltage suppression diode VD2 is connected between the gate and emitter of transistor U2 in the H-bridge; transient voltage suppression diode VD3 is connected between the gate and emitter of transistor U3 in the H-bridge; and transient voltage suppression diode VD4 is connected between the gate and emitter of transistor U4 in the H-bridge.
10. The H-bridge drive circuit according to claim 8 or 9, characterized in that, Also includes: The filter capacitor C1 connects the gate and emitter of transistor U1 in the H-bridge; the filter capacitor C2 connects the gate and emitter of transistor U2 in the H-bridge; the filter capacitor C3 connects the gate and emitter of transistor U3 in the H-bridge; and the filter capacitor C4 connects the gate and emitter of transistor U4 in the H-bridge.