Solar cell and photovoltaic module
By covering the non-welded areas of the solar cell grid with a corrosion-resistant layer, the problem of grid corrosion by the encapsulation layer is solved, improving cell efficiency and lifespan, while ensuring cell connectivity and photoelectric conversion efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- TRINA SOLAR CO LTD
- Filing Date
- 2025-05-20
- Publication Date
- 2026-05-26
AI Technical Summary
In existing technologies, the grid lines of solar cells are in direct contact with the encapsulation layer, which causes acetic acid to corrode the grid lines in the encapsulation layer, reducing cell efficiency and affecting cell lifespan.
A corrosion-resistant layer is applied to the non-welded area of the grid line to protect it from corrosion by the encapsulation layer. A metal oxide layer is used as the corrosion-resistant material, and the coverage area overlaps with or is located within the non-welded area of the grid line to avoid affecting the welding and light-shielding area.
It reduces the risk of grid line corrosion, improves battery efficiency, extends battery life, and ensures that the series and parallel connections of the battery with other batteries are not affected, while avoiding an increase in the shading area.
Smart Images
Figure CN224290507U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of photovoltaic technology, and in particular relates to a solar cell and a photovoltaic module. Background Technology
[0002] In related technologies, after solar cells are encapsulated, the grid lines of the solar cell are in direct contact with the encapsulation layer. The material properties of the encapsulation layer can easily lead to the formation of acetic acid, which can corrode the grid lines, reduce cell efficiency, and affect cell lifespan. Utility Model Content
[0003] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a solar cell and photovoltaic module that can reduce the risk of grid line corrosion, improve cell efficiency, and extend cell life.
[0004] In a first aspect, this application provides a solar cell, comprising:
[0005] Base;
[0006] The grid line is provided on at least one side of the light-receiving side and the back-light side of the substrate, and the grid line includes a soldering area and a non-soldering area located outside the soldering area;
[0007] A corrosion-resistant layer covers the non-welded area of the gate line, and the orthographic projection of the corrosion-resistant layer on the film layer where the gate line is located coincides with or is located within the non-welded area of the gate line.
[0008] According to the solar cell of this application, by covering the non-welded area of the grid line with a corrosion-resistant layer, the non-welded area of the grid line is protected, reducing the risk of grid line corrosion (such as acetic acid corrosion caused by the encapsulation layer), improving cell efficiency, and extending cell life. Furthermore, the welded area of the grid line is not covered with a corrosion-resistant layer, avoiding interference with the welding of the grid line, and enabling the solar cell to be connected in series and parallel with other cells. The orthogonal projection of the corrosion-resistant layer on the film layer where the grid line is located coincides with or is located within the non-welded area of the grid line, avoiding increasing the light-shielding area of the cell, thereby avoiding affecting the photoelectric conversion efficiency of the cell.
[0009] According to one embodiment of this application, the gate line includes a main gate line, and the main gate line includes the soldered area and the non-soldered area;
[0010] The corrosion-resistant layer covers the non-welded area of the main grid line, and the orthogonal projection of the corrosion-resistant layer on the film layer where the grid line is located coincides with or is located within the non-welded area of the main grid line.
[0011] According to one embodiment of this application, the gate line further includes fine gate lines;
[0012] The corrosion-resistant layer also covers the fine grid lines, and the orthogonal projection of the corrosion-resistant layer on the film layer where the grid lines are located coincides with or is located within the area where the fine grid lines are located.
[0013] According to one embodiment of this application, the gate line includes a fine gate line, and the fine gate line includes the soldered area and the non-soldered area;
[0014] The corrosion-resistant layer covers the non-welded area of the fine grid line, and the orthographic projection of the corrosion-resistant layer on the film layer where the grid line is located coincides with or is located within the non-welded area of the fine grid line.
[0015] According to one embodiment of this application, the gate line includes a plurality of welding areas, with the welding areas at both ends of the gate line, and the non-welding area located between the plurality of welding areas.
[0016] According to one embodiment of this application, the length of the welding area in the extension direction of the gate line is 15 mm to 20 mm.
[0017] According to one embodiment of this application, the thickness of the corrosion-resistant layer is 50 nanometers to 100 nanometers.
[0018] According to one embodiment of this application, the corrosion-resistant layer includes a metal oxide layer, which is a composite layer of at least two metal oxides selected from indium oxide, manganese oxide, and yttrium oxide.
[0019] According to one embodiment of this application, the substrate includes:
[0020] Substrate;
[0021] The first intrinsic passivation layer is located on the light-receiving side of the substrate;
[0022] The second intrinsic passivation layer is located on the backlight side of the substrate;
[0023] The first doped layer is located on the side of the first intrinsic passivation layer that is away from the substrate;
[0024] The second doped layer is located on the side of the second intrinsic passivation layer that is away from the substrate;
[0025] The first conductive layer is located on the side of the first doped layer that is away from the first intrinsic passivation layer.
[0026] The second conductive layer is located on the side of the second doped layer that is away from the second intrinsic passivation layer;
[0027] The first conductive layer has the gate line on the side opposite to the first doped layer and the second conductive layer has the gate line on the side opposite to the second doped layer.
[0028] Secondly, this application provides a photovoltaic module, comprising:
[0029] Solar cells as described in the first aspect above;
[0030] An encapsulation layer that covers the surface of the solar cell.
[0031] The above-described one or more technical solutions in the embodiments of this application have at least one of the following technical effects:
[0032] By covering the non-welded areas of the grid lines with a corrosion-resistant layer, the non-welded areas of the grid lines are protected, reducing the risk of grid line corrosion (such as acetic acid corrosion caused by the encapsulation layer), improving cell efficiency, and extending cell life. Furthermore, the welded areas of the grid lines are not covered with a corrosion-resistant layer, avoiding interference with grid line welding and enabling series and parallel connection of solar cells with other cells. The orthogonal projection of the corrosion-resistant layer on the film layer where the grid lines are located coincides with or is located within the non-welded areas of the grid lines, avoiding increasing the cell's light-shielding area and thus avoiding affecting the cell's photoelectric conversion efficiency.
[0033] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0034] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0035] Figure 1 This is a schematic diagram of the structure of the solar cell provided in the embodiments of this application;
[0036] Figure 2 This is a top view of the solar cell provided in an embodiment of this application. Detailed Implementation
[0037] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0038] The solar cells and photovoltaic modules provided in the embodiments of this application are described below with reference to the accompanying drawings.
[0039] Figure 1 This is a schematic diagram of the structure of a solar cell provided in an embodiment of this application. The solar cell can be a heterojunction cell or a back-contact cell, or other types of solar cells; no specific limitation is made here.
[0040] like Figure 1 As shown, the solar cell provided in this application embodiment includes a substrate 1, grid lines 2, and a corrosion-resistant layer 3.
[0041] The substrate 1 is used to achieve charge separation and transport. The substrate 1 may include multiple film layers stacked along the thickness direction of the substrate 1. For example, the substrate 1 may include a silicon substrate and amorphous silicon film layers stacked along the thickness direction. The film layers in the substrate 1 may be different depending on the type of solar cell.
[0042] The substrate 1 has a light-receiving side and a back-light side (non-light-receiving side) on opposite sides along its thickness direction. The light-receiving side of the substrate 1 refers to the side that is irradiated by ultraviolet light, and the back-light side of the substrate 1 is positioned opposite to the light-receiving side.
[0043] At least one of the light-receiving side and the back-light side of the substrate 1 has a gate line 2, that is, the light-receiving side of the substrate 1 has a gate line 2, and the back-light side of the substrate 1 does not have a gate line; or, the back-light side of the substrate 1 has a gate line 2, and the light-receiving side of the substrate 1 does not have a gate line; or, the light-receiving side and the back-light side of the substrate 1 each have a gate line 2. The material of the gate line 2 may include a metal such as silver.
[0044] It should be noted that the position of the grid line 2 varies depending on the type of solar cell. For example, in the case of a heterojunction solar cell, the light-receiving side and the back-light-receiving side of the substrate 1 each have grid lines 2; in the case of a back-contact solar cell, the back-light-receiving side of the substrate 1 has grid lines 2, while the light-receiving side of the substrate 1 does not have grid lines.
[0045] Grid line 2 is used for conduction and current collection. For example... Figure 2 As shown, the grid line 2 includes a soldering area 21 and a non-soldering area located outside the soldering area 21. The soldering area 21 of the grid line 2 refers to the area where the grid line is soldered to other cells or modules to connect the solar cell to other cells or modules. The soldering area 21 of the grid line 2 is located at a specific location on the grid line 2 to ensure the strength of the solder joint and the continuity of current transmission. The non-soldering area of the grid line 2 refers to all areas of the grid line 2 other than the soldering area 21.
[0046] The corrosion-resistant layer 3 covers the non-welded area of the gate line 2. The corrosion-resistant layer 3 may cover part or all of the non-welded area of the gate line 2. When the light-receiving side of the substrate 1 has the gate line 2, and the back-light side of the substrate 1 does not have the gate line, the corrosion-resistant layer 3 covers the non-welded area of the gate line 2 on the light-receiving side of the substrate 1. When the back-light side of the substrate 1 has the gate line 2, and the light-receiving side of the substrate 1 does not have the gate line, the corrosion-resistant layer 3 covers the non-welded area of the gate line 2 on the back-light side of the substrate 1. When the light-receiving side and the back-light side of the substrate 1 each have the gate line 2, the corrosion-resistant layer 3 may cover the non-welded area of the gate line 2 on the light-receiving side of the substrate 1, but not the non-welded area of the gate line 2 on the back-light side of the substrate 1; or, the corrosion-resistant layer 3 may cover the non-welded area of the gate line 2 on the back-light side of the substrate 1, but not the non-welded area of the gate line 2 on the light-receiving side of the substrate 1; or, the corrosion-resistant layer 3 may cover both the non-welded areas of the gate line 2 on the back-light side and the non-welded areas of the gate line 2 on the light-receiving side of the substrate 1.
[0047] The orthographic projection of the corrosion-resistant layer 3 onto the film layer where the grid line 2 is located coincides with or is located within the non-welded area of the grid line 2, so that the width of the corrosion-resistant layer 3 is less than or equal to the width of the grid line 2, thus avoiding the corrosion-resistant layer 3 from increasing the light-shielding area of the battery.
[0048] The corrosion-resistant layer 3 can be applied to the non-welded area of the gate line 2 by means of overprinting, sputtering, or thermal evaporation. The material of the corrosion-resistant layer 3 can include materials resistant to acid corrosion (such as acetic acid).
[0049] In this embodiment, a corrosion-resistant layer 3 is covered in the non-welding area of the grid line 2. After the solar cell is encapsulated, the corrosion-resistant layer 3 between the grid line 2 and the encapsulation layer reduces the risk of contact between the grid line 2 and the encapsulation layer. Substances such as acetic acid generated by the encapsulation layer (the material of the encapsulation layer is an adhesive film, which is an organic material and will generate acetic acid and the like over long-term use) have a relatively small impact on the corrosion-resistant layer 3, reducing the risk of corrosion of the grid line 2, improving cell efficiency, and extending cell life. In addition, the welding area 21 of the grid line 2 is not covered with the corrosion-resistant layer 3, but the grid line 2 can still be welded to other cells or modules through the welding area 21 to realize the series and parallel connection of the solar cell with other cells. Moreover, the orthographic projection of the corrosion-resistant layer 3 on the film layer on which the grid line 2 is located coincides with or is located within the non-welding area of the grid line 2, avoiding the corrosion-resistant layer 3 from increasing the light-shielding area of the cell, thereby avoiding affecting the photoelectric conversion efficiency of the cell.
[0050] In some embodiments, such as Figure 2As shown, the grid line 2 includes a main grid line 23, which extends along a first direction perpendicular to the thickness direction of the substrate 1. The main grid line 23 includes a welding area 21 and a non-welding area. The welding area 21 is the region where the main grid line 23 is welded to other cells or modules, allowing the solar cell to be connected to other cells or modules via the main grid line 23. The non-welding area of the main grid line 23 includes all areas of the main grid line 23 except for the welding area 21. A corrosion-resistant layer 3 covers the non-welding area of the main grid line 23, meaning the corrosion-resistant layer 3 can cover all areas of the main grid line 23 except for the welding area 21. The orthographic projection of the corrosion-resistant layer 3 onto the film layer containing the grid line 2 coincides with or is located within the non-welding area of the main grid line 23, such that the width of the corrosion-resistant layer 3 covering the main grid line 23 is less than or equal to the width of the main grid line 23.
[0051] At least one of the light-receiving side and the back-light side of the substrate 1 has a main gate line 23. When the light-receiving side of the substrate 1 has a main gate line 23 and the back-light side of the substrate 1 does not have a main gate line, the corrosion-resistant layer 3 covers the unsoldered area of the main gate line 23 on the light-receiving side of the substrate 1. When the back-light side of the substrate 1 has a main gate line 23 and the light-receiving side of the substrate 1 does not have a main gate line, the corrosion-resistant layer 3 covers the unsoldered area of the main gate line 23 on the back-light side of the substrate 1. When both the light-receiving side and the back-light side of the substrate 1 have main gate lines 23, the corrosion-resistant layer 3 may cover the unsoldered area of the main gate line 23 on the light-receiving side of the substrate 1 but not the unsoldered area of the main gate line 23 on the back-light side of the substrate 1; or, the corrosion-resistant layer 3 may cover the unsoldered area of the main gate line 23 on the back-light side of the substrate 1 but not the unsoldered area of the main gate line 23 on the light-receiving side of the substrate 1; or, the corrosion-resistant layer 3 may cover both the unsoldered areas of the main gate line 23 on the back-light side and the unsoldered areas of the main gate line 23 on the light-receiving side of the substrate 1.
[0052] In some embodiments, the gate line 2 may include a plurality of main gate lines 23, which are spaced apart along a second direction, and each main gate line 23 extends along a first direction. The second direction is perpendicular to both the first direction and the thickness direction of the substrate 1. Each main gate line 23 includes a soldered area 21 and a non-soldered area, and the corrosion-resistant layer 3 may cover the non-soldered area of each main gate line 23.
[0053] In this embodiment, a corrosion-resistant layer 3 is applied to the non-welding area of the main grid line 23 to reduce the risk of corrosion, improve cell efficiency, and extend cell life. Furthermore, the welding area 21 of the main grid line 23 is not covered by the corrosion-resistant layer 3, yet the main grid line 23 can still be welded to other cells or modules through the welding area 21, enabling series and parallel connections of the solar cell with other cells. The orthogonal projection of the corrosion-resistant layer 3 onto the film layer containing the grid line 2 coincides with or is located within the non-welding area of the main grid line 23, preventing the corrosion-resistant layer 3 from increasing the light-shielding area of the cell and thus avoiding impacting the cell's photoelectric conversion efficiency.
[0054] In some embodiments, such as Figure 2 As shown, the gate line 2 also includes a fine gate line 24, meaning the gate line 2 can include a main gate line 23 and a fine gate line 24. The main gate line 23 extends along a first direction, and the fine gate line 24 extends along a second direction, with the main gate line 23 and the fine gate line 24 connected. The corrosion-resistant layer 3 also covers the fine gate line 24, meaning the corrosion-resistant layer 3 covers both the non-welded area of the main gate line 23 and the fine gate line 24. The entire area of the fine gate line 24 can belong to the non-welded area, and the corrosion-resistant layer 3 can cover the entire area of the fine gate line 24. The orthogonal projection of the corrosion-resistant layer 3 onto the film layer containing the gate line 2 also coincides with or is located within the area containing the fine gate line 24, such that the width of the corrosion-resistant layer 3 covering the fine gate line 24 is less than or equal to the width of the fine gate line 24.
[0055] In some embodiments, the gate line 2 may include a plurality of fine gate lines 24, which are spaced apart along a first direction and each fine gate line 24 extends along a second direction. Each main gate line 23 is connected to the plurality of fine gate lines 24. The corrosion-resistant layer 3 may cover the non-welded area of each main gate line 23 and the entire area of each fine gate line 24.
[0056] In this embodiment, while covering the non-welded area of the main grid line 23 with a corrosion-resistant layer 3, a corrosion-resistant layer 3 is also covered on the fine grid line 24. This reduces the risk of corrosion to the fine grid line 24, further improving battery efficiency and extending battery life. Furthermore, the orthogonal projection of the corrosion-resistant layer 3 onto the film layer containing the grid line 2 coincides with or is located within the area containing the fine grid line 24, preventing the corrosion-resistant layer 3 from increasing the light-shielding area of the battery and thus avoiding impacting the battery's photoelectric conversion efficiency.
[0057] In some embodiments, the grid line 2 includes fine grid lines that may extend along a first direction or a second direction. The fine grid lines include a soldering region 21 and a non-soldering region. In the case of a gridless solar cell, the grid line 2 may only include fine grid lines, excluding the main grid lines. The soldering region 21 of the fine grid line is the area where the fine grid line is soldered to other cells or modules, so that the solar cell is connected to other cells or modules through the fine grid line. The non-soldering region of the fine grid line is all areas of the fine grid line except for the soldering region 21. The corrosion-resistant layer 3 covers the non-soldering region of the fine grid line; that is, the corrosion-resistant layer 3 may cover all areas of the fine grid line except for the soldering region 21. The orthographic projection of the corrosion-resistant layer 3 onto the film layer containing the grid line 2 coincides with or is located within the non-soldering region of the fine grid line, such that the width of the corrosion-resistant layer 3 covering the fine grid line is less than or equal to the width of the fine grid line.
[0058] At least one of the light-receiving side and the back-light side of the substrate 1 has fine grid lines. When the light-receiving side of the substrate 1 has fine grid lines but the back-light side does not, the corrosion-resistant layer 3 covers the non-welded area of the fine grid lines on the light-receiving side of the substrate 1. When the back-light side of the substrate 1 has fine grid lines but the light-receiving side does not, the corrosion-resistant layer 3 covers the non-welded area of the fine grid lines on the back-light side of the substrate 1. When both the light-receiving and back-light sides of the substrate 1 have fine grid lines, the corrosion-resistant layer 3 may cover the non-welded area of the fine grid lines on the light-receiving side of the substrate 1 but not the non-welded area of the fine grid lines on the back-light side of the substrate 1; or, the corrosion-resistant layer 3 may cover the non-welded area of the fine grid lines on the back-light side of the substrate 1 but not the non-welded area of the fine grid lines on the light-receiving side of the substrate 1; or, the corrosion-resistant layer 3 may cover both the non-welded areas of the fine grid lines on the back-light side and the non-welded areas of the fine grid lines on the light-receiving side of the substrate 1.
[0059] In some embodiments, the gate line 2 may include a plurality of fine gate lines, each of which may extend in the same direction and is spaced apart in a direction perpendicular to the extension direction of the fine gate lines. Each fine gate line includes a soldered area 21 and a non-soldered area, and the corrosion-resistant layer 3 may cover the non-soldered area of each fine gate line.
[0060] In this embodiment, a corrosion-resistant layer 3 is applied to the non-welding area of the fine grid lines, reducing the risk of corrosion and improving cell efficiency and lifespan. Furthermore, the welding area 21 of the fine grid lines is not covered by the corrosion-resistant layer 3, allowing the fine grid lines to still be welded to other cells or modules, enabling series and parallel connections of the solar cell with other cells. Additionally, the orthographic projection of the corrosion-resistant layer 3 onto the film layer containing the grid lines 2 coincides with or is located within the non-welding area of the fine grid lines, preventing the corrosion-resistant layer 3 from increasing the light-shielding area of the cell and thus avoiding impacting the cell's photoelectric conversion efficiency.
[0061] In some embodiments, the grid line 2 includes a plurality of welding areas 21, with welding areas 21 at both ends of the grid line 2, and non-welding areas located between the plurality of welding areas 21. A corrosion-resistant layer 3 covers the non-welding areas of the grid line 2, reserving areas at both ends of the grid line 2 for welding the grid line 2 to other batteries or components.
[0062] During the fabrication process, after fabricating the gate line 2, a mask is used to cover the non-gate line area (i.e., the substrate area without gate line 2) and the soldering area 21 of the gate line 2, exposing the non-soldering area of the gate line 2. A thin film deposition process is used to form a corrosion-resistant layer 3 in the non-soldering area of the gate line 2, so that the corrosion-resistant layer 3 covers the non-soldering area of the gate line 2.
[0063] In some embodiments, the length of the welding area 21 in the extension direction of the grid line 2 is 15 mm to 20 mm. The corrosion-resistant layer 3 may leave a 15 mm to 20 mm area at the end of the grid line 2 for welding the grid line 2 to other batteries or components.
[0064] When the corrosion-resistant layer 3 covers the non-welded area of the grid line 2 on the light-receiving side of the substrate 1, the width of the corrosion-resistant layer 3 can be the same as the width of the grid line 2, and the orthographic projection of the corrosion-resistant layer 3 on the substrate 1 coincides with the orthographic projection of the non-welded area of the grid line 2 on the substrate 1, so that the corrosion-resistant layer 3 just completely covers the non-welded area of the grid line 2 on the light-receiving side, thereby reducing the risk of corrosion of the grid line 2 and avoiding the corrosion-resistant layer 3 from blocking the light-receiving side of the substrate 1 and affecting the photoelectric conversion efficiency of the cell.
[0065] When the corrosion-resistant layer 2 covers the non-welded area of the gate line 2 on the backlight side of the substrate 1, the width of the corrosion-resistant layer 3 can be greater than or equal to the width of the gate line 2, and the orthogonal projection of the non-welded area of the gate line 2 on the substrate 1 is located within the orthogonal projection of the corrosion-resistant layer 3 on the substrate 1, so that the corrosion-resistant layer 3 completely covers the non-welded area of the gate line 2 on the backlight side, reducing the risk of the gate line 2 being corroded.
[0066] When the gate line 2 includes a main gate line 23 and a fine gate line 24, the widths of the main gate line 23 and the fine gate line 24 are different, and the widths of the corrosion-resistant layer covering the non-welded area of the main gate line 23 and the corrosion-resistant layer covering the fine gate line 24 can be different. For example, the width of the corrosion-resistant layer covering the non-welded area of the main gate line 23 can be the same as the width of the main gate line 23, and the width of the corrosion-resistant layer covering the fine gate line 24 can be the same as the width of the fine gate line 24.
[0067] In some embodiments, the thickness of the corrosion-resistant layer 3 is 50 nanometers to 100 nanometers. Preferably, the thickness of the corrosion-resistant layer 3 is 70 nanometers to 100 nanometers.
[0068] In some embodiments, the corrosion-resistant layer 3 includes a metal oxide layer, which is a composite layer of at least two metal oxides selected from indium oxide, manganese oxide, and yttrium oxide.
[0069] During the fabrication process, a mixture powder of at least two metal oxides selected from indium oxide, manganese oxide, and yttrium oxide can be prepared using thermal evaporation. Then, a certain thickness of the mixture powder is deposited in the non-welded area of the gate line 2 using a thin film deposition process to form a corrosion-resistant layer 3.
[0070] It should be noted that the mixture powder is an inorganic blue mineral fuel. By adjusting the proportions of different components in the mixture powder, namely, adjusting the proportions of at least two metal oxides in indium oxide, manganese oxide, and yttrium oxide, the color of the mixture powder, i.e., the color of the corrosion-resistant layer 3, can be adjusted.
[0071] The surface of a solar cell is primarily dark blue, while the grid lines 2 are typically made of silver, making them silvery-white. The significant difference between the dark blue and silvery-white colors detracts from the aesthetic appeal of the solar cell surface. This embodiment addresses this by adjusting the color of the corrosion-resistant layer 3 to either dark blue or black, and then covering the non-welded areas of the grid lines 2 with the corrosion-resistant layer 3. This masks the silvery-white color of the grid lines 2, ensuring the masked color closely matches the main color of the solar cell surface. This approach reduces the risk of corrosion to the grid lines 2 while simultaneously improving the aesthetics of the solar cell surface.
[0072] In some embodiments, the solar cell is a heterojunction cell. The substrate 1 may include a substrate 11, a first intrinsic passivation layer 12, a second intrinsic passivation layer 13, a first doped layer 14, a second doped layer 15, a first conductive layer 16, and a second conductive layer 17.
[0073] The substrate 11 has a light-receiving side and a backlight side on both sides along its thickness direction, respectively. The substrate 11 can be a silicon substrate, and the doping type of the substrate 11 can be N-type, that is, the substrate 11 can be an N-type single crystal silicon substrate.
[0074] The first intrinsic passivation layer 12 and the second intrinsic passivation layer 13 are located on opposite sides of the substrate 11 along its thickness direction. The first intrinsic passivation layer 12 is located on the light-receiving side of the substrate 11, and the second intrinsic passivation layer 13 is located on the backlight side of the substrate 11. The first intrinsic passivation layer 12 and the second intrinsic passivation layer 13 can be made of the same material. For example, the first intrinsic passivation layer 12 and the second intrinsic passivation layer 13 can each be an intrinsic amorphous silicon layer.
[0075] The first doped layer 14 is located on the side of the first intrinsic passivation layer 12 facing away from the substrate 11, and the second doped layer 15 is located on the side of the second intrinsic passivation layer 13 facing away from the substrate 11. The materials of the first doped layer 14 and the second doped layer 15 can be the same, and the doping types of the first doped layer 14 and the second doped layer 15 can be opposite. For example, the first doped layer 14 can be an N-type amorphous silicon layer, and the second doped layer 15 can be a P-type amorphous silicon layer. The first doped layer 14 can serve as an electron transport layer, and the second doped layer 15 can serve as a hole transport layer.
[0076] The first conductive layer 16 is located on the side of the first doped layer 14 opposite to the first intrinsic passivation layer 12, and the second conductive layer 17 is located on the side of the second doped layer 15 opposite to the second intrinsic passivation layer 13. The materials of the first conductive layer 16 and the second conductive layer 17 can be the same or different. For example, the first conductive layer 16 and the second conductive layer 17 may each include a TCO layer.
[0077] The first conductive layer 16 has a gate line 2 on the side opposite to the first doped layer 14, and the second conductive layer 17 has a gate line 2 on the side opposite to the second doped layer 15. The corrosion-resistant layer 3 covers the non-soldering area of the gate line 2 on the side of the first conductive layer 16 opposite to the first doped layer 14, and the corrosion-resistant layer 3 also covers the gate line 2 on the side of the second conductive layer 17 opposite to the second doped layer 15.
[0078] It should be noted that the solar cell can also be other types of cells, and the substrate 1 can also include other film layers; no specific limitations are made here.
[0079] According to the solar cell provided in this application embodiment, by covering the non-welded area of the grid line 2 with a corrosion-resistant layer 3, the non-welded area of the grid line 2 is protected, reducing the risk of corrosion of the grid line 2 (such as acetic acid corrosion caused by the encapsulation layer), improving cell efficiency, and extending cell life. Furthermore, the welded area 21 of the grid line 2 is not covered with the corrosion-resistant layer 3, avoiding interference with the welding of the grid line 2 to other cells, thus enabling the series and parallel connection of the solar cell with other cells. Moreover, the orthogonal projection of the corrosion-resistant layer 3 onto the film layer containing the grid line 2 coincides with or is located within the non-welded area of the grid line 2, avoiding an increase in the cell's shading area, thereby avoiding impact on the cell's photoelectric conversion efficiency.
[0080] Accordingly, this application also provides a photovoltaic module, including the solar cells described in the above embodiments, which will not be elaborated upon here. The photovoltaic module may include multiple cell strings, which are electrically connected in series and / or parallel. The solar cell strings include the solar cells described in the above embodiments.
[0081] Photovoltaic modules may also include an encapsulation layer that covers the surface of the solar cell. The encapsulation layer can cover both the light-receiving side and the back-lighting side of the solar cell. The encapsulation layer can be an organic encapsulation film such as ethylene-vinyl acetate copolymer (EVA) film, polyethylene octene copolymer elastomer (POE) film, or polyethylene terephthalate (PET) film.
[0082] According to the photovoltaic module provided in this application embodiment, by covering the non-welded areas of the grid lines with a corrosion-resistant layer, the non-welded areas of the grid lines are protected, reducing the risk of grid line corrosion (such as acetic acid corrosion caused by the encapsulation layer), improving cell efficiency, and extending cell life. Furthermore, the welded areas of the grid lines are not covered with the corrosion-resistant layer, avoiding interference with grid line welding and enabling series and parallel connection of solar cells with other cells. Moreover, the orthogonal projection of the corrosion-resistant layer onto the film layer containing the grid lines coincides with or is located within the non-welded areas of the grid lines, avoiding an increase in the cell's shading area and thus preventing any impact on the cell's photoelectric conversion efficiency.
[0083] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and are not used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and are not limited in number; for example, a first object can be one or more.
[0084] In the description of this application, "multiple" means two or more.
[0085] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0086] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.
Claims
1. A solar cell, characterized by, include: Base; The grid line is provided on at least one side of the light-receiving side and the back-light side of the substrate, and the grid line includes a soldering area and a non-soldering area located outside the soldering area; A corrosion-resistant layer covers the non-welded area of the gate line, and the orthographic projection of the corrosion-resistant layer on the film layer where the gate line is located coincides with or is located within the non-welded area of the gate line.
2. The solar cell according to claim 1, characterized in that, The grid line includes a main grid line, and the main grid line includes the welded area and the non-welded area; The corrosion-resistant layer covers the non-welded area of the main grid line, and the orthogonal projection of the corrosion-resistant layer on the film layer where the grid line is located coincides with or is located within the non-welded area of the main grid line.
3. The solar cell according to claim 2, characterized in that, The grid lines also include fine grid lines; The corrosion-resistant layer also covers the fine grid lines, and the orthogonal projection of the corrosion-resistant layer on the film layer where the grid lines are located coincides with or is located within the area where the fine grid lines are located.
4. The solar cell according to claim 1, characterized in that, The grid line includes a fine grid line, and the fine grid line includes the welded area and the non-welded area; The corrosion-resistant layer covers the non-welded area of the fine grid line, and the orthographic projection of the corrosion-resistant layer on the film layer where the grid line is located coincides with or is located within the non-welded area of the fine grid line.
5. The solar cell according to claim 1, characterized in that, The grid line includes multiple welding zones, with each end of the grid line having a welding zone, and the non-welding zone located between the multiple welding zones.
6. The solar cell according to claim 5, characterized in that, The length of the welding area in the extension direction of the grid line is 15 mm to 20 mm.
7. The solar cell according to claim 1, characterized in that, The thickness of the corrosion-resistant layer is 50 nanometers to 100 nanometers.
8. The solar cell according to claim 1, characterized in that, The corrosion-resistant layer includes a metal oxide layer, which is a composite layer of at least two metal oxides selected from indium oxide, manganese oxide, and yttrium oxide.
9. The solar cell according to any one of claims 1-8, characterized in that, The substrate includes: Substrate; The first intrinsic passivation layer is located on the light-receiving side of the substrate; The second intrinsic passivation layer is located on the backlight side of the substrate; The first doped layer is located on the side of the first intrinsic passivation layer that is away from the substrate; The second doped layer is located on the side of the second intrinsic passivation layer that is away from the substrate; The first conductive layer is located on the side of the first doped layer that is away from the first intrinsic passivation layer. The second conductive layer is located on the side of the second doped layer that is away from the second intrinsic passivation layer; The first conductive layer has the gate line on the side opposite to the first doped layer and the second conductive layer has the gate line on the side opposite to the second doped layer.
10. A photovoltaic module, characterized in that, include: The solar cell as described in any one of claims 1-9; An encapsulation layer that covers the surface of the solar cell.