A novel flip-chip thin-film heat dissipation packaging structure

Abstract

This utility model discloses a novel flip-chip thin-film heat dissipation packaging structure, comprising a flip-chip thin film, a plurality of packaging bump assemblies disposed on the flip-chip thin film, and a thermal pad disposed on the packaging bumps; the packaging bump assemblies are capable of aggregating conductive particles. By constructing a novel flip-chip thin-film heat dissipation packaging structure composed of a flip-chip thin film, a plurality of packaging bump assemblies, a silicon wafer, and a thermal pad, it achieves excellent heat dissipation performance, thereby improving the heat dissipation efficiency of the chip and extending its service life.

Description

Technical Field

[0001] This utility model relates to flip-chip thin film packaging in the field of semiconductor packaging, specifically to a novel flip-chip thin film heat dissipation packaging structure. Background Technology

[0002] Chip-on-film (COF) packaging refers to bonding a chip to a substrate via a metal conductor with the active side facing down after flipping the chip over. Different bump designs and fabrication processes affect various product specifications. When a conductive adhesive film is applied between the chip's bumps and the substrate circuitry, appropriate pressure, temperature, and time are used to allow the resin to flow, and the conductive particles contact the bumps and substrate circuitry to achieve electrical conductivity.

[0003] With increasingly higher performance requirements for chips, more efficient heat dissipation is needed, but current heat dissipation methods are not ideal, which seriously shortens the lifespan of chips.

[0004] Improving the heat dissipation efficiency and extending the lifespan of chips are pressing technical challenges that need to be addressed at present.

[0005] The information disclosed in this background section is intended only to enhance the understanding of the general background of this utility model and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Utility Model Content

[0006] To address the aforementioned technical problems, this invention proposes a novel flip-chip thin-film heat dissipation packaging structure to improve the heat dissipation efficiency of the chip and extend its service life.

[0007] To achieve the above objectives, the technical solution of this utility model is as follows:

[0008] A novel flip-chip thin-film heat dissipation packaging structure includes a flip-chip film, a plurality of packaging bump assemblies disposed on the flip-chip film, and a heat dissipation pad disposed on the packaging bumps.

[0009] The encapsulation bump assembly is capable of aggregating conductive particles.

[0010] This invention provides a novel flip-chip thermal packaging structure consisting of a flip-chip film, several encapsulation bump components, a silicon wafer, and a thermal pad. This structure provides excellent heat dissipation performance, thereby improving the chip's heat dissipation efficiency and extending its lifespan.

[0011] It is also worth noting that heat dissipation channels are provided between adjacent encapsulation bump components.

[0012] It is further noteworthy that the encapsulation bump assembly includes a silicon wafer and wafer bumps disposed on the silicon wafer, the wafer bumps being located between the silicon wafer and the flip-chip film;

[0013] The side of the wafer bump that contacts the silicon wafer has a protrusion, and the end face of the wafer bump that contacts the flip-chip film has a conductive particle groove.

[0014] It is also worth noting that a passivation layer is disposed on the silicon wafer, and the wafer bumps are disposed on the passivation layer.

[0015] It is also worth noting that the conductive particle grooves deposited on the wafer bumps make the wafer bumps as a whole concave shape, and the depth of the conductive particle grooves should not be greater than half the diameter of the conductive particles.

[0016] This utility model has the following advantages:

[0017] 1. This utility model provides a novel flip-chip thin-film heat dissipation packaging structure composed of a flip-chip thin film, several packaging bump components, and a heat dissipation pad, which enables it to have good heat dissipation performance, thereby optimizing the packaging architecture, improving the heat dissipation efficiency of the chip, and extending the service life of the chip. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

[0019] Figure 1 This is a schematic diagram of a novel flip-chip thin-film heat dissipation packaging structure disclosed in an embodiment of the present invention;

[0020] Figure 2 This is a schematic diagram of the encapsulation bump assembly in a novel flip-chip thin-film heat dissipation encapsulation structure disclosed in an embodiment of this utility model;

[0021] The numbers and letters in the diagram represent the names of the corresponding components:

[0022] 1. Flip film 2. Encapsulation bump assembly 21. Silicon wafer 22. Passivation layer 23. Wafer bump

[0023] 24. Conductive particle groove 3. Heat dissipation sticker 4. Conductive particles 5. Conductive adhesive. Detailed Implementation

[0024] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention.

[0025] This invention provides a novel flip-chip thin-film heat dissipation packaging structure. Its working principle is to form a novel flip-chip thin-film heat dissipation packaging structure composed of a flip-chip thin film, several packaging bump components and a heat dissipation pad, so that it has good heat dissipation performance, thereby optimizing the packaging architecture, improving the heat dissipation efficiency of the chip and extending the service life of the chip.

[0026] The present invention will be further described in detail below with reference to embodiments and specific implementation methods.

[0027] like Figure 1 and Figure 2 As shown, a novel flip-chip thin-film heat dissipation packaging structure includes a flip-chip film 1, several packaging bump assemblies 2 disposed on the flip-chip film, and a heat dissipation pad 3 disposed on the packaging bumps; heat dissipation channels are provided between adjacent packaging bump assemblies.

[0028] The encapsulation bump assembly 2 includes a silicon wafer 21, on which a passivation layer 22 is disposed, and on which wafer bumps 23 are disposed. The wafer bumps 23 are located between the silicon wafer and the flip-chip film, and the wafer bumps and the silicon wafer are integrally disposed on the flip-chip film by conductive adhesive 5. The side of the wafer bump that contacts the silicon wafer has a protrusion, and the conductive particle groove 24 is deposited on the side of the wafer bump facing the flip-chip film, making the wafer bump integrally "concave". The depth of the conductive particle groove should not be greater than half the diameter of the conductive particle.

[0029] The deformation of the conductive particles should conform to the following formula:

[0030] (K+J)*H0=G*J+H1*(K+J);

[0031] If K = J;

[0032] Then H0 = G / 2 + H1 + a;

[0033] Where: K is the wafer bump width; J is the gap between bumps; G is the bump height; H0 is the thickness before conductive particle bonding; H1 is the thickness after conductive particle bonding; a is a correction value (0.15 times the bump height G).

[0034] During bonding, the conductive particles will deform due to compression, and the deformation amount is (H0-H1) / T0*100%; the deformation amount of each conductive particle should be greater than 20%.

[0035] When the chip and the substrate are bonded and pressed together, the conductive particles 4 will gather at the conductive particle groove, preventing the conductive particles from detaching. This helps the wafer bumps 23 and the flip-chip film 1 to bond better, solving the problem of conductive particles being prone to displacement and having poor conductivity in traditional processes.

[0036] The conductive particles 4 are conductive, enabling a tight connection between the wafer bumps 23 and the flip-chip film 1. All the wafer bumps 23 on the silicon wafer 21 are connected to the flip-chip film 1 in this manner. Since conductivity generates heat, heat dissipation is achieved through the provided heat sinks 3, without affecting the surface circuitry. Furthermore, the heat dissipation channels between the individual wafer bumps enhance the heat dissipation effect.

[0037] Conductive adhesives are obtained by using nanoscale metal powders (gold, silver, copper, nickel, etc.); or by coating the surface of small-sized polymer plastic balls with metal.

[0038] The heat dissipation patch is made by selecting diamond with extremely high thermal conductivity and adding a certain proportion of graphene material with excellent in-plane thermal conductivity to form a composite heat dissipation material, which further improves heat dissipation.

[0039] Through the above methods, the present invention provides a novel flip-chip thin-film heat dissipation packaging structure, which is composed of a flip-chip thin film, several packaging bump components and a heat dissipation pad, thereby enabling it to have good heat dissipation performance, achieving the purpose of optimizing the packaging architecture, improving the heat dissipation efficiency of the chip and extending the service life of the chip.

[0040] The above description is only a preferred embodiment of a novel flip-chip thin-film heat dissipation packaging structure disclosed in this utility model. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the inventive concept of this utility model, and these all fall within the protection scope of this utility model.

Claims

1. A novel flip-chip thin-film heat dissipation packaging structure, characterized in that, It includes a flip-chip film, several encapsulation bump assemblies disposed on the flip-chip film, and a thermal pad disposed on the encapsulation bumps; The encapsulation bump assembly is capable of aggregating conductive particles.

2. The novel flip-chip thin-film heat dissipation packaging structure according to claim 1, characterized in that, Heat dissipation channels are provided between adjacent encapsulation bump components.

3. The novel flip-chip thin-film heat dissipation packaging structure according to claim 1, characterized in that, The encapsulation bump assembly includes a silicon wafer and wafer bumps disposed on the silicon wafer, the wafer bumps being located between the silicon wafer and the flip-chip film; The side of the wafer bump that contacts the silicon wafer has a protrusion, and the end face of the wafer bump that contacts the flip-chip film has a conductive particle groove.

4. The novel flip-chip thin-film heat dissipation packaging structure according to claim 3, characterized in that, A passivation layer is disposed on the silicon wafer, and wafer bumps are disposed on the passivation layer.

5. The novel flip-chip thin-film heat dissipation packaging structure according to claim 3, characterized in that, The conductive particle grooves are deposited on the wafer bumps, making the wafer bumps as a whole concave shape. The depth of the conductive particle grooves should not be greater than half the diameter of the conductive particles.

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