Fcpbga circuit structure for balancing warpage stress

Abstract

The utility model relates to a kind of FC-PBGA circuit structure for balancing warping stress, involve integrated circuit packaging field.This technical scheme is by flipping chip on plastic substrate, heat sink is attached to chip surface, the appearance of heat sink is square, inner cavity is circular, the Foot region of heat sink is adhered to plastic substrate by AD glue, the central region of heat sink is adhered to chip surface by Tim glue.In this case, by increasing the adhesion area between the Foot region of heat sink and plastic substrate, to balance the vertical stress generated by plastic substrate warping;Based on the inner cavity of heat sink is circular, combined with the force balance interaction of circular, to balance the horizontal stress generated by plastic substrate warping;Avoid stress damage in chip area, by improving heat sink structure design to balance and weaken the stress generated by warping, to reduce the failure risk in reliability assessment process.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit packaging technology, and in particular to an FC-PBGA circuit structure for balancing warping stress. Background Technology

[0002] With the development of integrated circuits, high integration has gradually become the mainstream. Large-size plastic-packaged FC-PBGA circuits are becoming increasingly popular due to their low cost and high integration, and will be one of the important directions for the development of the integrated circuit manufacturing industry. However, their high reliability performance places higher demands on FC-PBGA integrated circuit packaging technology.

[0003] Due to their high coefficient of thermal expansion, plastic substrates are significantly affected by temperature, exhibiting varying degrees of warping with temperature changes. Furthermore, the degree of warping intensifies as the size of the plastic substrate increases. Therefore, during reliability testing of FC-PBGA circuits, especially temperature cycling tests, the plastic substrate repeatedly displays "smiley face" and "crying face" warping patterns. This process can cause fatigue damage to the chip and its solder bumps, ultimately leading to structural integrity issues and electrical connection failures. Therefore, the failure problem caused by warping in large-size plastic-encapsulated FC-PBGA circuits is a pressing issue that needs to be addressed. Summary of the Invention

[0004] The purpose of this invention is to provide an FC-PBGA circuit structure for balancing warping stress, so as to solve the problems existing in the prior art.

[0005] To achieve the above objectives, the technical solution adopted by this utility model is as follows:

[0006] An FC-PBGA circuit structure for balancing warpage stress includes a plastic substrate, and the FC-PBGA circuit structure for balancing warpage stress further includes:

[0007] A chip, which is flip-chip mounted on the plastic substrate; and

[0008] A heat sink is attached to the surface of the chip.

[0009] The heat sink has a square shape and a circular inner cavity. The foot area of ​​the heat sink is bonded to the plastic substrate with AD adhesive, and the central area of ​​the heat sink is bonded to the chip surface with Tim adhesive.

[0010] In one possible implementation, the chip is flip-chip mounted onto the plastic substrate using a flip-chip reflow process.

[0011] In one possible implementation, the chip is filled and fixed to the plastic substrate by underfill adhesive.

[0012] In one possible implementation, the AD adhesive is selected as a thermally conductive adhesive with high bonding strength and good heat dissipation performance, which can resist the warping stress of the plastic substrate through high-strength bonding.

[0013] In one possible implementation, the Tim adhesive is selected as a thermally conductive adhesive with weak bonding strength and good heat dissipation performance, and the warping stress applied to the chip area by the plastic substrate is balanced by low-strength bonding.

[0014] In one possible implementation, the coating thickness of the AD adhesive and the Tim adhesive is 50-100 μm to ensure bonding effect and stress balance.

[0015] In one possible implementation, the heat sink is made of copper alloy or Alsic.

[0016] In one possible implementation, the chip has a form factor of 5mm × 5mm to 30mm × 30mm.

[0017] In one possible implementation, the heat sink has external dimensions ranging from 10mm × 10mm to 50mm × 50mm.

[0018] The beneficial effects of the technical solution provided by this utility model include at least the following:

[0019] This technical solution involves flip-chip mounting onto a plastic substrate and attaching a heatsink to the chip surface. The heatsink is square in shape with a circular inner cavity. The foot area of ​​the heatsink is bonded to the plastic substrate using adhesive, while the central area is bonded to the chip surface using tinfoil. In this configuration, the bonding area between the foot area of ​​the heatsink and the plastic substrate is increased to balance the vertical stress caused by substrate warping. The circular inner cavity of the heatsink, combined with the force-balancing interaction of the circle, balances the horizontal stress caused by substrate warping. This avoids stress damage to the chip area. By improving the heatsink structure design to balance and reduce the stress caused by warping, the failure risk during reliability testing is reduced. Attached Figure Description

[0020] The accompanying drawings are provided to further understand the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation thereof.

[0021] Figure 1 A schematic diagram of an FC-PBGA circuit structure for balancing warping stress, provided in an exemplary embodiment of the present invention, is shown; wherein, Figure 1 (a) Front view, Figure 1 (b) is the exploded view of the main view.

[0022] Figure 2 This diagram illustrates a mounting schematic of an FC-PBGA circuit structure for balancing warping stress, provided by an exemplary embodiment of the present invention; wherein, Figure 2 (a) is a top view of the plastic substrate and chip before mounting. Figure 2 (b) is a top view of the heatsink before mounting.

[0023] Figure 3 This diagram illustrates the mechanical distribution of an FC-PBGA circuit structure for balancing warping stress, provided by an exemplary embodiment of the present invention; wherein, Figure 3 (a) is a schematic diagram of the mechanical distribution under any cross-section along the vertical direction of the plastic substrate. Figure 3 (b) is a schematic diagram of the mechanical distribution of the heat sink in the horizontal direction. Detailed Implementation

[0024] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0025] In this specification, identical components are represented by the same reference numerals. It should be noted that the terms "front," "rear," "left," "right," "upper," and "lower" used in the following description refer to directions in the accompanying drawings of this utility model, while the terms "bottom surface," "top surface," "inner," and "outer" refer to directions towards or away from a specific component, respectively. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "multiple" means two or more.

[0026] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0027] Figure 1 A schematic diagram of an FC-PBGA circuit structure for balancing warping stress, provided in an exemplary embodiment of the present invention, is shown; wherein, Figure 1 (a) Front view, Figure 1(b) is a front exploded view of the FC-PBGA circuit structure used to balance warping stress, which includes a plastic substrate 1, a chip 2 flip-chip on the plastic substrate 1, and a heat sink 3 mounted on the surface of the chip 2; wherein the heat sink 3 is square in shape and circular in inner cavity.

[0028] In this embodiment of the application, the chip 2 is flip-chipped onto the plastic substrate 1 using a flip-chip reflow process, and the chip 2 is filled and fixed to the plastic substrate 1 by underfill adhesive; wherein, the curing temperature of the underfill adhesive is controlled at 150-170℃ and the curing time is 90-120min.

[0029] In this embodiment, when the chip 2 is flip-chipped onto the plastic substrate 1 and underfilled for fixation, the chip 2 bumps and the plastic substrate 1 pads are electrically interconnected by solder balls based on the flip-chip reflow process, shortening the signal path to improve performance. At the same time, the gap between the chip 2 and the plastic substrate 1 is filled with underfill adhesive to form a rigid support layer to disperse stress, enhance interface bonding, and prevent the solder balls from cracking due to stress concentration.

[0030] Optionally, the dimensions of chip 2 are from 5mm×5mm to 30mm×30mm, and the dimensions of heat sink 3 are from 10mm×10mm to 50mm×50mm. In one example, the dimensions of plastic substrate 1 are 50mm×50mm, the dimensions of chip 2 are 30mm×30mm, and the dimensions of heat sink 3 are 50mm×50mm.

[0031] Figure 2 This diagram illustrates a mounting schematic of an FC-PBGA circuit structure for balancing warping stress, provided by an exemplary embodiment of the present invention; wherein, Figure 2 (a) is a top view of the plastic substrate and chip before mounting. Figure 2 (b) is a top view of the heat sink before mounting. The foot area of ​​the heat sink 3 is bonded to area A of the plastic substrate 1 (as shown by the dotted circle area) using AD adhesive, and the center area of ​​the heat sink 3 is bonded to area B of the chip 2 (as shown by the dotted circle area) using Tim adhesive. The AD adhesive is a thermally conductive adhesive with high bonding strength and good heat dissipation performance, which counteracts the warping stress of the plastic substrate 1 through high-strength bonding. The Tim adhesive is a thermally conductive adhesive with weak bonding strength and good heat dissipation performance, which balances the warping stress applied to the area of ​​the chip 2 by the plastic substrate 1 through low-strength bonding. The coating thickness of the AD adhesive and Tim adhesive is 50-100μm to ensure bonding effect and stress balance.

[0032] In this embodiment, when the heat sink 3 is mounted after the chip 2 is fixed, the foot area of ​​the heat sink 3 is bonded to the plastic substrate 1 with high-strength AD adhesive, using its rigid connection to counteract the warping vertical stress of the plastic substrate 1. At the same time, the central area is bonded to the surface of the chip 2 with low-strength Tim adhesive, using the slight deformation of the adhesive layer to buffer the horizontal shear stress. The double adhesive layer design forms a "rigid edge anchoring + flexible center buffering" structure. The AD adhesive and Tim adhesive are selected with high thermal conductivity materials to take into account heat dissipation, and the coating thickness is controlled at 50-100μm to ensure the bonding effect and stress balance. The outer dimensions of the heat sink 3 are larger than those of the chip 2 to expand the stress application area.

[0033] It is worth mentioning that the Foot area of ​​the heat sink 3 refers to the edge area on the heat sink 3 that is bonded to the plastic substrate 1 with high-strength thermally conductive adhesive. It is mainly used to fix the heat sink 3, enhance heat dissipation performance, and balance the vertical stress caused by the warping of the plastic substrate 1 by increasing the bonding area.

[0034] Preferably, the heat sink 3 is made of copper alloy or ALSI, and its surface can be nickel-plated to improve heat dissipation efficiency and adhesion to the thermally conductive adhesive. At the same time, the rigid support of the metal material enhances the resistance to warping of the plastic substrate 1.

[0035] In this embodiment, when the vertical stress is balanced by increasing the bonding area between the Foot area of ​​the heat sink 3 and the plastic substrate 1, the stress is inversely proportional to the area in mechanical principle. Expanding the contact area can reduce the stress load per unit area and prevent detachment due to stress exceeding the strength of the adhesive layer. The rigid structure of the heat sink 3 acts as a "stress raft" to diffuse the vertical stress generated by the warping of the plastic substrate 1 to the entire plane of the plastic substrate 1. Force balance is achieved by utilizing the strength of the substrate structure, thereby reducing the vertical stress component acting on the chip 2.

[0036] In this embodiment, the warping stress area of ​​the plastic substrate 1 is divided into circles based on the circular inner cavity of the heat sink 3. By utilizing the characteristic that the stress direction of the circle is towards the center and the stress is equal in size, the stress on the circular plane is balanced and canceled out, so as to achieve no horizontal stress acting on the chip 2 area.

[0037] Next, the working principle of an FC-PBGA circuit structure for balancing warping stress involved in the embodiments of this utility model will be explained.

[0038] FC-PBGA circuits have high requirements and must pass reliability tests. When subjected to temperature changes such as temperature cycling and thermal shock, the plastic substrate, due to its high coefficient of thermal expansion, will warp in a "smiley face" or "sad face" pattern, generating warping stress. When this stress is transferred to the chip or the chip bump soldering area, it increases the risk of failure. This application sets the warping of the plastic substrate as "sad face" based on the center of the plastic substrate, and the heat sink cavity is circular. Figure 3 This diagram illustrates the mechanical distribution of an FC-PBGA circuit structure for balancing warping stress, provided by an exemplary embodiment of the present invention. Figure 3 (a) is a schematic diagram of the mechanical distribution under any cross-section along the vertical direction of the plastic substrate. The warping stress F generated at both ends of the plastic substrate on any cross-section is symmetrical and equal. The warping stress F can be decomposed into horizontal stress F1=F*Sinθ and vertical stress F2=F*Cosθ. Due to the large area A region (see Figure 2 High-strength thermally conductive adhesive is used for bonding, and the vertical stress F2 is applied to the heat sink and counteracted by the rigidity of the heat sink itself; Figure 3 (b) is a schematic diagram of the mechanical distribution of the heat sink in the horizontal direction. A centrally symmetrical (centered on the circle) horizontal stress is distributed on the heat sink with the inner cavity circle as the boundary. These stresses balance and cancel each other out, so F1 = 0. Therefore, no horizontal stress acts on the chip area, which greatly reduces the stress impact of substrate warping on the chip area. This can be understood to also apply to plastic substrates with "smiley face" warping.

[0039] In summary, this technical solution achieves minimum stress in the chip area by balancing vertical and horizontal stress control, forming a multi-level stress buffer system: the bottom filler provides rigid support, the AD adhesive provides high-strength anchoring, the Tim adhesive provides flexible buffering, and the heat sink provides both thermal conductivity and mechanical support. Combined with the elastic deformation of the substrate, the stress on the chip bumps is reduced to within the material tolerance threshold. Tests show that this solution can reduce the stress in the chip area by more than 60% compared to traditional processes, effectively cope with temperature cycling, thermal shock, and other operating conditions, and significantly improve the long-term stability of the device through reliability assessment.

[0040] In the embodiments disclosed in this utility model, the terms "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; "linking" can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the embodiments disclosed in this utility model according to the specific circumstances.

[0041] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. An FC-PBGA circuit structure for balancing warpage stress, comprising a plastic substrate (1), characterized in that, The FC-PBGA circuit structure for balancing warping stress also includes: Chip (2), which is flip-chip mounted on the plastic substrate (1); and Heat sink (3) is attached to the surface of the chip (2); The heat sink (3) is square in shape and circular in shape. The foot area of ​​the heat sink (3) is bonded to the plastic substrate (1) with AD glue, and the central area of ​​the heat sink (3) is bonded to the surface of the chip (2) with Tim glue.

2. The FC-PBGA circuit structure for balancing warping stress according to claim 1, characterized in that, The chip (2) is flip-chip mounted onto the plastic substrate (1) using a flip-chip reflow process.

3. The FC-PBGA circuit structure for balancing warping stress according to claim 1, characterized in that, The chip (2) is filled and fixed to the plastic substrate (1) by bottom filler.

4. The FC-PBGA circuit structure for balancing warping stress according to claim 1, characterized in that, The AD adhesive is a thermally conductive adhesive with high bonding strength and good heat dissipation performance, which can resist the warping stress of the plastic substrate (1) through high-strength bonding.

5. The FC-PBGA circuit structure for balancing warping stress according to claim 1, characterized in that, The Tim adhesive is a thermally conductive adhesive with weak bonding strength and good heat dissipation performance. It balances the warping stress applied by the plastic substrate (1) to the chip (2) area through low-strength bonding.

6. The FC-PBGA circuit structure for balancing warpage stress according to claim 1, characterized in that, The coating thickness of the AD adhesive and the Tim adhesive is 50-100μm to ensure bonding effect and stress balance.

7. The FC-PBGA circuit structure for balancing warping stress according to claim 1, characterized in that, The heat sink (3) is made of copper alloy or Alsic.

8. The FC-PBGA circuit structure for balancing warping stress according to claim 1, characterized in that, The chip (2) has an external size of 5mm×5mm to 30mm×30mm.

9. The FC-PBGA circuit structure for balancing warpage stress according to claim 1, characterized in that, The external dimensions of the heat sink (3) are 10mm×10mm to 50mm×50mm.

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