Stacked package structure and packaged device

By setting a solder resist layer on the substrate surface and opening windows on it, the solder pads are confined within the windows to form a groove structure, which solves the problem of solder overflow caused by solder pad protrusion and improves the soldering bond strength and effect.

CN224306325UActive Publication Date: 2026-05-29FOREHOPE ELECTRONICS NINGBO CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
FOREHOPE ELECTRONICS NINGBO CO LTD
Filing Date
2025-05-14
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

In traditional POP stacking structures, protruding pads cause solder to overflow, resulting in poor solder bonding and a high risk of soldering failure.

Method used

A solder resist layer is set on the surface of the substrate and a window is opened on it to confine the solder pads within the window, forming a groove structure. The solder balls are filled and encapsulated by a molding compound to restrict the space for solder flow.

Benefits of technology

It improves welding bonding strength, prevents solder overflow, enhances welding effect, and reduces welding failure.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224306325U_ABST
    Figure CN224306325U_ABST
Patent Text Reader

Abstract

The utility model discloses a kind of stacked packaging structure and packaging device, it is related to semiconductor packaging technical field, the stacked packaging structure includes first substrate, first chip, second substrate and plastic package layer, the side surface of first substrate is provided with first solder pad and first solder resist, and first window is set on first solder resist;First chip is attached on first substrate;Second substrate is spaced apart from the side of first chip away from first substrate, and second substrate is provided with bonding solder ball, bonding solder ball corresponds with first window, and is connected with first solder pad;Plastic package layer is filled and set between first substrate and second substrate.Compared with prior art, the recess structure formed by first window around first solder pad, on the one hand, can better accept bonding solder ball, on the other hand, can limit solder flow space when welding, so as to limit solder around first solder pad, and can improve contact area, and then improve welding bonding force, and welding effect is better.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging technology, and more specifically, to a stacked packaging structure and a packaging device. Background Technology

[0002] With the rapid development of the semiconductor industry, electronic products are becoming increasingly miniaturized and denser. Communication products need to meet high bandwidth performance requirements. POP (Package on Package) stacking structures are widely used in the semiconductor industry to package memory chips and processor chips together, achieving both high bandwidth performance and miniaturization. These packages are small in size, offer superior performance, and provide high signal transmission frequencies. They are primarily used in miniaturized and thin communication terminal products.

[0003] In traditional POP stacking structures, such as dual-substrate stacking structures, the connection between the upper and lower stacked structures is usually achieved by directly soldering solder balls to the pads. However, conventional pads are set on the surface of the substrate and protrude upwards, leaving no space for the solder to receive. During soldering, the solder is prone to overflow, resulting in poor solder joint strength and easy soldering failure. Utility Model Content

[0004] The purpose of this invention is to provide a stacked packaging structure and packaging device that can restrict the solder flow space, resulting in better welding bonding and ensuring welding effect.

[0005] The embodiments of this utility model are implemented as follows:

[0006] In a first aspect, the present invention provides a stacked packaging structure, comprising:

[0007] A first substrate has a first pad on one side surface and a first solder resist layer on another side surface. A first window is provided on the first solder resist layer, and the first pad is confined within the first window.

[0008] The first chip is mounted on the first substrate;

[0009] The second substrate is disposed at a distance from the first chip on the side away from the first substrate, and a bonding solder ball is disposed on the side of the second substrate close to the first substrate. The bonding solder ball corresponds to the first window and is connected to the first pad.

[0010] A molding compound is provided between the first substrate and the second substrate, and covers the bonding solder balls and the first chip.

[0011] In an optional embodiment, the second substrate is further provided with a second pad and a second solder mask layer on the side near the first substrate. The second solder mask layer covers the surface of the first substrate and is provided with a second window exposing the second pad. The bonding solder ball is disposed in the second window and connected to the second pad.

[0012] In an optional embodiment, the bonding solder ball includes an inner copper ball and an outer tin layer, the outer tin layer covering the inner copper ball and simultaneously connected to the first pad and the second pad.

[0013] In an optional embodiment, the opening width W2 of the first window is smaller than the opening width W4 of the second window, and the diameter D1 of the inner copper ball is larger than the opening width W4 of the second window and smaller than the opening width W2 of the first window.

[0014] In an optional embodiment, the height H1 of the molding compound is greater than the diameter D1 of the inner copper ball and less than the outer diameter D2 of the outer tin layer.

[0015] In an optional embodiment, the spacing H2 between the inner copper ball and the second pad is greater than or equal to 5 μm and less than 20 μm.

[0016] In an optional embodiment, the height of the inner copper ball relative to the first substrate is greater than the height of the first chip relative to the first substrate.

[0017] In an optional embodiment, the opening width W4 of the second window is smaller than the width W3 of the second pad, so that the second solder mask layer covers the edge of the second pad.

[0018] In an optional implementation, the width W4 of the second window is greater than or equal to 65% of the width W3 of the second pad.

[0019] In an optional embodiment, the width of the opening W2 of the first window is smaller than the width W1 of the first pad, so that the first solder mask layer covers the edge of the first pad.

[0020] In an optional implementation, the width W2 of the first window is greater than or equal to 75% of the width W1 of the first pad.

[0021] In an optional implementation, the width W1 of the first pad is less than or equal to the width W3 of the second pad.

[0022] In another embodiment of the present invention, a packaging device is provided, including a second chip and the aforementioned stacked packaging structure, wherein the second chip is mounted on the side of the second substrate away from the first substrate.

[0023] The beneficial effects of this utility model embodiment are:

[0024] The stacked packaging structure and packaging device provided in this embodiment of the invention have a first pad on one side surface of a first substrate, and a first solder mask layer on the surface of the first substrate. A first window is provided on the first solder mask layer, and the first pad is confined within the first window. A first chip is mounted on the first substrate. A second substrate is spaced apart on the side of the first chip away from the first substrate, and the second substrate has bonding solder balls that correspond to the first window and connect to the first pad. A molding compound is provided between the first substrate and the second substrate. Compared to the prior art, this invention confines the first pad inside the first solder mask layer, thus avoiding the first pad protruding. This structure creates a groove around the first pad formed by the first window, which can receive the solder. On the one hand, it can better receive the bonding solder balls; on the other hand, it can restrict the solder flow space during soldering, thereby confining the solder around the first pad and increasing the contact area, thus improving the soldering bond and resulting in better soldering performance. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 A schematic diagram of the stacked packaging structure provided in the embodiment of this utility model;

[0027] Figure 2 for Figure 1 A magnified view of a section at point II;

[0028] Figures 3 to 6 A process flow diagram of the method for fabricating the stacked packaging structure provided in this embodiment of the utility model;

[0029] Figure 7 This is a schematic diagram of the packaging device provided in an embodiment of the present invention.

[0030] icon:

[0031] 100 - Stacked package structure; 110 - First substrate; 111 - First pad; 112 - First solder mask layer; 113 - First window; 114 - Connecting solder ball; 120 - First chip; 121 - Filler layer; 130 - Second substrate; 131 - Second pad; 132 - Second solder mask layer; 133 - Second window; 140 - Molding layer; 150 - Bonding solder ball; 151 - Inner copper ball; 152 - Outer tin layer; 200 - Packaged device; 210 - Second chip. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0033] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0034] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0035] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this utility model is in use. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. In addition, the terms "first," "second," and "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0036] Furthermore, terms such as "horizontal" and "vertical" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0037] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0038] See Figure 1 and Figure 2 This utility model provides a stacked packaging structure 100 and a packaging device 200, which can restrict the solder flow space and ensure the soldering effect.

[0039] The stacked packaging structure 100 provided in this embodiment includes a first substrate 110, a first chip 120, a second substrate 130, and a molding compound 140. A first pad 111 is provided on one side surface of the first substrate 110, and a first solder resist layer 112 is also provided on one side surface of the first substrate 110. A first window 113 is provided on the first solder resist layer 112, and the first pad 111 is confined within the first window 113. The first chip 120 is mounted on the first substrate 110. The second substrate 130 is disposed at intervals on the side of the first chip 120 away from the first substrate 110, and a bonding ball 150 is provided on the side of the second substrate 130 close to the first substrate 110. The bonding ball 150 corresponds to the first window 113 and is connected to the first pad 111. The molding compound 140 is filled between the first substrate 110 and the second substrate 130 and covers the bonding ball and the first chip 120.

[0040] In this embodiment, the thickness of the first solder resist layer 112 is greater than the thickness of the first pad 111. Therefore, the first pad 111 can be confined within the first solder resist layer 112, thereby forming a groove structure around the first pad 111. This facilitates the insertion of the solder ball 150 and allows it to receive the corresponding solder during soldering, preventing solder overflow and improving the soldering effect. At the same time, the groove structure also increases the contact area between the solder and the first substrate 110, thereby improving the bonding force and effectively mitigating soldering failure.

[0041] In some embodiments, the second substrate 130 is further provided with a second pad 131 and a second solder resist layer 132 on the side near the first substrate 110. The second solder resist layer 132 covers the surface of the first substrate 110 and has a second window 133 exposing the second pad 131. A bonding ball 150 is disposed within the second window 133 and connected to the second pad 131. Specifically, the second pad 131 is also confined within the second window 133. In actual fabrication, bonding balls 150 can be formed by attaching balls to the second pad 131. The structural arrangement of the second pad 131 and the second window 133 also ensures the bonding strength between the bonding ball 150 and the second pad 131.

[0042] It should be noted that in this embodiment, both the first substrate 110 and the second substrate 130 can be coreless or cored substrates. Preferably, both the first substrate 110 and the second substrate 130 are coreless substrates, which reduces the stacking thickness. Furthermore, both the first substrate 110 and the second substrate 130 can be composed of epoxy fiberglass board, Ajinomoto multilayer film, etc., and their specific wiring structure can refer to existing substrate structures. Additionally, both the first solder resist layer 112 and the second solder resist layer 132 are green paint layers, formed together during the fabrication of the first substrate 110 and the second substrate 130, and mainly serve as insulation and solder resist.

[0043] It is worth noting that, in this embodiment, a plurality of connecting solder balls 114 are also provided on the side of the first substrate 110 away from the second substrate 130. The plurality of connecting solder balls 114 are formed by a ball-planting process and are connected to the wiring layer in the first substrate 110.

[0044] In some embodiments, the solder ball comprises an inner copper ball 151 and an outer tin layer 152, the outer tin layer 152 covering the inner copper ball 151 and simultaneously connected to the first pad 111 and the second pad 131. Specifically, the outer tin layer 152 can completely cover the inner copper ball 151, and its fabrication process can refer to existing double-layer solder ball structures. The inner copper ball 151 can improve support, reduce solder flow, and thus reduce bridging during soldering. Preferably, the inner copper ball 151 has a diameter of 180 μm, and the outer tin layer 152 has an outer diameter of 220 μm.

[0045] In some embodiments, the opening width W2 of the first window 113 is smaller than the opening width W4 of the second window 133, and the diameter D1 of the inner copper ball 151 is larger than the opening width W4 of the second window 133 and smaller than the opening width W2 of the first window 113. This dimensional limitation restricts the opening diameter of the second window 133, preventing the inner copper ball 151 from directly extending into the second window 133 during fabrication and preventing the inner copper ball 151 from excessively collapsing into the opening.

[0046] In some embodiments, the height H1 of the molding compound 140 is greater than the diameter D1 of the inner copper ball 151 and less than the outer diameter D2 of the outer tin layer 152. Specifically, the height H1 of the molding compound 140 depends on the distance between the first solder mask 112 and the second solder mask 132. During actual soldering, H1 is greater than D1 and less than D2, which ensures that the outer tin layer 152 can extend into the first window 113 and the second window 133 respectively, while preventing the inner copper ball 151 from extending into the first window 113 and the second window 133. Preferably, the height H1 of the molding compound 140 is 200 μm.

[0047] In some embodiments, the spacing H2 between the inner copper ball 151 and the second pad 131 is greater than or equal to 5 μm and less than 20 μm. Specifically, the spacing H2 between the inner copper ball 151 and the second pad 131 represents the thickness of the outer tin layer 152. By reasonably limiting the thickness of the outer tin layer 152, the electrical connection effect can be guaranteed, while further ensuring the uniformity of the distribution of the outer tin layer 152 during soldering, thus avoiding exposure of the inner copper ball 151.

[0048] In some embodiments, the height of the inner copper ball 151 relative to the first substrate 110 is greater than the height of the first chip 120 relative to the first substrate 110. During actual soldering, the upper and lower sides of the inner copper ball 151 are flush with the surfaces of the first solder resist layer 112 and the second solder resist layer 132, respectively, while the height of the inner copper ball 151 is greater, so that the first chip 120 and the second solder resist layer 132 can also maintain a gap, thereby avoiding pressure on the first chip 120.

[0049] It should be noted that in this embodiment, the first chip 120 is a flip chip. The bottom side of the first chip 120 has bumps, and the first substrate 110 has a third pad. A third window is formed on the first solder mask layer 112. The third pad can be confined within the third serial port, and the bumps extend into the third window and connect to the third pad. A filler layer 121 is also provided on the bottom side of the flip chip, which provides protection for the fixed and soldered structures.

[0050] In some embodiments, the opening width W4 of the second window 133 is smaller than the width W3 of the second pad 131, so that the second solder mask layer 132 covers the edge of the second pad 131. The geometric center of the second window 133 coincides with the geometric center of the second pad 131. The smaller opening width of the second window 133 ensures that the second solder mask layer 132 can cover the edge area of ​​the second pad 131, providing edge protection and preventing etching solution from eroding the edge area of ​​the second pad 131.

[0051] Furthermore, the width W4 of the second window 133 is greater than or equal to 65% of the width W3 of the second pad 131. For example, the width of the second pad 131 is 230 μm, and the opening width of the second window 133 is 160 μm.

[0052] In some embodiments, the width of the opening W2 of the first window 113 is smaller than the width W1 of the first pad 111, so that the first solder mask layer 112 covers the edge of the first pad 111. The geometric center of the first window 113 coincides with the geometric center of the first pad 111. The smaller opening width of the first window 113 ensures that the first solder mask layer 112 can cover the edge area of ​​the first pad 111, providing edge protection and preventing etching solution from causing corrosion on the edge area of ​​the first pad 111.

[0053] Furthermore, the width W2 of the first window 113 is greater than or equal to 75% of the width W1 of the first pad 111. For example, the width of the first pad 111 is 220 μm, and the width of the first window 113 is 190 μm.

[0054] In some embodiments, the width W1 of the first pad 111 is less than or equal to the width W3 of the second pad 131. Specifically, the width of the first pad 111 is 220 μm, and the width of the second pad 131 is 230 μm, thereby ensuring the welding area. Of course, in other preferred embodiments of the present invention, the widths of the first pad 111 and the second pad 131 can be the same, thereby ensuring that the welding areas at both ends of the bonding ball 150 are the same.

[0055] See Figure 7 This utility model provides a packaging device 200, including a second chip 210 and a stacked packaging structure 100. The stacked packaging structure 100 includes a first substrate 110, a first chip 120, a second substrate 130, and a molding compound 140. A first pad 111 is provided on one side surface of the first substrate 110, and a first solder resist layer 112 is also provided on one side surface of the first substrate 110. A first window 113 is provided on the first solder resist layer 112, and the first pad 111 is confined within the first window 113. The first chip 120 is mounted on the first substrate 110. The second substrate 130 is disposed at intervals on the side of the first chip 120 away from the first substrate 110, and a bonding ball 150 is provided on the side of the second substrate 130 close to the first substrate 110. The bonding ball 150 corresponds to the first window 113 and is connected to the first pad 111. The molding compound 140 is filled between the first substrate 110 and the second substrate 130 and covers the bonding ball and the first chip 120. The second chip 210 is mounted on the side of the second substrate 130 away from the first substrate 110.

[0056] This utility model embodiment also provides a method for preparing a packaged device 200, which specifically includes the following steps:

[0057] S1: Provide a first substrate 110 and a second substrate 130.

[0058] Both the first substrate 110 and the second substrate 130 can be coreless or cored substrates, preferably both being coreless substrates to reduce the stacking thickness. Furthermore, both the first substrate 110 and the second substrate 130 can be composed of epoxy fiberglass board, Ajinomoto multilayer film, etc., and their specific wiring structure can refer to existing substrate structures. Additionally, both the first solder resist layer 112 and the second solder resist layer 132 are green paint layers, formed concurrently during the fabrication of the first substrate 110 and the second substrate 130, primarily serving as insulation and solder resist.

[0059] S2: Form bonding solder balls 150 on the second substrate 130.

[0060] See Figure 3 Specifically, balls are placed on the second pad 131 within the second window 133 on the second substrate 130 using a ball-planting method. Combined with the double-layer structure of inner copper ball 151 and outer tin layer 152, the inner copper ball 151 can improve support and reduce solder bridging.

[0061] S3: Attach the first chip 120 onto the first substrate 110.

[0062] See Figure 4 Specifically, the first chip 120 is a flip chip. After the chip is attached to the first substrate 110, the bottom of the soldering part of the flip chip is filled and protected by dispensing process and then baked.

[0063] S4: The second substrate 130 is mounted on the first substrate 110 and then encapsulated.

[0064] See Figure 5 Specifically, a hot-press welding process is used to weld the bonding ball 150 to the first pad 111 corresponding to the first window 113, with the copper ball 151 inside serving a supporting function. Then, a molding process is performed again, using molding compound to fill the area between the first substrate 110 and the second substrate 130 to form a molding layer 140.

[0065] S5: Forming solder balls on the first substrate 110.

[0066] See Figure 6Specifically, the ball-planting process is used again to form a connecting solder ball 114 on the side of the first substrate 110 away from the second substrate 130. This connecting solder ball 114 is a copper-free structure. Finally, the product is cut into individual pieces along the cutting path using the cutting process.

[0067] S6: Surface mount components.

[0068] See Figure 7 Finally, a second chip 210 is mounted on the second substrate 130. The second chip 210 is a flip chip and may be a module chip or a memory chip, etc.

[0069] In summary, the stacked packaging structure 100 and packaging device 200 provided in this embodiment of the present invention have a first pad 111 on one side surface of a first substrate 110, and a first solder resist layer 112 on the surface of the first substrate 110. A first window 113 is provided on the first solder resist layer 112, and the first pad 111 is confined within the first window 113. A first chip 120 is mounted on the first substrate 110, and a second substrate 130 is disposed at a distance from the first chip 120 on the side away from the first substrate 110. The second substrate 130 is provided with bonding solder balls 150, which correspond to the first window 113 and are connected to the first pad 111. A molding compound layer 140 is provided between the first substrate 110 and the second substrate 130. Compared to existing technologies, this invention confines the first solder pad 111 to the inside of the first solder resist layer 112, thereby preventing the first solder pad 111 from protruding. This structure creates a groove structure around the first solder pad 111 formed by the first window 113, which can receive the solder. On the one hand, it can better receive and bond the solder balls 150, and on the other hand, it can restrict the flow space of the solder during reflow soldering, thereby confining the solder around the first solder pad 111, improving the soldering effect and resulting in a better soldering effect.

[0070] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A stacked packaging structure, characterized in that, include: A first substrate has a first pad on one side surface and a first solder resist layer on another side surface. A first window is provided on the first solder resist layer, and the first pad is confined within the first window. The first chip is mounted on the first substrate; The second substrate is disposed at a distance from the first chip on the side away from the first substrate, and a bonding solder ball is disposed on the side of the second substrate close to the first substrate. The bonding solder ball corresponds to the first window and is connected to the first pad. A molding compound is provided between the first substrate and the second substrate, and covers the bonding solder balls and the first chip.

2. The stacked packaging structure according to claim 1, characterized in that, The second substrate is further provided with a second pad and a second solder resist layer on the side close to the first substrate. The second solder resist layer covers the surface of the first substrate and is provided with a second window exposing the second pad. The bonding solder ball is disposed in the second window and connected to the second pad.

3. The stacked packaging structure according to claim 2, characterized in that, The bonding solder ball includes an inner copper ball and an outer tin layer. The outer tin layer covers the inner copper ball and is simultaneously connected to the first pad and the second pad.

4. The stacked packaging structure according to claim 3, characterized in that, The opening width W2 of the first window is smaller than the opening width W4 of the second window, and the diameter D1 of the inner copper ball is larger than the opening width W4 of the second window and smaller than the opening width W2 of the first window.

5. The stacked packaging structure according to claim 3, characterized in that, The height H1 of the molding compound is greater than the diameter D1 of the inner copper ball and less than the outer diameter D2 of the outer tin layer.

6. The stacked packaging structure according to claim 5, characterized in that, The distance H2 between the inner copper ball and the second pad is greater than or equal to 5 μm and less than 20 μm.

7. The stacked packaging structure according to claim 6, characterized in that, The height of the inner copper ball relative to the first substrate is greater than the height of the first chip relative to the first substrate.

8. The stacked packaging structure according to claim 2, characterized in that, The opening width W4 of the second window is smaller than the width W3 of the second pad, so that the second solder mask layer covers the edge of the second pad.

9. The stacked packaging structure according to claim 8, characterized in that, The width W4 of the second window is greater than or equal to 65% of the width W3 of the second pad.

10. The stacked packaging structure according to claim 2, characterized in that, The width of the opening W2 of the first window is smaller than the width W1 of the first pad, so that the first solder mask layer covers the edge of the first pad.

11. The stacked packaging structure according to claim 10, characterized in that, The width W2 of the first window is greater than or equal to 75% of the width W1 of the first pad.

12. The stacked packaging structure according to claim 2, characterized in that, The width W1 of the first pad is less than or equal to the width W3 of the second pad.

13. A packaged device, characterized in that, It includes a second chip and a stacked package structure as described in any one of claims 1-12, wherein the second chip is mounted on the side of the second substrate away from the first substrate.