A wiring structure for optimizing impedance continuity of high-speed signal paths
By optimizing the trace width and spacing within the anti-pad area, the problem of large signal path impedance fluctuations in traditional differential distributed line structures is solved, thereby improving the impedance continuity and transmission quality of the signal path.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- EMDOOR ELECTRONICS TECH
- Filing Date
- 2025-06-03
- Publication Date
- 2026-06-05
AI Technical Summary
In existing technologies, traditional differential distributed line structures ignore the correlation between the traces in the anti-pad area and the via impedance, resulting in large overall impedance fluctuations in the signal path and failing to effectively compensate for the low impedance of the vias.
By optimizing the trace width and spacing within the anti-pad area, the impedance of the traces within the anti-pad area is made higher than that of the external traces, thereby synergistically improving the overall impedance of the differential traces. Specific measures include reducing the trace width of the internal traces, increasing the spacing between the traces, and maintaining the alignment of the center axis of the internal and external traces to improve the impedance continuity of the signal path.
It effectively compensates for the low impedance caused by the capacitive characteristics of signal vias, reduces impedance fluctuations in the signal path, and optimizes signal transmission quality.
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Figure CN224329651U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of circuit design, specifically to a wiring structure that optimizes the impedance continuity of high-speed signal paths. Background Technology
[0002] In the field of PCB design, the stability of high-speed signal transmission is crucial to the performance of electronic products. As the physical carrier of signal transmission, the high-speed signal vias on the printed circuit board are prone to low impedance due to their capacitive characteristics, becoming impedance abrupt points in the signal path and directly affecting signal integrity.
[0003] In existing technologies, traditional differential routing structures only focus on the impedance optimization of the signal vias themselves. They attempt to improve impedance continuity by adjusting the shape and size of the anti-pad. However, since the correlation between the traces in the anti-pad area and the via impedance is ignored, the improvement effect is not ideal and cannot effectively compensate for the low impedance problem of the vias. The overall impedance of the signal path still fluctuates considerably.
[0004] Therefore, how to improve the impedance matching between the traces and vias in the anti-pad area by optimizing the structural parameters of the traces in the anti-pad area, thereby solving the problem of impedance fluctuation in the entire signal path, has become a technical bottleneck that urgently needs to be overcome in the field of high-speed signal design. Utility Model Content
[0005] To address the problem that traditional differential routing structures fail to effectively compensate for low via impedance and large overall impedance fluctuations in signal paths due to neglecting the correlation between trace and via impedance in the anti-pad area, this invention provides a routing structure that optimizes the impedance continuity of high-speed signal paths.
[0006] The technical solution of this utility model is as follows:
[0007] A routing structure for optimizing the impedance continuity of high-speed signal paths includes a pair of signal vias, anti-pads surrounding the pair of signal vias, and a set of differential traces connected to the pair of signal vias. Each trace includes a trace within the anti-pad area and a trace outside the anti-pad area. The single-line width of the trace within the anti-pad area is smaller than the single-line width of the trace outside the anti-pad area. The spacing between two traces within the anti-pad area is greater than the spacing between two traces outside the anti-pad area. The impedance of the trace within the anti-pad area is higher than the impedance of the trace outside the anti-pad area.
[0008] As a preferred embodiment of this utility model, the ratio of the single line width of the trace within the anti-pad area to the single line width of the trace outside the anti-pad area is 1:2 to 3:4.
[0009] Preferably, the ratio of the single-line width of the trace within the anti-pad area to the single-line width of the trace outside the anti-pad area is 2:3.
[0010] As a preferred embodiment of this utility model, the ratio of the line spacing of the two traces within the anti-pad area to the line spacing of the two traces outside the anti-pad area is 8:5 to 4:3.
[0011] Preferably, the ratio of the line spacing between the two traces within the anti-pad area to the line spacing between the two traces outside the anti-pad area is 7:5.
[0012] As a preferred embodiment of this utility model, on the same trace, the trace within the anti-pad area is aligned with the center axis of the trace outside the anti-pad area.
[0013] As a preferred embodiment of this utility model, the center-to-center distance between the two signal vias is greater than 18 mil.
[0014] As a preferred embodiment of this utility model, the anti-pad is oblong, with a maximum length of 68mil and a maximum width of 33mil.
[0015] As a preferred embodiment of this utility model, the impedance of the signal via is 85Ω to 100Ω.
[0016] As a preferred embodiment of this utility model, the anti-solder pad is oblong, with its major axis equal to 68 mil and its minor axis equal to 33 mil.
[0017] The advantages of this utility model based on the above solution are as follows:
[0018] In the wiring structure of this utility model, the traces in the anti-pad area of the differential traces have a smaller trace width and a larger trace spacing. Compared with the existing differential trace structure, the trace width in the anti-pad area is reduced and the trace spacing in the anti-pad area is increased, thereby improving the overall differential trace impedance. This, in turn, raises the low-point impedance of adjacent vias, effectively compensating for the low impedance problem caused by the capacitive characteristics of signal vias, reducing impedance fluctuations in the signal path, optimizing the overall impedance continuity of the signal path, and thus improving signal transmission quality. Attached Figure Description
[0019] Figure 1 This is a schematic diagram of the structure of this utility model;
[0020] Figure 2 A schematic diagram of a traditional design;
[0021] Figure 3 Impedance curves for traditional wiring structures;
[0022] Figure 4 This is the impedance curve of this utility model.
[0023] In the diagram,
[0024] 1. Signal via; 2. Anti-pad; 3. Trace; 31. Trace within the anti-pad area; 32. Trace outside the anti-pad area. Detailed Implementation
[0025] To better understand the purpose, technical solution, and technical effects of this utility model, the following description, in conjunction with the accompanying drawings and embodiments, will provide further explanation. It should be noted that similar reference numerals and letters in the following drawings indicate similar items; therefore, once an item is defined in one drawing, it does not need further definition and explanation in subsequent drawings. It is also stated that the embodiments described below are only for explaining this utility model and are not intended to limit it.
[0026] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly on the other component or there may be an intermediate component. When a component is referred to as "connected to" another component, it can be directly connected to the other component or there may be an intermediate component.
[0027] The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product is usually placed when in use, or the orientation or positional relationship in which a person skilled in the art would normally understand it, or the orientation or positional relationship in which the product is usually placed when in use. It is only for the purpose of facilitating the description of this application and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0028] like Figure 1 As shown, a routing structure for optimizing the impedance continuity of a high-speed signal path includes a pair of signal vias 1, anti-pads 2 surrounding the pair of signal vias 1, and a set of differential traces connected to the pair of signal vias 1. Each trace 3 of the set of differential traces includes a trace 31 within the anti-pad area and a trace 32 outside the anti-pad area. The single-line width of the trace 31 within the anti-pad area is smaller than the single-line width of the trace 32 outside the anti-pad area. The line spacing between two traces 31 within the anti-pad area is greater than the line spacing between two traces 32 outside the anti-pad area. The impedance of the trace 31 within the anti-pad area is higher than the impedance of the trace 32 outside the anti-pad area.
[0029] This invention effectively compensates for the low impedance defect of signal via 1 by synergistically optimizing the line width and spacing of the trace 31 within the anti-pad area. Its principle is based on electromagnetic characteristics and transmission line theory. Specifically, when a high-speed signal passes through a via, the parasitic capacitance effect of the via causes a decrease in impedance in that area, forming impedance discontinuities. By reducing the line width and increasing the spacing of the trace 31 within the anti-pad area, according to the differential trace impedance formula:
[0030] Z diff =2×Z[1-0.37exp(-2.9s / b)], Z=[87 / √(ε r +1.41)]×ln[5.89h / (0.8w+t)], where Z diff Z represents the characteristic impedance of the differential trace, s represents the characteristic impedance of each individual wire in the differential trace, and ε represents the spacing between the differential pairs. r Let represent the dielectric constant, b represent the thickness between the reference planes, and t represent the copper thickness of the printed conductor. The formula shows that the smaller the line width and the larger the line spacing, the greater the differential trace impedance, which in turn increases the low-point impedance of adjacent vias.
[0031] Therefore, compared with the existing differential trace structure, this utility model, while keeping the shape and size of the anti-pad 2 unchanged, increases the overall trace impedance by reasonably reducing the trace width of the trace 31 in the anti-pad area and increasing the trace spacing, thereby raising the low-point impedance of adjacent vias and achieving the purpose of optimizing the overall impedance continuity of the signal path.
[0032] In this invention, the ratio of the single-line width of the trace 31 within the anti-pad area to the single-line width of the trace 32 outside the anti-pad area is 1:2 to 3:4. This ratio range ensures that the reduction in line width meets the PCB manufacturing process requirements while also increasing the impedance by 1.05 to 1.2 times through reasonable impedance enhancement, raising the impedance at the low point of the via, and reducing the overall impedance fluctuation of the signal path. In one specific embodiment, the line width of the trace 32 outside the anti-pad area is 6 mil, and the line width of the trace 31 within the anti-pad area is 4 mil, with a line width ratio of 2:3.
[0033] In this invention, the ratio of the line spacing of the two traces 31 within the anti-pad region to the line spacing of the two traces 32 outside the anti-pad region is 8:5 to 4:3, which can synergistically improve the impedance of the traces 31 within the anti-pad region. Based on the coupling effect of differential traces: taking a stripline structure as an example, when the line spacing increases, the exponential term decreases, leading to Z... diff (Differential trace characteristic impedance) increases. In one specific embodiment, the line spacing of the two traces 31 within the anti-pad area is 7 mil, and the line spacing of the two traces 32 outside the anti-pad area is 5 mil, with a ratio of 7:5 between the two line spacings.
[0034] In this invention, within a set of differential traces, the central axis of trace 31 within the anti-pad region and trace 32 outside the anti-pad region of the same trace are aligned. This avoids abrupt signal path changes caused by central axis misalignment, preventing additional impedance changes and signal reflections. Furthermore, central axis alignment allows the differential traces to maintain a symmetrical structure during transitions between regions, preserving the uniformity of the electromagnetic field distribution and thus reducing the risk of signal distortion.
[0035] In this invention, the differential signal characteristic impedance of signal via 1 is 85Ω to 100Ω, which covers the typical impedance requirements of high-speed differential signals.
[0036] In one verification example, the center-to-center distance between the two signal vias 1 is 20 mil, the differential signal characteristic impedance of the signal via 1 is 93 ohms, the shape of the anti-pad is designed as an elongated oval, the major axis of the anti-pad 2 is 68 mil, and the minor axis is 33 mil; where the major axis value refers to the distance between the farthest ends of the elongated oval along its length, and the minor axis value refers to the distance between the two parallel sides of the elongated oval along its width.
[0037] like Figure 2 and Figure 3 As shown, in the traditional routing structure design, the parameters of trace 31 within the anti-pad area and trace 32 outside the anti-pad area of the differential routing are the same: a single trace width of 6 mil and a spacing of 5 mil between the two traces. At this time, the measured differential via impedance of the traditional routing structure is 86.8 ohms, and the deviation between the differential via impedance and the characteristic impedance (93 ohms) is 6.2 ohms.
[0038] like Figure 4 As shown, in the structural design of this utility model, the trace 32 outside the anti-pad area of the differential trace maintains the following parameters: single trace width equal to 6 mil, and the spacing between two traces equal to 5 mil; while the trace 31 within the anti-pad area has a single trace width of 4 mil and a spacing between two traces of 7 mil. At this time, the measured differential via impedance of this utility model is 89.1 ohms, and the deviation between the differential via impedance and the characteristic impedance (93 ohms) is 3.9 ohms; compared with the traditional wiring structure, the signal path impedance fluctuation is reduced by 2.3 ohms, and the impedance fluctuation is reduced by 37.1%.
[0039] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0040] The above embodiments only illustrate several implementation methods of this utility model, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.
Claims
1. A routing structure for optimizing the impedance continuity of a high-speed signal path, comprising a pair of signal vias, anti-pads surrounding the pair of signal vias, and a set of differential traces connected to the pair of signal vias, each trace comprising a trace within the anti-pad area and a trace outside the anti-pad area, characterized in that, The single-line width of the traces within the anti-pad area is smaller than the single-line width of the traces outside the anti-pad area; the line spacing between two traces within the anti-pad area is greater than the line spacing between two traces outside the anti-pad area; and the impedance of the traces within the anti-pad area is higher than the impedance of the traces outside the anti-pad area.
2. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 1, characterized in that, The ratio of the single-line width of the trace within the anti-pad area to the single-line width of the trace outside the anti-pad area is 1:2 to 3:
4.
3. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 2, characterized in that, The ratio of the single-line width of the trace within the anti-pad area to the single-line width of the trace outside the anti-pad area is 2:
3.
4. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 1, characterized in that, The ratio of the line spacing of the two traces within the anti-pad area to the line spacing of the two traces outside the anti-pad area is 8:5 to 4:
3.
5. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 4, characterized in that, The ratio of the line spacing between the two traces within the anti-pad area to the line spacing between the two traces outside the anti-pad area is 7:
5.
6. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 1, characterized in that, On the same trace, the traces within the anti-pad area are aligned with the centerline of the traces outside the anti-pad area.
7. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 1, characterized in that, The center-to-center distance between the two signal vias is greater than 18 mil.
8. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 1, characterized in that, The anti-pad is oblong, with a maximum length of 68 mil and a maximum width of 33 mil.
9. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 1, characterized in that, The impedance of the signal via is 85Ω to 100Ω.
10. The wiring structure for optimizing the impedance continuity of high-speed signal paths according to claim 1, characterized in that, The anti-pad is oblong, with a major axis of 68 mil and a minor axis of 33 mil.