Display device and electronic device

Abstract

A display device and an electronic device are provided. The display device includes a plurality of pixels each including a first emission area, a second emission area, and a third emission area; a plurality of color filters arranged in the emission areas of the plurality of pixels and in non-emission areas at a periphery of the emission areas; a first light-blocking layer formed by overlapping at least two of the plurality of color filters in the non-emission areas; and a second light-blocking layer arranged on the first light-blocking layer and surrounding the emission areas of a sub-group of the plurality of pixels, wherein a color filter arranged at a lower portion of the first light-blocking layer includes an annular opening surrounding the emission areas of the sub-group of the plurality of pixels.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to and benefits derived therefrom of Korean Patent Application No. 10-2024-0083777, filed with the Korean Patent Office on June 26, 2024, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] This disclosure relates to display devices. Background Technology

[0004] In today's information society, the demand for display devices that can display images in various ways is growing. To meet this growing demand, various types of display devices, including light-emitting display devices, are being developed. Utility Model Content

[0005] This disclosure provides a display device capable of changing the side viewing angle of an image displayed in a display area and preventing light leakage from side light emitted from at least some pixels.

[0006] However, the aspects of this disclosure are not limited to those set forth herein. The foregoing and other aspects of this disclosure will become more apparent to those skilled in the art upon reference to the detailed description of this disclosure given below.

[0007] According to one aspect of this disclosure, a display device is provided, comprising: a plurality of pixels, each of the plurality of pixels including an emission region comprising a first emission region, a second emission region, and a third emission region, and a light-emitting element disposed in the emission region; a first color filter disposed on the light-emitting element and disposed in the first emission region of the plurality of pixels and in a non-emission region at the periphery of the emission region; a second color filter disposed on the light-emitting element and disposed in the second emission region and the non-emission region of the plurality of pixels; a third color filter disposed on the light-emitting element and disposed in the third emission region and the non-emission region of the plurality of pixels; a first light-blocking layer formed by overlapping at least two of the first, second, and third color filters in the non-emission region; and a second light-blocking layer disposed on the first light-blocking layer and surrounding the emission region of a subgroup of the plurality of pixels, wherein the color filter disposed at the lowermost portion of the first light-blocking layer includes an annular opening surrounding the emission region of the subgroup of the plurality of pixels.

[0008] In one embodiment, the annular opening may be filled with other color filters arranged on top of the color filter at the bottom of the first light-blocking layer.

[0009] In an embodiment, the plurality of pixels may include a first pixel and a second pixel, wherein a second light-blocking layer is disposed in the second pixel but not in the first pixel, and the second light-blocking layer may be disposed in the non-emitting region of the second pixel and may surround the emitting region of the second pixel.

[0010] In one embodiment, the annular opening may not be located in the non-emissive region of the first pixel, but may be located in the non-emissive region of the second pixel.

[0011] In one embodiment, the annular opening may be arranged in the non-emissive region of the first pixel and in the non-emissive region of the second pixel.

[0012] In an embodiment, the number of annular openings arranged in the non-emissive region of the first pixel and the number of annular openings arranged in the non-emissive region of the second pixel may be different.

[0013] In an embodiment, the number of annular openings arranged in the non-emissive region of the second pixel may be greater than the number of annular openings arranged in the non-emissive region of the first pixel.

[0014] In an embodiment, the size of the annular opening arranged in the non-emissive region of the first pixel and the size of the annular opening arranged in the non-emissive region of the second pixel may be different.

[0015] In one embodiment, the size of the annular opening arranged in the non-emissive region of the second pixel may be larger than the size of the annular opening arranged in the non-emissive region of the first pixel.

[0016] In an embodiment, the first light-blocking layer may include an opening in the emission region of the first pixel and an opening in the emission region of the second pixel, and the size of the opening of the first light-blocking layer in the emission region of the first pixel and the size of the opening of the first light-blocking layer in the emission region of the second pixel may be different.

[0017] In one embodiment, the size of the opening in the emission region of the first light-blocking layer of the first light-blocking layer may be larger than the size of the opening in the emission region of the second pixel.

[0018] In an embodiment, the light-emitting element may include a corresponding pixel electrode disposed in the emission region of the first pixel and the second pixel, a corresponding light-emitting layer disposed on the pixel electrode, and a common electrode disposed on the light-emitting layer.

[0019] In an embodiment, the separation distance between the opening of the first light-blocking layer in the emission region of the first pixel and the pixel electrode arranged in the first pixel may be greater than the separation distance between the opening of the first light-blocking layer in the emission region of the second pixel and the pixel electrode arranged in the second pixel.

[0020] In this embodiment, the sizes of the first emission region, the second emission region, and the third emission region of each pixel may be different.

[0021] In an embodiment, in a subgroup of multiple pixels, at least one of the sizes and numbers of two or more annular openings of the first light-blocking layer surrounding the first emission region, the first light-blocking layer surrounding the second emission region, and the first light-blocking layer surrounding the third emission region may be different.

[0022] In an embodiment, the color filter among the first, second, and third color filters, which is disposed at the middle layer of the first light-blocking layer, may include an annular opening surrounding the emission region of a subgroup of multiple pixels.

[0023] In an embodiment, the annular opening of the color filter disposed in the middle layer of the first light-blocking layer may not overlap with the annular opening of the color filter disposed in the lowest part of the first light-blocking layer.

[0024] In an embodiment, the color filter among the first, second, and third color filters located at the uppermost part of the first light-blocking layer may not include the annular opening in the non-emissive region.

[0025] In an embodiment, each of the plurality of pixels may include a first light-emitting element disposed in a first emission region and emitting red light, a second light-emitting element disposed in a second emission region and emitting green light, and a third light-emitting element disposed in a third emission region and emitting blue light, and the first color filter, the second color filter and the third color filter may selectively transmit red light, green light and blue light, respectively.

[0026] In an embodiment, the first or third color filter may be disposed at the bottom of the first light-blocking layer in the non-emissive region, and the second color filter may be disposed at the top of the first light-blocking layer in the non-emissive region.

[0027] According to the display device of the embodiment, the light emission angle or side viewing angle of pixels arranged in the display area can be distinguished or optimized by the first light-blocking layer and the second light-blocking layer. Therefore, the side viewing angle of the image displayed in the display area can be appropriately or easily changed in response to each emission mode selected by the user.

[0028] Furthermore, according to the display device of the embodiment, a first light-blocking layer can be formed by stacking color filters arranged in each of the plurality of emitting regions in the non-emitting regions. Therefore, the manufacturing efficiency of the display device can be increased.

[0029] Additionally, according to the display device of the embodiment, annular openings can be formed in color filters arranged at the bottom of the first light-blocking layer in at least some of the plurality of pixels (including pixels in which the light emission angle or side viewing angle is limited to a narrow range). Therefore, the light-blocking function of the first light-blocking layer formed by stacking color filters can be improved, and light leakage of side light can be effectively prevented.

[0030] On the other hand, this disclosure relates to an electronic device including a display device having a plurality of first pixels, a plurality of second pixels, and a display driver for transmitting data to the plurality of first pixels and the plurality of second pixels to display an image. Each of the plurality of second pixels includes: a first emitting region, a second emitting region, and a third emitting region separated by a non-emitting region; a first light-blocking layer having a lower color filter and an upper color filter overlapping in the non-emitting region; and a second light-blocking layer disposed on the first light-blocking layer and surrounding the first emitting region, the second emitting region, and the third emitting region. The lower color filter of the first light-blocking layer has an annular opening surrounding the first emitting region, the second emitting region, and the third emitting region. However, the effects of embodiments according to this disclosure are not limited to the effects exemplified above, and various other effects are included herein. Attached Figure Description

[0031] The above and other aspects and features of this disclosure will become more apparent from the detailed description of embodiments thereof with reference to the accompanying drawings, in which:

[0032] Figure 1 This is a perspective view of an electronic device according to one embodiment;

[0033] Figure 2 This is a perspective view illustrating a display device included in an electronic device according to one embodiment;

[0034] Figure 3 It was viewed from the side. Figure 2 A cross-sectional view of the display device;

[0035] Figure 4 This is a plan view of the display area of ​​a display device according to one embodiment;

[0036] Figure 5 This is a plan view of a pixel electrode according to one embodiment;

[0037] Figure 6 This is a plan view illustrating a pixel electrode, a first light-blocking layer, and a color filter according to one embodiment;

[0038] Figure 7 This is a plan view of a pixel electrode and a second light-blocking layer according to one embodiment;

[0039] Figure 8 This is a plan view of the display area of ​​a display device according to one embodiment;

[0040] Figure 9 This is a cross-sectional view of a display device according to one embodiment;

[0041] Figure 10 This is a cross-sectional view of a display device according to one embodiment;

[0042] Figure 11 This is a cross-sectional view of a display device according to one embodiment;

[0043] Figure 12 This is a cross-sectional view of a display device according to one embodiment;

[0044] Figure 13 This is a cross-sectional view of a display device according to one embodiment;

[0045] Figure 14 This is a cross-sectional view of a display device according to one embodiment;

[0046] Figure 15 This is a plan view of a first color filter according to one embodiment;

[0047] Figure 16 This is a plan view of a second color filter according to one embodiment;

[0048] Figure 17 The diagram illustrates a plan view of a third color filter according to one embodiment; and

[0049] Figures 18 to 21 This is a plan view of the third color filter according to an embodiment. Detailed Implementation

[0050] The present disclosure will now be described more fully with reference to the accompanying drawings, in which preferred embodiments are illustrated. However, the present disclosure may be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0051] It will also be understood that when an element or layer is referred to as being "on" another element or layer, the element can be directly on the other element or layer, or an intervening layer may also be present. Throughout the specification, the same reference numerals indicate the same parts.

[0052] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited to any particular order or priority of these terms. These terms are used only to distinguish one element from another. For example, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

[0053] Features of each of the various embodiments of this disclosure may be combined partially or completely with each other and may interact with each other technically differently, and the corresponding embodiments may be implemented independently of each other or may be implemented together in association with each other.

[0054] Figure 1 This is a perspective view illustrating an electronic device according to one embodiment.

[0055] refer to Figure 1 Electronic device 1 displays moving or still images. Electronic device 1 can refer to any electronic device that provides a display screen. Examples of electronic device 1 may include televisions, laptops, monitors, billboards, Internet of Things devices, mobile phones, smartphones, tablet PCs, electronic watches, smartwatches, watch phones, head-mounted displays, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, game consoles, digital cameras, portable video cameras, etc.

[0056] Electronic device 1 may include a display device that provides a display screen (e.g., Figure 2 The display device 10). In one embodiment, the display device may be a light-emitting display device including a light-emitting element such as an inorganic light-emitting diode or an organic light-emitting diode, but is not limited thereto. For example, although a light-emitting display device including an organic light-emitting diode is described as a display device to which the embodiment is applicable, the apparatus or field to which the embodiment is applicable is not limited thereto. For example, the embodiment may also be applied to other types of display devices.

[0057] The shape of electronic device 1 can be modified. For example, electronic device 1 may have shapes such as a horizontally elongated rectangular shape, a vertically elongated rectangular shape, a square shape, a substantially quadrilateral shape with rounded corners, other polygonal shapes, and circular shapes. In one embodiment, the shape of the display area DA of electronic device 1 may be similar to, but is not limited to, the overall shape of electronic device 1. Figure 1 For example, an electronic device 1 has a rectangular shape that is longer in the second direction DR2 than in the first direction DR1.

[0058] Electronic device 1 may include a display area DA and a non-display area NDA. The display area DA is the area in which an image can be displayed, and the non-display area NDA is the area in which an image is not displayed. The display area DA may also be referred to as an active area, and the non-display area NDA may also be referred to as a non-active area. The display area DA may substantially occupy the center of electronic device 1.

[0059] The display area DA may include a first display area DA1, a second display area DA2, and a third display area DA3. The second display area DA2 and the third display area DA3 are areas where components for adding various functions to the electronic device 1 are arranged, and the second display area DA2 and the third display area DA3 may correspond to the component areas. Although Figure 1 An embodiment in which the electronic device 1 includes two component regions is shown, but the number or orientation of the component regions is not limited.

[0060] Figure 2 This is a perspective view illustrating a display device included in an electronic device according to one embodiment.

[0061] refer to Figure 2 According to one embodiment, the electronic device 1 may include a display device 10. The display device 10 provides a screen for the electronic device 1. The display device 10 may have a planar shape similar to the shape of the electronic device 1. For example, the display device 10 may have a shape similar to a rectangle having a short side in a first direction DR1 and a long side in a second direction DR2. The edges where the short side in the first direction DR1 and the long side in the second direction DR2 intersect may be rounded, but are not limited thereto, and may be formed as right angles. The planar shape of the display device 10 is not limited to a quadrilateral shape, and may have another polygonal shape, a circular shape, an elliptical shape, or another shape.

[0062] The display device 10 may include a display panel 100, a display driver 200, a circuit board 300, and a touch driver 400.

[0063] Display panel 100 may include a main area MA and a sub-area SBA.

[0064] The main area MA may include pixels containing the image to be displayed (e.g., Figure 4 The main area MA has a display area DA (pixels PX) and a non-display area NDA arranged around the display area DA. The display area DA may be arranged in the center of the main area MA, and the non-display area NDA may surround the display area DA.

[0065] The display area DA may include a first display area DA1, a second display area DA2, and a third display area DA3. The display area DA may include the emission area (or aperture area) of a pixel, and light may be emitted from the emission area.

[0066] The display panel 100 may include light-emitting elements and pixel circuitry (e.g., pixel circuitry including transistors and capacitors) for pixels, as well as pixel defining films that define the emission regions of the pixels. The light-emitting element for each of the plurality of pixels may be arranged in the emission region of the respective pixel. In one embodiment, the light-emitting element may include, but is not limited to, an organic light-emitting diode (LED) including an organic light-emitting layer, a quantum dot LED including a quantum dot light-emitting layer, an inorganic LED including inorganic semiconductors, and an ultra-small light-emitting diode such as a micro LED or a nano LED.

[0067] The non-display area NDA can be the area outside the display area DA. The non-display area NDA can be defined as the edge area of ​​the main area MA of the display panel 100. In one embodiment, the non-display area NDA may include a gate driver (not shown) that supplies gate signals to the gate line and a fan-out line (not shown) that connects the display driver 200 to the display area DA.

[0068] A sub-region SBA may be a region extending from one side of a main region MA. The sub-region SBA may comprise a flexible material capable of being bent, folded, or rolled. For example, when the sub-region SBA is bent (or folded), it may overlap with the main region MA in the thickness direction (third direction DR3). For example, when the display device 10 is bent within the sub-region SBA, at least a portion of the sub-region SBA, including the area where the display driver 200 is disposed and the area where the pad portion connected to the circuit board 300 is disposed, may be disposed below the main region MA.

[0069] The sub-area SBA may include a display driver 200 and pad portions connected to the circuit board 300. In another embodiment, the sub-area SBA may be omitted, and the display driver 200 and pad portions may be arranged in the non-display area NDA. In another embodiment, the display driver 200 may be arranged on the circuit board 300 connected to the display panel 100 and may be electrically connected to the display panel 100 via the pad portions.

[0070] The display driver 200 can output drive signals and drive voltages for driving the display panel 100. For example, the display driver 200 can supply data voltages to data lines, drive voltages (e.g., first pixel voltage (or anode voltage) and second pixel voltage (or cathode voltage)) to power lines, and supply gate control signals to gate drivers. In one embodiment, the display driver 200 can be formed as an integrated circuit (IC) and mounted on the display panel 100 by a chip-on-glass (COG) method, a chip-on-plastic (COP) method, or an ultrasonic bonding method.

[0071] The circuit board 300 can be attached to the pad portion of the display panel 100 using an anisotropic conductive film (ACF) or similar material. The leads of the circuit board 300 can be electrically connected to the pad portion of the display panel 100. In one embodiment, the circuit board 300 can be a flexible printed circuit board, a rigid printed circuit board, or a flexible film such as a chip-on-film.

[0072] Touch driver 400 may be mounted on circuit board 300. Touch driver 400 may be connected to touch sensing unit of display panel 100. Touch driver 400 may supply each touch drive signal to touch electrodes of touch sensing unit and may sense the amount of capacitance change formed between touch electrodes. In one embodiment, touch drive signal may be pulse signal with a predetermined frequency. Touch driver 400 may detect whether a touch input has occurred and its coordinates based on the amount of capacitance change between touch electrodes. In one embodiment, touch driver 400 may be formed as integrated circuit (IC).

[0073] Figure 3 It was viewed from the side. Figure 2 A cross-sectional view of the display device. Figure 3 The illustration shows that in Figure 2 The sub-area SBA of the display panel 100 in the display device 10 is in a bent state.

[0074] refer to Figure 3 The display panel 100 may include a display layer DU, a touch sensing layer TSU, a color filter layer CFL, and a light-blocking component layer PML. Although in Figure 3 The diagram shows the color filter layer CFL and the light blocking component layer PML, but the color filter layer CFL and the light blocking component layer PML can be integrated into a single light control layer.

[0075] The display layer DU may include a substrate SUB, a thin-film transistor layer (TFTL), a light-emitting element layer (EML), and a packaging layer (TFEL). In some embodiments, the display layer DU may not include a substrate SUB (see [link to documentation]). Figures 9-14 ).

[0076] The substrate SUB can be a base substrate or a base component. The substrate SUB can be a flexible substrate capable of being bent, folded, or rolled, but is not limited thereto. In one embodiment, the substrate SUB may comprise a polymer resin such as polyimide (PI). In another embodiment, the substrate SUB may comprise a glass material or a metallic material.

[0077] A thin-film transistor layer (TFTL) may be disposed on a substrate SUB. The TFTL may include circuit elements constituting pixel circuitry, such as thin-film transistors and capacitors. The TFTL may also include wiring. For example, the TFTL may include gate lines, data lines, power lines, gate control lines, fan-out lines connecting the display driver 200 to the data lines, and leads connecting the display driver 200 to pad portions. Each of the plurality of thin-film transistors may include a semiconductor region, a source electrode, a drain electrode, and a gate electrode. In one embodiment, when the display panel 100 includes a gate driver disposed in a non-display area NDA, the TFTL may also include circuit elements constituting the gate driver.

[0078] The thin-film transistor layer (TFTL) can be arranged in the display area (DA), the non-display area (NDA), and the sub-area (SBA). The circuit elements constituting the pixel, as well as the gate lines, data lines, and power lines electrically connected to the pixel, can be arranged in the display area (DA) of the TFTL. The gate lines, data lines, and power lines can extend to the non-display area (NDA) of the TFTL and can be electrically connected to the gate driver, display driver 200, or pad portion, respectively. Gate control lines and fan-out lines can be arranged in the non-display area (NDA) of the TFTL. Leads can be arranged in the sub-area (SBA) of the TFTL.

[0079] A light-emitting element layer (EML) may be disposed on a thin-film transistor layer (TFTL). The EML may include a pixel defining film defining an emission region of a pixel and light-emitting elements disposed in the emission regions. Each emission region may be disposed in each pixel region of a display region DA. For example, a pixel region in which a corresponding pixel of the display region DA is disposed may include a pixel circuit region in which circuit elements constituting pixel circuitry of the corresponding pixel are disposed, and an emission region in which light-emitting elements of the corresponding pixel are disposed. In one embodiment, the emission region and pixel circuit region of each pixel may overlap each other on a third-direction DR3.

[0080] The light-emitting element may include a first electrode and a second electrode facing each other, and a light-emitting layer between the first electrode and the second electrode. In one embodiment, the first electrode of the light-emitting element may be... Figure 4 Corresponding to the pixel electrodes shown in the following figures, and the second electrode of the light-emitting element may be associated with... Figure 9Corresponding to the common electrode shown in the following figures. In one embodiment, the light-emitting layer may be an organic light-emitting layer comprising organic materials. The light-emitting layer may include a hole transport layer, an organic light-emitting layer, and an electron transport layer. When a first pixel voltage (e.g., an anode voltage) is applied to the first electrode of the light-emitting element through at least one of a plurality of thin-film transistors in each pixel circuit, and a second pixel voltage (e.g., a cathode voltage) is applied to the second electrode of the light-emitting element through electric field lines, holes and electrons may recombine in the organic light-emitting layer, and the light-emitting element may emit light. In another embodiment, the light-emitting element may be another type of light-emitting element, such as a quantum dot light-emitting diode including a quantum dot light-emitting layer, an inorganic light-emitting diode including inorganic semiconductors, a micro light-emitting diode, or a nano light-emitting diode.

[0081] The encapsulation layer TFEL can cover the top and side surfaces of the light-emitting element layer EML and protect the light-emitting element layer EML. In one embodiment, the encapsulation layer TFEL may include at least one inorganic film and at least one organic film for encapsulating the light-emitting element layer EML. For example, the encapsulation layer TFEL may include multiple inorganic encapsulation layers and an organic encapsulation layer between the multiple inorganic encapsulation layers.

[0082] The touch sensing layer TSU can be disposed on the display layer DU. For example, the touch sensing layer TSU can be disposed or formed on the encapsulation layer TFEL, or the touch sensing layer TSU can be disposed on a separate substrate disposed on the display layer DU.

[0083] The touch sensing layer (TSU) may include touch electrodes for sensing user touch input and touch lines electrically connecting the touch electrodes to the touch driver 400. In one embodiment, the touch sensing layer (TSU) may sense the user's touch using mutual capacitance or self-capacitance, and the touch electrodes may have a shape suitable for constituting a mutual capacitance touch sensor or a self-capacitance touch sensor. For example, the touch electrodes may include driving electrodes and sensing electrodes extending and / or connected in different directions to constitute a mutual capacitance touch sensor, or may include touch electrodes arranged at points corresponding to respective touch nodes to constitute a self-capacitance touch sensor.

[0084] The touch electrodes of the touch sensing layer TSU can be arranged in the touch sensor area overlapping with the display area DA. The touch lines electrically connected to the touch electrodes of the touch sensing layer TSU can be arranged in the peripheral area overlapping with the non-display area NDA.

[0085] A color filter layer (CFL) may be disposed on the touch sensing layer (TSU). The CFL may include color filters corresponding to respective emission regions of a pixel. Each of the plurality of color filters may selectively transmit light of a specific wavelength and may block or absorb light of different wavelengths. In one embodiment, the CFL may further include a first light-blocking layer (or a first light-blocking pattern forming the first light-blocking layer) surrounding the emission region of the pixel. The first light-blocking layer may be formed separately from the color filters using individual light-blocking materials, or it may be formed by overlapping color filters that block different wavelengths of light.

[0086] The color filter layer (CFL) absorbs some of the light from outside the display device 10 to reduce reflected light. Color distortion caused by the reflection of external light can be prevented by the color filter layer (CFL).

[0087] In one embodiment, the color filter layer CFL can be disposed directly on the touch sensing layer TSU. Therefore, the display device 10 may not require a separate substrate for the color filter layer CFL, and thus avoids the increase in thickness due to an additional substrate.

[0088] The light-blocking component layer (PML) may be disposed on the color filter layer (CFL). The light-blocking component layer (PML) may include a second light-blocking layer (or a second light-blocking pattern forming the second light-blocking layer) disposed corresponding to a specific pixel of the display layer (DU). For example, the light-blocking component layer (PML) may include a second light-blocking layer that is directly adjacent to and surrounds the emission region of a specific pixel in a plan view.

[0089] A light-blocking layer (PML) can limit the viewing angle of an image displayed by a specific pixel. For example, display device 10 includes a light-blocking layer (PML), and thus can control visibility at a specific viewing angle and provide a privacy protection mode for the user.

[0090] In some embodiments, the display device 10 may further include components arranged in the component region (e.g., Figure 1 and Figure 2 The optical device 500 is located in the second display area DA2 or the third display area DA3. The optical device 500 can emit or receive light in the infrared, ultraviolet and visible light bands. For example, the optical device 500 can be an optical sensor that detects light incident on the display device 10, such as a proximity sensor, illuminance sensor and camera sensor or image sensor.

[0091] Figure 4 This is a plan view illustrating the display area of ​​a display device according to one embodiment. For example, Figure 4 A pixel electrode AE ​​arranged in a display area DA of a display device 10 according to one embodiment is shown, along with a first light-blocking layer BM1 and a second light-blocking layer BM2 arranged around the pixel electrode AE.

[0092] Figure 5 This is a plan view illustrating a pixel electrode according to one embodiment. For example, Figure 5 The arrangement in Figure 4 The pixel electrode AE ​​in region A1 and the emission region EA in which the pixel electrode AE ​​is arranged.

[0093] Figure 6 This is a plan view illustrating a pixel electrode, a first light-blocking layer, and a color filter according to one embodiment. For example, Figure 6 The arrangement in Figure 4 The pixel electrode AE ​​in region A1, and the first light-blocking layer BM1 and color filter CF arranged around the pixel electrode AE.

[0094] Figure 7 This is a plan view illustrating a pixel electrode and a second light-blocking layer according to one embodiment. For example, Figure 7 The arrangement in Figure 4 The pixel electrode AE ​​in region A1 and the second light-blocking layer BM2 arranged around the pixel electrode AE.

[0095] refer to Figures 4 to 7 The display device 10 may include pixels PX arranged in the display area DA. In one embodiment, pixels PX may be arranged on a fourth direction DR4 and a fifth direction DR5 between the first direction DR1 and the second direction DR2. In one embodiment, the fourth direction DR4 and the fifth direction DR5 may be diagonal directions relative to the first direction DR1 and the second direction DR2.

[0096] In one embodiment, each of the plurality of pixels PX may include a plurality of pixel electrodes AE. For example, each of the plurality of pixels PX may include a first pixel electrode AE1, a second pixel electrode AE2, and a third pixel electrode AE3. In one embodiment, a pixel PX may include one first pixel electrode AE1, two second pixel electrodes AE2, and one third pixel electrode AE3. However, the embodiments are not limited thereto, and the number of pixel electrodes AE arranged in the pixel PX may vary.

[0097] A pixel electrode AE ​​may be the first electrode of a light-emitting element included in each pixel PX, for example, a positive electrode. In one embodiment, a pixel PX may include a plurality of light-emitting elements and a plurality of pixel circuits electrically connected to the plurality of light-emitting elements respectively. Each pixel circuit may be electrically connected to at least one light-emitting element. Each pixel circuit and at least one light-emitting element connected to the pixel circuit may constitute each sub-pixel.

[0098] Figures 4 to 7 Each pixel electrode AE ​​shown may be the entire pixel electrode AE ​​or a portion of the pixel electrode AE ​​exposed by an opening in the pixel-defined film. For example, Figures 4 to 7 The portion or element indicated as a pixel electrode AE ​​may be the portion (e.g., the central portion) of each of a plurality of pixel electrodes AEs that is not covered by the pixel-defining film. On each pixel electrode AE, a light-emitting layer comprising a light-emitting element including the pixel electrode AE ​​and a second electrode (e.g., a common electrode) may be disposed.

[0099] In one embodiment, a pixel PX may include multiple light-emitting elements that emit light of different colors. For example, a light-emitting element including a first pixel electrode AE1 (e.g., a first light-emitting element) may emit light of a first color (e.g., red light). A light-emitting element including a second pixel electrode AE2 (e.g., a second light-emitting element) may emit light of a second color (e.g., green light), and a light-emitting element including a third pixel electrode AE3 (e.g., a third light-emitting element) may emit light of a third color (e.g., blue light). Therefore, a pixel PX may emit any one of the first, second, and third colors of light, or a mixture of at least two of the first, second, and third colors of light. For example, all light-emitting elements included in a pixel PX may emit light such that white light can be emitted from the pixel PX. However, the type, number, and arrangement of the pixel electrodes AE and the light-emitting elements including them in a pixel PX may vary depending on the embodiment.

[0100] like Figure 5 As shown, pixel electrodes AE can be arranged in the emission region EA of each pixel PX. Each pixel PX may include a plurality of emission regions EA, including a first emission region EA1 emitting light of a first color, a second emission region EA2 emitting light of a second color, and a third emission region EA3 emitting light of a third color. In one embodiment, a pixel PX may include one first emission region EA1, two second emission regions EA2, and one third emission region EA3, but the embodiment is not limited thereto. The first pixel electrode AE1 may be arranged in the first emission region EA1, the second pixel electrode AE2 may be arranged in the second emission region EA2, and the third pixel electrode AE3 may be arranged in the third emission region EA3. A light-emitting element including each pixel electrode AE ​​may be arranged in each emission region EA.

[0101] In one embodiment, each emission region EA may include a pixel electrode AE ​​formed in a pixel-defined film (e.g., Figure 9 The area exposed by the opening in the pixel-defined film (PDL). In addition, each emission region EA, which is not blocked by the first light-blocking layer BM1 and the second light-blocking layer BM2, can be a light-transmitting region through which light generated by the light-emitting element including each pixel electrode AE ​​is transmitted.

[0102] In one embodiment, the pixel electrode AE ​​can be arranged as follows: Types, for example, rhombus Types. For example, the first pixel electrode AE1 and the third pixel electrode AE3 may be spaced apart from each other in the second direction DR2, and may be arranged alternately in the first direction DR1 and the second direction DR2. In each pixel PX, the first pixel electrode AE1 and the third pixel electrode AE3 may be spaced apart from each other in the second direction DR2, and the first pixel electrode AE1 and the third pixel electrode AE3 may be spaced apart from the second pixel electrode AE2 in the fourth direction DR4 or the fifth direction DR5. The second pixel electrode AE2 may be arranged repeatedly along the first direction DR1 and the second direction DR2. The second pixel electrode AE2 and the first pixel electrode AE1 or the second pixel electrode AE2 and the third pixel electrode AE3 may be arranged alternately along the fourth direction DR4 or the fifth direction DR5. However, the embodiments are not limited to this, and the arrangement of the pixel electrodes AE can be changed in various ways.

[0103] In one embodiment, the sizes (e.g., areas) of the first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 may be different from each other. For example, the area of ​​the third pixel electrode AE3 may be larger than the area of ​​the first pixel electrode AE1 and the area of ​​the second pixel electrode AE2, and the area of ​​the first pixel electrode AE1 may be larger than the area of ​​the second pixel electrode AE2. The intensity of light emitted from each emission region EA can vary according to the area of ​​the emission region EA in which each pixel electrode AE ​​is arranged. Therefore, the color displayed on the screen of the display device 10 or electronic device 1 can be controlled by adjusting the area of ​​each pixel electrode AE ​​and the emission region EA including it. Although Figures 4 to 7 An embodiment in which the third pixel electrode AE3 has the largest area is shown, but the embodiment is not limited thereto. For example, the size (e.g., area) of the pixel electrode AE ​​and the emitting region EA including it can be freely adjusted according to the screen color required by the display device 10 or the electronic device 1. In addition, the area of ​​the pixel electrode AE ​​and the emitting region EA can be related to light efficiency, the lifespan of the light-emitting element, etc., and can be traded off with the reflection of external light. The area of ​​the pixel electrode AE ​​can be appropriately adjusted taking into account the above factors.

[0104] like Figure 6 As shown, the emission region EA of pixel PX may be surrounded by a first light-blocking layer BM1. Furthermore, a color filter CF may be disposed within the emission region EA of pixel PX. The color filter CF may be disposed within the light-emitting element layer including the light-emitting element of pixel PX (e.g., Figure 3 On the light-emitting element layer (EML).

[0105] The first light-blocking layer BM1 can be integrally disposed within the display area DA, and may include an opening OP corresponding to the emission area EA of the pixel PX, and may be disposed around the periphery of the emission area EA. For example, in a plan view, the first light-blocking layer BM1 may include a first opening OP1 above the first emission area EA1, a second opening OP2 above the second emission area EA2, and a third opening OP3 above the third emission area EA3, and may surround the first emission area EA1, the second emission area EA2, and the third emission area EA3. The first light-blocking layer BM1 can block other parts of the display area DA (e.g., non-emission areas) except for the first emission area EA1, the second emission area EA2, and the third emission area EA3.

[0106] The opening OP of the first light-blocking layer BM1 may overlap with the pixel electrode AE, or with the portion of the pixel electrode AE ​​exposed by the opening in the pixel-defining film. The first opening OP1 of the first light-blocking layer BM1 may overlap with the corresponding first pixel electrode AE1. The second opening OP2 of the first light-blocking layer BM1 may overlap with the corresponding second pixel electrode AE2. The third opening OP3 of the first light-blocking layer BM1 may overlap with the corresponding third pixel electrode AE3. In a pixel region in which a pixel PX is disposed, one first opening OP1, two second openings OP2, and one third opening OP3 may be formed in the first light-blocking layer BM1.

[0107] In a planar view, each of the plurality of openings OP in the first light-blocking layer BM1 may be larger than each pixel electrode AE ​​(or the portion of the pixel electrode AE ​​exposed by the opening in the pixel-defined film). For example, in a planar view, the area of ​​the first opening OP1 may be larger than the area of ​​the first pixel electrode AE1, the area of ​​the second opening OP2 may be larger than the area of ​​the second pixel electrode AE2, and the area of ​​the third opening OP3 may be larger than the area of ​​the third pixel electrode AE3. In one embodiment, the areas of the first opening OP1, the second opening OP2, and the third opening OP3 of the first light-blocking layer BM1 may be different from each other. For example, the areas of the first opening OP1, the second opening OP2, and the third opening OP3 may correspond to the areas of the first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3, respectively. Furthermore, the dimensions (e.g., areas) of the first emitting region EA1, the second emitting region EA2, and the third emitting region EA3 may be different and correspond to the areas of the first opening OP1, the second opening OP2, and the third opening OP3 of the first light-blocking layer BM1.

[0108] The display area DA may include at least two types of pixels PX. For example, the display area DA may include a first pixel PX1 and a second pixel PX2. The light emission angle and / or viewing angle of the first pixel PX1 and the second pixel PX2 may be different. For example, the first pixel PX1 may be a pixel PX that provides a wider range of light emission angle and / or viewing angle, and the second pixel PX2 may be a pixel PX that provides a narrower range of light emission angle and / or viewing angle.

[0109] In one embodiment, the first pixel PX1 may be driven only in a first emission mode and may be turned off or not emit light in a second emission mode. The second pixel PX2 may be driven in both the first and second emission modes. The first emission mode may be a general mode in which the viewing angle of the image displayed in the display area DA is not restricted (e.g., a wide viewing angle mode), and the second emission mode may be a side-view blocking mode in which the viewing angle of the image displayed in the display area DA is restricted (e.g., a privacy protection mode or a security mode).

[0110] In one embodiment, the first pixel PX1 and the second pixel PX2 may be arranged alternately along the fourth direction DR4 and the fifth direction DR5. Furthermore, the first pixel PX1 may be arranged repeatedly along the first direction DR1 and the second direction DR2, and the second pixel PX2 may be arranged repeatedly along the first direction DR1 and the second direction DR2. For example, the first pixel PX1 and the second pixel PX2 may be arranged alternately and uniformly distributed throughout the entire display area DA. However, the embodiment is not limited to this, and the arrangement shape of the first pixel PX1 and the second pixel PX2 can be changed in various ways.

[0111] In one embodiment, the separation distance between the opening OP of the first light-blocking layer BM1 and the pixel electrode AE ​​in the first pixel PX1 (or the size of the opening OP of the first light-blocking layer BM1 exposing the emission region EA of the first pixel PX1) may be different from the separation distance between the opening OP of the first light-blocking layer BM1 and the pixel electrode AE ​​in the second pixel PX2 (or the size of the opening OP of the first light-blocking layer BM1 exposing the emission region EA of the second pixel PX2). For example, in a planar view, the separation distance between the opening OP of the first light-blocking layer BM1 and the pixel electrode AE ​​in the first pixel PX1 (or the difference between the diameter of the opening OP of the first light-blocking layer BM1 and the diameter of the pixel electrode AE ​​in the first pixel PX1) may be greater than the separation distance between the opening OP of the first light-blocking layer BM1 and the pixel electrode AE ​​in the second pixel PX2 (or the difference between the diameter of the opening OP of the first light-blocking layer BM1 and the diameter of the pixel electrode AE ​​in the second pixel PX2). For example, the first light-blocking layer BM1 may surround the emission region EA of the second pixel PX2 (or the pixel electrode AE ​​and / or the light-emitting element including the pixel electrode AE ​​disposed in the corresponding emission region EA) by a shorter distance than the emission region EA of the first pixel PX1. Furthermore, the size of the opening OP of the first light-blocking layer BM1 above the emission region EA of the first pixel PX1 may be larger than the size of the opening OP of the first light-blocking layer BM1 above the emission region EA of the second pixel PX2. Therefore, the light emission angle of the light emitted from the second pixel PX2, or the viewing angle of the image displayed by the second pixel PX2, may be narrower than the angular range of the light emitted from the first pixel PX1, or the viewing angle of the image displayed by the first pixel PX1. In one embodiment, the light emission angle or viewing angle of the second pixel PX2, and the size or position of the opening OP of the first light-blocking layer BM1, may be controlled (e.g., limited) by the second light-blocking layer BM2.

[0112] In one embodiment, the size of the emission region EA of the first pixel PX1 (or the aperture ratio of the first pixel PX1) may be larger than the size of the emission region EA of the second pixel PX2 (or the aperture ratio of the second pixel PX2). For example, since the first light-blocking layer BM1 surrounds the emission region EA of the pixel electrode AE ​​in which the second pixel PX2 is disposed at a shorter distance, the size (e.g., area) of the emission region EA of the second pixel PX2 may be smaller than the size (e.g., area) of the emission region EA of the first pixel PX1. In one embodiment, the area occupied by each first pixel PX1 and each second pixel PX2 in the display area DA may be substantially the same. Therefore, the size of the non-emission region of the second pixel PX2 may be larger than the size of the non-emission region of the first pixel PX1.

[0113] The color filter CF can be arranged in the corresponding emission region EA, and can also be arranged around the emission region EA. For example, the color filter CF can cover the pixel electrode AE ​​and the light-emitting element including the pixel electrode AE ​​arranged in the corresponding emission region EA, and can extend to the periphery of the emission region EA.

[0114] The color filter CF may include a first color filter CF1 disposed in a first emission region EA1, a second color filter CF2 disposed in a second emission region EA2, and a third color filter CF3 disposed in a second emission region EA3. The color filter CF may contain a colorant, such as a dye or pigment, that absorbs light in wavelength bands other than a specific wavelength band. The first color filter CF1 may transmit light of a first color emitted from the light-emitting element in the first emission region EA1 and may absorb and / or block light of another color (e.g., second and third colors). For example, each first color filter CF1 may be a red color filter that selectively transmits only red light emitted from the light-emitting element disposed in each first emission region EA1. The second color filter CF2 may transmit light of a second color emitted from the light-emitting element in the second emission region EA2 and may absorb and / or block light of another color (e.g., first and third colors). For example, each second color filter CF2 may be a green color filter that selectively transmits only green light emitted from the light-emitting element disposed in each second emission region EA2. The third color filter CF3 can transmit light of a third color emitted from the light-emitting element in the third emission region EA3, and can absorb and / or block light of another color (e.g., light of the first color and light of the second color). For example, each third color filter CF3 can be a blue color filter that selectively transmits only blue light emitted from the light-emitting element arranged in each third emission region EA3.

[0115] Color filters CF can be formed as individual patterns corresponding to the respective emission regions EA, or they can be integrally formed in the display region DA. For example, each first color filter CF1 can be formed as an individual pattern covering each first emission region EA1 and its periphery, each second color filter CF2 can be formed as an individual pattern covering each second emission region EA2 and its periphery, and each third color filter CF3 can be formed as an individual pattern covering each third emission region EA3 and its periphery. Alternatively, the first color filter CF1 may include openings integrally formed in the display region DA and corresponding to the second emission regions EA2 and EA3, the second color filter CF2 may include openings integrally formed in the display region DA and corresponding to the first emission regions EA1 and EA3, and the third color filter CF3 may include openings integrally formed in the display region DA and corresponding to the first emission regions EA1 and EA2.

[0116] In one embodiment, the first light-blocking layer BM1 may be formed as a light-blocking pattern separate from the color filter CF, or it may be formed as part of the color filter CF. For example, the display device 10 may include a first light-blocking layer BM1 formed as a light-blocking pattern separate from the color filter CF, or it may include a first light-blocking layer BM1 formed by overlapping the color filter CF, which blocks light of different colors, in the non-emission area around the emission area EA.

[0117] In one embodiment, the first light-blocking layer BM1 and the color filter CF may be disposed on the display layer DU. For example, the first light-blocking layer BM1 and the color filter CF may be disposed on... Figure 3 The color filter layer CFL is located on the touch sensing layer TSU. Since the color filter CF and the first light-blocking layer BM1 are arranged on the display layer DU, the intensity of reflected light caused by external light can be reduced.

[0118] like Figure 7 As shown, the second light-blocking layer BM2 may be disposed in some of the multiple pixels PX disposed in the display area DA. For example, the second pixel PX2 may include the second light-blocking layer BM2. The second light-blocking layer BM2 may not be disposed in the first pixel PX1.

[0119] The second light-blocking layer BM2 may surround the emission regions EA of some of the multiple pixels PX. For example, the second light-blocking layer BM2 may be disposed in the non-emission region of the second pixel PX2 and may surround the emission regions EA of the second pixel PX2. For example, the second light-blocking layer BM2 may surround the first emission region EA1, the second emission region EA2, and the third emission region EA3 of the second pixel PX2.

[0120] In one embodiment, the second light-blocking layer BM2 may be disposed on the first light-blocking layer BM1 and the color filter CF. For example, the second light-blocking layer BM2 may be disposed on... Figure 3 The light-blocking component layer PML is located on the color filter layer CFL. Since the second light-blocking layer BM2 is arranged on the color filter layer CFL, the light emission angle or viewing angle of the second pixel PX2 can be adjusted or limited.

[0121] The light emission angle or viewing angle of the second pixel PX2 can be adjusted or changed by at least one of the following: the size of the opening OP of the first light-blocking layer BM1, the separation distance between the first light-blocking layer BM1 and the pixel electrode AE ​​of the second pixel PX2, the presence / absence of the second light-blocking layer BM2, and the separation distance between the second light-blocking layer BM2 and the pixel electrode AE ​​of the second pixel PX2. For example, by arranging the second light-blocking layer BM2 on the second pixel PX2, the light emission angle or viewing angle of the second pixel PX2 can be further reduced.

[0122] In one embodiment, the second light-blocking layer BM2 disposed in a second pixel PX2 can be formed into a pattern. For example, the second light-blocking layer BM2 disposed in a second pixel PX2 may include a first portion BM2A surrounding a first emission region EA1, a second emission region EA2, and a third emission region EA3, and a second portion BM2B connecting the first portion BM2A. The first portion BM2A of the second light-blocking layer BM2 may include a corresponding opening corresponding to the respective emission region EA, and may have a shape surrounding the emission region EA (e.g., a ring shape). The second portion BM2B of the second light-blocking layer BM2 may be disposed between the first portions BM2A and may be integrally formed with the first portions BM2A. Therefore, in the pixel process for forming the pixel PX, the second light-blocking layer BM2 can be prevented from shifting out of its designated position or being peeled off, and the second light-blocking layer BM2 can be formed more stably.

[0123] As described above, a display device 10 according to one embodiment may include a first pixel PX1 in which the second light-blocking layer BM2 is not disposed and a second pixel PX2 in which the second light-blocking layer BM2 is disposed, and the side visibility may be adjusted according to the emission mode. Depending on the viewing angle of the display device 10, the pattern of the second light-blocking layer BM2 (e.g., the light-blocking pattern disposed in each second pixel PX2) may partially cover the pixel electrode AE ​​and may block light emission at a specific viewing angle.

[0124] For example, in the first emission mode of the display device 10, where the visibility from the center is not limited, both the first pixel PX1 and the second pixel PX2 can emit light. Since both the first pixel PX1 and the second pixel PX2 emit light in the first emission mode, the display device 10 can provide a wide viewing angle. For example, regardless of which direction the display device 10 is viewed from, the light emitted from at least the first pixel PX1 can be visually perceived by the user.

[0125] On the other hand, as a second emission mode of the display device 10, if it is desired to limit side visibility, the first pixel PX1 may not emit light, and only the second pixel PX2 may emit light. Since only the second pixel PX2 emits light in the second emission mode, light emitted from the opening OP of the first light-blocking layer BM1 can be blocked by the second light-blocking layer BM2 at a specific viewing angle. Since the first pixel PX1 does not emit light, the image of the display device 10 in the second emission mode can only be visually recognized by a user viewing from the front of the display area DA, and cannot be visually recognized by a user viewing from a specific viewing angle or from the side. Therefore, the display device 10 can provide a side viewing angle blocking mode to the user, for example, a privacy protection mode.

[0126] In the second emission mode of the display device 10, light leakage may occur depending on the degree to which the pixel electrode AE ​​of the second pixel PX2 is blocked by the second light-blocking layer BM2. However, in the display device 10 according to one embodiment, the light-blocking pattern of the second light-blocking layer BM2 may have a shape corresponding to the shape of the pixel electrode AE, and may be arranged to surround the emission region EA in which the pixel electrode AE ​​is disposed. In the second emission mode, when viewing the display device 10, the degree to which the pixel electrode AE ​​of the second pixel PX2 is blocked can be uniform across all viewing angles, and light leakage from the light-emitting element including the specific pixel electrode AE ​​can be prevented.

[0127] Furthermore, in the display device 10 according to one embodiment, the light-blocking member of the second light-blocking layer BM2 is arranged to correspond to the pixel electrode AE ​​of the second pixel PX2, and therefore can be arranged so as not to intrude into other adjacent pixels, such as the first pixel PX1. Therefore, in the first emission mode, the light-blocking member of the second light-blocking layer BM2 can not block the light emitted from the emission region EA of the first pixel PX1.

[0128] Figure 8 This is a plan view illustrating the display area of ​​a display device according to one embodiment. For example, Figure 8 The touch electrode TL and its arrangement are shown. Figure 4 The pixel electrode AE, the first light-blocking layer BM1, the color filter CF, and the second light-blocking layer BM2 in region A1.

[0129] Apart from Figures 4 to 7 In addition, it also refers to Figure 8 The display device 10 may also include touch electrodes TL disposed between pixel electrodes AE. Although Figure 8 The arrangement in Figure 4 The general shape of the touch electrodes TL in region A1 is shown, but multiple touch electrodes TL can be arranged in display region DA. For example, when the display device 10 includes a mutual capacitance type touch sensor, multiple touch electrodes TL including driving electrodes and sensing electrodes can be arranged in display region DA.

[0130] In one embodiment, the touch electrode TL may be formed as a mesh pattern including an opening above the emission region EA of the pixel PX. For example, each touch electrode TL or each of the plurality of electrode cells constituting the touch electrode TL may be a mesh pattern formed by fine lines extending in the fourth direction DR4 or the fifth direction DR5 respectively and overlapping with the first light-blocking layer BM1.

[0131] In one embodiment, the resolution of the pixel PX and the resolution of the touch electrode TL may be different. For example, each touch electrode TL may be arranged in an area where multiple pixels PX are arranged. Figure 8 The touch electrode TL shown in the figure can be arranged in Figure 4 A touch electrode TL in region A1 or an electrode cell forming a touch electrode TL. The shape, number, resolution, and / or structure of the touch electrode TL can be varied in various ways depending on the embodiment. In one embodiment, the touch electrode TL can be connected or extended in a desired shape or orientation by a corresponding bridging pattern.

[0132] In one embodiment, the touch electrode TL may be disposed on the display layer DU. For example, the touch electrode TL may be disposed on... Figure 3 The touch sensing layer (TSU) is used in the display area (DA). User touch input can be sensed by the touch electrodes (TL) in the display area (DA).

[0133] Figure 9 This is a cross-sectional view illustrating a display device according to one embodiment. For example, Figure 9 The display device 10 is shown along the edge Figures 4 to 8 The portion corresponding to the cross-section of the first pixel PX1 intercepted by the line X1-X1'.

[0134] Figure 10 This is a cross-sectional view illustrating a display device according to one embodiment. For example, Figure 10 The display device 10 is shown along the edge Figures 4 to 8 The portion corresponding to the cross-section of the second pixel PX2 intercepted by the line X2-X2'.

[0135] Apart from Figures 1 to 8 In addition, it also refers to Figure 9 and Figure 10 According to one embodiment, the display panel 100 of the display device 10 may include a display layer DU, a touch sensing layer TSU, a color filter layer CFL, and a light-blocking member layer PML. The display layer DU may include a substrate SUB, a thin-film transistor layer TFTL, a light-emitting element layer EML, and a packaging layer TFEL. The touch sensing layer TSU may include touch electrodes TL and bridging patterns TBR. The color filter layer CFL may include a first light-blocking layer BM1 and a color filter CF. The light-blocking member layer PML may include a second light-blocking layer BM2.

[0136] The substrate SUB can be a base substrate or a base component. In one embodiment, the substrate SUB can be a flexible substrate that can be bent, folded or rolled up, but is not limited thereto.

[0137] The thin-film transistor layer (TFTL) may include a first buffer layer (BF1), a lower metal layer (BML), a second buffer layer (BF2), a thin-film transistor (TFT), a gate insulating layer (GI), a first interlayer insulating layer (ILD1), a capacitor electrode (CPE), a second interlayer insulating layer (ILD2), a first connection electrode (CNE1), a first passivation layer (PAS1), a second connection electrode (CNE2), and a second passivation layer (PAS2). However, embodiments are not limited thereto, and the number or type of conductive and insulating layers forming the TFTL and / or the structure or type of the TFT may be varied in various ways according to embodiments.

[0138] The first buffer layer BF1 may be disposed on the substrate SUB. The first buffer layer BF1 may include an inorganic membrane capable of preventing the penetration of air or moisture. For example, the first buffer layer BF1 may include a plurality of inorganic membranes stacked on top of each other.

[0139] The lower metal layer BML may be disposed on the first buffer layer BF1. In one embodiment, the lower metal layer BML may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or alloys thereof.

[0140] The second buffer layer BF2 may cover the first buffer layer BF1 and the lower metal layer BML. The second buffer layer BF2 may include an inorganic membrane capable of preventing the penetration of air or moisture. For example, the second buffer layer BF2 may include multiple inorganic membranes stacked on top of each other.

[0141] Thin-film transistors (TFTs) can be arranged on the second buffer layer BF2 and can be provided to each of the multiple pixel circuits (e.g., pixel circuits of sub-pixels) included in each pixel PX. Figure 9 and Figure 10 The general shape of one of a plurality of thin-film transistors (TFTs) provided to a plurality of corresponding pixel circuits (e.g., pixel circuits of sub-pixels) for a first pixel PX1 and a second pixel PX2 is shown. Figure 9 and Figure 10 Each thin-film transistor (TFT) shown can be a switching transistor or a driving transistor constituting each pixel circuit. The TFT may include a semiconductor layer ACT, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0142] The semiconductor layer ACT can be disposed on the second buffer layer BF2. The semiconductor layer ACT can overlap with the lower metal layer BML and the gate electrode GE in the thickness direction, and can be insulated from the gate electrode GE through the gate insulating layer GI. A portion of the semiconductor layer ACT can become conductive to form the source electrode SE (or source region) and the drain electrode DE (or drain region).

[0143] The gate electrode GE can be disposed on the gate insulating layer GI. The gate electrode GE and the semiconductor layer ACT can overlap with the gate insulating layer GI in between.

[0144] The gate insulating layer GI may be disposed on the semiconductor layer ACT. For example, the gate insulating layer GI may cover the semiconductor layer ACT and the second buffer layer BF2, and may be disposed between the semiconductor layer ACT and the gate electrode GE. The gate insulating layer GI may include a contact hole through which the first connection electrode CNE1 passes.

[0145] The first interlayer insulating layer ILD1 may cover the gate electrode GE and the gate insulating layer GI. The first interlayer insulating layer ILD1 may include a contact hole through which the first connection electrode CNE1 passes. The contact hole of the first interlayer insulating layer ILD1 may be connected to the contact hole of the gate insulating layer GI and the contact hole of the second interlayer insulating layer ILD2.

[0146] The capacitor electrode CPE can be disposed on the first interlayer insulating layer ILD1. The capacitor electrode CPE can overlap with the gate electrode GE in the thickness direction. The capacitor electrode CPE and the gate electrode GE can form a capacitor. For example, the storage capacitor of each pixel circuit can be formed by the capacitor electrode CPE and the gate electrode GE.

[0147] The second interlayer insulating layer ILD2 may cover the capacitor electrode CPE and the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may include a contact hole through which the first connection electrode CNE1 passes. The contact hole of the second interlayer insulating layer ILD2 may be connected to the contact hole of the first interlayer insulating layer ILD1 and the contact hole of the gate insulating layer GI.

[0148] The first connection electrode CNE1 may be disposed on the second interlayer insulating layer ILD2. The first connection electrode CNE1 can electrically connect the drain electrode DE of the thin-film transistor TFT to the second connection electrode CNE2. When the type of the thin-film transistor TFT and / or the structure of the pixel circuit changes, the first connection electrode CNE1 can electrically connect the source electrode SE of the thin-film transistor TFT to the second connection electrode CNE2. The first connection electrode CNE1 can contact and / or connect to the drain electrode DE of the thin-film transistor TFT through contact holes formed in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI.

[0149] The first passivation layer PAS1 may cover the first connection electrode CNE1 and the second interlayer insulating layer ILD2. The first passivation layer PAS1 may protect the thin-film transistor (TFT). The first passivation layer PAS1 may include a contact hole through which the second connection electrode CNE2 passes.

[0150] The second connection electrode CNE2 may be disposed on the first passivation layer PAS1. The second connection electrode CNE2 can electrically connect the first connection electrode CNE1 to the pixel electrode AE ​​of the light-emitting element ED. The second connection electrode CNE2 can contact and / or connect to the first connection electrode CNE1 through contact holes formed in the first passivation layer PAS1. Furthermore, the pixel electrode AE ​​of the light-emitting element ED can contact and / or connect to the second connection electrode CNE2 through contact holes formed in the second passivation layer PAS2. In another embodiment, the thin-film transistor layer TFTL may not include the second connection electrode CNE2, and the pixel electrode AE ​​of the light-emitting element ED may be directly connected to the first connection electrode CNE1 (or an electrode of the thin-film transistor TFT).

[0151] The second passivation layer PAS2 may cover the second connection electrode CNE2 and the first passivation layer PAS1. The second passivation layer PAS2 may include a contact hole through which the pixel electrode AE ​​of the light-emitting element ED passes. In another embodiment, the thin-film transistor layer TFTL may not include the second connection electrode CNE2 and the second passivation layer PAS2, and the pixel electrode AE ​​of the light-emitting element ED may be disposed on the first passivation layer PAS1.

[0152] A light-emitting element layer (EML) may be disposed on a thin-film transistor layer (TFTL). The EML may include a light-emitting element (ED) and a pixel-defining film (PDL) (also referred to as a "pixel-defining layer"). The ED may include a pixel electrode (AE) (e.g., a first electrode or anode electrode of the ED), a light-emitting layer (EL), and a common electrode (CE) (e.g., a second electrode or cathode electrode of the ED). For example, a first light-emitting element ED1 disposed in each first emission region EA1 may include a first pixel electrode AE1 and a light-emitting layer EL and a common electrode CE sequentially disposed on the first pixel electrode AE1. A second light-emitting element ED2 disposed in each second emission region EA2 may include a second pixel electrode AE2 and a light-emitting layer EL and a common electrode CE sequentially disposed on the second pixel electrode AE2. A third light-emitting element ED3 disposed in each third emission region EA3 may include a third pixel electrode AE3 and a light-emitting layer EL and a common electrode CE sequentially disposed on the third pixel electrode AE3.

[0153] Pixel electrodes AE can be disposed on the second passivation layer PAS2. Different pixel electrodes AE can be disposed in corresponding emission regions EA corresponding to different openings among the multiple openings of the pixel defining film PDL. For example, the first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 of the first pixel PX1 can be disposed in the first emission region EA1, the second emission region EA2, and the third emission region EA3 of the first pixel PX1, respectively, and the first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 of the second pixel PX2 can be disposed in the first emission region EA1, the second emission region EA2, and the third emission region EA3 of the second pixel PX2, respectively.

[0154] The pixel electrode AE ​​can be electrically connected to an electrode of the thin-film transistor TFT. For example, the pixel electrode AE ​​can be electrically connected to the drain electrode DE of the thin-film transistor TFT via a first connection electrode CNE1 and a second connection electrode CNE2.

[0155] The light-emitting layer EL can be disposed on the pixel electrode AE. In one embodiment, the light-emitting layer EL can be an organic light-emitting layer made of organic material, but is not limited thereto.

[0156] In one embodiment, the emitting layer EL of the first light-emitting element ED1, the emitting layer EL of the second light-emitting element ED2, and the emitting layer EL of the third light-emitting element ED3 can emit light of different colors. For example, the emitting layer EL of the first light-emitting element ED1 can emit light of a first color (e.g., red light), the emitting layer EL of the second light-emitting element ED2 can emit light of a second color (e.g., green light), and the emitting layer EL of the third light-emitting element ED3 can emit light of a third color (e.g., blue light).

[0157] However, the embodiments are not limited to this. For example, in another embodiment, the light-emitting layer EL of the light-emitting element ED may be formed as a common layer disposed on different pixel electrodes AE and pixel defining films PDL, and the light-emitting layers EL disposed on different pixel electrodes AE may emit light of the same color. In this case, the display device 10 may also include a color adjustment layer disposed on the light-emitting element ED (e.g., a color conversion layer including a wavelength conversion pattern and / or a color adjustment layer including a color filter CF).

[0158] A common electrode CE may be disposed on the light-emitting layer EL of each of a plurality of light-emitting elements ED. In one embodiment, the common electrode CE may be formed as a single common layer disposed integrally in the display area DA, and the light-emitting elements ED of the pixel PX may share a common electrode CE.

[0159] The common electrode CE can receive a common voltage (e.g., the second pixel voltage or the cathode voltage). When the pixel electrode AE ​​receives the first pixel voltage through the thin-film transistor TFT and the common electrode CE receives the common voltage, the light-emitting layer EL can emit light with a brightness corresponding to the data voltage.

[0160] The pixel defining film (PDL) may include an opening corresponding to the emission region EA and may be disposed on a portion of the pixel electrode AE ​​and the second passivation layer PAS2. The opening of the pixel defining film PDL may define the corresponding emission region EA and may partially expose the pixel electrode AE ​​in the emission region EA. The pixel defining film PDL may overlap with the first light blocking layer BM1 and the second light blocking layer BM2.

[0161] A corresponding light-emitting layer EL can be disposed on the exposed portion of the pixel electrode AE. Therefore, each light-emitting element ED can be disposed and / or formed in each emission region EA. In one embodiment, the openings of the pixel defining film PDL can define a first emission region EA1, a second emission region EA2, and a third emission region EA3 of different sizes.

[0162] In one embodiment, the pixel-defining film (PDL) may include a light-absorbing material to prevent light reflection. For example, the PDL may include a polyimide (PI)-based binder and pigments mixed therein with red, green, and blue pigments. Alternatively, the PDL may include a captopril binder resin and a mixture of lactam black and blue pigments. Alternatively, the PDL may include carbon black.

[0163] The encapsulation layer TFEL can be disposed on the common electrode CE to cover the light-emitting element ED. The encapsulation layer TFEL may include at least one inorganic film to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. The encapsulation layer TFEL may also include at least one organic film to protect the light-emitting element layer EML from foreign matter such as dust.

[0164] In one embodiment, the encapsulation layer TFEL may include a first encapsulation layer TFE1, a second encapsulation layer TFE2, and a third encapsulation layer TFE3 sequentially disposed on the light-emitting element ED. The first encapsulation layer TFE1 and the third encapsulation layer TFE3 may be inorganic encapsulation layers, and the second encapsulation layer TFE2 disposed between the first encapsulation layer TFE1 and the third encapsulation layer TFE3 may be an organic encapsulation layer.

[0165] Each of the first encapsulation layer TFE1 and the third encapsulation layer TFE3 may include an inorganic insulating material. For example, each of the first encapsulation layer TFE1 and the third encapsulation layer TFE3 may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, silicon oxynitride, and / or another inorganic insulating material.

[0166] The second encapsulation layer TFE2 may include an organic insulating material. For example, the second encapsulation layer TFE2 may include a polymer-based organic insulating material such as acrylic resin, epoxy resin, polyimide, or polyethylene, or may include another organic insulating material. The second encapsulation layer TFE2 may be formed by curing monomers or applying polymers.

[0167] A touch sensing layer (TSU) may be disposed on a package layer (TFEL). The touch sensing layer (TSU) may include a first insulating layer (SIL1), a second insulating layer (SIL2), touch electrodes (TL), and a third insulating layer (SIL3). In one embodiment, the touch sensing layer (TSU) may further include a bridging pattern (TBR) for connecting touch electrodes (TL) disposed in a display area (DA), or electrode cells forming touch electrodes (TL) in a desired form and / or structure. Each bridging pattern (TBR) may overlap with a portion of at least one touch electrode (TL) and be electrically connected to the touch electrode (TL).

[0168] A first insulating layer SIL1 may be disposed on the encapsulation layer TFEL. The first insulating layer SIL1 may have both insulating and optical functions. In one embodiment, the first insulating layer SIL1 may include at least one inorganic film. Alternatively, the first insulating layer SIL1 may be omitted.

[0169] The bridging pattern TBR can be disposed on the first insulating layer SIL1. The position of the bridging pattern TBR can vary depending on the embodiment. For example, the touch electrode TL and the bridging pattern TBR can be disposed in different layers of the touch sensing layer TSU, and the positions of the touch electrode TL and the bridging pattern TBR can be reversed. For example, one of the touch electrode TL and the bridging pattern TBR can be disposed on the first insulating layer SIL1, and the other of the touch electrode TL and the bridging pattern TBR can be disposed on the second insulating layer SIL2.

[0170] The second insulating layer SIL2 may be disposed on the bridging pattern TBR. For example, the second insulating layer SIL2 may cover the bridging pattern TBR and the first insulating layer SIL1, and may be disposed between the touch electrode TL and the bridging pattern TBR. The second insulating layer SIL2 may include a contact hole through which the touch electrode TL (or the bridging pattern TBR) passes at the portion where the touch electrode TL and the bridging pattern TBR are connected.

[0171] The second insulating layer SIL2 may have both insulating and optical functions. In one embodiment, the second insulating layer SIL2 may be an inorganic film comprising at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0172] The touch electrode TL (or a portion of the touch electrode TL within the display area DA) may be disposed on the second insulating layer SIL2. The touch electrode TL may comprise a conductive material and may be formed as a single layer or multiple layers. For example, the touch electrode TL may be formed as a single layer comprising molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or indium tin oxide (ITO), or may be formed as a stacked structure having aluminum and titanium (Ti / Al / Ti), an aluminum and ITO stacked structure (ITO / Al / ITO), an Ag-Pd-Cu (APC) alloy, or an APC alloy and ITO stacked structure (ITO / APC / ITO).

[0173] In one embodiment, the touch electrode TL may not overlap with the pixel electrode AE. For example, the touch electrode TL may be disposed in a non-emitting region NEA surrounding the emitting region EA. The touch electrode TL may overlap with the pixel defining film PDL and the first light-blocking layer BM1.

[0174] In one embodiment, the first light-blocking layer BM1 may have a width sufficient to completely cover the touch electrode TL, and may define a gap between the edge of the first light-blocking layer BM1 and the touch electrode TL. In one embodiment, the line width of the fine lines forming the touch electrode TL may be in the range of 4 μm to 6 μm, and the gap between the touch electrode TL and the edge of the first light-blocking layer BM1 may be in the range of 5 μm to 7 μm. The touch electrode TL may be arranged such that its center is substantially parallel to the center of the first light-blocking layer BM1, and the distance from both sides of the touch electrode TL to the edge of the first light-blocking layer BM1 may be substantially constant.

[0175] A third insulating layer SIL3 may be disposed on the touch electrode TL. For example, the third insulating layer SIL3 may cover the touch electrode TL and the second insulating layer SIL2. The third insulating layer SIL3 may have both insulating and optical functions. In one embodiment, the third insulating layer SIL3 may comprise a material, for example, the material of the second insulating layer SIL2.

[0176] The color filter layer CFL can be disposed on the touch sensing layer TSU. The color filter layer CFL may include a first light-blocking layer BM1, a color filter CF, and at least one passivation layer. For example, the color filter layer CFL may include a first light-blocking layer BM1, a color filter CF, a first passivation layer PSV1, and a second passivation layer PSV2.

[0177] A first light-blocking layer BM1 may be disposed on the touch sensing layer TSU. The first light-blocking layer BM1 may cover the touch electrode TL and may include an opening OP above the pixel electrode AE. For example, the first light-blocking layer BM1 may include a first opening OP1 disposed in each first emission region EA1 above the first pixel electrode AE1, a second opening OP2 disposed in each second emission region EA2 above the second pixel electrode AE2, and a third opening OP3 disposed in each third emission region EA3 above the third pixel electrode AE3. The first light-blocking layer BM1 may include a light-blocking material such as a black matrix material (e.g., a light-absorbing material).

[0178] In one embodiment, the first light-blocking layer BM1 may have openings of different sizes in the first pixel PX1 and the second pixel PX2. For example, the area (or width) of the first opening OP1, the second opening OP2, and the third opening OP3 respectively arranged in the first emission region EA1, the second emission region EA2, and the third emission region EA3 of the first pixel PX1 may be larger than the area (or width) of the first opening OP1, the second opening OP2, and the third opening OP3 respectively arranged in the first emission region EA1, the second emission region EA2, and the third emission region EA3 of the second pixel PX2.

[0179] Color filters CF can be disposed on the touch sensing layer TSU and the first light-blocking layer BM1. Color filters CF can be disposed in a corresponding emission region EA and overlap with a corresponding light-emitting element ED. In one embodiment, color filters CF can also be disposed around a corresponding emission region EA, and at least two color filters CF can overlap each other between emission regions EA.

[0180] A first color filter CF1 may be disposed in a first emission region EA1 and overlap with a first light-emitting element ED1. In one embodiment, an edge portion of the first color filter CF1 may be disposed around the first emission region EA1 and overlap with a portion of the first light-blocking layer BM1. For example, in a plan view, the edge portion of the first color filter CF1 may surround the first emission region EA1 and may be disposed on a portion of the first light-blocking layer BM1.

[0181] The second color filter CF2 may be disposed in the second emission region EA2 and overlap with the second light-emitting element ED2. In one embodiment, the edge portion of the second color filter CF2 may be disposed around the second emission region EA2 and overlap with a portion of the first light-blocking layer BM1. For example, in a plan view, the edge portion of the second color filter CF2 may surround the second emission region EA2 and may be disposed on a portion of the first light-blocking layer BM1.

[0182] A third color filter CF3 may be disposed within a third emission region EA3 and overlap with a third light-emitting element ED3. In one embodiment, an edge portion of the third color filter CF3 may be disposed around the third emission region EA3 and overlap with a portion of the first light-blocking layer BM1. For example, in a plan view, the edge portion of the third color filter CF3 may surround the third emission region EA3 and may be disposed on a portion of the first light-blocking layer BM1.

[0183] The first passivation layer PSV1 and the second passivation layer PSV2 can be sequentially arranged on the first light-blocking layer BM1 and the color filter CF. The first passivation layer PSV1 and the second passivation layer PSV2 can be arranged integrally in the display area DA, thereby flattening the stepped portion caused by the color filter CF and the first light-blocking layer BM1.

[0184] The first passivation layer PSV1 and the second passivation layer PSV2 can be light-transmitting layers. For example, the first passivation layer PSV1 and the second passivation layer PSV2 can comprise colorless light-transmitting organic materials such as acrylic resin.

[0185] The light-blocking component layer PML can be disposed on the color filter layer CFL. The light-blocking component layer PML may include a second light-blocking layer BM2 and an overlay layer OC.

[0186] The second light-blocking layer BM2 may be disposed on the color filter layer CFL. The second light-blocking layer BM2 may include a light-blocking material such as a black matrix material. The materials of the first light-blocking layer BM1 and the second light-blocking layer BM2 may be the same or different.

[0187] The second light-blocking layer BM2 may be disposed on a subgroup of pixel PX. As used herein, a “subgroup” of pixels refers to fewer than all pixels. For example, the second light-blocking layer BM2 may not be disposed in the first pixel PX1 and may be disposed only in the second pixel PX2. In a plan view, the second light-blocking layer BM2 may surround the emission region EA of the second pixel PX2. In one embodiment, the second light-blocking layer BM2 may be wider than the opening OP of the first light-blocking layer BM1, but this disclosure is not limited thereto. The size, shape, and / or position of the second light-blocking layer BM2 may be adjusted or changed according to the target viewing angle range of the second pixel PX2.

[0188] The top cover layer OC can be disposed on the second light-blocking layer BM2. The top cover layer OC can cover the color filter layer CFL and the second light-blocking layer BM2.

[0189] Figure 11 This is a cross-sectional view illustrating a display device according to one embodiment. For example, Figure 11 The display device 10 is shown along the edge Figures 4 to 8 The portion corresponding to the cross-section of the first pixel PX1 intercepted by the line X1-X1'.

[0190] Figure 12 This is a cross-sectional view illustrating a display device according to one embodiment. For example, Figure 12 The display device 10 is shown along the edge Figures 4 to 8 The portion corresponding to the cross-section of the second pixel PX2 intercepted by the line X2-X2'.

[0191] Figure 11 and Figure 12 The diagram shows the relationship between the first light-blocking layer BM1 and... Figure 9 and Figure 10 The embodiments are different from those described above. In describing the following embodiments, components that are substantially the same as or similar to components in at least one of the above embodiments are denoted by the same reference numerals, and redundant descriptions will be omitted.

[0192] Apart from Figures 1 to 10 In addition, it also refers to Figure 11 and Figure 12 According to one embodiment, the display device 10 may include a first light-blocking layer BM1 formed by overlapping color filters CF of different colors. For example, according to one embodiment, the display device 10 may not include a separate first light-blocking layer BM1 formed separately from the color filters CF and comprising a light-blocking material. Figure 9 and Figure 10 The first light-blocking layer BM1. The display device 10 may include a first light-blocking layer BM1 containing color filters CF arranged to overlap each other in a non-emitting region NEA surrounding the emitting region EA, instead of Figure 9 and Figure 10 The first light-blocking layer BM1. The non-emissive area NEA can be the portion of the display area DA other than the emitting area EA. For example, the non-emissive area NEA can be located around the emitting area EA, and can be arranged on the periphery of each of the multiple emitting areas EA and between the multiple emitting areas EA.

[0193] According to one embodiment, the first light-blocking layer BM1 may include a first color filter CF1, a second color filter CF2, and a third color filter CF3 that overlap each other in a non-emissive region NEA. For example, the first color filter CF1 may be arranged in the non-emissive region NEA and the first emissive region EA1 of pixel PX, the second color filter CF2 may be arranged in the non-emissive region NEA and the second emissive region EA2 of pixel PX, and the third color filter CF3 may be arranged in the non-emissive region NEA and the third emissive region EA3 of pixel PX. The first light-blocking layer BM1 may be formed from a portion of each of the first color filter CF1, the second color filter CF2, and the third color filter CF3. For example, in the non-emissive region NEA, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may overlap in the thickness direction (e.g., the third direction DR3) of the display panel 100 to form the first light-blocking layer BM1.

[0194] In one embodiment, among the first color filter CF1, the second color filter CF2, and the third color filter CF3, the third color filter CF3 may be arranged at the bottommost position, and the second color filter CF2 may be arranged at the topmost position. For example, the color filters CF of the color filter layer CFL may be arranged or formed on the touch sensing layer TSU in the order of the third color filter CF3, the first color filter CF1, and the second color filter CF2.

[0195] However, the embodiments are not limited to this, and the arrangement order of the color filters CF can be changed. For example, in another embodiment, the color filters CF may be arranged or formed in the order of first color filter CF1, third color filter CF3, and second color filter CF2.

[0196] In one embodiment, among the combination of color filters CF, a combination of color filters CF with high light-blocking effect (e.g., light-blocking rate for visible light emitted from pixel PX) can be arranged in the lower portion of the first light-blocking layer BM1. For example, a first color filter CF1 and a third color filter CF3 that selectively transmit red and blue light and absorb or block other colors of light can be arranged below the second color filter CF2. Therefore, a first light-blocking layer BM1 with excellent light-blocking effect can be formed by utilizing color filters CF without forming a separate light-blocking pattern.

[0197] According to the above embodiments, the process of forming the first light-blocking layer BM1 using a separate light-blocking material can be omitted, and the first light-blocking layer BM1 can be formed in the non-emissive region NEA using a color filter CF. Therefore, the manufacturing efficiency of the display device 10 can be increased. For example, the separate mask process for forming the first light-blocking layer BM1 can be omitted, and the manufacturing process of the display device 10 can be simplified or streamlined.

[0198] Figure 13 This is a cross-sectional view illustrating a display device according to one embodiment. For example, Figure 13 The display device 10 is shown along the edge Figure 4 The portion corresponding to the cross-section of the second pixel PX2 intercepted by line X3-X3'.

[0199] Figure 13 The display device 10 is shown to include, as in Figure 11 and Figure 12 In one embodiment, a portion of the first light-blocking layer BM1 is formed by stacking color filters CF. For example, Figure 13 It is shown in accordance with Figure 11 and Figure 12 A cross-section of the first emission region EA1 and the third emission region EA3 of the second pixel PX2 arranged sequentially or alternately along the second direction DR2 in the display device 10 of the embodiment.

[0200] refer to Figure 13 The third color filter CF3 can be arranged at the bottom of the color filter CF within the non-emission region NEA. For example, the third color filter CF3 can be arranged therein according to... Figure 9 and Figure 10 In the embodiment of the display device 10, the first light-blocking layer BM1 is positioned at the location of the first color filter CF1, and the first color filter CF1 and the second color filter CF2 can be arranged on the third color filter CF3.

[0201] The first light-blocking layer BM1, formed by the color filter CF, can transmit light in the frontal direction and in the near-frontal viewing angle, and can appropriately block side light directed to the non-emitting region NEA. However, compared with... Figure 9 and Figure 10 Compared to the previous embodiment, the height at which the first light-blocking layer BM1 provides light-blocking functionality to effectively block or absorb light of the first, second, and third colors emitted from the light-emitting element ED can be increased. For example, the first light-blocking layer BM1 can effectively block all of the first, second, and third colors of light from the portion in which at least two color filters CF are stacked. Therefore, light leakage can occur where at least some of the side light emitted from the light-emitting element ED leaks to its periphery.

[0202] For example, some of the third-color light emitted from the third light-emitting element ED3 may pass only through the third color filter CF3 on the path through the non-emitting region NEA. For example, among the third-color light emitted from the third light-emitting element ED3, the first light L1 and the second light L2, which deviate at a large angle from the front direction and travel at a large angle in the side direction, may pass only through the third color filter CF3 located in the lower part of the first light-blocking layer BM1 on the path through the first light-blocking layer BM1, and may not pass through the first color filter CF1 and the second color filter CF2. Since the first light L1 and the second light L2 are third-color light, both can pass through the third color filter CF3. Therefore, the first light L1 and the second light L2 are not properly absorbed or blocked by the first light-blocking layer BM1 and are emitted to the outside of the display device 10, which may cause light leakage of the side light. For example, in the second emission mode in which only the second pixel PX2 is driven and the side viewing angle is limited, some of the light emitted from the second pixel PX2 (e.g., blue light traveling at a high angle in the side direction) may leak through the non-emitting region NEA around the emission region EA. Due to light leakage from the side light, the effect of limiting the side viewing angle in the second emission mode may be reduced, or the image quality of the display device 10 may be degraded.

[0203] Figure 14 This is a cross-sectional view illustrating a display device according to one embodiment. For example, Figure 14 The display device 10 is shown along the edge Figure 4 The portion corresponding to the cross-section of the second pixel PX2 intercepted by line X3-X3'.

[0204] Figure 14 The display device 10 is shown to include, as in Figure 11 and Figure 12 In one embodiment, it is a portion of the first light-blocking layer BM1 formed by stacking color filters CF. Figure 14 The diagram shows the form or structure of the first light-blocking layer BM1. Figure 13 Different embodiments.

[0205] Figure 15 This is a plan view of a first color filter according to one embodiment. Figure 16 This is a plan view of a second color filter according to one embodiment. Figure 17 This is a plan view illustrating a third color filter according to one embodiment. For example, Figures 15 to 17 Each of the display devices 10 is shown as follows: Figure 14 Similar to the embodiments described above, at least one color filter CF1, a second color filter CF2, and a third color filter CF3 with annular openings OPr and OPb are formed in at least one color filter CF in the non-emitting region NEA where a first light-blocking layer BM1 is formed.

[0206] Figures 18 to 21 This is a plan view illustrating a third color filter according to an embodiment. For example, Figures 18 to 21 It shows relative to the following Figure 17 The third color filter CF3 in the embodiments are different from each other in the modified embodiments.

[0207] refer to Figures 14 to 21 At least one of the multiple color filters CF forming the first light-blocking layer BM1 in the non-emitting region NEA may include an annular opening OPr and an annular opening OPb surrounding the emitting region EA at the periphery of the emitting region EA of the second pixel PX2, or at the periphery of some of the emitting regions EA among the first emitting region EA1, the second emitting region EA2, and the third emitting region EA3 of the second pixel PX2. For example, a color filter CF arranged at the bottom of the multiple color filters CF forming the first light-blocking layer BM1 (such as in...) Figure 13 In the embodiment, the third color filter (CF3) may be arranged in the non-emissive region NEA of the second pixel PX2 and includes an annular opening OPb surrounding the emissive region EA of the second pixel PX2.

[0208] The annular opening OPb of the third color filter CF3 may be filled with at least one other color filter CF disposed thereon. For example, a portion of the first color filter CF1 may be disposed within the annular opening OPb of the third color filter CF3.

[0209] By forming an annular opening OPb in the third color filter CF3, side light emitted from the second pixel PX2 can be blocked more effectively. For example, the first light L1 and the second light L2 of the third color emitted from the third light-emitting element ED3 of the second pixel PX2, which travel at a large angle in the side direction (see...). Figure 13 The light can be absorbed and disappear by the first color filter CF1, which fills the annular opening OPb of the third color filter CF3, in the path passing through the first light-blocking layer BM1. Therefore, light leakage caused by side light emitted from the second pixel PX2 can be prevented.

[0210] In one embodiment, the annular opening OPb of the third color filter CF3 may have a separate annular shape surrounding the emission region EA of the second pixel PX2, but this disclosure is not limited thereto. Additionally, the annular opening OPb of the third color filter CF3 may have a narrow width, but this disclosure is not limited thereto. For example, the annular opening OPb of the third color filter CF3 may have any shape and / or size depending on spatial conditions (e.g., the width, area, or shape of the non-emission region NEA surrounding the emission region EA of the second pixel PX2) and / or the light-blocking effect of the first light-blocking layer BM1.

[0211] exist Figure 14 and Figure 17 The present invention discloses an embodiment in which only one annular opening OPr or annular opening OPb is formed around each of the plurality of emission regions EA of the second pixel PX2 in each of the first color filter CF1 and the third color filter CF3, but the present disclosure is not limited thereto. For example, the number or orientation of the annular openings OPr or OPb formed in the first color filter CF1 and / or the third color filter CF3 may be varied, taking into account various factors including the width or area of ​​the non-emission region NEA that can be ensured at the orientation in which each annular opening OPr or annular opening OPb is placed. For example, as Figure 18 As shown, two or more annular openings OPb may be arranged around each of the multiple emission regions EA of the second pixel PX2 in the third color filter CF3.

[0212] Furthermore, the number and / or size of the annular openings OPr and OPb surrounding each of the plurality of emission regions EA differs depending on the width or area of ​​the non-emission region NEA surrounding each of the first emission region EA1, the second emission region EA2, and the third emission region EA3. For example, a larger number and / or wider annular openings OPr or OPb may be arranged at the periphery of the second emission region EA2, which has a smaller size than the first emission region EA1 and the third emission region EA3, compared to the annular openings OPr or OPb surrounding the first emission region EA1 and / or the annular openings OPr or OPb surrounding the third emission region EA3. For example, as Figure 19 As shown, an annular opening OPb may be arranged around a first emission region EA1 and a third emission region EA3 of each of a plurality of second pixels PX2 within a third color filter CF3, and two or more annular openings OPb may be arranged around each of a plurality of second emission regions EA2 of a second pixel PX2 within a third color filter CF3. Alternatively, the size of the annular opening OPb of the third color filter CF3 arranged around the second emission region EA2 of each of the plurality of second pixels PX2 may be larger than the size of the annular opening OPb of the third color filter CF3 arranged at the periphery of each of the first emission region EA1 and the third emission region EA3 of the second pixel PX2. In this way, depending on the embodiment, at least one of the number, size, and shape of the annular openings OPr and OPb formed around the emission region EA according to the width or area of ​​the non-emission region NEA located around each of the plurality of emission regions EA can be adjusted or distinguished.

[0213] In one embodiment, the annular openings OPr and OPb formed in at least one color filter CF may not be arranged in the non-emissive region NEA of the first pixel PX1, and may be arranged only in the non-emissive region NEA of the second pixel PX2. For example, as Figure 15 and Figure 17 As shown, the annular opening OPr of the first color filter CF1 and the annular opening OPb of the third color filter CF3 can be formed in the non-emissive region NEA of the second pixel PX2, and the annular openings OPr and OPb can be not formed in the non-emissive region NEA of the first pixel PX1. Therefore, the side blocking effect (e.g., side blocking rate) is more effective in the second pixel PX2 than in the first pixel PX1.

[0214] However, the embodiments are not limited to those explicitly disclosed herein. For example, in another embodiment, the annular openings OPr and OPb formed in at least one color filter CF may be formed in both the non-emissive region NEA of the first pixel PX1 and the non-emissive region NEA of the second pixel PX2. For example, as Figure 20 and Figure 21 As shown, the third color filter CF3 may further include an annular opening OPb surrounding the emission region EA at the periphery of the emission region EA of the first pixel PX1 or at the periphery of some emission regions EA among the first emission regions EA1, second emission region EA2, and third emission region EA3 of the first pixel PX1. The first color filter CF1 may or may not include an annular opening OPr in the non-emission region NEA of the first pixel PX1 and / or the second pixel PX2.

[0215] In one embodiment, the first pixel PX1 can be driven in a first emission mode that provides a wider viewing angle, and the lateral light blocking rate in the first emission mode (e.g., the lateral light blocking rate in the first mode) can be lower than the lateral light blocking rate in the second emission mode (e.g., the lateral light blocking rate in the second mode). Additionally, the opening OP of the layer of the first light-blocking layer BM1 that exposes the emission region EA of the first pixel PX1 can be larger than the opening OP of the layer of the first light-blocking layer BM1 that exposes the emission region EA of the second pixel PX2. Therefore, the non-emission region NEA of the first pixel PX1 can be narrower than the non-emission region NEA of the second pixel PX2.

[0216] In one embodiment, based on a first emission mode and a second emission mode, and taking into account the area or proportion occupied by the non-emitting region NEA in the first pixel PX1 and the second pixel PX2, and / or the lateral light blocking rate (e.g., lateral light blocking rate) of the first pixel PX1 and the second pixel PX2, different numbers and / or sizes of annular openings OPr and OPb can be formed in the first pixel PX1 and the second pixel PX2. For example, the number of annular openings OPr and OPb arranged in the non-emitting region NEA of the second pixel PX2 can be greater than the number of annular openings OPr and OPb arranged in the non-emitting region NEA of the first pixel PX1. For example, as... Figure 20 As shown, an annular opening OPb may be formed around each of the plurality of emission regions EA of the first pixel PX1 in the third color filter CF3, and two or more annular openings OPb may be formed around each of the plurality of emission regions EA of the second pixel PX2 in the third color filter CF3. Alternatively, the dimensions (e.g., widths) of the annular openings OPr and OPb arranged in the non-emission regions NEA of the second pixel PX2 may be larger than the dimensions (e.g., widths) of the annular openings OPr and OPb arranged in the non-emission regions NEA of the first pixel PX1. For example, as Figure 21As shown, the same number of annular openings OPb can be formed in the third color filter CF3 around each of the emission regions EA of the first pixel PX1 and the second pixel PX2, but the size of the annular opening OPb around each of the emission regions EA of the first pixel PX1 and the size of the annular opening OPb in the third color filter CF3 around each of the emission regions EA of the second pixel PX2 can be different. In one embodiment, a larger annular opening OPb can be arranged in the third color filter CF3 around the emission region EA of the second pixel PX2.

[0217] In addition to the above embodiments, the shape, number, size and / or distribution shape of the annular opening OPb of the third color filter CF3 arranged at the bottom of the first light-blocking layer BM1 can be modified in various ways.

[0218] The color filter CF disposed on the third color filter CF3 in the non-emitting region NEA may include or exclude an annular opening surrounding at least some of the emitting regions EA of the pixels PX including the second pixel PX2. For example, the first color filter CF1 disposed in the middle layer of the first light-blocking layer BM1 may selectively include an annular opening OPr surrounding the emitting regions EA of the second pixel PX2, or some of the emitting regions EA of the first emitting region EA1, the second emitting region EA2, and the third emitting region EA3 of the second pixel PX2.

[0219] For example, such as Figure 14 and Figure 15 As shown, the first color filter CF1 may include an annular opening OPr disposed in the non-emitting region NEA. In a plan view (or when viewed from a third-party upward perspective), the annular opening OPr of the first color filter CF1 may not overlap with the annular opening OPb of the third color filter CF3. The annular opening OPr of the first color filter CF1 may be filled with a second color filter CF2. For example, a portion of the second color filter CF2 may be disposed inside the annular opening OPr of the first color filter CF1. Therefore, sidelight emitted from the second pixel PX2 can be blocked more effectively.

[0220] In embodiments where the first color filter CF1 includes an annular opening OPr, the shape, size, number, and / or distribution of the annular opening OPr formed in the first color filter CF1 may vary depending on the embodiment. For example, similar to the various embodiments described above regarding the annular opening OPb of the third color filter CF3, various shapes, sizes, and / or numbers of annular openings OPr in the first color filter CF1 may be formed based on spatial conditions (e.g., the width, area, or shape of the non-emitting region NEA) corresponding to the orientation of the annular opening OPr of the first color filter CF1 and / or the light-blocking effect of the first light-blocking layer BM1.

[0221] In one embodiment, such as Figure 14 and Figure 16 As shown, the second color filter CF2, located at the uppermost portion of the plurality of color filters CF forming the first light-blocking layer BM1, may not be open in the non-emissive region NEA. For example, the second color filter CF2 may not include the annular opening in the non-emissive region NEA. Therefore, the light-blocking effect can be provided by the first light-blocking layer BM1 in the non-emissive region NEA.

[0222] In the display device 10 according to the above embodiment, the light emission angle or side viewing angle of some pixels PX (e.g., the second pixel PX2) among the plurality of pixels PX in the display area DA can be limited by the first light-blocking layer BM1 and the second light-blocking layer BM2 to be narrower than the light emission angle or side viewing angle of other pixels PX (e.g., the first pixel PX1). In the display device 10 according to the embodiment, the side viewing angle of the image displayed in the display area DA can be modified (e.g., controlled or changed) by selectively driving the pixels PX according to the user's selection. For example, when the display device 10 is driven in the first emission mode according to the user's selection, since both the first pixel PX1 and the second pixel PX2 are activated to display the image, the image can be viewed not only from the front direction but also from the side direction. On the other hand, when the display device 10 is driven in the second emission mode according to the user's selection, since the first pixel PX1 is not activated and only the second pixel PX2 is activated to display the image, the side viewing angle can be limited to a narrow one. Therefore, only a user positioned in the front direction of the display device 10 can substantially view the image. The display device 10 according to the embodiment can modify the viewing angle of the display device 10 according to the application to take into account factors such as privacy protection, thereby increasing the ease of use.

[0223] Additionally, according to some embodiments (e.g., Figures 11 to 21 In the display device 10 of the embodiment, the first light-blocking layer BM1 can be formed by overlapping the color filter CF in the non-emissive region NEA. Therefore, the manufacturing efficiency of the display device 10 can be increased.

[0224] Furthermore, according to some embodiments (e.g., Figures 14 to 21In the display device 10 of the embodiment, annular openings OPr and OPb may be formed in the non-emissive regions NEA of at least some of the plurality of pixels PX arranged in the display area DA, within at least one color filter CF, including a third color filter CF3 arranged at the lowermost portion of the first light-blocking layer BM1. The annular openings OPr and OPb may be filled with at least one color filter (e.g., a first color filter CF1 or a second color filter CF2) arranged thereon. Therefore, light leakage of sidelight emitted from the pixels PX in which the annular openings OPr and OPb are formed in the first light-blocking layer BM1 can be effectively prevented.

[0225] In some embodiments, the annular openings OPr and OPb formed in the first light-blocking layer BM1 may be arranged in some pixels PX2 having a more restricted light emission angle or side viewing angle. For example, the annular openings OPr and OPb may be formed in the first light-blocking layer BM1 of a second pixel PX2 having a relatively small emission region EA exposed by the first light-blocking layer BM1 compared to the first pixel PX1 and a more restricted side viewing angle with the second light-blocking layer BM2. Light leakage of side light emitted from the second pixel PX2 can be effectively blocked by the annular openings OPr and OPb formed in the first light-blocking layer BM1. Therefore, in the second emission mode in which only the second pixel PX2 is selectively driven, image quality degradation when viewed from the side can be effectively prevented.

[0226] In summary, those skilled in the art will recognize that many variations and modifications can be made to the embodiments without substantially departing from the principles of this disclosure. Therefore, the disclosed embodiments are used in a general and descriptive sense only and not for limiting purposes.

Claims

1. A display device, characterized in that, include: A plurality of pixels, each of the plurality of pixels including an emission region comprising a first emission region, a second emission region and a third emission region, and a light-emitting element disposed in the emission region; A first color filter is disposed on the light-emitting element and disposed in the first emitting region of the plurality of pixels and in the non-emitting region surrounding the emitting region; A second color filter is disposed on the light-emitting element and in the second emitting region and the non-emitting region of the plurality of pixels; A third color filter is disposed on the light-emitting element and in the third emitting region and the non-emitting region of the plurality of pixels; A first light-blocking layer is formed by overlapping at least two of the first color filter, the second color filter, and the third color filter in the non-emissive region. as well as A second light-blocking layer is disposed on the first light-blocking layer and surrounds the emission region of the subgroup of the plurality of pixels. The color filter located at the lowest part of the first light-blocking layer, among the first, second, and third color filters, includes an annular opening around the emission region of the subgroup of the plurality of pixels.

2. The display device according to claim 1, characterized in that, The annular opening is filled with other color filters arranged on the color filter at the bottom of the first light-blocking layer.

3. The display device according to claim 1, characterized in that, The plurality of pixels includes a first pixel and a second pixel, wherein the second light-blocking layer is disposed in the second pixel but not in the first pixel, and The second light-blocking layer is disposed in the non-emitting region of the second pixel and surrounds the emitting region of the second pixel.

4. The display device according to claim 3, characterized in that, The annular opening is not located in the non-emissive region of the first pixel, but is located in the non-emissive region of the second pixel.

5. The display device according to claim 3, characterized in that, The annular opening is arranged in the non-emissive region of the first pixel and in the non-emissive region of the second pixel.

6. The display device according to claim 5, characterized in that, The number of annular openings arranged in the non-emissive region of the first pixel is different from the number of annular openings arranged in the non-emissive region of the second pixel.

7. The display device according to claim 5, characterized in that, The size of the annular opening arranged in the non-emissive region of the first pixel is different from the size of the annular opening arranged in the non-emissive region of the second pixel.

8. The display device according to claim 7, characterized in that, The size of the annular opening arranged in the non-emissive region of the second pixel is larger than the size of the annular opening arranged in the non-emissive region of the first pixel.

9. The display device according to claim 3, characterized in that, The first light-blocking layer includes an opening in the emission region of the first pixel and an opening in the emission region of the second pixel, and The size of the opening of the first light-blocking layer in the emission region of the first pixel is different from the size of the opening of the first light-blocking layer in the emission region of the second pixel.

10. The display device according to claim 9, characterized in that, The light-emitting element includes a corresponding pixel electrode disposed in the emission region of the first pixel and the second pixel, a corresponding light-emitting layer disposed on the pixel electrode, and a common electrode disposed on the light-emitting layer.

11. The display device according to claim 10, characterized in that, The separation distance between the opening of the first light-blocking layer in the emission region of the first pixel and the pixel electrode arranged in the first pixel is greater than the separation distance between the opening of the first light-blocking layer in the emission region of the second pixel and the pixel electrode arranged in the second pixel.

12. The display device according to claim 1, characterized in that, The first emission region, the second emission region, and the third emission region of each pixel have different sizes.

13. The display device according to claim 12, characterized in that, In the subgroups of the plurality of pixels, at least one of the sizes and numbers of two or more annular openings of the first light-blocking layer surrounding the first emitting region, the first light-blocking layer surrounding the second emitting region, and the first light-blocking layer surrounding the third emitting region are different.

14. The display device according to claim 1, characterized in that, The color filter among the first, second, and third color filters, which is disposed in the middle layer of the first light-blocking layer, includes an annular opening around the emission region of the subgroup of the plurality of pixels.

15. The display device according to claim 14, characterized in that, The annular opening of the color filter located in the middle layer of the first light-blocking layer does not overlap with the annular opening of the color filter located in the lowermost part of the first light-blocking layer.

16. The display device according to claim 1, characterized in that, The color filter among the first, second, and third color filters, which is located at the uppermost portion of the first light-blocking layer, does not include the annular opening in the non-emissive region.

17. The display device according to claim 1, characterized in that, Each of the plurality of pixels includes a first light-emitting element disposed in the first emission region and emitting red light, a second light-emitting element disposed in the second emission region and emitting green light, and a third light-emitting element disposed in the third emission region and emitting blue light. The first color filter, the second color filter, and the third color filter selectively transmit the red light, the green light, and the blue light, respectively.

18. The display device according to claim 17, characterized in that, The first color filter or the third color filter is arranged in the non-emissive region at the lowermost portion of the first light-blocking layer, and The second color filter is arranged in the non-emissive region at the top of the first light-blocking layer.

19. An electronic device, characterized in that, include: The display device includes a plurality of first pixels, a plurality of second pixels, and a display driver for transmitting data to the plurality of first pixels and the plurality of second pixels to display an image; Each of the plurality of second pixels includes: A first launch area, a second launch area, and a third launch area, wherein the first launch area, the second launch area, and the third launch area are separated by a non-launch area; A first light-blocking layer, comprising a lower color filter and an upper color filter overlapping in the non-emissive region; and A second light-blocking layer is disposed on the first light-blocking layer and surrounds the first emission region, the second emission region, and the third emission region, wherein the lower color filter of the first light-blocking layer includes an annular opening surrounding the first emission region, the second emission region, and the third emission region.

20. The electronic device according to claim 19, characterized in that, The second light-blocking layer is not present in the plurality of first pixels.

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