A soft start control circuit based on output voltage feedback

Abstract

The utility model discloses a kind of soft-start control circuit based on output voltage feedback, soft-start control circuit includes buffer circuit and control circuit, the buffer circuit includes operational amplifier;The buffer circuit is used to prevent the overshoot phenomenon of output voltage, makes output voltage curve change smooth;The control circuit includes capacitor, control tube, voltage divider component and discharge tube, the capacitor is connected with the drain of the discharge tube and the operational amplifier, the voltage divider component is connected with the capacitor and the control tube respectively;The control circuit is used to control soft-start time.The utility model can improve the response speed of soft-start control circuit, avoid appearing output voltage overshoot phenomenon;And it can accurately control soft-start time, effectively controllable limit in power-on process inrush current.

Description

Technical Field

[0001] This utility model belongs to the field of integrated circuit technology and relates to a soft-start control circuit based on output voltage feedback. Background Technology

[0002] A soft-start circuit is a circuit design used to limit the surge current impact when electronic devices or motors start up. It limits the current by controlling the rate of voltage rise, thereby reducing damage to the power supply and load equipment and improving system reliability and lifespan.

[0003] Traditional soft-start circuits typically use a constant current source to charge or discharge the capacitor, causing the output voltage to rise slowly, thus achieving a soft start. However, during the voltage rise process, traditional soft-start circuits may experience output overshoot and other problems if the system loop's response speed is insufficient and the input voltage rise rate exceeds the system loop's response speed, even with a soft-start function. Furthermore, because this technology lacks a feedback mechanism, the soft-start system cannot monitor changes in the output voltage in real time, making it impossible to precisely control the charging process and resulting in an uncontrollable soft-start time. Utility Model Content

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a soft-start control circuit based on output voltage feedback. This circuit has a high open-loop gain, which can improve the system response speed and avoid output voltage overshoot. It can also accurately control the soft-start time, realize precise control of the charging process, and effectively and controllably limit the surge current during the power-on process.

[0005] To achieve the above objectives, this utility model employs the following technical solution:

[0006] A soft-start control circuit based on output voltage feedback, the soft-start control circuit includes:

[0007] A buffer circuit, comprising an operational amplifier, is used to prevent overshoot of the output voltage and to smooth the output voltage curve.

[0008] The control circuit includes a capacitor, a control transistor, a voltage divider assembly, and a discharge transistor. The capacitor is connected to the drain of the discharge transistor and the operational amplifier. The voltage divider assembly is connected to the capacitor and the control transistor respectively. The control circuit is used to control the soft-start time, and the voltage divider assembly is used to feed the output voltage back to the capacitor to form a feedback loop.

[0009] Optionally, the operational amplifier includes a rail-to-rail op-amp, and the capacitor is connected to the drain of the discharge tube and the non-inverting input of the rail-to-rail op-amp, respectively.

[0010] Optionally, the soft-start control circuit also includes a power transistor, the gate of which is connected to the inverting input and output of the rail-to-rail operational amplifier, respectively; the power transistor is used to regulate the output voltage according to its conduction level.

[0011] Optionally, the voltage divider assembly includes passive or active components. The passive components include resistors, which include a first resistor and a second resistor. The capacitor is connected to the first resistor and the second resistor, respectively. The drain of the control transistor is connected to the second resistor, and the first resistor is connected to the drain of the power transistor.

[0012] Optionally, the ratio of the resistance values ​​of the first resistor to the second resistor is adjusted according to the soft-start time; the ratio of the resistance values ​​of the first resistor to the second resistor is 1:(1~3).

[0013] Optionally, the soft-start control circuit further includes a drive voltage detection circuit, which includes a first inverter and a second inverter. The output terminal of the first inverter is connected to the input terminal of the second inverter, the input terminal of the first inverter is connected to the gate of the power transistor, the output terminal of the second inverter is connected to the gate of the control transistor, and the drain of the power transistor is connected to the first resistor. The drive voltage detection circuit is used to monitor the gate voltage of the power transistor. When the gate voltage of the power transistor is lower than a preset threshold voltage, the drive voltage detection circuit cuts off the soft-start control circuit.

[0014] Optionally, the first inverter includes a first transistor, a second transistor, and a third transistor. The gate of the power transistor is connected to the gate of the first transistor, the second transistor, and the third transistor, respectively. The drain of the first transistor is connected to the source of the second transistor, and the drain of the second transistor is connected to the drain of the third transistor.

[0015] The second inverter includes a fourth transistor, a fifth transistor, and a sixth transistor. The drain of the second transistor is connected to the gates of the fourth, fifth, and sixth transistors, respectively. The gate of the control transistor is connected to the drains of the fourth and fifth transistors, respectively. The source of the fifth transistor is connected to the drain of the sixth transistor.

[0016] Optionally, the rail-to-rail operational amplifier includes a complementary differential input circuit, which includes a first input transistor, a second input transistor, a third input transistor, and a fourth input transistor. The source of the first input transistor is connected to the source of the fourth input transistor, the source of the second input transistor is connected to the source of the third input transistor, the drain of the discharge transistor is connected to the gates of the first input transistor and the second input transistor, and the gate of the power transistor is connected to the gates of the third input transistor and the fourth input transistor, respectively. The first input transistor and the fourth input transistor are N-type transistors, and the second input transistor and the third input transistor are P-type transistors.

[0017] Optionally, the soft-start control circuit further includes an enable control circuit, which includes a first enable transistor, a second enable transistor, a third enable transistor, and an inverter. The gate of the first enable transistor is connected to the output terminal of the inverter and the gate of the third enable transistor, respectively. The drain of the first enable transistor is connected to the gate of the discharge transistor and the drain of the third enable transistor, respectively. The input terminal of the inverter and the gate of the second enable transistor are connected to a power-on reset signal, respectively. The drain of the second enable transistor is connected to the operational amplifier, the capacitor, and the drain of the discharge transistor, respectively. The source of the third enable transistor and the source of the discharge transistor are connected to power ground, respectively. The enable control circuit is used to control the initial state of the soft-start control circuit before power-on.

[0018] Optionally, the soft-start control circuit further includes a current bias circuit, which includes a reference current source and a current mirror. The output terminal of the reference current source is connected to the source of the first enable transistor, the drain of the current mirror is connected to the drain of the first enable transistor, the gate of the current mirror is connected to the gate of the discharge transistor, and the source of the current mirror is connected to the power supply ground. The current bias circuit is used to discharge the capacitor.

[0019] Compared with the prior art, the beneficial effects achieved by this utility model are as follows:

[0020] This invention provides a soft-start control circuit based on output voltage feedback. The buffer uses a high-precision operational amplifier with high open-loop gain, which can improve the response speed of the soft-start control circuit, support power rail swing, and ensure that the gate voltage can still be accurately controlled when the voltage drop is low. The output stage uses a class AB output circuit to improve the output swing, ensure that the voltage output device is fully turned on or off, make the output voltage curve change smoothly, and avoid overshoot phenomenon in the output voltage.

[0021] After the power is turned on, the current source discharges one end of the capacitor, causing the voltage output terminal of the soft-start control circuit to open slowly. The voltage divider component feeds the output voltage back to the capacitor, forming a feedback loop. The change in the voltage across the capacitor is controlled by the drive voltage detection circuit, which facilitates the control of the soft-start time. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of a soft-start control circuit based on output voltage feedback according to an embodiment of the present invention;

[0023] Figure 2 This is a schematic diagram of a soft-start control circuit buffer circuit based on output voltage feedback according to an embodiment of the present invention.

[0024] Figure 3 This is a schematic diagram of a soft-start control circuit based on output voltage feedback driving a voltage detection circuit according to an embodiment of the present invention. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0026] In the description of this utility model, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this utility model, unless otherwise stated, "a plurality of" means two or more.

[0027] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances. Example

[0028] like Figures 1 to 3 As shown, a soft-start control circuit based on output voltage feedback is disclosed. The soft-start control circuit includes an enable control circuit, a current bias circuit, a buffer circuit, a control circuit, a drive voltage detection circuit, and a power transistor (PowerMOS). The power transistor (PowerMOS) can also be a sampling power transistor. The power transistor (PowerMOS) is used to regulate the output voltage according to its conduction level.

[0029] The buffer circuit includes an operational amplifier, which is a rail-to-rail op-amp. The non-inverting input of the rail-to-rail op-amp is connected to the control circuit. The gate of the power MOS transistor is connected to the inverting input and output of the rail-to-rail op-amp, respectively. The power MOS transistor outputs voltage VOUT through its drain. The buffer circuit is used to prevent overshoot of the output voltage and to make the output voltage curve change smoothly.

[0030] The control circuit includes a capacitor, a control transistor MN4, a voltage divider assembly, and a discharge transistor MN3. The positive terminal VA of the capacitor is connected to the drain of the discharge transistor MN3 and the non-inverting input of the rail-to-rail operational amplifier. The source of the control transistor MN4 is connected to the power supply ground, and the gate of the control transistor MN4 is connected to the drive voltage detection circuit. The control circuit facilitates the control of the soft-start time.

[0031] The voltage divider assembly includes passive or active components. Active components include transistors, but are not limited to transistors. Passive components include resistors, but are not limited to resistors. The resistors include a first resistor R1 and a second resistor R2. The soft-start time is set to 95 microseconds. The resistance ratio of the first resistor R1 and the second resistor R2 is 1:1. The negative terminal of the capacitor is connected to one end of the first resistor R1 and one end of the second resistor R2, respectively. The drain of the control transistor MN4 is connected to the other end of the second resistor R2. The other end of the first resistor R1 is connected to the drain of the power transistor Power MOS. Due to the minimum operating voltage limitation, the resistance value of the second resistor R2 accounts for a minimum of 50% of the total resistance value of the voltage divider assembly. The voltage divider assembly is used to feed back the output voltage VOUT to the capacitor, forming a feedback loop. The feedback voltage value is equal to 1 / 2 * VOUT, achieving fast start-up.

[0032] The drive voltage detection circuit includes a first inverter and a second inverter. The output terminal of the first inverter is connected to the input terminal of the second inverter, and the input terminal of the first inverter is connected to the gate of the power transistor Power MOS. The output terminal of the second inverter is connected to the gate of the control transistor MN4, and the drain of the power transistor Power MOS is connected to the first resistor R1. The drive voltage detection circuit is used to monitor the gate voltage of the power transistor Power MOS. When the gate voltage of the power transistor Power MOS is lower than 890mV, the drive voltage detection circuit cuts off the soft-start control circuit.

[0033] The first inverter includes a first transistor MP3, a second transistor MP4, and a third transistor MN5. The gate of the power transistor PowerMOS is connected to the gates of the first transistor MP3, the second transistor MP4, and the third transistor MN5, respectively. The drain of the first transistor MP3 is connected to the source of the second transistor MP4, the drain of the second transistor MP4 is connected to the drain of the third transistor MN5, and the source of the third transistor MN5 is grounded.

[0034] The second inverter includes a fourth transistor MP5, a fifth transistor MN6, and a sixth transistor MN7. The drain of the second transistor MP4 is connected to the gates of the fourth transistor MP5, the fifth transistor MN6, and the sixth transistor MN7, respectively. The gate of the control transistor MN4 is connected to the drains of the fourth transistor MP5 and the fifth transistor MN6, respectively. The source of the fifth transistor MN6 is connected to the drain of the sixth transistor MN7, and the source of the sixth transistor MN7 is grounded.

[0035] The rail-to-rail operational amplifier includes a complementary differential input circuit, comprising a first input transistor MN8, a second input transistor MP6, a third input transistor MP7, and a fourth input transistor MN9. The source of the first input transistor MN8 is connected to the source of the fourth input transistor MN9, and the source of the second input transistor MP6 is connected to the source of the third input transistor MP7. The drain of the discharge transistor MN3 is connected to the gates of the first input transistor MN8 and the second input transistor MP6, respectively. The gate of the power transistor MOS is connected to the gates of the third input transistor MP7 and the fourth input transistor MN9, respectively. The first input transistor MN8 and the fourth input transistor MN9 are N-type transistors, and the second input transistor MP6 and the third input transistor MP7 are P-type transistors. The N-type and P-type transistors are connected in parallel to extend the input common-mode range. When the input voltage (VA terminal) is close to the power supply, the P-type transistor differential pair is off, and the N-type transistor differential pair is on. When the input voltage (VA terminal) is close to zero, the N-type transistor differential pair is off, and the P-type transistor differential pair is on. Rail supports power rail swing, ensuring precise control of the gate voltage of the power transistor POWER MOS even at low dropout voltages, ensuring the power transistor is fully turned on or off, and making the voltage change curve smoother.

[0036] The soft-start control circuit also includes an enable control circuit, which includes a first enable transistor MP1, a second enable transistor MP2, a third enable transistor MN1, and an inverter INV. The gate of the first enable transistor MP1 is connected to the output terminal of the inverter INV and the gate of the third enable transistor MN1, respectively. The drain of the first enable transistor MP1 is connected to the gate of the discharge transistor MN3 and the drain of the third enable transistor MN1, respectively. The input terminal of the inverter INV and the gate of the second enable transistor MP2 are connected to the power-on reset signal, respectively. The drain of the second enable transistor MP2 is connected to the non-inverting input terminal of the rail-to-rail operational amplifier, the positive terminal VA of the capacitor, and the drain of the discharge transistor MN3, respectively. The source of the third enable transistor MN1 and the source of the discharge transistor MN3 are connected to the power supply ground, respectively. The enable control circuit is used to control the initial state of the soft-start control circuit before the power supply is powered on.

[0037] The soft-start control circuit also includes a current bias circuit, which includes a reference current source and a current mirror MN2. The output terminal IPTAT of the reference current source is connected to the source of the first enable transistor MP1, the drain of the current mirror MN2 is connected to the drain of the first enable transistor MP1, the gate of the current mirror MN2 is connected to the gate of the discharge transistor MN3, and the source of the current mirror MN2 and the source of the discharge transistor MN3 are respectively connected to the power supply ground. The current bias circuit is used to control the magnitude of the capacitor discharge current. Example

[0038] like Figures 1 to 3As shown, a soft-start control circuit based on output voltage feedback is disclosed. The soft-start control circuit includes an enable control circuit, a current bias circuit, a buffer circuit, a control circuit, a drive voltage detection circuit, and a power transistor (PowerMOS). The power transistor (PowerMOS) can also be a sampling power transistor. The power transistor (PowerMOS) is used to regulate the output voltage according to its conduction level.

[0039] The buffer circuit includes an operational amplifier, which is a rail-to-rail op-amp. The non-inverting input of the rail-to-rail op-amp is connected to the control circuit. The gate of the power MOS transistor is connected to the inverting input and output of the rail-to-rail op-amp, respectively. The power MOS transistor outputs voltage VOUT through its drain. The buffer circuit is used to prevent overshoot of the output voltage and to make the output voltage curve change smoothly.

[0040] The control circuit includes a capacitor, a control transistor MN4, a voltage divider assembly, and a discharge transistor MN3. The positive terminal VA of the capacitor is connected to the drain of the discharge transistor MN3 and the non-inverting input of the rail-to-rail operational amplifier. The source of the control transistor MN4 is connected to the power supply ground, and the gate of the control transistor MN4 is connected to the drive voltage detection circuit. The control circuit facilitates the control of the soft-start time.

[0041] The voltage divider assembly includes passive or active components. Active components include transistors, but are not limited to transistors. Passive components include resistors, but are not limited to resistors. The resistors include a first resistor R1 and a second resistor R2. The soft-start time is set to 145 microseconds. The resistance ratio of the first resistor R1 and the second resistor R2 is 1:3. The negative terminals of the capacitors are connected to one end of the first resistor R1 and one end of the second resistor R2, respectively. The drain of the control transistor MN4 is connected to the other end of the second resistor R2. The other end of the first resistor R1 is connected to the drain of the power transistor Power MOS. Due to the operating range limitation of the rail-to-rail operational amplifier's amplification region, the maximum proportion of the resistance value of the second resistor R2 to the total resistance value of the voltage divider assembly is 75%. If the proportion of the resistance value of the second resistor R2 to the total resistance value of the voltage divider assembly exceeds 75%, it will affect the accuracy of the soft-start time. The voltage divider assembly is used to feed back the output voltage VOUT to the capacitor, forming a feedback loop. The feedback voltage is equal to 3 / 4*VOUT, achieving slow start.

[0042] The drive voltage detection circuit includes a first inverter and a second inverter. The output terminal of the first inverter is connected to the input terminal of the second inverter, and the input terminal of the first inverter is connected to the gate of the power transistor Power MOS. The output terminal of the second inverter is connected to the gate of the control transistor MN4, and the drain of the power transistor Power MOS is connected to the first resistor R1. The drive voltage detection circuit is used to monitor the gate voltage of the power transistor Power MOS. When the gate voltage of the power transistor Power MOS is lower than 890mV, the drive voltage detection circuit cuts off the soft-start control circuit.

[0043] The first inverter includes a first transistor MP3, a second transistor MP4, and a third transistor MN5. The gate of the power transistor PowerMOS is connected to the gates of the first transistor MP3, the second transistor MP4, and the third transistor MN5, respectively. The drain of the first transistor MP3 is connected to the source of the second transistor MP4, the drain of the second transistor MP4 is connected to the drain of the third transistor MN5, and the source of the third transistor MN5 is grounded.

[0044] The second inverter includes a fourth transistor MP5, a fifth transistor MN6, and a sixth transistor MN7. The drain of the second transistor MP4 is connected to the gates of the fourth transistor MP5, the fifth transistor MN6, and the sixth transistor MN7, respectively. The gate of the control transistor MN4 is connected to the drains of the fourth transistor MP5 and the fifth transistor MN6, respectively. The source of the fifth transistor MN6 is connected to the drain of the sixth transistor MN7, and the source of the sixth transistor MN7 is grounded.

[0045] The rail-to-rail operational amplifier includes a complementary differential input circuit, comprising a first input transistor MN8, a second input transistor MP6, a third input transistor MP7, and a fourth input transistor MN9. The source of the first input transistor MN8 is connected to the source of the fourth input transistor MN9, and the source of the second input transistor MP6 is connected to the source of the third input transistor MP7. The drain of the discharge transistor MN3 is connected to the gates of the first input transistor MN8 and the second input transistor MP6, respectively. The gate of the power transistor MOS is connected to the gates of the third input transistor MP7 and the fourth input transistor MN9, respectively. The first input transistor MN8 and the fourth input transistor MN9 are N-type transistors, and the second input transistor MP6 and the third input transistor MP7 are P-type transistors. The N-type and P-type transistors are connected in parallel to extend the input common-mode range. When the input voltage (VA terminal) is close to the power supply, the P-type transistor differential pair is off, and the N-type transistor differential pair is on. When the input voltage (VA terminal) is close to zero, the N-type transistor differential pair is off, and the P-type transistor differential pair is on. Rail supports power rail swing, ensuring precise control of the gate voltage of the power transistor POWER MOS even at low dropout voltages, ensuring the power transistor is fully turned on or off, and making the voltage change curve smoother.

[0046] The soft-start control circuit also includes an enable control circuit, which includes a first enable transistor MP1, a second enable transistor MP2, a third enable transistor MN1, and an inverter INV. The gate of the first enable transistor MP1 is connected to the output terminal of the inverter INV and the gate of the third enable transistor MN1, respectively. The drain of the first enable transistor MP1 is connected to the gate of the discharge transistor MN3 and the drain of the third enable transistor MN1, respectively. The input terminal of the inverter INV and the gate of the second enable transistor MP2 are connected to the power-on reset signal, respectively. The drain of the second enable transistor MP2 is connected to the non-inverting input terminal of the rail-to-rail operational amplifier, the positive terminal VA of the capacitor, and the drain of the discharge transistor MN3, respectively. The source of the third enable transistor MN1 and the source of the discharge transistor MN3 are connected to the power supply ground, respectively. The enable control circuit is used to control the initial state of the soft-start control circuit before the power supply is powered on.

[0047] The soft-start control circuit also includes a current bias circuit, which includes a reference current source and a current mirror MN2. The output terminal IPTAT of the reference current source is connected to the source of the first enable transistor MP1, the drain of the current mirror MN2 is connected to the drain of the first enable transistor MP1, the gate of the current mirror MN2 is connected to the gate of the discharge transistor MN3, and the source of the current mirror MN2 and the source of the discharge transistor MN3 are respectively connected to the power supply ground. The current bias circuit is used to control the magnitude of the capacitor discharge current. Example

[0048] like Figures 1 to 3As shown, a soft-start control circuit based on output voltage feedback is disclosed. The soft-start control circuit includes an enable control circuit, a current bias circuit, a buffer circuit, a control circuit, a drive voltage detection circuit, and a power transistor (PowerMOS). The power transistor (PowerMOS) can also be a sampling power transistor. The power transistor (PowerMOS) is used to regulate the output voltage according to its conduction level.

[0049] The buffer circuit includes an operational amplifier, which is a rail-to-rail op-amp. The non-inverting input of the rail-to-rail op-amp is connected to the control circuit. The gate of the power MOS transistor is connected to the inverting input and output of the rail-to-rail op-amp, respectively. The power MOS transistor outputs voltage VOUT through its drain. The buffer circuit is used to prevent overshoot of the output voltage and to make the output voltage curve change smoothly.

[0050] The control circuit includes a capacitor, a control transistor MN4, a voltage divider assembly, and a discharge transistor MN3. The positive terminal VA of the capacitor is connected to the drain of the discharge transistor MN3 and the non-inverting input of the rail-to-rail operational amplifier. The source of the control transistor MN4 is connected to the power supply ground, and the gate of the control transistor MN4 is connected to the drive voltage detection circuit. The control circuit facilitates the control of the soft-start time.

[0051] The voltage divider assembly includes passive or active components. Active components include transistors, but are not limited to transistors. Passive components include resistors, but are not limited to resistors. The resistors include a first resistor R1 and a second resistor R2. The soft-start time is set to 130 microseconds. The resistance ratio of the first resistor R1 and the second resistor R2 is 1:2. The negative terminal of the capacitor is connected to one end of the first resistor R1 and one end of the second resistor R2, respectively. The drain of the control transistor MN4 is connected to the other end of the second resistor R2. The other end of the first resistor R1 is connected to the drain of the power transistor Power MOS. The voltage divider assembly is used to feed back the output voltage VOUT to the capacitor to form a feedback loop. The feedback voltage is equal to 2 / 3*VOUT, realizing medium-speed start-up.

[0052] The drive voltage detection circuit includes a first inverter and a second inverter. The output terminal of the first inverter is connected to the input terminal of the second inverter, and the input terminal of the first inverter is connected to the gate of the power transistor Power MOS. The output terminal of the second inverter is connected to the gate of the control transistor MN4, and the drain of the power transistor Power MOS is connected to the first resistor R1. The drive voltage detection circuit is used to monitor the gate voltage of the power transistor Power MOS. When the gate voltage of the power transistor Power MOS is lower than 890mV, the drive voltage detection circuit cuts off the soft-start control circuit.

[0053] The first inverter includes a first transistor MP3, a second transistor MP4, and a third transistor MN5. The gate of the power transistor PowerMOS is connected to the gates of the first transistor MP3, the second transistor MP4, and the third transistor MN5, respectively. The drain of the first transistor MP3 is connected to the source of the second transistor MP4, the drain of the second transistor MP4 is connected to the drain of the third transistor MN5, and the source of the third transistor MN5 is grounded.

[0054] The second inverter includes a fourth transistor MP5, a fifth transistor MN6, and a sixth transistor MN7. The drain of the second transistor MP4 is connected to the gates of the fourth transistor MP5, the fifth transistor MN6, and the sixth transistor MN7, respectively. The gate of the control transistor MN4 is connected to the drains of the fourth transistor MP5 and the fifth transistor MN6, respectively. The source of the fifth transistor MN6 is connected to the drain of the sixth transistor MN7, and the source of the sixth transistor MN7 is grounded.

[0055] The rail-to-rail operational amplifier includes a complementary differential input circuit, comprising a first input transistor MN8, a second input transistor MP6, a third input transistor MP7, and a fourth input transistor MN9. The source of the first input transistor MN8 is connected to the source of the fourth input transistor MN9, and the source of the second input transistor MP6 is connected to the source of the third input transistor MP7. The drain of the discharge transistor MN3 is connected to the gates of the first input transistor MN8 and the second input transistor MP6, respectively. The gate of the power transistor MOS is connected to the gates of the third input transistor MP7 and the fourth input transistor MN9, respectively. The first input transistor MN8 and the fourth input transistor MN9 are N-type transistors, and the second input transistor MP6 and the third input transistor MP7 are P-type transistors. The N-type and P-type transistors are connected in parallel to extend the input common-mode range. When the input voltage (VA terminal) is close to the power supply, the P-type transistor differential pair is off, and the N-type transistor differential pair is on. When the input voltage (VA terminal) is close to zero, the N-type transistor differential pair is off, and the P-type transistor differential pair is on. Rail supports power rail swing, ensuring precise control of the gate voltage of the power transistor POWER MOS even at low dropout voltages, ensuring the power transistor is fully turned on or off, and making the voltage change curve smoother.

[0056] The soft-start control circuit also includes an enable control circuit, which includes a first enable transistor MP1, a second enable transistor MP2, a third enable transistor MN1, and an inverter INV. The gate of the first enable transistor MP1 is connected to the output terminal of the inverter INV and the gate of the third enable transistor MN1, respectively. The drain of the first enable transistor MP1 is connected to the gate of the discharge transistor MN3 and the drain of the third enable transistor MN1, respectively. The input terminal of the inverter INV and the gate of the second enable transistor MP2 are connected to the power-on reset signal, respectively. The drain of the second enable transistor MP2 is connected to the non-inverting input terminal of the rail-to-rail operational amplifier, the positive terminal VA of the capacitor, and the drain of the discharge transistor MN3, respectively. The source of the third enable transistor MN1 and the source of the discharge transistor MN3 are connected to the power supply ground, respectively. The enable control circuit is used to control the initial state of the soft-start control circuit before the power supply is powered on.

[0057] The soft-start control circuit also includes a current bias circuit, which includes a reference current source and a current mirror MN2. The output terminal IPTAT of the reference current source is connected to the source of the first enable transistor MP1, the drain of the current mirror MN2 is connected to the drain of the first enable transistor MP1, the gate of the current mirror MN2 is connected to the gate of the discharge transistor MN3, and the source of the current mirror MN2 and the source of the discharge transistor MN3 are respectively connected to the power supply ground. The current bias circuit is used to control the magnitude of the capacitor discharge current.

[0058] The operation mode of this embodiment is as follows: The power-on reset signal POR controls the gates of the first enable transistor, the second enable transistor, and the third enable transistor. Before the power is powered on, the power-on reset signal POR is at a low level, the first enable transistor MP1 is turned off, the third enable transistor MN1 is turned on, the gate of the current mirror transistor MN2 is pulled to a low level, and the current mirror transistor MN2 is turned off, thereby preventing the reference current IPTAT from being mirrored to the discharge transistor MN3. Since the power-on reset signal POR is at a low level, the second enable transistor MP2 is turned on, and the initial state of the positive terminal VA of the capacitor is pulled up to a high level by the second enable transistor MP2. Due to the rail-to-rail operation amplifier, the gate voltage DRV (the inverting input port of the operation amplifier) ​​of the power transistor POWER MOS changes with VA (the non-inverting input port of the operation amplifier), and the power transistor POWER MOS is in the off state.

[0059] After the power supply is powered on, the power-on reset signal POR turns on the first enable transistor MP1, the current mirror transistor MN2 stops pulling down, the second enable transistor MP2 and the third enable transistor MN1 turn off, the reference current IPTAT flows through the first enable transistor MP1 to the drain of the current mirror transistor MN2, and then mirrors the reference current IPTAT to the discharge transistor MN3. The second enable transistor MP2 stops pulling up the positive terminal VA node of the capacitor, and the current of the discharge transistor MN3 discharges the positive terminal VA node of the capacitor. The voltage level of the positive terminal VA of the capacitor is pulled low, and the gate voltage level of the power transistor POWER MOS is also pulled low, so the power transistor POWER MOS slowly turns on.

[0060] The output voltage Vout of the power transistor POWER MOS is fed back to the negative terminal of the capacitor, forming a closed-loop control. Since the resistance ratio of the first resistor R1 to the second resistor R2 is 1:2, the feedback voltage fed back to the capacitor is 2 / 3*VOUT. Since the voltage across the capacitor cannot change abruptly, the capacitor discharges slowly, and the voltage at the positive terminal VA of the capacitor decreases slowly.

[0061] When the drive voltage detection circuit detects that the gate voltage DRV of the power transistor POWER MOS drops to 890mV, the drive voltage detection circuit pulls down the gate voltage SSC of the control transistor MN4, thereby turning off the soft-start control loop. The negative terminal of the capacitor will be directly coupled to the drain of the power transistor POWER MOS, and the output voltage VOUT will hardly change. At this time, the positive terminal VA of the capacitor will accelerate the discharge speed, and the power transistor POWER MOS will be fully turned on, completing the soft-start process.

[0062] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. A soft start control circuit based on output voltage feedback, characterized by, The soft-start control circuit includes: A buffer circuit, comprising an operational amplifier, is used to prevent overshoot of the output voltage and to smooth the output voltage curve. The control circuit includes a capacitor, a control transistor, a voltage divider assembly, and a discharge transistor. The capacitor is connected to the drain of the discharge transistor and the operational amplifier. The voltage divider assembly is connected to the capacitor and the control transistor respectively. The control circuit is used to control the soft-start time, and the voltage divider assembly is used to feed the output voltage back to the capacitor to form a feedback loop.

2. The output voltage feedback based soft start control circuit of claim 1, wherein: The operational amplifier includes a rail-to-rail op-amp, and the capacitor is connected to the drain of the discharge tube and the non-inverting input of the rail-to-rail op-amp, respectively.

3. The output voltage feedback based soft start control circuit of claim 2, wherein: The soft-start control circuit also includes a power transistor, the gate of which is connected to the inverting input and output terminals of the rail-to-rail operational amplifier, respectively; the power transistor is used to adjust the output voltage according to its conduction level.

4. The output voltage feedback based soft start control circuit of claim 3, wherein: The voltage divider assembly includes passive or active components. The passive components include resistors, which include a first resistor and a second resistor. The capacitor is connected to the first resistor and the second resistor, respectively. The drain of the control transistor is connected to the second resistor, and the first resistor is connected to the drain of the power transistor.

5. The output voltage feedback based soft start control circuit of claim 4, wherein: Adjust the ratio of the resistance values ​​of the first resistor to the second resistor according to the soft start time; the ratio of the resistance values ​​of the first resistor to the second resistor is 1:(1~3).

6. The output voltage feedback based soft start control circuit of claim 4, wherein: The soft-start control circuit also includes a drive voltage detection circuit, which includes a first inverter and a second inverter. The output terminal of the first inverter is connected to the input terminal of the second inverter. The input terminal of the first inverter is connected to the gate of the power transistor. The output terminal of the second inverter is connected to the gate of the control transistor. The drain of the power transistor is connected to the first resistor. The drive voltage detection circuit is used to monitor the gate voltage of the power transistor. When the gate voltage of the power transistor is lower than a preset threshold voltage, the drive voltage detection circuit disconnects the soft-start control circuit.

7. The output voltage feedback based soft-start control circuit of claim 6, wherein: The first inverter includes a first transistor, a second transistor, and a third transistor. The gate of the power transistor is connected to the gate of the first transistor, the second transistor, and the third transistor, respectively. The drain of the first transistor is connected to the source of the second transistor, and the drain of the second transistor is connected to the drain of the third transistor. The second inverter includes a fourth transistor, a fifth transistor, and a sixth transistor. The drain of the second transistor is connected to the gates of the fourth, fifth, and sixth transistors, respectively. The gate of the control transistor is connected to the drains of the fourth and fifth transistors, respectively. The source of the fifth transistor is connected to the drain of the sixth transistor.

8. The output voltage feedback based soft start control circuit of claim 3, wherein: The rail-to-rail operational amplifier includes a complementary differential input circuit, which includes a first input transistor, a second input transistor, a third input transistor, and a fourth input transistor. The source of the first input transistor is connected to the source of the fourth input transistor, and the source of the second input transistor is connected to the source of the third input transistor. The drain of the discharge transistor is connected to the gates of the first and second input transistors, respectively, and the gate of the power transistor is connected to the gates of the third and fourth input transistors, respectively. The first and fourth input transistors are both N-type transistors, and the second and third input transistors are both P-type transistors.

9. The soft-start control circuit based on output voltage feedback according to claim 1, characterized in that: The soft-start control circuit further includes an enable control circuit, which includes a first enable transistor, a second enable transistor, a third enable transistor, and an inverter. The gate of the first enable transistor is connected to the output terminal of the inverter and the gate of the third enable transistor, respectively. The drain of the first enable transistor is connected to the gate of the discharge transistor and the drain of the third enable transistor, respectively. The input terminal of the inverter and the gate of the second enable transistor are connected to a power-on reset signal, respectively. The drain of the second enable transistor is connected to the operational amplifier, the capacitor, and the drain of the discharge transistor, respectively. The source of the third enable transistor and the source of the discharge transistor are connected to power ground, respectively. The enable control circuit is used to control the initial state of the soft-start control circuit before power-on.

10. The output voltage feedback based soft start control circuit of claim 9, wherein: The soft-start control circuit also includes a current bias circuit, which includes a reference current source and a current mirror. The output terminal of the reference current source is connected to the source of the first enable transistor, the drain of the current mirror is connected to the drain of the first enable transistor, the gate of the current mirror is connected to the gate of the discharge transistor, and the source of the current mirror is connected to the power supply ground. The current bias circuit is used to control the magnitude of the capacitor discharge current.

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