Driving circuit for piezoelectric ceramics

Abstract

The utility model discloses a piezoelectric ceramic's drive circuit, including control unit, first amplification unit, voltage following unit, second amplification unit, filter unit and third amplification unit. Control unit is used to produce PWM signal, and first amplification unit is used to amplify PWM signal, and voltage following unit is used to produce the drive signal for driving piezoelectric ceramic based on the amplified PWM signal. Second amplification unit is used to amplify the output signal of piezoelectric ceramic, and then filter unit and third amplification unit further filter and amplify to produce feedback signal, and control unit still adjusts PWM signal based on feedback signal. Piezoelectric ceramic's drive circuit of the utility model can adapt to a plurality of piezoelectric ceramic resonance frequency in certain frequency range, and still can further adjust the frequency of PWM signal through the output signal of piezoelectric ceramic, to guarantee piezoelectric ceramic vibration in the quasi resonance state, further reduce the demand to drive voltage and power.

Description

Technical Field

[0001] This utility model belongs to the field of piezoelectric ceramic technology, specifically relating to a driving circuit for piezoelectric ceramics. Background Technology

[0002] Currently, there are two main methods for driving piezoelectric ceramics: self-excited oscillation and high-voltage, high-current, high-power driving. Self-excited oscillation is generally suitable for single-ended feedback piezoelectric ceramics, and in applications where frequency changes are small and temperature variations are minimal. Circuits using this method typically only support one self-excited frequency. High-voltage, high-current driving also suffers from the drawback of the resonant frequency being fixed by circuit parameters, and requires significant power to drive the piezoelectric ceramic.

[0003] The information disclosed in this background section is intended only to enhance the understanding of the overall background of this utility model and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Utility Model Content

[0004] The purpose of this invention is to provide a driving circuit for piezoelectric ceramics, which can solve the problems of fixed driving signal frequency and high power consumption in existing piezoelectric ceramic driving circuits.

[0005] To achieve the above objectives, the technical solution provided by a specific embodiment of this utility model is as follows:

[0006] A driving circuit for a piezoelectric ceramic includes: a control unit for generating a PWM signal; a first amplification unit connected to the control unit to amplify the PWM signal; a voltage follower unit connected to the first amplification unit and the piezoelectric ceramic to generate a driving signal for driving the piezoelectric ceramic based on the amplified PWM signal; a second amplification unit connected to the piezoelectric ceramic to amplify the output signal of the piezoelectric ceramic; a filtering unit connected to the second amplification unit to filter the amplified output signal; and a third amplification unit connected to the filtering unit and the control unit to amplify the filtered output signal to generate a feedback signal. The control unit is further configured to adjust the PWM signal based on the feedback signal.

[0007] In one or more embodiments of the present invention, the first amplification unit includes a first amplifier, a first resistor, and a second resistor. The first input terminal of the first amplifier is connected to the control unit to receive the PWM signal. The first terminal of the first resistor is connected to a reference voltage. The second terminal of the first resistor and the first terminal of the second resistor are connected to the second input terminal of the first amplifier. The output terminal of the first amplifier and the second terminal of the second resistor are connected to the voltage follower unit to output the amplified PWM signal.

[0008] In one or more embodiments of the present invention, the first amplification unit further includes a third resistor, the first end of which is connected to the control unit to receive the PWM signal, and the second end of which is connected to the first input terminal of the first amplifier; or the first amplification unit further includes a third resistor and a first capacitor, the first end of which and the first end of which are connected to the control unit to receive the PWM signal, and the second end of which and the second end of which are connected to the first input terminal of the first amplifier.

[0009] In one or more embodiments of this utility model, the voltage follower unit includes a second amplifier, a fourth resistor, and a fifth resistor. The first end of the fourth resistor is connected to the first amplifier unit to receive the amplified PWM signal. The second end of the fourth resistor is connected to the first input terminal of the second amplifier. The first end of the fifth resistor is connected to the second input terminal of the second amplifier. The second end of the fifth resistor and the output terminal of the second amplifier are connected to the piezoelectric ceramic to generate the drive signal.

[0010] In one or more embodiments of the present invention, the voltage follower unit further includes a second capacitor, the first end of which is connected to the second input terminal of the second amplifier, and the second end of which is connected to the output terminal of the second amplifier; and / or the voltage follower unit further includes a sixth resistor, the first end of which is connected to the output terminal of the second amplifier, and the second end of which is connected to the piezoelectric ceramic to generate the drive signal; and / or the voltage follower unit further includes a seventh resistor, the first end of which is connected to a reference voltage, and the second end of which is connected to the first end of the fourth resistor.

[0011] In one or more embodiments of this utility model, the second amplification unit includes a third amplifier, an eighth resistor, a ninth resistor, a tenth resistor, and an eleventh resistor. The first terminal of the eighth resistor is connected to the piezoelectric ceramic to receive a first output signal from the piezoelectric ceramic. The first terminal of the ninth resistor is connected to the piezoelectric ceramic to receive a second output signal from the piezoelectric ceramic. The first output signal and the second output signal form a differential signal. The second terminal of the eighth resistor and the first terminal of the eleventh resistor are connected to the first input terminal of the third amplifier. The second terminal of the eleventh resistor is connected to a reference voltage. The second terminal of the ninth resistor and the first terminal of the tenth resistor are connected to the second input terminal of the third amplifier. The second terminal of the tenth resistor and the output terminal of the third amplifier are connected to the filtering unit. To generate the amplified output signal; or the second amplification unit includes a third amplifier, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a twelfth resistor, wherein the first end of the eighth resistor is connected to the piezoelectric ceramic to receive the output signal of the piezoelectric ceramic, the second end of the eighth resistor and the first end of the eleventh resistor are connected to the first input terminal of the third amplifier, the second end of the eleventh resistor is connected to a reference voltage, the first end of the twelfth resistor is connected to a reference voltage, the second end of the twelfth resistor is connected to the first end of the ninth resistor, the second end of the ninth resistor and the first end of the tenth resistor are connected to the second input terminal of the third amplifier, and the second end of the tenth resistor and the output terminal of the third amplifier are connected to the filtering unit to generate the amplified output signal.

[0012] In one or more embodiments of this utility model, the second amplification unit further includes a third capacitor, the first end of which is connected to the first end of the ninth resistor, and the second end of which is connected to the first end of the eighth resistor; and / or the second amplification unit further includes a diode, the first end of which is connected to the first end of the ninth resistor, and the second end of which is connected to the first end of the eighth resistor; and / or the second amplification unit further includes a fourth capacitor, the first end of which is connected to the second input terminal of the third amplifier, and the second end of which is connected to the output terminal of the third amplifier.

[0013] In one or more embodiments of this utility model, the filtering unit includes a fourth amplifier, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a fifth capacitor, and a sixth capacitor. The first end of the thirteenth resistor is connected to the second amplification unit to receive the amplified output signal. The second end of the thirteenth resistor is connected to the first end of the fourteenth resistor, the first end of the fifteenth resistor, and the first end of the fifth capacitor. The second end of the fifth capacitor is connected to a reference voltage. The second end of the fourteenth resistor and the first end of the sixth capacitor are connected to the second input terminal of the fourth amplifier. The first input terminal of the fourth amplifier is connected to the reference voltage. The second end of the fifteenth resistor, the second end of the sixth capacitor, and the output terminal of the fourth amplifier are connected to the third amplification unit to generate the filtered output signal.

[0014] In one or more embodiments of this utility model, the third amplification unit includes a fifth amplifier, a seventeenth resistor, and an eighteenth resistor. The first input terminal of the fifth amplifier is connected to a reference voltage. The first terminal of the seventeenth resistor is connected to the filtering unit to receive the filtered output signal. The second terminal of the seventeenth resistor and the first terminal of the eighteenth resistor are connected to the second input terminal of the fifth amplifier. The second terminal of the eighteenth resistor and the output terminal of the fifth amplifier are connected to the control unit to generate the feedback signal.

[0015] In one or more embodiments of this utility model, the third amplification unit further includes a sixteenth resistor, and the first input terminal of the fifth amplifier is connected to a reference voltage through the sixteenth resistor.

[0016] Compared with existing technologies, the piezoelectric ceramic driving circuit of this invention uses an amplified PWM signal to drive the piezoelectric ceramic. By simply adjusting the frequency of the PWM wave, it can adapt to multiple resonant frequencies of the piezoelectric ceramic within a certain frequency range, thus improving the circuit's versatility. Simultaneously, the control unit can further adjust the frequency of the PWM signal based on the piezoelectric ceramic's output signal to ensure that the piezoelectric ceramic vibrates in a quasi-resonant state, further reducing the demand for driving voltage and power. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1This is a circuit diagram of the driving circuit for the piezoelectric ceramic in one embodiment of the present invention.

[0019] Figure 2 This is a circuit diagram of the driving circuit for the piezoelectric ceramic in another embodiment of the present invention. Detailed Implementation

[0020] To enable those skilled in the art to better understand the technical solutions of this utility model, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of this utility model.

[0021] The terms "coupled," "connected," or "linked" in this specification include both direct and indirect connections. Indirect connections are those made through an intermediate medium, such as those made through an electrically conductive medium, which may have parasitic inductance or capacitance. Indirect connections may also include connections made through other active or passive devices to achieve the same or similar functional purpose, such as connections through switches, follower circuits, or other circuits or components. Furthermore, in this specification, terms such as "first" and "second" are primarily used to distinguish one technical feature from another, and do not necessarily require or imply any actual relationship, quantity, or order between these technical features.

[0022] In the detailed description of this specification, reference is made to the accompanying drawings, which form a part thereof, wherein like reference numerals always denote like parts, and wherein exemplary embodiments are shown by way of example that may be implemented. It should be understood that other embodiments may be utilized, and structural or logical changes may be made, without departing from the scope of this application. Therefore, the following detailed description should not be considered limiting.

[0023] The various operations in the specification may be described sequentially as multiple discrete actions or operations in a manner most conducive to understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. Various additional operations may be performed in additional embodiments and / or the described operations may be omitted.

[0024] For the purposes of this application, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of this application, the phrase "A, B and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0025] Various components and devices may be mentioned or shown in the singular form herein, but only for the convenience of discussion, and any element mentioned in the singular form may include multiple such elements as taught herein.

[0026] The description uses the phrases "in one embodiment," "in other embodiments," or "in some embodiments," each of which may refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," etc., used in relation to embodiments of this application are synonymous.

[0027] Example 1

[0028] like Figure 1 As shown, the driving circuit of the piezoelectric ceramic in one embodiment of the present invention includes: a control unit (not shown in the figure), a first amplification unit 10, a voltage follower unit 20, a second amplification unit 30, a filter unit 40, and a third amplification unit 50.

[0029] The control unit generates a PWM signal PWM1. A first amplification unit 10 is connected to the control unit to amplify the PWM signal PWM1. A voltage follower unit 20 is connected to the first amplification unit 10 and the piezoelectric ceramic Y1 to generate a drive signal PWM2 for driving the piezoelectric ceramic Y1 based on the amplified PWM signal.

[0030] The second amplification unit 30 is connected to the piezoelectric ceramic Y1 to amplify the output signal of the piezoelectric ceramic Y1. The filtering unit 40 is connected to the second amplification unit 30 to filter the amplified output signal. The third amplification unit 50 is connected to the filtering unit 40 and the control unit to amplify the filtered output signal to generate a feedback signal Rect. The control unit is also used to adjust the PWM signal PWM1 based on the feedback signal Rect.

[0031] like Figure 1 As shown, the first amplification unit 10 includes a first amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3, and a first capacitor C1.

[0032] Specifically, the first terminal of the third resistor R3 and the first terminal of the first capacitor C1 are connected to the control unit to receive the PWM signal PWM1. The second terminal of the third resistor R3 and the second terminal of the first capacitor C1 are connected to the first input terminal of the first amplifier U1. The first terminal of the first resistor R1 is connected to the reference voltage vREF. The second terminal of the first resistor R1 and the first terminal of the second resistor R2 are connected to the second input terminal of the first amplifier U1. The output terminal of the first amplifier U1 and the second terminal of the second resistor R2 are connected to the voltage follower unit 20 to output the amplified PWM signal.

[0033] A non-inverting amplifier, consisting of a first amplifier U1, a first resistor R1, and a second resistor R2, amplifies the PWM signal PWM1 appropriately, preventing the piezoelectric ceramic Y1 from failing to drive due to excessive load. A third resistor R3 balances the bias current, preventing output errors caused by bias current errors in the first amplifier U1. A first capacitor C1 allows the PWM signal PWM1 to be approximately short-circuited when its frequency is high, preventing signal distortion.

[0034] In other embodiments, the first capacitor C1 may be omitted, or the first capacitor C1 and the third resistor R3 may be omitted, in which case the first input terminal of the first amplifier U1 is connected to the control unit to receive the PWM signal PWM1.

[0035] like Figure 1 As shown, the voltage follower unit 20 includes a second amplifier U2, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and a second capacitor C2.

[0036] Specifically, the first terminal of the fourth resistor R4 is connected to the output terminal of the first amplifier U1 to receive the amplified PWM signal, and the second terminal of the fourth resistor R4 is connected to the first input terminal of the second amplifier U2. The first terminal of the fifth resistor R5 and the first terminal of the second capacitor C2 are connected to the second input terminal of the second amplifier U2. The second terminals of the fifth resistor R5, the second terminal of the second capacitor C2, and the output terminal of the second amplifier U2 are connected to the first terminal of the sixth resistor R6. The second terminal of the sixth resistor R6 is connected to the piezoelectric ceramic Y1 to generate the drive signal PWM2.

[0037] In one embodiment, the second end of the sixth resistor R6 is connected to the power input terminal of the piezoelectric ceramic Y1, and the common terminal of the piezoelectric ceramic Y1 can be connected to the ground voltage.

[0038] The first terminal of the seventh resistor R7 is connected to the reference voltage vREF, and the second terminal of the seventh resistor R7 is connected to the first terminal of the fourth resistor R4. The seventh resistor R7 is used to provide a pull-up bias voltage for the single-supply second amplifier U2. In other embodiments, the seventh resistor R7 may be omitted.

[0039] A voltage follower is formed by the second amplifier U2, the fourth resistor R4, and the fifth resistor R5, which can improve the load capacity of the amplified PWM signal.

[0040] By setting the sixth resistor R6, the current of the drive signal PWM2 can be limited to prevent short circuits outside the signal output from burning out the second amplifier U2. In other embodiments, the sixth resistor R6 may not be set, in which case the output terminal of the second amplifier U2 is directly connected to the piezoelectric ceramic Y1 to generate the drive signal PWM2.

[0041] By including the second capacitor C2, it can be combined with the fifth resistor R5 to form a first-order filter, filtering out unwanted noise. In other embodiments, the second capacitor C2 may not be included.

[0042] In one embodiment, the voltage follower unit 20 may further include an eighth capacitor C8 and a ninth capacitor C9. The power supply terminal of the second amplifier U2 may be connected to the power supply voltage VCC, the first terminal of the eighth capacitor C8 and the first terminal of the ninth capacitor C9, and the second terminal of the eighth capacitor C8 and the second terminal of the ninth capacitor C9 may be connected to the ground voltage. The eighth capacitor C8 and the ninth capacitor C9 are used to filter the power supply terminal of the second amplifier U2 to provide a clean and stable power supply.

[0043] like Figure 1 As shown, the second amplification unit 30 includes a third amplifier U3, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a third capacitor C3, a fourth capacitor C4, and a diode D1.

[0044] Among them, the first end of the eighth resistor R8 is connected to the piezoelectric ceramic Y1 to receive the first output signal RE1 of the piezoelectric ceramic Y1, and the first end of the ninth resistor R9 is connected to the piezoelectric ceramic Y1 to receive the second output signal RE2 of the piezoelectric ceramic Y1. The first output signal RE1 and the second output signal RE2 are a set of differential signals.

[0045] In one embodiment, the piezoelectric ceramic Y1 can be a piezoelectric ceramic with dual output terminals, such as a composite piezoelectric ceramic. When a drive signal PWM2 is applied to such a piezoelectric ceramic Y1, based on the piezoelectric effect, the two output terminals of the piezoelectric ceramic Y1 will generate a first output signal RE1 and a second output signal RE2 respectively, and the first output signal RE1 and the second output signal RE2 have a differential mode relationship.

[0046] In one embodiment, the first output signal RE1 is a positive differential signal, and the second output signal RE2 is a negative differential signal. The first input terminal of the third amplifier U3 is a non-inverting input terminal, and the second input terminal of the third amplifier U3 is an inverting input terminal. In other embodiments, the first output signal RE1 may also be a negative differential signal, the second output signal RE2 may also be a positive differential signal, the first input terminal of the third amplifier U3 may also be an inverting input terminal, and the second input terminal of the third amplifier U3 may also be a non-inverting input terminal.

[0047] The second terminal of the eighth resistor R8 and the first terminal of the eleventh resistor R11 are connected to the first input terminal of the third amplifier U3. The second terminal of the eleventh resistor R11 is connected to the reference voltage vREF. The second terminal of the ninth resistor R9, the first terminal of the tenth resistor R10, and the first terminal of the fourth capacitor C4 are connected to the second input terminal of the third amplifier U3. The second terminal of the tenth resistor R10, the second terminal of the fourth capacitor C4, and the output terminal of the third amplifier U3 are connected to the filter unit 40 to generate the amplified output signal.

[0048] A differential amplifier circuit is formed by the third amplifier U3, the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10. The output signal is a multiple of the difference between the first output signal RE1 and the second output signal RE2. By setting the eleventh resistor R11, the first output signal RE1 is boosted, ensuring that the third amplifier U3 works normally.

[0049] The first terminal of the third capacitor C3 is connected to the first terminal of the ninth resistor R9, and the second terminal of the third capacitor C3 is connected to the first terminal of the eighth resistor R8. The third capacitor C3 is used to filter out differential mode interference. In other embodiments, the third capacitor C3 may not be provided.

[0050] The first terminal of diode D1 is connected to the first terminal of the ninth resistor R9, and the second terminal of diode D1 is connected to the first terminal of the eighth resistor R8. Preferably, diode D1 is a bidirectional diode D1. Diode D1 is used to protect the input terminal of the third amplifier U3, preventing excessive signal from damaging the operational amplifier. In other embodiments, diode D1 may be omitted.

[0051] The fourth capacitor C4 and the tenth resistor R10 together form a first-order filter to filter out unwanted noise. In other embodiments, the fourth capacitor C4 may be omitted.

[0052] like Figure 1 As shown, the filter unit 40 includes a fourth amplifier U4, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a fifth capacitor C5, and a sixth capacitor C6.

[0053] Specifically, the first end of the thirteenth resistor R13 is connected to the output terminal of the third amplifier U3 to receive the amplified output signal. The second end of the thirteenth resistor R13 is connected to the first end of the fourteenth resistor R14, the first end of the fifteenth resistor R15, and the first end of the fifth capacitor C5. The second end of the fifth capacitor C5 is connected to the reference voltage vREF. The second end of the fourteenth resistor R14 and the first end of the sixth capacitor C6 are connected to the second input terminal of the fourth amplifier U4. The first input terminal of the fourth amplifier U4 is connected to the reference voltage vREF. The second end of the fifteenth resistor R15, the second end of the sixth capacitor C6, and the output terminal of the fourth amplifier U4 are connected to the third amplification unit 50 to generate the feedback signal Rect.

[0054] A second-order Gaussian low-pass filter is formed by the fourth amplifier U4, the thirteenth resistor R13, the fourteenth resistor R14, the fifteenth resistor R15, the fifth capacitor C5, and the sixth capacitor C6, which can filter out some noise. In one embodiment, in the selection of parameters for each component in the filter unit 40, in order to allow signals in a certain frequency range to pass, the cutoff frequency of the filter unit 40 cannot be selected from the upper or lower limit, but should be selected from the middle frequency of the frequency range, so as not to filter out all useful signals. The reason for choosing a Gaussian filter is that its curve is not too steep, so as not to lose too much useful signal.

[0055] like Figure 1 As shown, the third amplification unit includes the fifth amplifier U5, the sixteenth resistor R16, the seventeenth resistor R17, and the eighteenth resistor R18.

[0056] Specifically, the first end of the sixteenth resistor R16 is connected to the reference voltage vREF, the second end of the sixteenth resistor R16 is connected to the first input terminal of the fifth amplifier U5, the first end of the seventeenth resistor R17 is connected to the output terminal of the fourth amplifier U4 to receive the feedback signal Rect, the second end of the seventeenth resistor R17 and the first end of the eighteenth resistor R18 are connected to the second input terminal of the fifth amplifier U5, and the second end of the eighteenth resistor R18 and the output terminal of the fifth amplifier U5 are connected to the control unit to output the amplified feedback signal Rect.

[0057] Here, an inverting amplifier is formed by the fifth amplifier U5, the sixteenth resistor R16, the seventeenth resistor R17, and the eighteenth resistor R18. The amplification factor can be determined by setting the resistance ratio of the seventeenth resistor R17 to the eighteenth resistor R18. Preferably, R17:R18 = 1 / 1000. When the resistance ratio of the seventeenth resistor R17 to the eighteenth resistor R18 is large, any small signal will be converted into a pulse (square wave), which is beneficial for the control unit to obtain waveform parameters. The sixteenth resistor R16 can be used to balance the bias current.

[0058] In other embodiments, the third amplification unit may be omitted, and the second terminal of the fifteenth resistor R15, the second terminal of the sixth capacitor C6, and the output terminal of the fourth amplifier U4 may be directly connected to the control unit to generate a feedback signal Rect.

[0059] In one embodiment, the control unit may be a microcontroller. In other embodiments, the control unit may also be other control chips, modules, or controllers such as MPUs, DSPs, and PLDs.

[0060] In one embodiment, the driving circuit may further include a voltage generation circuit 60, which is connected to the power supply voltage VCC to generate the reference voltage vREF required by the circuit based on the power supply voltage VCC. The voltage generation circuit 60 may include a sixth amplifier U6, a nineteenth resistor R19, a twentieth resistor R20, a seventh capacitor C7, a tenth capacitor C10, and an eleventh capacitor C11.

[0061] In this configuration, the first terminal of the nineteenth resistor R19 is connected to the power supply voltage VCC. The second terminal of the nineteenth resistor R19, the first terminal of the twentieth resistor R20, and the first terminal of the seventh capacitor C7 are connected to the first input terminal of the sixth amplifier U6. The second terminals of the twentieth resistor R20 and the seventh capacitor C7 are connected to ground. The second input terminal and the output terminal of the sixth amplifier U6 are connected to the second terminal of the eleventh resistor R11 to generate the reference voltage vREF. The power supply terminal of the sixth amplifier U6 is connected to the power supply voltage VCC, the first terminals of the tenth capacitor C10 and the eleventh capacitor C11, and the second terminals of the tenth capacitor C10 and the eleventh capacitor C11 are connected to ground.

[0062] For example, the nineteenth resistor R19 has the same resistance value as the twentieth resistor R20, and the reference voltage vREF is VCC / 2.

[0063] In other embodiments, the voltage generation circuit 60 may be omitted, and the reference voltage vREF may be provided by other circuits.

[0064] In one embodiment, the first input terminals of the first amplifier U1, the second amplifier U2, the third amplifier U3, the fourth amplifier U4, the fifth amplifier U5, and the sixth amplifier U6 are all non-inverting input terminals, while the second input terminals of the first amplifier U1, the second amplifier U2, the third amplifier U3, the fourth amplifier U4, the fifth amplifier U5, and the sixth amplifier U6 are all inverting input terminals. The first amplifier U1, the second amplifier U2, the third amplifier U3, the fourth amplifier U4, the fifth amplifier U5, and the sixth amplifier U6 can all be existing differential amplifier circuits.

[0065] In other embodiments, the two input terminal types of each of the above amplifiers can be interchanged, and the connection methods can be adapted accordingly.

[0066] In practical operation, by using the PWM signal PWM1 to drive the piezoelectric ceramic Y1, it is only necessary to adjust the frequency of the PWM wave to adapt to the resonant frequency of multiple piezoelectric ceramics Y1 within a certain frequency range, thus improving the versatility of the circuit.

[0067] The output signal of the piezoelectric ceramic Y1 is amplified and filtered by the second amplification unit 30, the filtering unit 40, and the third amplification unit 50, enabling the control unit to sample and acquire the characteristic parameters of the output signal. Based on the waveform characteristics (duty cycle, period, amplitude, etc.) of the output signal, the frequency of the PWM signal PWM1 is adjusted, thereby causing the piezoelectric ceramic Y1 to vibrate at the desired frequency, specifically, to vibrate in a quasi-resonant state. For example, a series of PWM signals PWM1 with different frequencies can be output first. Then, utilizing the characteristic that the difference between the period and duty cycle of the feedback signal and the period and duty cycle of the PWM signal PWM1 reaches its minimum when the piezoelectric ceramic Y1 resonates, the resonant frequency of the piezoelectric ceramic Y1 can be found, and the frequency of the output PWM signal PWM1 can be changed to this frequency value, thus completing the externally excited drive at the resonant frequency. In this state, the piezoelectric ceramic Y1 achieves efficient energy utilization, thus achieving good driving effect without requiring a large driving voltage and power.

[0068] Example 2

[0069] like Figure 2 As shown, the driving circuit of the piezoelectric ceramic in this embodiment differs from that in Embodiment 1 only in the second amplification unit 30.

[0070] Specifically, the second amplification unit 30 includes a third amplifier U3, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a third capacitor C3, a fourth capacitor C4, and a diode D1.

[0071] The first end of the eighth resistor R8 is connected to the piezoelectric ceramic Y1 to receive the output signal RE of the piezoelectric ceramic Y1. The second end of the eighth resistor R8 and the first end of the eleventh resistor R11 are connected to the first input terminal of the third amplifier U3. The second end of the eleventh resistor R11 is connected to the reference voltage vREF.

[0072] The first terminal of the twelfth resistor R12 is connected to the reference voltage vREF. The second terminal of the twelfth resistor R12 is connected to the first terminal of the ninth resistor R9. The second terminal of the ninth resistor R9, the first terminal of the tenth resistor R10, and the first terminal of the fourth capacitor C4 are connected to the second input terminal of the third amplifier U3. The second terminal of the tenth resistor R10, the second terminal of the fourth capacitor C4, and the output terminal of the third amplifier U3 are connected to the filter unit 40 to output the amplified output signal.

[0073] A differential amplifier circuit is formed by the third amplifier U3, the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10. The amplified output signal is proportional to the difference between the output signal RE and the reference voltage vREF. By setting the eleventh resistor R11, the output signal RE is boosted, ensuring that the third amplifier U3 works normally.

[0074] In one embodiment, the piezoelectric ceramic Y1 can be a common single-output piezoelectric ceramic Y1, or a dual-output piezoelectric ceramic Y1. In this case, the first end of the eighth resistor R8 can be connected to one output end of the piezoelectric ceramic Y1.

[0075] In one embodiment, the first input terminal of the third amplifier U3 is a non-inverting input terminal, and the second input terminal of the third amplifier U3 is an inverting input terminal. In other embodiments, the first input terminal of the third amplifier U3 may also be an inverting input terminal, and the second input terminal of the third amplifier U3 may also be a non-inverting input terminal, thus the connection method is adjusted accordingly.

[0076] The first terminal of the third capacitor C3 is connected to the first terminal of the ninth resistor R9, and the second terminal of the third capacitor C3 is connected to the first terminal of the eighth resistor R8. The third capacitor C3 is used to filter out differential mode interference. In other embodiments, the third capacitor C3 may not be provided.

[0077] The first terminal of diode D1 is connected to the first terminal of the ninth resistor R9, and the second terminal of diode D1 is connected to the first terminal of the eighth resistor R8. Preferably, diode D1 is a bidirectional diode D1. Diode D1 is used to protect the input terminal of the third amplifier U3, preventing excessive signal from damaging the operational amplifier. In other embodiments, diode D1 may be omitted.

[0078] The fourth capacitor C4 and the tenth resistor R10 together form a first-order filter to filter out unwanted noise. In other embodiments, the fourth capacitor C4 may be omitted.

[0079] In this embodiment, the circuit structure of other circuit parts of the driving circuit of the piezoelectric ceramic Y1, as well as the working principle of the entire driving circuit, are the same as in Embodiment 1, and will not be described again here.

[0080] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0081] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A drive circuit for piezoelectric ceramics, characterized by comprising: include: Control unit, used to generate PWM signals; The first amplification unit is connected to the control unit to amplify the PWM signal; A voltage follower unit, connected to the first amplification unit and the piezoelectric ceramic, generates a drive signal for driving the piezoelectric ceramic based on the amplified PWM signal; The second amplification unit is connected to the piezoelectric ceramic to amplify the output signal of the piezoelectric ceramic; A filtering unit is connected to the second amplification unit to filter the amplified output signal; The third amplification unit is connected to the filtering unit and the control unit to amplify the filtered output signal to generate a feedback signal. The control unit is also used to adjust the PWM signal based on the feedback signal.

2. The piezoelectric ceramic drive circuit according to claim 1, characterized by The first amplification unit includes a first amplifier, a first resistor, and a second resistor. The first input terminal of the first amplifier is connected to the control unit to receive the PWM signal. The first terminal of the first resistor is connected to a reference voltage. The second terminal of the first resistor and the first terminal of the second resistor are connected to the second input terminal of the first amplifier. The output terminal of the first amplifier and the second terminal of the second resistor are connected to the voltage follower unit to output the amplified PWM signal.

3. The piezoelectric ceramic drive circuit according to claim 2, characterized by The first amplification unit further includes a third resistor, the first end of which is connected to the control unit to receive the PWM signal, and the second end of which is connected to the first input terminal of the first amplifier; or The first amplification unit further includes a third resistor and a first capacitor. The first end of the third resistor and the first end of the first capacitor are connected to the control unit to receive the PWM signal. The second end of the third resistor and the second end of the first capacitor are connected to the first input terminal of the first amplifier.

4. The driving circuit for piezoelectric ceramics according to claim 1, characterized in that, The voltage follower unit includes a second amplifier, a fourth resistor, and a fifth resistor. The first end of the fourth resistor is connected to the first amplifier unit to receive the amplified PWM signal. The second end of the fourth resistor is connected to the first input terminal of the second amplifier. The first end of the fifth resistor is connected to the second input terminal of the second amplifier. The second end of the fifth resistor and the output terminal of the second amplifier are connected to the piezoelectric ceramic to generate the drive signal.

5. The driving circuit for piezoelectric ceramics according to claim 4, characterized in that, The voltage follower unit further includes a second capacitor, a first terminal of which is connected to the second input terminal of the second amplifier, and a second terminal of which is connected to the output terminal of the second amplifier; and / or The voltage follower unit further includes a sixth resistor, the first end of which is connected to the output terminal of the second amplifier, and the second end of which is connected to the piezoelectric ceramic to generate the drive signal; and / or The voltage follower unit also includes a seventh resistor, the first end of which is connected to a reference voltage, and the second end of which is connected to the first end of the fourth resistor.

6. The driving circuit for piezoelectric ceramics according to claim 1, characterized in that, The second amplification unit includes a third amplifier, an eighth resistor, a ninth resistor, a tenth resistor, and an eleventh resistor. The first terminal of the eighth resistor is connected to the piezoelectric ceramic to receive a first output signal from the piezoelectric ceramic. The first terminal of the ninth resistor is connected to the piezoelectric ceramic to receive a second output signal from the piezoelectric ceramic. The first and second output signals form a differential signal. The second terminals of the eighth and eleventh resistors are connected to the first input terminal of the third amplifier. The second terminal of the eleventh resistor is connected to a reference voltage. The second terminals of the ninth and tenth resistors are connected to the second input terminal of the third amplifier. The second terminal of the tenth resistor and the output terminal of the third amplifier are connected to the filtering unit to generate the amplified output signal; or The second amplification unit includes a third amplifier, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a twelfth resistor. The first end of the eighth resistor is connected to the piezoelectric ceramic to receive the output signal of the piezoelectric ceramic. The second end of the eighth resistor and the first end of the eleventh resistor are connected to the first input terminal of the third amplifier. The second end of the eleventh resistor is connected to a reference voltage. The first end of the twelfth resistor is connected to a reference voltage. The second end of the twelfth resistor is connected to the first end of the ninth resistor. The second end of the ninth resistor and the first end of the tenth resistor are connected to the second input terminal of the third amplifier. The second end of the tenth resistor and the output terminal of the third amplifier are connected to the filtering unit to generate the amplified output signal.

7. The driving circuit for piezoelectric ceramics according to claim 6, characterized in that, The second amplification unit further includes a third capacitor, the first terminal of which is connected to the first terminal of the ninth resistor, and the second terminal of which is connected to the first terminal of the eighth resistor; and / or The second amplification unit further includes a diode, the first terminal of which is connected to the first terminal of the ninth resistor, and the second terminal of which is connected to the first terminal of the eighth resistor; and / or The second amplification unit further includes a fourth capacitor, the first end of which is connected to the second input terminal of the third amplifier, and the second end of which is connected to the output terminal of the third amplifier.

8. The driving circuit for piezoelectric ceramics according to claim 1, characterized in that, The filtering unit includes a fourth amplifier, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a fifth capacitor, and a sixth capacitor. The first terminal of the thirteenth resistor is connected to the second amplification unit to receive the amplified output signal. The second terminal of the thirteenth resistor is connected to the first terminals of the fourteenth resistor, the fifteenth resistor, and the fifth capacitor. The second terminal of the fifth capacitor is connected to a reference voltage. The second terminal of the fourteenth resistor and the first terminal of the sixth capacitor are connected to the second input terminal of the fourth amplifier. The first input terminal of the fourth amplifier is connected to the reference voltage. The second terminal of the fifteenth resistor, the second terminal of the sixth capacitor, and the output terminal of the fourth amplifier are connected to the third amplification unit to generate the filtered output signal.

9. The driving circuit for piezoelectric ceramics according to claim 1, characterized in that, The third amplification unit includes a fifth amplifier, a seventeenth resistor, and an eighteenth resistor. The first input terminal of the fifth amplifier is connected to a reference voltage. The first terminal of the seventeenth resistor is connected to the filtering unit to receive the filtered output signal. The second terminal of the seventeenth resistor and the first terminal of the eighteenth resistor are connected to the second input terminal of the fifth amplifier. The second terminal of the eighteenth resistor and the output terminal of the fifth amplifier are connected to the control unit to generate the feedback signal.

10. The driving circuit for piezoelectric ceramics according to claim 9, characterized in that, The third amplification unit also includes a sixteenth resistor, and the first input terminal of the fifth amplifier is connected to the reference voltage through the sixteenth resistor.

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