A POE plug-in card circuit

Abstract

The utility model discloses a kind of POE card-in plug circuit, it is related to communication technical field, the POE card-in plug circuit includes POE controller chip, connector J1, electrostatic protection circuit and signal protection circuit;The POE controller chip is connected with connector J1, signal protection circuit;The electrostatic protection circuit is connected between connector J1 and signal protection circuit.The beneficial effects of the utility model: can adapt to the dynamic change of use scene, save equipment investment cost.

Description

Technical Field

[0001] This utility model relates to the field of communication technology, and more specifically, to a PoE card insertion circuit. Background Technology

[0002] In switch product design, there are typically two product forms: those supporting PoE and those not supporting PoE. If the actual application scenario changes, for example: 1. The original network layout used switches that did not support PoE, but when the application scenario changes and all or some network ports require PoE functionality, the entire switch needs to be replaced, resulting in significant replacement costs; 2. If only some network ports in the application scenario require PoE support, purchasing a full-featured PoE switch would be an excessive and wasteful investment.

[0003] Therefore, this utility model provides a POE card insertion circuit that can adapt to dynamic changes in usage scenarios and save on equipment investment costs. Utility Model Content

[0004] To overcome the shortcomings of existing technologies, this utility model provides a POE card insertion circuit that can adapt to dynamic changes in usage scenarios and save on equipment investment costs.

[0005] The technical solution adopted by this utility model to solve its technical problem is: a POE card insertion circuit, the improvement of which is that the POE card insertion circuit includes a POE controller chip, a connector J1, an electrostatic protection circuit and a signal protection circuit; the POE controller chip is connected to the connector J1 and the signal protection circuit; the electrostatic protection circuit is connected between the connector J1 and the signal protection circuit.

[0006] In the above structure, the connector J1 has 20 pins. Among them, the first, third, seventh, ninth, eleventh, thirteenth, fifteenth, seventeenth, eighteenth, and nineteenth pins are all connected to the electrostatic protection circuit. The first and third pins are connected to a 54V main voltage, and the eighteenth pin is connected to a 3.3V logic voltage. The second, fourth, sixth, eighth, tenth, twelfth, fourteenth, and sixteenth pins are all connected to the PoE controller chip. The fifth and twentieth pins are both grounded.

[0007] In the above structure, the electrostatic discharge (ESD) protection circuit includes ESD diodes D1, D2, D3, D4, D5, D6, D7, D8, and D9, and capacitors C1, C2, C3, C4, C5, C6, and C7. One end of ESD diode D1 is connected to pin 7 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D2 is connected to pin 9 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D3 is connected to pin 11 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D4 is connected to pin 13 of connector J1 and the signal protection circuit, and the other end is grounded. One end of diode D5 is connected to pin 15 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D6 is connected to pin 17 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D7 is connected to pin 19 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D8 is connected to pin 3 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D9 is connected to pin 18 of connector J1 and the signal protection circuit, and the other end is grounded; capacitors C1, C2, C3, C4, C5, C6, and C7 are connected in parallel with ESD diodes D1, D2, D3, D4, D5, D6, and D7, respectively.

[0008] In the above structure, the signal protection circuit includes resistors R1, R2, R3, R4, R5, R6, and R7; one end of each resistor is connected to one end of each ESD diode D1, D2, D3, D4, D5, D6, and D7; the other end of each resistor is connected to the PoE controller chip.

[0009] In the above structure, the second, fourth, sixth, eighth, tenth, twelfth, fourteenth, and sixteenth pins of connector J1 are all connected to the PoE controller chip via voltage regulation and protection circuits. These voltage regulation and protection circuits include Zener diodes D10 and D11, capacitor C8, and resistor R8. The anode of diode D10 is connected to a 54V main voltage, and its cathode is connected to the anode of Zener diode D11, one end of capacitor R8, and connector J1. The cathode of the Zener diode is grounded. Capacitor C8 is connected in parallel with Zener diode D10. The other end of resistor R8 is connected to the PoE controller chip.

[0010] In the above structure, the POE card circuit also includes a resistor voltage divider circuit, which includes resistor R9 and resistor R10; one end of resistor R9 is connected to a 3.3V logic voltage, and the other end is connected to one end of resistor R10 and the POE controller chip; the other end of resistor R10 is grounded.

[0011] In the above structure, the POE card circuit also includes an RC low-pass filter circuit, which includes a resistor R12 and a capacitor C9; one end of the resistor R12 is connected to a logic voltage of 3.3V, and the other end is connected to the POE controller chip and one end of the capacitor C9; the other end of the capacitor C9 is grounded.

[0012] In the above structure, the POE card circuit also includes a pull-up resistor circuit, which includes a resistor R13. One end of the resistor R13 is connected to a 3.3V logic voltage, and the other end is connected to the POE controller chip.

[0013] In the above structure, the POE card circuit also includes a pull-down resistor circuit, which includes a resistor R14. One end of the resistor R14 is grounded, and the other end is connected to the POE controller chip.

[0014] In the above structure, the POE controller chip is model TM I 7608R.

[0015] The beneficial effects of this utility model are as follows: The PoE plug-in card circuit of this solution uses connector J1 as the connection component between the PoE function module and the switch equipment. When the PoE plug-in card circuit needs to support a network port with PoE function, only the PoE function module needs to be installed on the corresponding connector; when the PoE plug-in card circuit does not need to support a network port with PoE function, the PoE function module is not installed on connector J1. By adding or removing PoE function modules in this way, some or all network ports of the switch product can support PoE function, so that the same switch product can meet multiple application scenarios, thereby reducing the number of product types, not only reducing product development and production costs, but also greatly reducing product maintenance costs, and realizing modular product design. Therefore, this utility model can adapt to the dynamic changes in usage scenarios and save equipment investment costs. Attached Figure Description

[0016] Figure 1 This is a connection block diagram of a POE card circuit according to the present invention;

[0017] Figure 2 This is a schematic diagram of the POE controller chip for a POE card circuit according to the present invention;

[0018] Figure 3 This is a schematic diagram showing the connection of connector J1, electrostatic protection circuit, and signal protection circuit of a POE card circuit according to this utility model.

[0019] Figure 4 This is a schematic diagram of a voltage regulation and protection circuit for a POE card insertion circuit according to the present invention;

[0020] Figure 5 This is a schematic diagram of a resistor voltage divider circuit for a POE card insertion circuit according to this utility model;

[0021] Figure 6 This is a schematic diagram of an RC low-pass filter circuit for a POE card insertion circuit according to the present invention.

[0022] Figure 7 This is a schematic diagram of a pull-up resistor circuit for a POE card insertion circuit according to this utility model;

[0023] Figure 8 This is a schematic diagram of a pull-down resistor circuit for a POE card insertion circuit according to this utility model. Detailed Implementation

[0024] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0025] The following will clearly and completely describe the concept, specific structure, and technical effects of this utility model in conjunction with embodiments and accompanying drawings, so as to fully understand the purpose, features, and effects of this utility model. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are all within the scope of protection of this utility model. Furthermore, all connections / linkages involved in the patent do not simply refer to direct contact between components, but rather to the ability to form a better connection structure by adding or reducing connecting accessories according to specific implementation conditions. The various technical features in this utility model can be combined interactively without contradicting each other.

[0026] Reference Figures 1-3 As shown, this utility model discloses a PoE card circuit, which includes a PoE controller chip, a connector J1, an electrostatic discharge (ESD) protection circuit, and a signal protection circuit. The PoE controller chip is connected to the connector J1 and the signal protection circuit. The ESD protection circuit is connected between the connector J1 and the signal protection circuit. The PoE controller chip is a TM I 7608R. The connector J1 has 20 pins, of which pins 1, 3, 7, 9, 11, 13, 15, 17, 18, and 19 are all connected to the ESD protection circuit. Pins 1 and 3 are connected to a 54V main voltage, and pin 18 is connected to a 3.3V logic voltage. Pins 2, 4, 6, 8, 10, 12, 14, and 16 are all connected to the PoE controller chip. Pins 5 and 20 are both grounded.

[0027] It should be noted that in this embodiment, the PoE controller chip is responsible for managing the electrical signals transmitted through the Ethernet interface; the connector J1 serves as the connection interface between the switch and the PoE functional module, used to realize the data transmission between the switch and the PoE functional module; the electrostatic discharge protection circuit is used to protect the switch from damage caused by electrostatic discharge (ESD). It is located between the connector J1 and the signal protection circuit and can effectively protect the PoE card circuit from the influence of external static electricity or instantaneous high voltage; the signal protection circuit is used to protect the signal lines of the switch and prevent external noise such as electromagnetic interference (EMI) from affecting the quality of data transmission; in the specific implementation of this utility model, since the PoE card circuit of this embodiment supports eight-port PoE function, when the switch product needs to support more ports such as sixteen-port or twenty-four-port PoE function, this circuit can be reused; furthermore, when the switch CPU is powered on and started, firstly, the switch CPU resets, initializes, and configures the PoE controller chip TMI 7608R through the signal connected by connector J1; then, when the network port is connected to a device through a network cable, the TMI 7608R chip detects whether the connected device needs PoE power supply and its power supply level; then, according to TMI The 7608R protocol allows the switch to provide the corresponding level of current to the device, achieving power supply through the network cable. In this process, the switch only needs to increase or decrease the number of connectors J1 connected to the PoE module to enable PoE functionality on some or all of the switch's network ports. This allows a single switch product to meet various application scenarios, reducing the number of switch product types, lowering development and production costs, significantly reducing maintenance costs, and enabling modular product design. Therefore, this invention can adapt to dynamic changes in usage scenarios and save on equipment investment costs.

[0028] Reference Figure 2 and Figure 3As shown, the electrostatic discharge (ESD) protection circuit includes ESD diodes D1, D2, D3, D4, D5, D6, D7, D8, and D9, and capacitors C1, C2, C3, C4, C5, C6, and C7. One end of ESD diode D1 is connected to pin 7 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D2 is connected to pin 9 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D3 is connected to pin 11 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D4 is connected to pin 13 of connector J1 and the signal protection circuit, and the other end is grounded. One end of diode D5 is connected to pin 15 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D6 is connected to pin 17 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D7 is connected to pin 19 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D8 is connected to pin 3 of connector J1 and the signal protection circuit, and the other end is grounded; one end of ESD diode D9 is connected to pin 18 of connector J1 and the signal protection circuit, and the other end is grounded; capacitors C1, C2, C3, C4, C5, C6, and C7 are connected in parallel with ESD diodes D1, D2, D3, D4, D5, D6, and D7, respectively.

[0029] The ESD diodes D1, D2, D3, D4, D5, D6, D7, D8, and D9 are primarily responsible for quickly guiding current to ground during electrostatic discharge, thereby preventing excessive voltage from entering the sensitive parts of the PoE card circuit. Capacitors C1, C2, C3, C4, C5, C6, and C7 play a role in filtering, absorbing, and stabilizing voltage in the electrostatic protection circuit, helping to reduce voltage fluctuations, stabilize the power supply, and improve the circuit's anti-interference capability. Specifically… When external electrostatic discharge or electrical interference occurs, ESD diodes D1, D2, D3, D4, D5, D6, D7, D8, and D9 quickly conduct and guide excess charge to the ground through the grounding channel. Meanwhile, capacitors C1, C2, C3, C4, C5, C6, and C7 act as buffers when the diodes conduct, absorbing and smoothing the current peaks to prevent excessive current from entering the circuit and ensuring that sensitive components in the circuit are not subjected to high voltage or current surges.

[0030] Continue to refer to Figure 2 and Figure 3 As shown, the signal protection circuit includes resistors R1, R2, R3, R4, R5, R6, and R7; one end of each resistor is connected to one end of each ESD diode D1, D2, D3, D4, D5, D6, and D7; the other end of each resistor is connected to the PoE controller chip.

[0031] It should be noted that, in this embodiment, resistors R1, R2, R3, R4, R5, R6, and R7 are connected in series with ESD diodes D1, D2, D3, D4, D5, D6, and D7, respectively. This limits the current flowing through these diodes and ensures that the current does not exceed their withstand capabilities, preventing overload damage and ensuring stable signal transmission.

[0032] Reference Figure 3 and Figure 4 As shown, the second, fourth, sixth, eighth, tenth, twelfth, fourteenth, and sixteenth pins of connector J1 are each connected to a voltage regulation and protection circuit between them and the PortN0, PortN1, PortN2, PortN3, PortN4, PortN5, PortN6, and PortN7 pins of the POE controller chip, respectively. The voltage regulation and protection circuit includes a Zener diode D10, a Zener diode D11, a capacitor C8, and a resistor R8. The anode of the Zener diode D10 is connected to a 54V main voltage, and its cathode is connected to the anode of the Zener diode D11, one end of the capacitor R8, and connector J1. The cathode of the Zener diode is grounded. The capacitor C8 is connected in parallel with the Zener diode D10. The other end of the resistor R8 is connected to the POE controller chip.

[0033] It should be noted that in this embodiment, the voltage regulation and protection circuit ensures voltage stability through Zener diodes D10 and D11, smooths voltage changes through capacitor C8, and limits current through resistor R8 to ensure the safety of the entire circuit.

[0034] Reference Figure 3 and Figure 5As shown, the POE card circuit also includes a resistor voltage divider circuit, which includes resistors R9 and R10; one end of resistor R9 is connected to a 3.3V logic voltage, and the other end is connected to one end of resistor R10, the AD0 pin / AD1 pin / AD2 pin / ALT_A / B pin / EN_CL5 pin / AUTO pin of the POE controller chip; the other end of resistor R10 is grounded.

[0035] It should be noted that in this embodiment, resistors R9 and R10 form a voltage divider circuit, which divides the 3.3V logic voltage to provide a suitable voltage input to the POE controller chip.

[0036] Reference Figure 3 and Figure 6 As shown, the POE card circuit also includes an RC low-pass filter circuit, which includes a resistor R12 and a capacitor C9; one end of the resistor R12 is connected to a logic voltage of 3.3V, and the other end is connected to the RstN pin of the POE controller chip and one end of the capacitor C9; the other end of the capacitor C9 is grounded.

[0037] It should be noted that in this embodiment, the RC low-pass filter circuit is composed of resistor R12 and capacitor C9 to form a filter. The filter reduces the adverse effects of voltage fluctuations on the circuit, enabling the POE controller chip to receive a more stable voltage signal.

[0038] Reference Figure 3 and Figure 7 As shown, the POE card circuit also includes a pull-up resistor circuit, which includes a resistor R13. One end of the resistor R13 is connected to a 3.3V logic voltage, and the other end is connected to the INTB pin of the POE controller chip.

[0039] It should be noted that, in this embodiment, the pull-up resistor circuit provides a stable high-level signal to ensure that the input terminal of the POE controller chip can be stably maintained at a predetermined high-level voltage, thereby ensuring that the POE controller chip correctly recognizes the signal.

[0040] Reference Figure 3 and Figure 8 As shown, the POE card circuit also includes a pull-down resistor circuit, which includes a resistor R14. One end of the resistor R14 is grounded, and the other end is connected to the 2E_VENT pin of the POE controller chip.

[0041] It should be noted that, in this embodiment, the pull-down resistor circuit is used to ensure that the input terminal of the POE controller chip remains at a low level when there is no external signal input, so as to avoid the input terminal floating and ensure the stability and reliability of the circuit.

[0042] The above is a detailed description of the preferred embodiments of the present utility model. However, the present utility model is not limited to the described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present utility model. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A POE plug-in card circuit, characterized by, The POE plug-in circuit includes a POE controller chip, a connector J1, an electrostatic protection circuit, and a signal protection circuit; the POE controller chip is connected to the connector J1 and the signal protection circuit; the electrostatic protection circuit is connected between the connector J1 and the signal protection circuit.

2. A POE insert card circuit according to claim 1, wherein, The connector J1 has 20 pins. Pins 1, 3, 7, 9, 11, 13, 15, 17, 18, and 19 are all connected to the electrostatic protection circuit. Pins 1 and 3 are connected to a 54V main voltage, and pin 18 is connected to a 3.3V logic voltage. Pins 2, 4, 6, 8, 10, 12, 14, and 16 are all connected to the PoE controller chip. Pins 5 and 20 are both grounded.

3. A POE insert card circuit according to claim 2, wherein, The electrostatic discharge (ESD) protection circuit includes ESD diodes D1, D2, D3, D4, D5, D6, D7, D8, and D9, and capacitors C1, C2, C3, C4, C5, C6, and C7. One end of ESD diode D1 is connected to pin 7 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D2 is connected to pin 9 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D3 is connected to pin 11 of connector J1 and the signal protection circuit, and the other end is grounded. One end of ESD diode D4 is connected to pin 13 of connector J1 and the signal protection circuit, and the other end is grounded. ESD diode D5... One end of the capacitor is connected to pin 15 of connector J1 and the signal protection circuit, and the other end is grounded; one end of the ESD diode D6 is connected to pin 17 of connector J1 and the signal protection circuit, and the other end is grounded; one end of the ESD diode D7 is connected to pin 19 of connector J1 and the signal protection circuit, and the other end is grounded; one end of the ESD diode D8 is connected to pin 3 of connector J1 and the signal protection circuit, and the other end is grounded; one end of the ESD diode D9 is connected to pin 18 of connector J1 and the signal protection circuit, and the other end is grounded; capacitors C1, C2, C3, C4, C5, C6, and C7 are connected in parallel with ESD diodes D1, D2, D3, D4, D5, D6, and D7, respectively.

4. A POE insert card circuit according to claim 3, wherein, The signal protection circuit includes resistors R1, R2, R3, R4, R5, R6, and R7. One end of each resistor is connected to one end of each of the following ESD diodes: D1, D2, D3, D4, D5, D6, and D7. The other end of each resistor is connected to the PoE controller chip.

5. A POE insert card circuit according to claim 2, wherein, The second, fourth, sixth, eighth, tenth, twelfth, fourteenth, and sixteenth pins of connector J1 are all connected to the PoE controller chip via voltage regulation and protection circuits. These circuits include Zener diodes D10 and D11, capacitor C8, and resistor R8. The anode of diode D10 is connected to a 54V main voltage, and its cathode is connected to the anode of Zener diode D11, one end of capacitor R8, and connector J1. The cathode of the Zener diode is grounded. Capacitor C8 is connected in parallel with Zener diode D10. The other end of resistor R8 is connected to the PoE controller chip.

6. A POE insert card circuit according to claim 1, wherein, The POE card circuit also includes a resistor voltage divider circuit, which includes resistor R9 and resistor R10; one end of resistor R9 is connected to a 3.3V logic voltage, and the other end is connected to one end of resistor R10 and the POE controller chip; the other end of resistor R10 is grounded.

7. A POE insert card circuit according to claim 1, wherein, The POE card circuit also includes an RC low-pass filter circuit, which includes a resistor R12 and a capacitor C9. One end of the resistor R12 is connected to a logic voltage of 3.3V, and the other end is connected to the POE controller chip and one end of the capacitor C9. The other end of the capacitor C9 is grounded.

8. A POE insert card circuit according to claim 1, wherein, The POE card circuit also includes a pull-up resistor circuit, which includes a resistor R13. One end of the resistor R13 is connected to a 3.3V logic voltage, and the other end is connected to the POE controller chip.

9. A POE insert card circuit according to claim 1, wherein, The POE card circuit also includes a pull-down resistor circuit, which includes a resistor R14. One end of the resistor R14 is grounded, and the other end is connected to the POE controller chip.

10. The POE plug-in circuit according to claim 1, wherein, The PoE controller chip is model TM I 7608R.

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