Etch cleaning carrier for semiconductor wafers
By optimizing the carrier structure, the problems of insufficient agent contact and inadequate positioning were solved, achieving efficient and uniform separation of wafers and films, improving peeling efficiency and quality, and adapting to various product requirements.
CN224460539UActive Publication Date: 2026-07-03YUANYIHUA ENVIRONMENTAL TECH (SUZHOU) CO LTD
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- YUANYIHUA ENVIRONMENTAL TECH (SUZHOU) CO LTD
- Filing Date
- 2025-06-30
- Publication Date
- 2026-07-03
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Figure CN224460539U_ABST
Abstract
This utility model discloses an etching and cleaning carrier for semiconductor wafers, comprising: a carrier substrate, a wafer contour positioning groove, a thin film support block, a support positioning post, a support positioning groove, a fixing groove, a limiting top block, a first liquid guiding hole, a second liquid guiding hole, and a third liquid guiding hole. Through the above method, this semiconductor wafer etching and cleaning carrier can effectively promote the flow of the reagent, allowing the reagent to fully contact and penetrate the wafer and thin film. This not only significantly shortens the wafer soaking time and improves the stripping efficiency, effectively enhancing stripping efficiency and reducing costs, but also enables uniform separation of the wafer and thin film, improving the stripping quality and increasing the wafer yield.
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