A power operational amplifier

Abstract

This utility model relates to amplifiers, specifically a power operational amplifier. The fourth and fifth pins of operational amplifier chip U1 are connected to the negative input terminal Vin- and the positive input terminal Vin+, respectively. The eleventh and sixth pins of operational amplifier chip U1 are connected to the positive power supply voltage terminal +Vcc and the negative power supply voltage terminal -Vcc, respectively. The tenth pin of operational amplifier chip U1 is connected to the base of transistor Q1, the base of transistor Q2, the anode of diode D1, and the cathode of diode D2. The cathode of diode D1 is connected to the collector of transistor Q5. The anode of diode D2 is connected to the collector of transistor Q6. The emitter of transistor Q5 is connected to the emitter of transistor Q6 and to the output terminal Vout. This utility model can operate under ±40V power supply voltage and can output a maximum peak current of up to 10A, with a simpler circuit structure.

Description

Technical Field

[0001] This utility model relates to amplifiers, specifically to a power operational amplifier. Background Technology

[0002] Power amplifiers are widely used in communication systems and various electronic devices. Their main function is to provide sufficient signal power to the load. They are commonly found in motor drive circuits, servo system circuits, and audio amplifier circuits.

[0003] However, the current use of power operational amplifiers in China has certain limitations. Most power operational amplifiers used domestically are assembled from imported single-chip integrated silicon power amplifiers. These amplifiers only support a 5V-12V power supply range and have an output current of 1A-5A, making them difficult to adapt to high-voltage industrial scenarios and also unable to meet the demands of high-power loads. Utility Model Content

[0004] The purpose of this invention is to solve the technical problems of low operating power and low output current of existing power operational amplifiers, and to provide a power operational amplifier.

[0005] To solve the above-mentioned technical problems, the technical solution provided by this utility model is as follows:

[0006] A power operational amplifier includes an operational amplifier chip U1, wherein the fourth and fifth pins of the operational amplifier chip U1 are respectively connected to the negative input terminal Vin- and the positive input terminal Vin+.

[0007] The eleventh and sixth pins of the operational amplifier chip U1 are connected to the positive power supply voltage terminal +Vcc and the negative power supply voltage terminal -Vcc, respectively.

[0008] A capacitor C2 is connected between the tenth and twelfth pins of the operational amplifier chip U1; the tenth pin of the operational amplifier chip U1 is connected to the negative power supply voltage terminal -Vcc through the capacitor C1.

[0009] The tenth pin of the operational amplifier chip U1 is connected to the base of transistor Q1, the base of transistor Q2, the anode of diode D1, and the cathode of diode D2.

[0010] The cathode of diode D1 is connected to the collector of transistor Q5; the anode of diode D2 is connected to the collector of transistor Q6.

[0011] The emitter of transistor Q5 is connected to the emitter of transistor Q6, and then connected to the output terminal Vout;

[0012] The base of transistor Q5 is connected to the emitter of transistor Q3, and the collector of transistor Q3 is connected to the collector of transistor Q1 and connected to the positive power supply voltage terminal +Vcc.

[0013] The base of transistor Q3 is connected to the emitter of transistor Q1, and a resistor R1 is connected between the base and emitter of transistor Q3.

[0014] The base of transistor Q6 is connected to the emitter of transistor Q4, the base of transistor Q4 is connected to the emitter of transistor Q2, and a resistor R2 is connected between the emitter and base of transistor Q4.

[0015] The collector of transistor Q4 is connected to the collector of transistor Q2, and is connected to the negative power supply voltage terminal -Vcc.

[0016] Furthermore, an external resistor RCL+ is connected between the emitter of the transistor Q3 and the output terminal Vout;

[0017] An external resistor RCL- is connected between the emitter of transistor Q4 and the output terminal Vout.

[0018] Furthermore, the power of transistors Q1 and Q2 is 10W; the power of transistors Q3 and Q4 is 250W.

[0019] Furthermore, the transistors Q2, Q4, and Q6 are PNP transistors;

[0020] The transistors Q1, Q3, and Q5 are NPN transistors.

[0021] Furthermore, the operational amplifier chip U1 is model GEA143.

[0022] Furthermore, the positive power supply voltage terminal +Vcc is 10V to 40V, and the negative power supply voltage terminal -Vcc is -40V to -10V;

[0023] The peak output current of the output terminal Vout is 10A.

[0024] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0025] The power operational amplifier provided by this utility model integrates the operational amplifier chip U1 and the current boost or power output stage together; it can operate under a ±40V power supply voltage, and transistors Q1 and Q3 form an NPN Darlington transistor, while transistors Q2 and Q4 form a PNP Darlington transistor; the NPN Darlington transistor and the PNP Darlington transistor form a typical complementary push-pull output circuit, which, through current amplification, enables the output (or absorption) current capability to reach a maximum peak current of 10A. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the circuit structure of an embodiment of the present utility model. Detailed Implementation

[0027] The technical solutions of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, and not all of them. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0028] like Figure 1 As shown, a power operational amplifier includes an operational amplifier chip U1, the operational amplifier chip U1 being model GEA143; the fourth and fifth pins of the operational amplifier chip U1 are connected to the negative input terminal Vin- and the positive input terminal Vin+, respectively.

[0029] The eleventh and sixth pins of the operational amplifier chip U1 are connected to the positive power supply voltage terminal +Vcc and the negative power supply voltage terminal -Vcc, respectively; the positive power supply voltage terminal +Vcc is 10V to 40V, and the negative power supply voltage terminal -Vcc is -40V to -10V;

[0030] A capacitor C2 is connected between the tenth and twelfth pins of the operational amplifier chip U1; the tenth pin of the operational amplifier chip U1 is connected to the negative power supply voltage terminal -Vcc through the capacitor C1.

[0031] The tenth pin of the operational amplifier chip U1 is connected to the base of transistor Q1, the base of transistor Q2, the anode of diode D1, and the cathode of diode D2.

[0032] The cathode of diode D1 is connected to the collector of transistor Q5; the anode of diode D2 is connected to the collector of transistor Q6.

[0033] The emitter of transistor Q5 is connected to the emitter of transistor Q6, and then connected to the output terminal Vout; the peak output current of the output terminal Vout is 10A;

[0034] The base of transistor Q5 is connected to the emitter of transistor Q3, and the collector of transistor Q3 is connected to the collector of transistor Q1 and connected to the positive power supply voltage terminal +Vcc.

[0035] The base of transistor Q3 is connected to the emitter of transistor Q1, and a resistor R1 is connected between the base and emitter of transistor Q3.

[0036] The base of transistor Q6 is connected to the emitter of transistor Q4, the base of transistor Q4 is connected to the emitter of transistor Q2, and a resistor R2 is connected between the emitter and base of transistor Q4.

[0037] The collector of transistor Q4 is connected to the collector of transistor Q2, and is connected to the negative power supply voltage terminal -Vcc.

[0038] To limit the maximum output current of the output terminal Vout, an external resistor RCL+ is connected between the emitter of transistor Q3 and the output terminal Vout; an external resistor RCL- is connected between the emitter of transistor Q4 and the output terminal Vout. By adjusting the resistance values ​​of the external resistors RCL+ and RCL-, the maximum output current of the output terminal Vout can be limited without exceeding the maximum rated current of the power operational amplifier.

[0039] In this embodiment, diode D1, transistor Q5, diode D2, transistor Q6, and external resistors RCL+ and RCL- together form the current limiting circuit of the power operational amplifier.

[0040] In this embodiment, transistors Q1 and Q2 have a power of 10W; transistors Q3 and Q4 have a power of 250W. Transistors Q2, Q4, and Q6 are PNP transistors; transistors Q1, Q3, and Q5 are NPN transistors.

[0041] The working principle of this utility model:

[0042] See Figure 1 As shown, the power operational amplifier of this invention is an integrated power amplifier consisting of a low-power operational amplifier input and a current-boosted or power output stage. The upper transistors Q1 and Q3 form an NPN Darlington transistor, while the lower transistors Q2 and Q4 form a PNP Darlington transistor. They constitute a typical complementary push-pull output circuit, operating in Class B mode. Through current amplification, the output (or sink) current capability reaches a maximum peak current of 10A. Transistors Q1 and Q2 are medium-power transistors, while transistors Q3 and Q4 are high-power transistors. The emitters of transistors Q3 and Q4 are interconnected via external overcurrent protection resistors RCL+ and RCL-, respectively, serving as the output terminals.

[0043] The signal is amplified by U1 and output to the base of transistors Q1 and Q2. During the positive half-cycle, transistors Q1 and Q3 are turned on, while transistors Q2 and Q4 are turned off, resulting in a positive output voltage. Current flows from the operational amplifier chip U1 to the base of transistor Q1, and after being amplified by transistors Q1 and Q3, it flows from the emitter of transistor Q3 through the external overcurrent protection resistor RCL+ to the load.

[0044] During the negative half-cycle, i.e. when the output is negative, transistors Q2 and Q4 are turned on, while transistors Q1 and Q3 are turned off, absorbing the current flowing in from the load. At this time, the load current flows through the external overcurrent protection resistor RCL- to the emitter of transistor Q4, and then through transistors Q4 and Q2 into the operational amplifier chip U1.

[0045] As the load current Io increases, the voltage drop across the external resistor RCL+ or RCL- also increases. When the voltage drop reaches a certain value, transistor Q5 turns on when the output is positive and transistor Q6 turns on when the output is negative, thereby limiting the output current through current shunting.

[0046] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any changes or substitutions within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the protection scope of the claims.

Claims

1. A power operational amplifier, characterized in that: This includes operational amplifier chip U1, whose fourth and fifth pins are connected to the negative input terminal Vin- and the positive input terminal Vin+, respectively. The eleventh and sixth pins of the operational amplifier chip U1 are connected to the positive power supply voltage terminal +Vcc and the negative power supply voltage terminal -Vcc, respectively. A capacitor C2 is connected between the tenth and twelfth pins of the operational amplifier chip U1; the tenth pin of the operational amplifier chip U1 is connected to the negative power supply voltage terminal -Vcc through the capacitor C1. The tenth pin of the operational amplifier chip U1 is connected to the base of transistor Q1, the base of transistor Q2, the anode of diode D1, and the cathode of diode D2. The cathode of diode D1 is connected to the collector of transistor Q5; the anode of diode D2 is connected to the collector of transistor Q6. The emitter of transistor Q5 is connected to the emitter of transistor Q6, and then connected to the output terminal Vout; The base of transistor Q5 is connected to the emitter of transistor Q3, and the collector of transistor Q3 is connected to the collector of transistor Q1 and connected to the positive power supply voltage terminal +Vcc. The base of transistor Q3 is connected to the emitter of transistor Q1, and a resistor R1 is connected between the base and emitter of transistor Q3. The base of transistor Q6 is connected to the emitter of transistor Q4, the base of transistor Q4 is connected to the emitter of transistor Q2, and a resistor R2 is connected between the emitter and base of transistor Q4. The collector of transistor Q4 is connected to the collector of transistor Q2, and is connected to the negative power supply voltage terminal -Vcc.

2. The power operational amplifier according to claim 1, characterized in that: An external resistor RCL+ is connected between the emitter of transistor Q3 and the output terminal Vout; An external resistor RCL- is connected between the emitter of transistor Q4 and the output terminal Vout.

3. The power operational amplifier according to claim 1, characterized in that: The power of transistors Q1 and Q2 is 10W; the power of transistors Q3 and Q4 is 250W.

4. The power operational amplifier according to claim 1, characterized in that: The transistors Q2, Q4 and Q6 are PNP transistors; The transistors Q1, Q3, and Q5 are NPN transistors.

5. The power operational amplifier according to claim 1, characterized in that: The operational amplifier chip U1 is model GEA143.

6. The power operational amplifier according to claim 1, characterized in that: The positive power supply voltage terminal +Vcc is 10V to 40V, and the negative power supply voltage terminal -Vcc is -40V to -10V; The peak output current of the output terminal Vout is 10A.

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