一种半导体器件焊料阻挡结构
By setting an annular groove and a blocking ring on the outer periphery of the conductive connection post, the problem of solder crawling during flip-chip reflow soldering is solved, thereby improving the reliability of the package and the reliability of the connection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHINA CHIPPACKING TECH CO LTD
- Filing Date
- 2025-06-30
- Publication Date
- 2026-07-17
AI Technical Summary
In the reflow soldering process of flip-chip packaging, solder can easily creep along the copper pillars to the chip surface, causing problems such as cold solder joints and short circuits.
An annular groove is provided around the conductive connection post, and a blocking ring is provided inside the groove. The blocking ring is made of insulating material such as polyimide to prevent the extension of solder.
It effectively prevents solder from extending along the conductive connection pillars, reducing cold solder joints and short circuits during reflow soldering and improving packaging quality.
Smart Images
Figure CN224521666U_ABST
Abstract
Claims
1. A solder barrier structure for a semiconductor device, comprising: include: A conductive connection post (2) is provided on the chip (1). A solder connection layer (3) is provided at the end of the conductive connection post (2) away from the chip (1). An annular groove is provided on the outer periphery of the conductive connection post (2). A blocking ring (4) is provided in the annular groove.
2. The solder barrier structure for a semiconductor device according to claim 1, wherein The conductive connecting post (2) has a cylindrical structure.
3. The solder barrier structure for a semiconductor device according to claim 1, wherein The annular groove is circular, and the center of the annular groove is on the same straight line as the center of the conductive connecting post (2).
4. The solder barrier structure for a semiconductor device according to claim 1, wherein The inner diameter of the annular groove is not less than 0.8 times the diameter of the conductive connecting post (2).
5. The solder barrier structure for a semiconductor device according to claim 1, wherein The outer diameter of the blocking ring (4) shall not exceed 1.2 times the diameter of the conductive connecting post (2).
6. The solder barrier structure for a semiconductor device according to claim 1, wherein The material of the blocking ring (4) includes, but is not limited to, polyimide.
7. A semiconductor device solder barrier structure according to claim 1, characterized in that, An annular receiving groove (5) is provided on the upper surface of the blocking ring (4). The center of the annular receiving groove (5) and the center of the blocking ring (4) are on the same vertical line. The outer diameter of the annular receiving groove (5) is larger than the diameter of the conductive connecting post (2).
8. The solder barrier structure for a semiconductor device according to claim 7, wherein An annular baffle (6) is provided on the upper surface of the blocking ring (4), and the inner diameter of the annular baffle (6) is larger than the outer diameter of the annular receiving groove (5).
9. The solder barrier structure for a semiconductor device according to claim 8, wherein A retaining ring (7) is provided on the inner wall of the upper end of the annular baffle (6), and the inner diameter of the retaining ring (7) is larger than the diameter of the conductive connecting post (2).
10. The solder barrier structure for a semiconductor device according to claim 9, wherein The retaining ring (7) and the annular baffle (6) are integrally molded.