Multilayer ceramic capacitor

Abstract

The utility model discloses a multilayer ceramic capacitor, including ceramic body and the outer electrode of being located on ceramic body, and ceramic body includes a plurality of laminated units of laminated arrangement, each laminated unit includes dielectric layer and inner electrode, and the recessed groove of part area of dielectric layer is formed integrally, and the edge side of dielectric layer is extended to one end along the first direction of recessed groove, and the inner electrode is filled in recessed groove and extends to the edge side of dielectric layer to connect to corresponding outer electrode, the recessed groove in the dielectric layer of adjacent two laminated units is partially misaligned setting along the first direction to make the inner electrode after filling connect to different outer electrode. The utility model not only can make up the thickness difference of laminated unit along different directions to prevent multilayer ceramic capacitor appears the problem of middle drum two head deflation, and also can avoid multilayer alignment error, the risk of interlaminar delamination and the material shrinkage difference caused by the material difference of filling layer and dielectric layer in prior art when need additional printing filling layer etc.

Description

Technical Field

[0001] This utility model relates to the field of capacitor technology, and in particular to a multilayer ceramic capacitor. Background Technology

[0002] Multilayer ceramic capacitors (MLCCs) are common electronic components widely used in various electronic products and circuits, and are prevalent in consumer electronics, new energy, and communication equipment. With the increasing performance requirements of electronic devices, higher demands are being placed on the performance, size, and versatility of multilayer ceramic capacitors.

[0003] Traditional MLCCs generally consist of three parts: an inner electrode, a ceramic dielectric layer, and an outer electrode. The inner electrodes are stacked onto the ceramic dielectric layer in a staggered manner, then sintered at high temperature, and finally sealed with metal layers at both ends to obtain a complete multilayer ceramic capacitor. These metal layers serve as the outer electrodes of the multilayer ceramic capacitor. However, because the dielectric layer on each stack unit without an inner electrode is a blank area, the laminated multilayer ceramic capacitor will exhibit a phenomenon of bulging in the middle and flattening at both ends, as illustrated in Chinese patent CN104576053B. Existing MLCC structures suffer from defects such as laminate deformation, interlayer delamination, warping of the inner electrode ends, electric field concentration, reduced breakdown voltage, and decreased capacitance.

[0004] To address this issue, existing technologies print a filler layer on the blank areas of the dielectric layer in each stacked unit where no internal electrodes are located, thus filling the blank areas on each dielectric layer completely and avoiding the problem of bulging in the middle after lamination due to uneven thickness of the stacked units. For example, Japanese Patent JP1995056851B2 provides a method for manufacturing a multilayer ceramic capacitor. A filler layer (i.e., a ceramic layer) is coated on the first carrier film where no internal electrodes are located to form a first part; a dielectric layer is formed on a second carrier film to form a second part; the first part and the second part are alternately stacked, and the first carrier film and the second carrier film are peeled off sequentially to form a stacked unit of a multilayer ceramic capacitor. However, the multilayer ceramic capacitors manufactured using the above method have several drawbacks. On the one hand, the process is complex and the manufacturing cost is high. Furthermore, reprinting the filler layer separately introduces multilayer alignment errors and the risk of interlayer delamination. On the other hand, if the filler layer and the dielectric layer are made of different materials, they will have shrinkage differences. After sintering, the large area of ​​the filler layer and the dielectric layer at the interface can easily generate thermal stress, leading to structural deformation or even cracks. Utility Model Content

[0005] The purpose of this invention is to provide a multilayer ceramic capacitor to solve the problems of bulging, deformation, multilayer alignment errors, and interlayer delamination risks in multilayer ceramic capacitors after lamination in the prior art.

[0006] The objective of this utility model is achieved through the following technical solution:

[0007] This utility model provides a multilayer ceramic capacitor, including a ceramic body and an external electrode disposed on the ceramic body, wherein the ceramic body includes a plurality of stacked units;

[0008] Each of the stacked units includes a dielectric layer and an inner electrode. A portion of the dielectric layer is integrally recessed to form a groove. One end of the groove extends along a first direction to the edge of the dielectric layer. The inner electrode fills the groove and extends to the edge of the dielectric layer to connect to the corresponding outer electrode.

[0009] The grooves in the dielectric layer of two adjacent stacked units are partially offset along the first direction so that the filled inner electrode is connected to different outer electrodes.

[0010] As a further improvement of one embodiment of the present invention, the dielectric layer includes an upper surface, and the groove is formed by recessing downward from the upper surface of the dielectric layer in a third direction; the inner electrode located in the groove is flush with the upper surface of the dielectric layer.

[0011] Wherein, the third direction is the thickness direction of the dielectric layer.

[0012] As a further improvement of one embodiment of the present invention, the connection between the side wall of the groove and the bottom wall of the groove is set as an inclined surface or an arc surface.

[0013] As a further improvement of one embodiment of the present invention, the sidewall of the groove is configured as an inclined surface or an arc surface and the groove gradually shrinks inward from the top to the bottom along a third direction.

[0014] As a further improvement of one embodiment of the present invention, the length of the top of the groove along the first direction is greater than the length of the bottom of the groove along the first direction, and the width of the top of the groove along the second direction is greater than the width of the bottom of the groove along the second direction.

[0015] Wherein, the first direction is the length direction of the dielectric layer, and the second direction is the width direction of the dielectric layer.

[0016] As a further improvement of one embodiment of the present invention, the tilt angle of the inclined surface relative to a third direction is set to 10°-45°.

[0017] As a further improvement of one embodiment of the present invention, a portion of the groove extending along the first direction to one end of the dielectric layer edge continues to extend into the dielectric layer in the third direction to form a first recessed portion, and the inner electrode is also filled in the first recessed portion and connected to the corresponding outer electrode.

[0018] As a further improvement of one embodiment of the present invention, the bottom wall of the groove extends into the dielectric layer along the two sides of the second direction to form a second recess, and the inner electrode is also filled in the second recess.

[0019] As a further improvement of one embodiment of the present invention, the groove extends to the edge sides of opposite ends of the dielectric layer on both sides along the second direction, and the width of the groove along the second direction is the same as the width of the dielectric layer along the second direction.

[0020] Wherein, the first direction is the length direction of the dielectric layer, and the second direction is the width direction of the dielectric layer.

[0021] As a further improvement of one embodiment of the present invention, the dielectric layer is integrally formed from the same ceramic slurry and has a dielectric portion and a side portion protruding upward from the dielectric portion. The dielectric portion is located between the inner electrodes of two adjacent stacked units along a third direction and forms the bottom wall of the groove. The side portion is located at the end and / or side of the inner electrode along a horizontal direction and forms the side wall of the groove.

[0022] Compared with the prior art, the beneficial effects of this utility model include at least the following: In the multilayer ceramic capacitor provided by this utility model, a portion of the upper surface of the dielectric layer in each stacked unit is integrally recessed to form a groove. One end of the groove extends to the edge of the dielectric layer along the first direction, and the inner electrode is filled in the groove to connect to the outer electrode located at one end of the ceramic body along the first direction. The dielectric layer integrally formed in this utility model can not only bridge the thickness difference of the stacked units along different directions, thereby preventing the multilayer ceramic capacitor after lamination from having a bulge in the middle and a flat at both ends, but also eliminates the need for additional printing of a filler layer. This avoids the problems of multilayer alignment error, interlayer delamination risk, and material shrinkage difference that may be caused by different materials of the filler layer and the dielectric layer when additional printing of a filler layer is required in the prior art. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of a multilayer ceramic capacitor according to one embodiment of the present invention;

[0024] Figure 2 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 1 of this utility model along the plane containing the first direction AA' and the third direction CC'.

[0025] Figure 3 This is a side cross-sectional view of the multilayer ceramic capacitor in Embodiment 1 of this utility model along the plane containing the second direction BB' and the third direction CC' (i.e., Figure 2 (Cross-sectional view along the aa' direction);

[0026] Figure 4 This is a process structure diagram of fabricating multiple stacked unit arrays according to one embodiment of the present invention;

[0027] Figure 5 This is a schematic diagram of the structure of a multi-layered unit array before cutting in one embodiment of the present invention;

[0028] Figure 6 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 2 of this utility model along the plane containing the first direction AA' and the third direction CC' (the connection between the groove sidewall and the bottom wall is an inclined surface);

[0029] Figure 7 This is a side cross-sectional view of the multilayer ceramic capacitor in Embodiment 2 of this utility model along the plane containing the second direction BB' and the third direction CC' (i.e., Figure 6 A cross-sectional view along the bb' direction (the junction of the groove sidewall and the bottom wall is an inclined surface);

[0030] Figure 8 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 2 of this utility model along the plane containing the first direction AA' and the third direction CC' (the connection between the groove sidewall and the bottom wall is an arc surface);

[0031] Figure 9 This is a side cross-sectional view of the multilayer ceramic capacitor in Embodiment 2 of this utility model along the plane containing the second direction BB' and the third direction CC' (i.e., Figure 8 A cross-sectional view along the cc' direction (the junction between the sidewall and the bottom wall of the groove is an arc surface);

[0032] Figure 10 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 3 of this utility model along the plane containing the first direction AA' and the third direction CC' (the sidewall of the groove is an inclined surface);

[0033] Figure 11 This is a side cross-sectional view of the multilayer ceramic capacitor in Embodiment 3 of this utility model along the plane containing the second direction BB' and the third direction CC' (i.e., Figure 10 A cross-sectional view along the dd' direction (the sidewalls of the groove are inclined).

[0034] Figure 12 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 3 of this utility model along the plane containing the first direction AA' and the third direction CC' (the sidewall of the groove is an arc surface);

[0035] Figure 13 This is a side cross-sectional view of the multilayer ceramic capacitor in Embodiment 3 of this utility model along the plane containing the second direction BB' and the third direction CC' (i.e., Figure 12 A cross-sectional view along the ee' direction (the sidewall of the groove is an arc surface);

[0036] Figure 14 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 4 of this utility model along the plane containing the first direction AA' and the third direction CC'.

[0037] Figure 15 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 5 of this utility model along the plane containing the second direction BB' and the third direction CC'.

[0038] Figure 16 This is a schematic diagram of the structure of the stacked unit in Embodiment 6 of this utility model;

[0039] Figure 17 This is a side cross-sectional view of the multilayer ceramic capacitor of Embodiment 6 of this utility model along the plane containing the second direction BB' and the third direction CC'.

[0040] Figure 18 This is a schematic diagram of the structure of multiple stacked unit arrays fabricated before cutting, corresponding to Embodiment 6.

[0041] In the figure: 1. Ceramic body; 11. Stacked unit; 111. Dielectric layer; 111a. Dielectric part; 111b. Side part; 112. Inner electrode; 113. Groove; 114. First recessed part; 115. Second recessed part; 2. Outer electrode; 21. First outer electrode; 22. Second outer electrode. Detailed Implementation

[0042] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make the present invention more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore repeated descriptions of them will be omitted.

[0043] The terms used to describe position and direction in this utility model are illustrated with the accompanying drawings, but changes can be made as needed, and all such changes are included within the scope of protection of this utility model.

[0044] Reference Figures 1-18As shown, this utility model provides a multilayer ceramic capacitor, including a ceramic body 1 and an external electrode 2 disposed on the ceramic body 1. The ceramic body 1 includes a plurality of stacked units 11.

[0045] Specifically, the stacked unit 11 has a cuboid structure, and the ceramic body 1 composed of multiple stacked units 11 is also a cuboid structure.

[0046] This utility model defines a first direction AA', a second direction BB', and a third direction CC', which are perpendicular to each other. Preferably, the first direction AA' is the length direction of the stacked unit 11 (ceramic body 1), the second direction BB' is the width direction of the stacked unit 11 (ceramic body 1), and the third direction CC' is the thickness direction of the stacked unit 11 (ceramic body 1), which is also the stacking direction of the multiple stacked units 11.

[0047] Each stacked unit 11 includes a dielectric layer 111 and an inner electrode 112. A portion of the upper surface of the dielectric layer 111 is integrally recessed to form a groove 113. One end of the groove 113 extends along the first direction AA' to the edge of the dielectric layer 111. The inner electrode 112 fills the groove 113 and extends to the edge of the dielectric layer 111 to connect to the corresponding outer electrode 2. The grooves 113 in the dielectric layers 111 of two adjacent stacked units 11 are partially offset along the first direction AA' so that the filled inner electrodes 112 are connected to different outer electrodes 2. That is, the projections of the grooves 113 in the dielectric layers 111 of two adjacent stacked units 11 onto the plane of the same dielectric layer 111 are centrally symmetrical, so that the inner electrodes 112 filled in the grooves 113 of two adjacent dielectric layers 111 are offset and respectively connected to the outer electrodes 2 located on different end faces of the ceramic body 1 along the first direction AA'. Of course, the structure of the inner electrode 112 filled in the groove 113 is the same as the structure of the groove 113. Thus, by integrally recessing grooves 113 on each dielectric layer 111 and filling the grooves 113 with inner electrodes 112, the thickness difference of each stacked unit 11 along different directions can be bridged, making the thickness of each stacked unit 11 along the first direction AA' and along the second direction BB' uniform and equal, thus preventing the multilayer ceramic capacitor after lamination from having a bulge in the middle and a flattened end.

[0048] The dielectric layer 111 includes an upper surface and a lower surface disposed opposite to each other along the third direction CC'. Each dielectric layer 111 has a groove 113 formed therein. The groove 113 is formed by recessing downward from a portion of the upper surface of the dielectric layer 111 along the third direction CC'. The groove 113 extends to the edge side of the dielectric layer 111 at one end along the first direction AA'. That is, the groove 113 extends to the end face of the ceramic body 1 at one end along the first direction AA'. The inner electrode 112 filled in the groove 113 can be connected to the outer electrode 2 located on the same end face of the ceramic body 1 that is connected to the groove 113. The projections of the grooves 113 of two adjacent stacked units 11 onto the plane of the same dielectric layer 111 are centrally symmetrical. That is, one end of the grooves 113 of two adjacent stacked units 11 extends along the first direction AA' to the edge sides of the opposite ends of the dielectric layer 111. In other words, the inner electrodes 112 filled in the grooves 113 of two adjacent stacked units 11 can be connected to the outer electrodes 2 located on different end faces of the ceramic body 1 along the first direction AA'. For example, if the groove 113 in one stacked unit 11 extends along the first direction AA' to the left edge side of the dielectric layer 111, the inner electrode 112 filled in the groove 113 can be connected to the outer electrode 2 located at the left end of the ceramic body 1 along the first direction AA'; while the groove 113 in the adjacent stacked unit 11 extends along the first direction AA' to the right edge side of the dielectric layer 111, the inner electrode 112 filled in the groove 113 can be connected to the outer electrode 2 located at the right end of the ceramic body 1 along the first direction AA'.

[0049] Specifically, the dielectric layer 111 is integrally formed from the same ceramic paste and has a dielectric portion 111a and a side portion 111b protruding upward from the dielectric portion 111a. The dielectric portion 111a is located between the inner electrodes 112 of two adjacent stacked units 11 along the third direction CC' and forms the bottom wall of the groove 113. The side portion 111b is located at the end and / or side of the inner electrode 112 along the horizontal direction and forms the side wall of the groove 113. That is, the side portion 111b is located at the end of the inner electrode 112 along the first direction AA' and forms the side wall of the groove 113 along the first direction AA', and / or the side portion 111b is located on both sides of the inner electrode 112 along the second direction BB' and forms the side walls of the groove 113 along the second direction BB'.

[0050] Of course, the inner electrode 112 located in the groove 113 is flush with the upper surface of the dielectric layer 111 to ensure that the thickness of each stacked unit 11 is uniform and equal along the third direction CC'. Specifically, the inner electrode 112 filling the groove 113 also includes an upper surface and a lower surface disposed opposite each other along the third direction CC'. The lower surface and side surface of the inner electrode 112 abut against the bottom wall and side wall of the groove 113 formed in the dielectric layer 111, and the upper surface of the inner electrode 112 is flush with the upper surface of the dielectric layer 111.

[0051] refer to Figure 4 In one embodiment of this utility model, a groove 113 can be formed on the dielectric layer 111 sheet by roll forming, and then the inner electrode 112 can be formed in the groove 113 by printing or roll forming, forming as shown in the figure. Figure 5 The array structure shown is finally cut to form multiple stacked units 11 ( Figure 5 (The dashed line in the middle is the cutting line), multiple stacked units 11 are stacked and sintered to form a ceramic body 1. It should be noted that, in this utility model, the side of the stacked unit 11 where the inner electrode 112 is connected to the outer electrode 2 is a vertical surface that forms the cutting surface, that is, the side of the inner electrode 112 connected to the outer electrode 2 is a plane and is flush with the end face of the ceramic body 1 along the first direction AA'.

[0052] Of course, in other embodiments, grooves 113 can also be formed on dielectric layer 111 by laser etching.

[0053] This invention does not limit the size of the groove 113, and can be adjusted accordingly according to actual product requirements.

[0054] The dielectric layer 111 can be made of ceramic materials with high dielectric constant, including but not limited to barium titanate, strontium titanate, etc.

[0055] The materials of the inner electrode 112 and the outer electrode 2 can be nickel, silver, copper or other conductive materials or combinations thereof.

[0056] Example 1

[0057] like Figure 2 and Figure 3 Embodiment 1 of this utility model provides a multilayer ceramic capacitor, including a ceramic body 1 and an external electrode 2 disposed on the ceramic body 1. The ceramic body 1 includes a plurality of stacked units 11.

[0058] Specifically, the stacked unit 11 has a cuboid structure, and the ceramic body 1 composed of multiple stacked units 11 also has a cuboid structure. In this embodiment, the first direction AA' is the length direction of the stacked unit 11, the second direction BB' is the width direction of the stacked unit 11, and the third direction CC' is the thickness direction of the stacked unit 11, which is also the stacking direction of the multiple stacked units 11.

[0059] Each stacked unit 11 includes a dielectric layer 111 and an inner electrode 112. A portion of the upper surface of the dielectric layer 111 is integrally recessed to form a groove 113. One end of the groove 113 extends along the first direction AA' to the edge of the dielectric layer 111. The inner electrode 112 fills the groove 113 and extends to the edge of the dielectric layer 111 to connect to the corresponding outer electrode 2. The grooves 113 in the dielectric layers 111 of two adjacent stacked units 11 are partially offset along the first direction AA' so that the filled inner electrodes 112 are connected to different outer electrodes 2. That is, the projections of the grooves 113 of two adjacent dielectric layers 111 onto the plane of the same dielectric layer 111 are centrally symmetrical, so that the inner electrodes 112 filled in the grooves 113 of two adjacent dielectric layers 111 are offset and respectively connected to the outer electrodes 2 located on different end faces of the ceramic body 1 along the first direction AA'. Of course, the structure of the inner electrode 112 filled in the groove 113 is the same as the structure of the groove 113.

[0060] Specifically, each dielectric layer 111 has a groove 113 formed therein. The groove 113 is formed by recessing downwards along the third direction CC' from a portion of the upper surface of the dielectric layer 111, and the groove 113 extends to the edge side of the dielectric layer 111 at one end along the first direction AA', that is, the groove 113 extends to the end face of the ceramic body 1 at one end along the first direction AA'. The inner electrode 112 filled in the groove 113 can be connected to the outer electrode 2 located on the same end face of the ceramic body 1 that is connected to the groove 113. The outer electrode 2 includes a first outer electrode 21 and a second outer electrode 22 located at both ends of the ceramic body 1 along the first direction AA'. For example, if one end of the groove 113 extends along the first direction AA' to the edge of the dielectric layer 111 near the first external electrode 21, then the inner electrode 112 filled in the groove 113 is connected to the first external electrode 21; if one end of the groove 113 extends along the first direction AA' to the edge of the dielectric layer 111 near the second external electrode 22, then the inner electrode 112 filled in the groove 113 is connected to the second external electrode 22.

[0061] More specifically, the projections of the grooves 113 of two adjacent stacked units 11 onto the plane of the same dielectric layer 111 are centrally symmetrical. That is, one end of the grooves 113 of two adjacent stacked units 11 extends along the first direction AA' to the edge of the dielectric layer 111 at opposite ends. In other words, the inner electrodes 112 filled in the grooves 113 of two adjacent stacked units 11 can be connected to the outer electrodes 2 located at different ends of the ceramic body 1 along the first direction AA'. For example, if the groove 113 in one stacked unit 11 extends along the first direction AA' to the edge of the dielectric layer 111 near the first outer electrode 21, then the inner electrode 112 filled in the groove 113 is connected to the first outer electrode 21; while the groove 113 in the adjacent stacked unit 11 extends along the first direction AA' to the edge of the dielectric layer 111 near the second outer electrode 22, then the inner electrode 112 filled in the groove 113 is connected to the second outer electrode 22.

[0062] The dielectric layer 111 is integrally formed from the same ceramic paste and has a dielectric portion 111a and a side portion 111b protruding upward from the dielectric portion 111a. The dielectric portion 111a is located between the inner electrodes 112 of two adjacent stacked units 11 along the third direction CC' and forms the bottom wall of the groove 113. The side portion 111b includes one end of the inner electrode 112 along the first direction AA' and two sides of the inner electrode 112 along the second direction BB'. The side portion 111b forms the side wall of the groove 113.

[0063] Of course, the inner electrode 112 located in the groove 113 is flush with the upper surface of the dielectric layer 111 to ensure that the thickness of each stacked unit 11 is uniform and equal along the first direction AA' and the second direction BB'. Specifically, the inner electrode 112 filling the groove 113 also includes an upper surface and a lower surface disposed opposite each other along the third direction CC'. The lower surface and side surface of the inner electrode 112 abut against the wall in the dielectric layer 111 used to form the groove 113, and the upper surface of the inner electrode 112 is flush with the upper surface of the dielectric layer 111.

[0064] In this embodiment, the groove 113 has a cuboid structure, meaning that the sidewalls of the groove 113 are three vertical surfaces extending along a third direction CC', and the bottom wall of the groove 113 is a horizontal surface extending along the plane containing the first direction AA' and the second direction BB'. That is, the sidewalls and bottom wall of the groove 113 are perpendicular to each other, and the angle between the sidewalls and bottom wall of the groove 113 is a right angle. Simultaneously, the length direction of the groove 113 is parallel to the length direction of the dielectric layer 111, the width direction of the groove 113 is parallel to the width direction of the dielectric layer 111, and the height direction of the groove 113 is parallel to the thickness direction of the dielectric layer 111. That is, the first direction AA' defined in this embodiment can also be the length direction of the groove 113 (or the dielectric layer 111), the second direction BB' can be the width direction of the groove 113 (or the dielectric layer 111), and the third direction CC' can be the height direction of the groove 113 (or the dielectric layer 111). Correspondingly, the internal electrode 112 filling the groove 113 also has a cuboid structure.

[0065] refer to Figure 4 A groove 113 can be formed on the dielectric layer 111 by roll forming, and then the inner electrode 112 can be formed in the groove 113 by roll forming, forming a... Figure 5 The array structure shown is finally cut to form multiple stacked units 11 as in this embodiment. Figure 5 (The dashed line in the middle is the cutting line), multiple stacked units 11 are stacked and sintered to form a ceramic body 1. It should be noted that in this embodiment, the side of the stacked unit 11 where the inner electrode 112 is connected to the outer electrode 2 is a vertical surface that forms the cutting surface, that is, the side of the inner electrode 112 connected to the outer electrode 2 is a plane and is flush with the end face of the ceramic body 1 along the first direction AA'.

[0066] In this embodiment, the extension length of the groove 113 along the first direction AA', the extension width along the second direction BB', and the extension height along the third direction CC' are not limited. They can be adjusted according to actual product requirements to ensure that the extension length of the groove 113 along the first direction AA' is less than the length of the dielectric layer 11 along the first direction AA', the extension width of the groove 113 along the second direction BB' is less than the width of the dielectric layer 11 along the second direction BB', and the extension height of the groove 113 along the third direction CC' is less than the thickness of the dielectric layer 11 along the third direction CC'.

[0067] Example 2

[0068] like Figures 6-9This embodiment provides a multilayer ceramic capacitor. Considering that if the angle between the sidewall and bottom wall of the groove 113 is a right angle, and when the material of the inner electrode 112 has poor fluidity, during the process of rolling the inner electrode 112 into the groove 113, problems such as "material shortage" or "residual air bubbles" are likely to occur near the connection between the sidewall and bottom wall of the groove 113. Therefore, this embodiment differs from Embodiment 1 in that the connection between the sidewall and bottom wall of the groove 113 is set as an inclined surface (e.g., Figure 6 and Figure 7 ) or curved surface (such as Figure 8 and Figure 9 That is, the part of the dielectric layer 111 side 111b facing the groove 113 that is connected to the dielectric part 111a is set as an inclined surface or a circular arc surface.

[0069] refer to Figure 6 and Figure 7 The sidewalls of the groove 113 are three vertical surfaces extending along the third direction CC', and the bottom wall of the groove 113 is a horizontal surface extending along the plane containing the first direction AA' and the second direction BB'. The sidewall extension surfaces and the bottom wall extension surfaces of the groove 113 are perpendicular to each other. At the same time, the connection between the sidewalls and the bottom wall of the groove 113 is set as an inclined surface. The length of the top of the groove 113 along the first direction AA' is greater than the length of the bottom of the groove 113 along the first direction AA', and the width of the top of the groove 113 along the second direction BB' is greater than the width of the bottom of the groove 113 along the second direction BB'. Thus, during the process of rolling the inner electrode 112 into the groove 113, it can fill the corners of the groove 113 more smoothly, reducing voids or material shortages in the groove 113. Moreover, the material of the inner electrode 112 filled into the groove 113 can fit more tightly with the corners of the groove 113, reducing interlayer gaps and improving insulation reliability. At the same time, since the connection is set as an inclined surface, the stress concentration caused by the tip effect during sintering can be reduced, effectively reducing the risk of cracking of the dielectric layer 111.

[0070] Specifically, the connection between the two side walls and the bottom wall of the groove 113, which are opposite each other in the width direction (second direction BB'), is an inclined surface (see...). Figure 7 The groove 113 has an inclined surface at the connection between one side wall and the bottom wall along its length direction (first direction AA') (see...). Figure 6 ).

[0071] More specifically, the tilt angle of the tilted surface relative to the third direction CC' is set to 10°-45° to avoid the tip effect caused by an excessively large tilt angle of the tilted surface and the stress increase caused by the material shrinkage difference between the inner electrode 112 and the dielectric layer 111.

[0072] Of course, this embodiment also includes setting the connection between the sidewall and bottom wall of the groove 113 as a connection surface formed by sequentially connecting multiple inclined surfaces with different inclination angles. When the number of inclined surfaces tends to infinity, and the difference in inclination angle between two adjacent inclined surfaces tends to infinity, then the connection surface formed by sequentially connecting multiple inclined surfaces with different inclination angles is an arc surface, that is, the connection between the sidewall and bottom wall of the groove 113 is an arc surface, such as... Figure 8 and Figure 9 As shown. Similarly, the length of the top of the groove 113 along the first direction AA' is greater than the length of the bottom of the groove 113 along the first direction AA', and the width of the top of the groove 113 along the second direction BB' is greater than the width of the bottom of the groove 113 along the second direction BB'. Setting the connection between the sidewall and the bottom wall of the groove 113 as an arc surface can further facilitate the smooth filling of the inner electrode 112 material into each corner of the groove 113, and reduce the tip effect in the groove 113, further reducing the risk of local stress concentration during sintering.

[0073] Example 3

[0074] like Figures 10-13 This embodiment provides a multilayer ceramic capacitor. Considering that if the sidewalls of the groove 113 are three vertical surfaces extending along a third direction CC', when the inner electrode 112 is rolled and filled in the groove 113, the sidewalls of the groove 113 may obstruct the flow of the slurry of the inner electrode 112, resulting in a small gap between the inner electrode 112 and the sidewalls of the groove 113. Therefore, this embodiment differs from Embodiment 1 in that the sidewalls of the groove 113 are set as inclined surfaces (e.g., Figure 10 and Figure 11 ) or curved surface (such as Figure 12 and Figure 13 That is, the side of the dielectric layer 111 111 facing the groove 113 is set as an inclined surface or an arc surface, and the groove 113 gradually shrinks inward from the top to the bottom along the third direction CC'.

[0075] refer to Figure 10 and Figure 11The bottom wall of the groove 113 is a horizontal plane extending along the plane containing the first direction AA' and the second direction BB'. The side wall of the groove 113 is an inclined surface, and the groove 113 gradually narrows inward from the top to the bottom along the third direction CC'. That is, the length of the top of the groove 113 along the first direction AA' is greater than the length of the bottom of the groove 113 along the first direction AA', and the width of the top of the groove 113 along the second direction BB' is greater than the width of the bottom of the groove 113 along the second direction BB'. In this way, during the process of the inner electrode 112 being rolled and filled into the groove 113, the slurry of the inner electrode 112 can flow naturally along the side wall of the groove 113 and fill the groove 113, reducing slurry air bubbles on the side wall of the groove 113. Furthermore, compared to the scheme of setting the sidewall of the groove 113 as a vertical surface, the design structure of the groove 113 in this embodiment can reduce the stress difference in shrinkage between the dielectric layer 111 material and the inner electrode 112 material. When the shrinkage of the dielectric layer 111 material is greater than that of the inner electrode 112 material, setting the sidewall of the groove 113 as an inclined surface can effectively buffer the stress.

[0076] Specifically, the two sidewalls of the groove 113, which are opposite each other in its width direction (second direction BB'), are both set as inclined surfaces (see...). Figure 11 The groove 113 also has one sidewall set as an inclined surface along its length direction (first direction AA') (see...). Figure 10 ).

[0077] More specifically, the tilt angle of the tilted surface relative to the third direction CC' is set to 10°-45° to avoid the tip effect caused by an excessively large tilt angle of the tilted surface and the stress increase caused by the material shrinkage difference between the inner electrode 112 and the dielectric layer 111.

[0078] Of course, this embodiment also includes setting the sidewall of the groove 113 as a connecting surface formed by sequentially connecting multiple inclined surfaces with different inclination angles. When the number of inclined surfaces tends to infinity, and the difference in inclination angle between two adjacent inclined surfaces tends to infinity, then the connecting surface formed by sequentially connecting multiple inclined surfaces with different inclination angles is an arc surface, that is, the sidewall of the groove 113 is an arc surface, such as... Figure 12 and Figure 13 As shown, similarly, the length of the top of the groove 113 along the first direction AA' is greater than the length of the bottom of the groove 113 along the first direction AA', and the width of the top of the groove 113 along the second direction BB' is greater than the width of the bottom of the groove 113 along the second direction BB'. Setting the sidewall of the groove 113 as an arc surface can further reduce the tip effect in the groove 113 and reduce the risk of local stress concentration during sintering.

[0079] Example 4

[0080] like Figure 14This embodiment provides a multilayer ceramic capacitor. Unlike embodiment 3, in this embodiment, a portion of the groove 113 extending along the first direction AA' to one end of the dielectric layer 111 continues to extend into the dielectric layer 111 along the third direction CC', forming a first recess 114. Specifically, the dielectric portion 111a of the dielectric layer 111 corresponds to the portion of the groove 113 extending along the first direction AA' to one end of the dielectric layer 111, which continues to extend into the dielectric portion 111a along the third direction CC', forming the first recess 114. The inner electrode 112 also fills the first recess 114 and connects to the corresponding outer electrode 2. Here, the third direction CC' is the thickness direction of the dielectric layer 111. This increases the connection area between the inner electrode 112 and the outer electrode 2, thereby increasing the connection reliability between the inner electrode 112 and the outer electrode 2.

[0081] For example, if one end of the groove 113 extends along the first direction AA' and connects to the edge of the dielectric layer 111 located at one end of the first external electrode 21, then a portion of the groove 113 near the first external electrode 21 continues to extend into the dielectric layer 111 along the third direction CC' to form a first recess 114. That is, a portion of the dielectric portion 111a near the first external electrode 21 continues to extend into the dielectric layer 111 along the third direction CC' to form a first recess 114. The inner electrode 112 also fills the first recess 114, which can increase the area ratio of the inner electrode 112 on the end face of the stacked unit 1 connected to the first external electrode 21, thereby increasing the connection surface between the inner electrode 112 and the first external electrode 21. The groove 113 extends along the first direction AA' to the edge of the dielectric layer 111 located at one end of the second external electrode 22. Then, a portion of the groove 113 near the second external electrode 22 continues to extend into the dielectric layer 111 in the third direction CC' to form a first recess 114. That is, a portion of the dielectric portion 111a near the second external electrode 22 continues to extend into the dielectric layer 111 in the third direction CC' to form a first recess 114. The inner electrode 112 also fills the first recess 114, which can increase the area ratio of the inner electrode 112 on the end face of the stacked unit 1 connected to the second external electrode 22, thereby increasing the connection area between the inner electrode 112 and the second external electrode 22.

[0082] The present invention does not limit the specific shape of the first recess 114, which can be a cuboid structure or a triangular pyramid structure.

[0083] This invention does not limit the specific dimensions of the first recess 114, as long as the extension thickness of the first recess 114 along the third direction CC' does not exceed the distance between the bottom wall of the groove 113 and the lower surface of the dielectric layer 111 on the same stacked unit 11.

[0084] Of course, this embodiment can also be based on the structure of embodiment 1 or embodiment 2 with the addition of the first recess 114, which will not be elaborated further here.

[0085] Example 5

[0086] like Figure 15 This embodiment provides a multilayer ceramic capacitor. Unlike embodiment 3, the bottom wall of the groove 113 extends along the second direction BB' on both sides into the dielectric layer 111 in the third direction CC', forming a second recess 115. Specifically, the dielectric portion 111a of the dielectric layer 111 corresponds to the area where the bottom wall of the groove 113 extends along the second direction BB' into the dielectric portion 111a in the third direction CC', forming the second recess 115. The inner electrode 112 is also filled within the second recess 115. Specifically, the bottom wall of the groove 113 may extend along the third direction CC' into the dielectric layer 111 in a portion of the area near the sidewalls of the groove 113 along the second direction BB'. Here, the third direction CC' is the thickness direction of the dielectric layer 111. This increases the bonding area between the inner electrode 112 and the dielectric layer 111 in the same stacked unit 11, thereby increasing the structural strength and bending resistance of each stacked unit 11.

[0087] Specifically, the bottom wall of the groove 113 forms a second recess 115 in the regions of the two side walls that are respectively arranged opposite to each other along the second direction BB' of the groove 113, and the second recess 115 extends along the interior of the dielectric layer 111.

[0088] The present invention does not limit the specific shape of the second recess 115. It can continue to extend into the dielectric layer 111 along the inclined angle of the side wall of the groove 113. That is, the second recess 115 can be formed into a trapezoidal structure or a cuboid structure.

[0089] This invention does not limit the specific dimensions of the second recess 115, as long as the extension length of the second recess 115 along the first direction AA' is not greater than the extension length of the groove 113 along the first direction AA', the extension width of the second recess 115 along the second direction BB' is less than half of the bottom wall of the groove 113, and the extension thickness of the second recess 115 along the third direction CC' does not exceed the distance between the bottom wall of the groove 113 and the lower surface of the dielectric layer 111 on the same stacked unit 11.

[0090] Of course, this embodiment can also add a second recessed portion 115 based on the structure of embodiment 1, embodiment 2, or embodiment 4, which will not be elaborated further here.

[0091] Example 6

[0092] like Figure 16 and Figure 17This embodiment provides a multilayer ceramic capacitor. Unlike Embodiment 1, the groove 113 extends along both sides of the second direction BB' to the edges of opposite ends of the dielectric layer 111. Specifically, the dielectric layer 111 includes a dielectric portion 111a and a side portion 111b protruding upwards from the dielectric portion 111a. The side portion 111b is located only at one end of the inner electrode 112 along the first direction AA', forming the sidewall of the groove 113. Thus, the extension width of the groove 113 along the second direction BB' is equal to the width of the dielectric layer 111 along the second direction BB'. When the inner electrode 112 is formed on the entire dielectric layer 111 sheet by printing or rolling, a large, interconnected channel is formed on the dielectric layer 111 sheet. See [link to previous section]. Figure 18 (The dashed line represents the cutting line of the stacked unit 11). The large channel provides ample space to accommodate the printed / rolled inner electrode 112, making the fabrication of the inner electrode 112 more convenient. Simultaneously, it increases the overlap area of ​​the inner electrodes 112 between adjacent stacked units 11, i.e., the effective capacitance area, thereby improving the capacitance value of the multilayer ceramic capacitor.

[0093] Of course, in this embodiment, the connection between the side wall and the bottom wall where the groove 113 connects to the dielectric layer 111 can also be set as an inclined surface or an arc surface as in embodiment 2, or the side wall where the groove 113 connects to the dielectric layer 111 can also be set as an inclined surface or an arc surface as in embodiment 3.

[0094] Of course, since the inner electrode 112 is completely exposed at both ends along the second direction BB' on the opposite end faces of the ceramic body 1 along the second direction BB' in this embodiment, the multilayer ceramic capacitor in this embodiment also includes a protective layer covering the opposite end faces of the ceramic body 1 along the second direction BB' to prevent the inner electrode 112 from being exposed. The material of the protective layer may be the same as or different from the material of the dielectric layer 111.

[0095] In summary, this utility model provides a multilayer ceramic capacitor. In each stacked unit 11 of the multilayer ceramic capacitor, a portion of the upper surface of the dielectric layer 111 is recessed to form a groove 113. One end of the groove 113 extends along the first direction AA' to the edge side of the dielectric layer 111, and the inner electrode 112 is filled in the groove 113 to connect to the outer electrode 2 located at one end of the ceramic body 1 along the first direction AA'. At the same time, the grooves 113 of two adjacent dielectric layers 111 extend along the first direction AA' to the edge sides of opposite ends of the dielectric layer 111, and the inner electrodes 112 filled in the grooves 113 of two adjacent dielectric layers 111 are staggered to connect to different outer electrodes 2. Compared to the existing multilayer ceramic capacitor structure, the dielectric layer 111 of this invention, which is integrally formed into a three-dimensional structure, can not only bridge the thickness difference of the stacked units 11 in different directions, thereby preventing the multilayer ceramic capacitor from having a bulge in the middle and a flattened end after lamination, but also eliminates the need for additional printed filler layers. This avoids problems such as multilayer alignment errors, interlayer delamination risks, and material shrinkage differences that may occur due to the different materials of the filler layer and the dielectric layer 111 when additional filler layers are required in the prior art.

[0096] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and alterations to the above embodiments within the scope of the present invention without departing from the principles and spirit of the present invention, and all such changes should fall within the protection scope of the claims of the present invention.

Claims

1. A multilayer ceramic capacitor, characterized in that, It includes a ceramic body and an external electrode disposed on the ceramic body, wherein the ceramic body includes a plurality of stacked units; Each of the stacked units includes a dielectric layer and an inner electrode. A portion of the dielectric layer is integrally recessed to form a groove. One end of the groove extends along a first direction to the edge of the dielectric layer. The inner electrode fills the groove and extends to the edge of the dielectric layer to connect to the corresponding outer electrode. The grooves in the dielectric layer of two adjacent stacked units are partially offset along the first direction so that the filled inner electrode is connected to different outer electrodes.

2. The multilayer ceramic capacitor according to claim 1, characterized in that, The dielectric layer includes an upper surface, and the groove is formed by recessing downward along a third direction from the upper surface of the dielectric layer; the inner electrode located in the groove is flush with the upper surface of the dielectric layer; Wherein, the third direction is the thickness direction of the dielectric layer.

3. The multilayer ceramic capacitor according to claim 2, characterized in that, The connection between the sidewall and the bottom wall of the groove is set as an inclined surface or a circular arc surface.

4. The multilayer ceramic capacitor according to claim 2, characterized in that, The sidewalls of the groove are configured as inclined surfaces or arc surfaces, and the groove gradually narrows inward from top to bottom along a third direction.

5. The multilayer ceramic capacitor according to claim 3 or 4, characterized in that, The length of the top of the groove along the first direction is greater than the length of the bottom of the groove along the first direction, and the width of the top of the groove along the second direction is greater than the width of the bottom of the groove along the second direction. Wherein, the first direction is the length direction of the dielectric layer, and the second direction is the width direction of the dielectric layer.

6. The multilayer ceramic capacitor according to claim 3 or 4, characterized in that, The tilt angle of the inclined surface relative to a third direction is set to 10°-45°.

7. The multilayer ceramic capacitor according to claim 2, characterized in that, A portion of the groove extends along the first direction to one end of the dielectric layer edge and continues in the third direction into the dielectric layer to form a first recess. The inner electrode also fills the first recess and is connected to the corresponding outer electrode.

8. The multilayer ceramic capacitor according to claim 2, characterized in that, The bottom wall of the groove extends into the dielectric layer along both sides in the second direction to form a second recess, and the inner electrode is also filled in the second recess.

9. The multilayer ceramic capacitor according to claim 2, characterized in that, The groove extends to the edge sides of opposite ends of the dielectric layer on both sides along the second direction, and the width of the groove along the second direction is the same as the width of the dielectric layer along the second direction. Wherein, the first direction is the length direction of the dielectric layer, and the second direction is the width direction of the dielectric layer.

10. The multilayer ceramic capacitor according to claim 2, characterized in that, The dielectric layer is integrally formed from the same ceramic slurry and has a dielectric portion and a side portion protruding upward from the dielectric portion. The dielectric portion is located between the inner electrodes of two adjacent stacked units along a third direction and forms the bottom wall of the groove. The side portion is located at the end and / or side of the inner electrode along a horizontal direction and forms the side wall of the groove.

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