A general airborne power protection circuit

Abstract

The utility model discloses a general airborne power protection circuit, this circuit is composed of anti -reversal unit and impact current suppression unit, anti -reversal unit includes transient suppression diode D1, absorption capacitor C1, NMOS pipe Q1, stabilivolt D2, upper voltage dividing resistance R1 and lower voltage dividing resistance R5, impact current suppression unit includes NMOS pipe Q2, power resistance R6, drive resistance R2 and R3, delay capacitor C3, resistance R4 and capacitor C2. Unlike traditional circuit, the two functional units share a set of circuit, only two MOS tubes and several resistors can realize the function, can achieve the most simplified circuit, and can be popularized to other direct current power supply system applications except direct current 28V power supply system.

Description

Technical Field

[0001] This utility model belongs to the field of power supply, specifically relating to power supply protection circuits. Background Technology

[0002] For airborne DC 28V power supply systems, GJB181B-2012 "Aircraft Power Supply Characteristics" specifies transient impulse current test (LDC101) and power supply reverse polarity test (LDC602). Corresponding protection circuits must be designed for these two test items to ensure that the system passes the test.

[0003] In a 28V DC power supply system, the extensive use of filtering, bypassing, and decoupling capacitors results in an overall capacitive system. Therefore, the sudden application of the 28V supply voltage at power-on causes a very high instantaneous inrush current (where C is the system capacitive load and du / dt is the power-on speed of the 28V power supply), which can reach 10 to 20 times the rated current. The faster the 28V power supply powers on and the stronger the system's capacitive characteristics, the greater the instantaneous inrush current. Without limitation, frequent power-on and power-off cycles can damage critical components such as chips and MOSFETs, leading to system malfunction. Therefore, the LDC101 project in GJB181B specifies requirements for the instantaneous inrush current, stipulating that the transient inrush current at power-on should not exceed 5 times the rated current and should return to the rated value within 0.1 seconds.

[0004] During aircraft maintenance, equipment installation, or emergency repairs, when using external power or battery power for debugging, there may be instances of human error such as incorrect power polarity connection. This can lead to reverse breakdown and explosion of semiconductor devices (diodes, transistors, etc.) and polarized capacitors (tantalum capacitors, etc.). Therefore, the LDC602 project in GJB181B assesses the power supply's tolerance to polarity errors to prevent equipment damage or functional failure due to operational mistakes. Summary of the Invention

[0005] The purpose of this invention is to provide a universal airborne power protection circuit. Unlike traditional circuits, these two functional units share a single circuit, and the function can be achieved using only two MOSFETs and a few resistors. This simplifies the circuit and can be extended to other DC power supply systems besides the 28V DC power supply system.

[0006] The technical solution of this utility model is a general airborne power supply protection circuit, characterized in that it includes a reverse connection protection unit and an inrush current suppression unit; the reverse connection protection unit includes a transient suppression diode D1, an absorption capacitor C1, an NMOS transistor Q1, a Zener diode D2, an upper voltage divider resistor R1 and a lower voltage divider resistor R5; the inrush current suppression unit includes an NMOS transistor Q2, a power resistor R6, drive resistors R2 and R3, a delay capacitor C3, a resistor R4 and a capacitor C2; In this circuit, transient suppression diode D1 and absorption capacitor C1 are connected in parallel between the input power supplies VI+ and VI- for transient voltage spike suppression; upper voltage divider resistor R1 and lower voltage divider resistor R5 are connected in series to divide the voltage and provide gate drive voltage for NMOS transistors Q1 and Q2; drive resistor R2 is connected in series with the gate of NMOS transistor Q1; drive resistor R3 is connected in series with the gate of NMOS transistor Q2; power resistor R6 is connected in parallel with the drain and source of NMOS transistor Q2 to provide an instantaneous conduction loop; Zener diode D2 is connected in parallel with lower voltage divider resistor R5 to provide a stable gate drive voltage for NMOS transistors Q1 and Q2 when the circuit is operating stably; delay capacitor C3 is connected in parallel with lower voltage divider resistor R5 to delay the turn-on of NMOS transistor Q2; capacitor C2 and resistor R4 are connected in parallel as the capacitive load of the entire circuit. When the 28V power supply is connected, the upper voltage divider resistor R1 and the lower voltage divider resistor R5 divide the voltage, so that the gate and source power supply of NMOS transistor Q1 reaches 10V, Q1 turns on, current flows through NMOS transistor Q1, the circuit is normally turned on, and the power supply supplies power to the subsequent load. When the 28V power supply is reverse-connected, since the gate and source power supplies of NMOS transistor Q1 are both 0V, and due to the unidirectional conduction characteristic of the body diode of NMOS transistor Q1, NMOS transistor Q1 is cut off, and the circuit cannot conduct, thus providing reverse connection protection for the subsequent circuit. When the 28V power supply is turned on, the current first passes through the downstream capacitive load resistor R4 and capacitor C2, and the power resistor R6. The power resistor R6 charges the capacitive load at the moment of power-on, thereby suppressing the inrush current.

[0007] Furthermore, the upper voltage divider resistor R1 has a resistance of 100KΩ, the lower voltage divider resistor R5 has a resistance of 55KΩ, and the driving voltage of the NMOS transistor Q1 is 10V.

[0008] Furthermore, if the system's rated current is 1A and the inrush current is no greater than 5A, then the minimum resistance value of the power resistor R6 is 5.6Ω, and the minimum power rating of the resistor is 5W.

[0009] Furthermore, the delay capacitor C3 is 1uF, 50V / 105.

[0010] This utility model has the following beneficial effects: 1. Unlike traditional circuits, these two functional units share a single circuit, requiring only two NMOS transistors and a few resistors to achieve their functions. This simplifies the circuit and can be extended to other DC power supply systems besides 28V DC power supply systems. Theoretical analysis and experimental verification have shown that this power protection circuit is simple in principle, reliable, and has low operating costs.

[0011] 2. Using an NMOS transistor as a reverse connection protection circuit, compared with a regular diode reverse connection protection circuit, the voltage drop is smaller when current flows through the NMOS transistor because the Rds(on) of the NMOS transistor is very small, in the milliohm range, and thus the power efficiency is higher. Attached Figure Description

[0012] Figure 1 This is a power protection circuit diagram; Figure 2 This is the circuit diagram for the reverse connection protection unit; Figure 3 It is the current loop at the moment of power-on; Figure 4 It is a steady-state current loop; Figure 5 It is a system without inrush current suppression circuitry; Figure 6 yes Figure 5 The input voltage and current waveforms; Figure 7 It is an inrush current suppression circuit; Figure 8 yes Figure 7 The input voltage and current waveforms. Detailed Implementation

[0013] For the two test items LDC101 and LDC602, the following were designed: Figure 1 The general-purpose airborne power protection circuit consists of a reverse connection protection unit and an inrush current suppression unit.

[0014] D1 is a transient suppression diode, C1 is an absorption capacitor, NMOS transistor Q1 is mainly used for reverse connection protection, NMOS transistor Q2 is mainly used for inrush current suppression, D2 is a 10V Zener diode, R6 is a power resistor, R1 and R5 are voltage divider resistors, R2 and R3 are drive resistors, C3 is a time delay capacitor, and resistor R4 and capacitor C2 form a capacitive load.

[0015] I. Reverse Connection Protection Unit When the 28V power supply is connected, resistors R1 and R5 divide the voltage, causing the gate and source power supplies of NMOS transistor Q1 to reach 10V. Q1 turns on, current flows through Q1, the circuit conducts normally, and the power supply supplies power to the subsequent load. The principle is as follows: Figure 2 As shown.

[0016] When the 28V power supply is reverse-connected, since the gate and source power supplies of the NMOS transistor Q1 are both 0V and the body diode of Q1 has a unidirectional conduction characteristic, Q1 is cut off and the circuit cannot be turned on, which can provide reverse connection protection for the subsequent circuit.

[0017] In the design, the upper voltage divider resistor R1 is chosen to be 100KΩ. Calculations show that the lower voltage divider resistor R5 is 55KΩ. Due to the Zener diode D2, the NMOS transistor's drive voltage is 10V. Using an NMOS transistor as the reverse polarity protection circuit, compared to a conventional diode reverse polarity protection circuit, results in a smaller voltage drop when current flows, leading to higher power efficiency, because the NMOS transistor's Rds(on) is very small, in the milliohm range. Furthermore, compared to PMOS transistors, NMOS transistors are easier to select and more economical.

[0018] II. Inrush Current Suppression Unit The LDC101 primarily tests two indicators of inrush current. First, the inrush current at the moment of power-on should not exceed 5 times the rated current; second, the inrush current should return to the rated value within 0.1 seconds after power-on. Circuit analysis and design are performed for each of these two indicators.

[0019] 1. Principle of Inrush Current Suppression When the 28V power supply is switched on, the current first flows through the downstream capacitive load C2, resistor R4, and power resistor R6. Power resistor R6 charges the capacitive load at the moment of power-on, thus suppressing inrush current. The current loop is as follows: Figure 3 As shown.

[0020] (1) Design of power resistor R6 When designing a power resistor R6, it is important to focus on its two electrical performance parameters: resistance and power.

[0021] First, the resistance value. The resistance value needs to be selected based on the inrush current suppression requirements. A value that is too small may result in poor inrush current suppression. For example, if the system's rated current is 1A, then the inrush current requirement is no greater than 5A. Therefore, according to Ohm's law:

[0022] Therefore, the minimum value of the power resistor R6 is 5.6Ω.

[0023] Second, the resistance rating. The resistance value needs to be calculated based on the power generated by the current flowing through the resistor. For example, if the system's rated current is 1A, the power generated in resistor R6 at the moment of power-on is:

[0024] Considering the first-level derating, the minimum power rating for resistor R6 is 10W.

[0025] (2) Design of delay capacitor C3 According to the capacitance formula When the power-on time slope and the system capacitance are constant, the longer the power-on delay time, the smaller the inrush current generated. Therefore, a power-on delay capacitor C3 was designed.

[0026] After the 28V power supply is powered on, current flows through resistor R1 to charge capacitor C3. When the voltage across C3 reaches 10V, NMOS transistor Q2 turns on, providing a power supply loop for subsequent circuits. Capacitor C3 is used as a delay drive circuit to suppress inrush current. Its steady-state current loop is as follows: Figure 4 As shown.

[0027] Since the voltage divider resistor R1 is 100KΩ and the NMOS transistor gate drive voltage is 10V, according to the capacitor charging formula τ=RC:

[0028] The delay capacitor C3 is 1uF, therefore, a 50V / 105 capacitor should be selected for C3.

[0029] III. Circuit Simulation To verify the effectiveness of the inrush current suppression circuit, a system was built as follows: Figure 5 The system shown has no inrush current suppression circuit, where the 28V power supply has a delay of 100µs, and a 1A capacitive load is simulated by capacitor C2 and resistor R3.

[0030] Depend on Figure 6 The simulation results (blue represents the input voltage waveform, and red represents the input current waveform) show that without the use of the inrush current suppression circuit, a 1A capacitive load can generate a very large inrush current, which is about 20 to 30 times the rated current. Therefore, it is necessary to suppress this current.

[0031] To verify the effectiveness of the inrush current suppression circuit, a system was built as follows: Figure 7 The surge current suppression circuit shown has a 100µs delay for the 28V power supply, and uses capacitor C2 and resistor R3 to simulate a 1A capacitive load.

[0032] Depend on Figure 8 The simulation results (blue represents the input voltage waveform, and red represents the input current waveform) show that after using the inrush current suppression circuit, the inrush current generated by the 1A capacitive load is about twice the rated current, and its current size is about 2A, which is far lower than the requirement of 5 times the inrush current. In addition, the delay capacitor C3 can be dynamically adjusted according to the actual situation to control the magnitude of the inrush current.

[0033] IV. Conclusion This utility model designs corresponding application circuits for the transient impulse current test (LDC101) and power supply reverse polarity test (LDC602) specified in GJB181B-2012 "Aircraft Power Supply Characteristics". The circuit principle analysis is clear and the circuit structure is simple. It can be extended to other DC power supply systems besides DC 28V power supply systems and is an effective general power supply protection circuit.

Claims

1. A universal airborne power supply protection circuit, characterized in that, It includes a reverse connection protection unit and an inrush current suppression unit; the reverse connection protection unit includes a transient suppression diode D1, an absorption capacitor C1, an NMOS transistor Q1, a Zener diode D2, an upper voltage divider resistor R1 and a lower voltage divider resistor R5; the inrush current suppression unit includes an NMOS transistor Q2, a power resistor R6, drive resistors R2 and R3, a delay capacitor C3, a resistor R4 and a capacitor C2; In this circuit, transient suppression diode D1 and absorption capacitor C1 are connected in parallel between the input power supplies VI+ and VI- for transient voltage spike suppression; upper voltage divider resistor R1 and lower voltage divider resistor R5 are connected in series to divide the voltage and provide gate drive voltage for NMOS transistors Q1 and Q2; drive resistor R2 is connected in series with the gate of NMOS transistor Q1; drive resistor R3 is connected in series with the gate of NMOS transistor Q2; power resistor R6 is connected in parallel with the drain and source of NMOS transistor Q2 to provide an instantaneous conduction loop; Zener diode D2 is connected in parallel with lower voltage divider resistor R5 to provide a stable gate drive voltage for NMOS transistors Q1 and Q2 when the circuit is operating stably; delay capacitor C3 is connected in parallel with lower voltage divider resistor R5 to delay the turn-on of NMOS transistor Q2; capacitor C2 and resistor R4 are connected in parallel as the capacitive load of the entire circuit. When the 28V power supply is connected, the upper voltage divider resistor R1 and the lower voltage divider resistor R5 divide the voltage, so that the gate and source power supply of NMOS transistor Q1 reaches 10V, Q1 turns on, current flows through NMOS transistor Q1, the circuit is normally turned on, and the power supply supplies power to the subsequent load. When the 28V power supply is reverse-connected, since the gate and source power supplies of NMOS transistor Q1 are both 0V, and due to the unidirectional conduction characteristic of the body diode of NMOS transistor Q1, NMOS transistor Q1 is cut off, and the circuit cannot conduct, thus providing reverse connection protection for the subsequent circuit. When the 28V power supply is turned on, the current first passes through the downstream capacitive load resistor R4 and capacitor C2, and the power resistor R6. The power resistor R6 charges the capacitive load at the moment of power-on, thereby suppressing the inrush current.

2. The universal airborne power supply protection circuit as described in claim 1, characterized in that, The upper voltage divider resistor R1 has a resistance of 100KΩ, the lower voltage divider resistor R5 has a resistance of 55KΩ, and the driving voltage of NMOS transistor Q1 is 10V.

3. A universal airborne power supply protection circuit as described in claim 1, characterized in that, If the system's rated current is 1A and the inrush current is no more than 5A, then the minimum resistance value of the power resistor R6 is 5.6Ω, and the minimum power rating of the resistor is 5W.

4. A universal airborne power supply protection circuit as described in claim 1, characterized in that, The delay capacitor C3 is 1uF, 50V / 105.

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