Thickened QFN package pin packaging structure facilitating board mounting and pressure resistance isolation
By thickening the QFN package pin structure and using underfill for isolation, the problems of large package size, insufficient voltage resistance, and high cost were solved, achieving improved isolation voltage resistance and product thinning.
CN224556289UActive Publication Date: 2026-07-24JIANGSU HUACHUANG MICROSYSTEM CO LTD
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JIANGSU HUACHUANG MICROSYSTEM CO LTD
- Filing Date
- 2025-07-31
- Publication Date
- 2026-07-24
AI Technical Summary
Technical Problem
Existing isolation voltage-resistant chip designs suffer from problems such as large package size, insufficient voltage withstand capability, and high production cost, making them particularly difficult to meet the requirements of compact devices.
Method used
The product adopts a thickened QFN package pin structure, with the exposed pins plated thicker and filled with underfill to form non-air isolation, improving isolation withstand voltage capability and achieving a thinner and lighter product.
Benefits of technology
The isolation withstand voltage capability is improved by 5-10 times, the product's high voltage resistance is enhanced, the packaging structure is made thinner and lighter, reducing production costs and making it suitable for compact equipment applications.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN224556289U_ABST
Abstract
The utility model discloses a kind of thickened QFN packaging pin packaging structures of board convenient to board pressure isolation, including substrate, each chip, piece glue, plastic encapsulation material, each solder wire, Underfill glue and PCB board;Each chip is connected to each corresponding pin by each solder wire after passing through piece glue;The multiple pins of substrate include each reinforcing pin and 2n first type pin, n≥5 and integer, 2n first type pin is all arranged with equal interval;Exposed pin of each first type pin is all provided with plating thick layer, plating thick layer connects the bonding pad of PCB board;Underfill glue is filled between the bottom of PCB board and substrate.This application plating thick layer to exposed pin, so that finished product chip connects PCB, and there will be a certain height difference with the bonding pad of PCB board, can be filled in Underfill bottom, no longer use air isolation, effectively improve isolation voltage capacity, while product overall also realizes light and thin.
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