Micro light emitting structure and micro light emitting device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-22
- Publication Date
- 2026-08-11
AI Technical Summary
然而,AlGaN基深紫外Micro-LED的光提取效率较低,一直是制约其性能提升的关键瓶颈之一
[0015] The beneficial effects of this application are as follows: The micro-light-emitting structure and micro-light-emitting device provided by this application, by setting a light-scattering structure on the surface of the first semiconductor layer exposed by the mesa structure array in the micro-light-emitting structure, wherein the mesa structure array has multiple light-emitting regions spaced apart and non-light-emitting regions arranged around each light-emitting region, and includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer, the light-emitting layer and the second semiconductor layer being stacked sequentially on one side of the first semiconductor layer in the multiple light-emitting regions to form multiple mesa structures, and the light-scattering structure being arranged around the first semiconductor layer in each light-emitting region and configured to scatter the light emitted by the light-emitting layer, thereby enhancing the mesa structure. The scattering effect of the exposed surface of the first semiconductor layer in the structure array disrupts the total internal reflection condition within the first semiconductor layer. By using the light scattering structure, the light is redirected to the escape cone on the light-emitting side, thus improving the problem of light being unable to escape due to back-and-forth reflection within the first semiconductor layer. This enhances the light extraction efficiency, thereby improving the light extraction efficiency of AlGaN-based deep ultraviolet Micro-LEDs. This leads to an increase in the luminous efficacy of deep ultraviolet light-emitting devices and enables high-power emission, significantly improving the performance of deep ultraviolet light-emitting devices to meet the requirements of high-power applications. At the same time, it extends the device's lifespan, reduces energy consumption, and lays a solid foundation for the widespread application of deep ultraviolet technology.
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Figure CN224627098U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor light-emitting technology, specifically to a micro light-emitting structure and a micro light-emitting device. Background Technology
[0002] AlGaN (aluminum gallium nitride)-based deep ultraviolet micro-LEDs (micro-light emitting diodes) have attracted much attention due to their potential applications in sterilization, ultraviolet curing, maskless lithography, and optical communication. However, the low light extraction efficiency of AlGaN-based deep ultraviolet micro-LEDs has always been one of the key bottlenecks restricting their performance improvement.
[0003] Therefore, improving the light extraction efficiency of AlGaN-based deep ultraviolet Micro-LEDs has become an urgent problem to be solved. Utility Model Content
[0004] This application provides a micro-light-emitting structure and a micro-light-emitting device to improve the light extraction efficiency of AlGaN-based deep ultraviolet Micro-LEDs, thereby enhancing the luminous efficacy of deep ultraviolet light-emitting devices.
[0005] This application provides a micro-light-emitting structure, which includes: a mesa structure array having a plurality of light-emitting regions spaced apart and a non-light-emitting region surrounding each light-emitting region, and including a first semiconductor layer, a light-emitting layer and a second semiconductor layer, wherein the light-emitting layer and the second semiconductor layer are stacked sequentially on one side of the first semiconductor layer in the plurality of light-emitting regions to form a plurality of mesa structures; and a light scattering structure disposed on the side of the first semiconductor layer near the light-emitting layer in the non-light-emitting region, the light scattering structure being disposed around the mesa structure array in each light-emitting region and configured to scatter the light emitted by the light-emitting layer.
[0006] The light scattering structure includes a light scattering unit or multiple light scattering units spaced apart, and the light scattering unit is a nanostructure.
[0007] The light scattering unit is a protrusion formed by a local protrusion on the surface of the first semiconductor layer near the light-emitting layer in the non-light-emitting region.
[0008] The light scattering unit is a recessed portion formed by a localized depression on the surface of the first semiconductor layer near the light-emitting layer in the non-light-emitting region.
[0009] The light scattering structure includes multiple light scattering units spaced apart, which are periodically arranged on the side of the first semiconductor layer near the light-emitting layer in the non-light-emitting region.
[0010] The non-light-emitting area includes the peripheral area, which is the area surrounding multiple light-emitting areas; the micro-light-emitting structure also includes: a first ohmic electrode, disposed on the side of the first semiconductor layer near the light-emitting layer in the peripheral area, and at least partially covering the light-scattering structure disposed on the side of the first semiconductor layer near the light-emitting layer in the peripheral area.
[0011] The micro-light-emitting structure also includes a first ohmic electrode disposed on the side of the first semiconductor layer away from the light-emitting layer.
[0012] The non-light-emitting region includes a spacer region, which is a spacer region between multiple light-emitting regions; the micro-light-emitting structure also includes: a passivation layer, which covers at least the sidewall of the mesa structure and the surface of the first semiconductor layer in the spacer region that is close to the light-emitting layer; a second ohmic electrode, which is disposed on the side of the second semiconductor layer in the mesa structure that is away from the light-emitting layer and penetrates the passivation layer; and a reflective layer, which covers the surface of the second ohmic electrode that is away from the light-emitting layer and the surface of the passivation layer that is away from the mesa structure array.
[0013] The micro-light-emitting structure also includes a reflective layer disposed on the side of the multiple mesa structures away from the first semiconductor layer, and air is maintained between the reflective layer and the first semiconductor layer.
[0014] This application also provides a micro light-emitting device, which includes the micro light-emitting structure described above.
[0015] The beneficial effects of this application are as follows: The micro-light-emitting structure and micro-light-emitting device provided by this application, by setting a light-scattering structure on the surface of the first semiconductor layer exposed by the mesa structure array in the micro-light-emitting structure, wherein the mesa structure array has multiple light-emitting regions spaced apart and non-light-emitting regions arranged around each light-emitting region, and includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer, the light-emitting layer and the second semiconductor layer being stacked sequentially on one side of the first semiconductor layer in the multiple light-emitting regions to form multiple mesa structures, and the light-scattering structure being arranged around the first semiconductor layer in each light-emitting region and configured to scatter the light emitted by the light-emitting layer, thereby enhancing the mesa structure. The scattering effect of the exposed surface of the first semiconductor layer in the structure array disrupts the total internal reflection condition within the first semiconductor layer. By using the light scattering structure, the light is redirected to the escape cone on the light-emitting side, thus improving the problem of light being unable to escape due to back-and-forth reflection within the first semiconductor layer. This enhances the light extraction efficiency, thereby improving the light extraction efficiency of AlGaN-based deep ultraviolet Micro-LEDs. This leads to an increase in the luminous efficacy of deep ultraviolet light-emitting devices and enables high-power emission, significantly improving the performance of deep ultraviolet light-emitting devices to meet the requirements of high-power applications. At the same time, it extends the device's lifespan, reduces energy consumption, and lays a solid foundation for the widespread application of deep ultraviolet technology. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of the micro-light-emitting structure provided in the embodiments of this application;
[0018] Figure 2 This is another schematic diagram of the micro-light-emitting structure provided in the embodiments of this application;
[0019] Figure 3 This is another schematic diagram of the micro-light-emitting structure provided in the embodiments of this application;
[0020] Figure 4 This is another schematic diagram of the micro-light-emitting structure provided in the embodiments of this application;
[0021] Figure 5 This is another schematic diagram of the micro-light-emitting structure provided in the embodiments of this application;
[0022] Figure 6 This is a schematic diagram of the structure of the micro light-emitting device provided in the embodiments of this application. Detailed Implementation
[0023] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0024] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.
[0025] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0026] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0027] Furthermore, the directional terms mentioned in the embodiments of this application, such as [up], [down], [front], [back], [left], [right], [inner], [outer], [side], etc., are only for reference to the accompanying drawings. Therefore, the directional terms used are for illustrating and understanding the embodiments of this application, and not for limiting the embodiments of this application. In the various drawings, structurally similar units are represented by the same reference numerals. For clarity, the various parts in the drawings are not drawn to scale. In addition, some related parts may not be shown in the drawings.
[0028] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.
[0029] AlGaN-based deep ultraviolet (DUV) micro-LEDs have attracted considerable attention due to their potential applications in sterilization, UV curing, maskless lithography, and optical communication. However, low light extraction efficiency has remained a key bottleneck restricting performance improvement. This is primarily due to the significant refractive index difference between AlGaN and air, causing most light to undergo total internal reflection within the device and fail to escape effectively. In traditional DUV micro-LED structures, light is generated in the multi-quantum-well active layer and radiates in all directions. Because of the high refractive index of AlGaN, if the incident angle of light reaches the device surface greater than the critical angle (e.g., the critical angle at the AlGaN / air interface is approximately 23°), it will be completely reflected back into the device. These confined photons are eventually absorbed by the material after multiple reflections, resulting in significant energy loss. In micro-LED arrays, the n-AlGaN (n-type AlGaN) layer guides UV light to adjacent pixels, causing UV light to be absorbed by the p-type layer and the active region, thus limiting the improvement of the device's light extraction efficiency.
[0030] In related technologies, methods such as tilted sidewall structures, nanopatterned substrates, or distributed Bragg mirrors can be used to improve light extraction efficiency. While tilted sidewall structures can break total internal reflection within the n-AlGaN layer and adjust the optical path, the tilt angle of the tilted sidewall structure has a significant impact on improving light extraction efficiency. However, due to the randomness of the tilt angle, controlling it is difficult, which poses a challenge to achieving the desired optical effect.
[0031] To address the aforementioned problems, this application provides a micro-light-emitting structure and a micro-light-emitting device. A light-scattering structure is provided on the surface of a first semiconductor layer exposed by a mesa structure array in the micro-light-emitting structure. The mesa structure array has multiple light-emitting regions spaced apart and non-light-emitting regions surrounding each light-emitting region. It includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The light-emitting layer and the second semiconductor layer are sequentially stacked on one side of the first semiconductor layer within the multiple light-emitting regions to form multiple mesa structures. The light-scattering structure is positioned around the mesa structure array within each light-emitting region and configured to scatter the light emitted by the light-emitting layer. This enhances the light scattering effect of the first semiconductor layer surface exposed by the mesa structure array, breaks total internal reflection within the first semiconductor layer, and redirects the light to the escape cone on the light-emitting side. This effectively improves the problem of light reflecting back and forth within the first semiconductor layer and failing to escape, thereby increasing light extraction efficiency. Furthermore, by setting up a light scattering structure, the light guidance of the first semiconductor layer can be reduced, thereby reducing the light absorption of the second semiconductor layer and further improving the light extraction efficiency of the device. This can improve the luminous efficacy of the deep ultraviolet light-emitting device and enable the high-power emission function of the deep ultraviolet light-emitting device, thus significantly improving the performance of the deep ultraviolet light-emitting device, meeting the needs of high-power applications, extending the device's lifespan, reducing energy consumption, and laying a solid foundation for the widespread application of deep ultraviolet technology.
[0032] Furthermore, compared to related technologies that improve light extraction efficiency by employing tilted sidewall structures, the tilt angle of the tilted sidewall structure has a significant impact on improving light extraction efficiency, but the tilt angle is random and difficult to control, leading to difficulties in achieving the desired optical effect. In this embodiment, a light scattering structure is provided on the surface of the first semiconductor layer (e.g., an n-type AlGaN layer) exposed by the mesa structure array in the micro-light-emitting structure. This light scattering structure can disrupt the total internal reflection condition inside the n-type AlGaN layer, redirecting light that might otherwise be totally reflected into the escape cone, thereby improving light extraction efficiency. Moreover, since the specific structure and material of the light scattering structure can be flexibly adjusted according to actual needs, the method of improving light extraction efficiency by employing a light scattering structure in this embodiment can more easily achieve the desired optical effect.
[0033] The following detailed description is based on specific embodiments. It should be noted that the sequence numbers of the following embodiments are not intended to limit the preferred order of the embodiments.
[0034] Please see Figures 1 to 5 , Figure 1 This is a cross-sectional schematic diagram of the micro-light-emitting structure provided in the embodiments of this application. Figure 2 This is another cross-sectional schematic diagram of the micro-light-emitting structure provided in the embodiments of this application. Figure 3This is another cross-sectional schematic diagram of the micro-light-emitting structure provided in the embodiments of this application. Figure 4 This is another cross-sectional schematic diagram of the micro-light-emitting structure provided in the embodiments of this application. Figure 5 This is another cross-sectional schematic diagram of the micro-light-emitting structure provided in the embodiments of this application. For example... Figures 1 to 5 As shown, the micro-light-emitting structure 10 includes a mesa structure array 11 and a light-scattering structure 12. The mesa structure array 11 has multiple light-emitting regions C1 spaced apart and non-light-emitting regions C2 surrounding each light-emitting region C1. It includes a first semiconductor layer 111, a light-emitting layer 112, and a second semiconductor layer 113. The light-emitting layer 112 and the second semiconductor layer 113 are sequentially stacked along a first direction Z on one side of the first semiconductor layer 111 within the multiple light-emitting regions C1 to form multiple mesa structures 100. The light-scattering structure 12 is located on the side of the first semiconductor layer 111 near the light-emitting layer 112 within the non-light-emitting region C2. The light-scattering structure 12 surrounds the mesa structure array 11 within each light-emitting region C1 and is configured to scatter the light emitted by the light-emitting layer 112. This disrupts the total internal reflection condition within the first semiconductor layer 111, redirecting light that might otherwise be totally reflected into the escape cone, improving light extraction efficiency, significantly enhancing the performance of the micro-light-emitting device, meeting the requirements of high-power applications, extending device lifespan, and reducing energy consumption.
[0035] Specifically, in the mesa structure array 11, the light-emitting layer 112 can be a quantum well layer, for example, a multi-quantum well layer. For example, the light emitted by the light-emitting layer 112 can be ultraviolet light. The first semiconductor layer 111 and the second semiconductor layer 113 have different polarities. Specifically, the first semiconductor layer 111 is an N-type semiconductor layer, and the second semiconductor layer 113 is a P-type semiconductor layer.
[0036] In some embodiments, the light-emitting layer 112 can be a periodic structure formed by alternating layers of low-Al content aluminum gallium nitride (AlGaN) layers and high-Al content aluminum gallium nitride (AlGaN) layers, wherein the low-Al content AlGaN layer is a quantum well layer with a thickness of 1–3 nm, and the high-Al content AlGaN layer is a quantum barrier layer with a thickness of 7–12 nm. Exemplarily, the light-emitting layer 112 can specifically be six periods of Al… 0.40 Ga 0.60 N layer / Al 0.60 Ga 0.40 The N-layer alternating stacked structure, wherein Al 0.40 Ga 0.60 The thickness of the N layer can be 2nm, Al 0.60 Ga 0.40 The thickness of the N layer can be 10 nm.
[0037] In some embodiments, such as Figures 1 to 5 As shown, the first semiconductor layer 111 and the second semiconductor layer 113 can be an N-type semiconductor layer 111 and a P-type semiconductor layer 113, respectively. Specifically, the N-type semiconductor layer 111 can be an N-type AlGaN layer 111, and the thickness of the N-type AlGaN layer 111 can be 1–3 nm, for example, 1 μm, 1.5 μm, 2 μm, 2.5 μm, or 3 μm. Exemplarily, the N-type AlGaN layer 111 can be specifically Al... 0.65 Ga 0.35 The N-layer can be 2μm thick.
[0038] The P-type semiconductor layer 113 may include a P-type AlGaN layer 1131 and a P-type gallium nitride (GaN) layer 1132 sequentially stacked in a direction away from the light-emitting layer 112. The thickness of the P-type AlGaN layer 1131 can be 50–100 nm, and the thickness of the P-type GaN layer 1132 can be 10–100 nm. For example, the P-type AlGaN layer 1131 may specifically be Al… 0.40 Ga 0.60 The N-layer can have a thickness of 40 nm. For example, the thickness of the P-type GaN layer 1132 can specifically be 50 nm.
[0039] Specifically, such as Figures 1 to 5 As shown, the second semiconductor layer 113 may further include a P-type electron blocking layer 1133, which is disposed between the light-emitting layer 112 and the P-type AlGaN layer 1131 to block electrons escaping from the light-emitting layer 112 to the P-type AlGaN layer 1131, thereby improving luminous efficiency. The P-type electron blocking layer 1133 may be made of a semiconductor material with high bandgap energy, such as AlGaN, which can effectively prevent electrons from passing through while allowing holes to be transported smoothly to the light-emitting layer 112.
[0040] In some examples, the thickness of the P-type electron blocking layer 1133 can be 10–20 nm, for example, specifically 10 nm, 12 nm, 14 nm, 16 nm, 18 nm or 20 nm.
[0041] In some examples, the p-type electron blocking layer 1133 can specifically be Al 0.65 Ga 0.35 The N-layer structure can have a thickness of 20nm.
[0042] In some embodiments, such as Figure 1 , Figure 3 and Figure 5As shown, the mesa structure array 11 may further include a buffer layer 114, which is located on the side of the first semiconductor layer 111 facing away from the light-emitting layer 112. Specifically, the mesa structure array 11 may further include a substrate 115, which is located on the side of the buffer layer 114 facing away from the first semiconductor layer 111. The substrate 115 serves to support the film structure located thereon, and the buffer layer 114 can alleviate the stress between the first semiconductor layer 111 and the substrate 115 caused by lattice mismatch and thermal expansion coefficient mismatch.
[0043] In some examples, the material of the buffer layer 114 may include buffer materials such as gallium nitride or aluminum nitride. For example, the buffer layer 114 may be specifically an aluminum nitride layer, and the thickness of the aluminum nitride layer may be 1 to 3 μm, for example, it may be 1 μm, 2 μm or 3 μm.
[0044] In some examples, substrate 115 may be a sapphire substrate, a silicon substrate, an aluminum nitride substrate, a silicon carbide substrate, or a gallium nitride substrate, etc.
[0045] In this embodiment, as Figures 1 to 5 As shown, in the above-mentioned mesa structure array 11, the first semiconductor layer 111 may include a bottom 111A and a plurality of protrusions 111B corresponding one-to-one with the plurality of light-emitting regions C1. The bottom 111A has a first surface (i.e., the upper surface) and a second surface (i.e., the lower surface) opposite each other along the first direction Z. Each protrusion 111B is disposed on the first surface of the bottom 111A within its corresponding light-emitting region C1. Furthermore, the light-emitting layer 112 and the second semiconductor layer 113 are sequentially stacked along the first direction Z on the side of the plurality of protrusions 111B away from the bottom 111A to form a plurality of mesa structures 100. Each mesa structure 100 is jointly constituted by the bottom 111A of the first semiconductor layer 111 within the same light-emitting region C1, as well as the light-emitting layer 112 and the second semiconductor layer 113. Correspondingly, the light scattering structure 12 is specifically disposed on the side (i.e., the upper side) of the bottom 111A near the light-emitting layer 112 within the non-light-emitting region C2.
[0046] In some examples, such as Figures 1 to 5 As shown, each protrusion 111B of the first semiconductor layer 111 can be a truncated cone shape.
[0047] In some examples, such as Figures 1 to 5As shown, in the mesa structure array 11, the shape of the cross section of each mesa structure 100 perpendicular to the first direction Z can be a geometric shape such as a circle, hexagon, square or pentagon. The size (e.g., diameter) of the surface (i.e., top surface) of each mesa structure 100 away from the first semiconductor layer 111 can be 1 to 100 μm, for example, it can be 1 μm, 20 μm, 40 μm, 60 μm, 80 μm or 100 μm. The spacing between the mesa structures 100 can be 3 to 20 μm, for example, it can be 3 μm, 5 μm, 10 μm, 15 μm or 20 μm.
[0048] In some specific embodiments, such as Figures 1 to 5 As shown, in the above-mentioned mesa structure array 11, the sidewall 101 of each mesa structure 100 can be inclined, thereby optimizing the scattering and redirection of light, so that more light can be effectively guided out of the device, further improving the light extraction efficiency, and further enhancing the luminous efficacy of the micro light-emitting device.
[0049] In this embodiment, as Figures 1 to 5 As shown, the aforementioned micro-light-emitting structure 10 can specifically be a horizontal light-emitting diode chip (e.g., a horizontal deep ultraviolet light-emitting diode chip), or it can specifically be a vertical light-emitting diode chip (e.g., a vertical deep ultraviolet light-emitting diode chip). Furthermore, the aforementioned micro-light-emitting structure may also include a first ohmic electrode 13, and the first ohmic electrode 13 forms an ohmic contact with the first semiconductor layer 111.
[0050] In some examples, the material of the first ohmic electrode 13 may include at least one of the following metallic materials: chromium (Cr), titanium (Ti), gold (Au), platinum (Pt), nickel (Ni), and aluminum (Al). For example, the first ohmic electrode 13 may be a Cr / Au stacked structure, or a Ti / Al / Ti / Au stacked structure. Exemplarily, the first ohmic electrode 13 may specifically be a Ti / Al / Ti / Au stacked structure, and in the stacking direction of this stacked structure, the thicknesses of the Ti layer, Al layer, Ti layer, and Au layer in the stacked structure may be 20 nm, 30 nm, 50 nm, and 100 nm, respectively.
[0051] Specifically, in the above embodiment where the micro-light-emitting structure 10 is a horizontal light-emitting diode chip, such as Figure 1 , Figure 3 and Figure 5As shown, the non-light-emitting region C2 of the above-mentioned mesa structure array 11 may include a peripheral region C21. The peripheral region C21 is the area surrounding the plurality of light-emitting regions C1 of the above-mentioned mesa structure array 11. Furthermore, the above-mentioned first ohmic electrode 13 may be specifically disposed on the side of the first semiconductor layer 111 in the peripheral region C21 near the light-emitting layer 112, and at least partially cover the light scattering structure 12 disposed on the side of the first semiconductor layer 111 in the peripheral region C21 near the light-emitting layer 112.
[0052] Specifically, in the above embodiment where the micro-light-emitting structure 10 is a vertical light-emitting diode, such as Figure 2 and Figure 4 As shown, the surface of the first semiconductor layer 111 facing away from the light-emitting layer 112 in the above-mentioned mesa structure array 11 can be at least partially exposed, and the first ohmic electrode 13 can be specifically disposed on the side of the first semiconductor layer 111 facing away from the light-emitting layer 112.
[0053] In the above embodiments, such as Figures 1 to 5 As shown, the light scattering structure 12 described above may include a single light scattering unit 121 or multiple light scattering units 121 spaced apart. The light scattering unit 121 can be a nanostructure, specifically a nanopillar structure 121A or a nanopore structure 121B. The diameter and height of the nanopillar structure 121A can both be at the nanometer scale, and the pore size and depth of the nanopore structure 121B can both be at the nanometer scale to ensure optimal light scattering effect. The arrangement density of the light scattering units 121 can be adjusted according to actual needs to achieve a more uniform light distribution and higher light extraction efficiency. By optimizing the geometric parameters and distribution of the nanostructure, the light scattering effect can be further improved, thereby enhancing the overall device performance.
[0054] In some specific embodiments, such as Figure 1 and Figure 2As shown, the light scattering unit 121 (or the nanopillar structure 121A) can be a protrusion 121A formed by a local protrusion on the surface of the first semiconductor layer 111 near the light-emitting layer 112 within the non-light-emitting region C2. Specifically, the protrusion 121A can be a pillar structure 121A extending along the first direction Z, such as a cylindrical structure, prism structure, cone structure, pyramidal structure, frustum structure, or truncated cone structure. This design helps to increase the probability of light escaping to the light-emitting side and successfully emitting, thereby enhancing the luminous intensity of the micro-light-emitting device. In addition, the sidewalls of the protrusion 121A can be designed as rough surfaces to increase the scattering angle of light and further optimize the light redirection effect. Furthermore, the geometry and arrangement of the protrusion 121A can be optimized according to actual needs to maximize the light scattering effect and enhance the luminous efficiency. For example, by adjusting the height, diameter, and spacing of the column structure 121A, the scattering angle and intensity of light can be effectively controlled, further improving the overall performance of the micro-light-emitting structure 10 and enhancing the luminous efficiency of the micro-light-emitting device.
[0055] Furthermore, in a specific implementation, the light scattering structure 12 described above can be obtained by etching the first semiconductor layer 111 to form a plurality of protrusions 121A on the side of the first semiconductor layer 111 near the light-emitting layer 112 in the non-light-emitting region C2.
[0056] In other specific embodiments, such as Figures 3 to 5 As shown, the light scattering unit 121 (or the nanopore structure 121B) can be a recess 121B formed by a local depression on the surface of the first semiconductor layer 111 near the light-emitting layer 112 within the non-light-emitting region C2. Specifically, the recess 121B can be a groove 121B, and the cross-sectional shape of the groove 121B perpendicular to the first direction Z can be a square or circular geometric shape. Furthermore, the sidewalls of the recess 121B can also be designed as rough surfaces to increase light scattering, optimize light redirection, and further improve the luminous efficiency of the micro-light-emitting device. In addition, the geometry and arrangement of the recess 121B can be optimized according to actual needs to maximize the light scattering effect and enhance the luminous efficiency. For example, by adjusting the depth, width, and spacing of the recess 121B, the scattering angle and intensity of light can be effectively controlled, further improving the overall performance of the micro-light-emitting structure 10 and increasing the luminous efficiency of the micro-light-emitting device.
[0057] Furthermore, in a specific implementation, the light scattering structure 12 described above can be obtained by etching the first semiconductor layer 111 to form a plurality of recesses 121B on the side of the first semiconductor layer 111 near the light-emitting layer 112 in the non-light-emitting region C2.
[0058] It is worth noting that the design of the light scattering structure 12 is not limited to the protrusion 121A and the recess 121B mentioned above. Other shapes and structures can also be used, such as nanoparticles, nanowires or nanogrids, as long as they can achieve effective light scattering and redirection and improve the light extraction efficiency of the micro light-emitting device.
[0059] Therefore, the micro-light-emitting structure 10 provided in this embodiment effectively improves the light extraction efficiency by cleverly designing the light scattering structure 12, which significantly enhances the performance of the micro-light-emitting device, meets the requirements of high-power applications, extends the device's lifespan, reduces energy consumption, and has broad application prospects.
[0060] In some examples, such as Figure 1 As shown, the micro light-emitting structure 10 is a horizontal light-emitting diode chip, and the light scattering unit 121 is a protrusion 121A. Correspondingly, the first ohmic electrode 13 can cover part or all of the protrusions 121A provided on the side of the first semiconductor layer 111 near the light-emitting layer 112 in the peripheral region C21. Thus, by forming a protrusion 121 as a light scattering unit 121 on the surface of the first semiconductor layer 111 exposed by the mesa structure array 11 in the micro light-emitting structure 10, on the one hand, the contact area between the first ohmic electrode 13 and the first semiconductor layer 111 can be increased, the contact resistance can be reduced, and the heat dissipation of the device can be facilitated. On the other hand, the protrusion 121 can disrupt the total internal reflection condition inside the first semiconductor layer 111, redirecting light that might otherwise be totally reflected into the escape cone, thereby improving the light extraction efficiency. At the same time, since the protrusion 121 is part of the first semiconductor layer 111 and there is no difference in refractive index between it and the first semiconductor layer 111, there is no total internal reflection of light at the interface between the first semiconductor layer 111 and the protrusion 121. This is conducive to more light being scattered into the escape cone, further improving the light extraction effect of the micro light-emitting structure 10. Therefore, the luminous efficiency of the micro light-emitting device can be improved, and the high-power emission function of the micro light-emitting device can be realized. This significantly improves the performance of the micro light-emitting device, meets the requirements of high-power applications, extends the device lifespan, and reduces energy consumption.
[0061] In other examples, such as Figure 3 and Figure 5As shown, the aforementioned micro-light-emitting structure 10 is a horizontal light-emitting diode chip, and the aforementioned light-scattering unit 121 is a recessed portion 121B. Correspondingly, the aforementioned first ohmic electrode 13 can fill part or all of the recessed portions 121B provided on the side of the first semiconductor layer 111 near the light-emitting layer 112 within the peripheral region C21. Thus, by forming a recessed portion 121B as a light-scattering unit 121 on the surface of the first semiconductor layer 111 exposed by the mesa structure array 11 in the micro-light-emitting structure 10, on the one hand, the contact area between the aforementioned first ohmic electrode 13 and the first semiconductor layer 111 can be increased, the contact resistance can be reduced, and the heat dissipation of the device can be facilitated. On the other hand, the recessed portion 121B can disrupt the total internal reflection condition inside the first semiconductor layer 111, redirecting light that might otherwise be totally reflected to the escape cone, thereby improving the light extraction efficiency and enabling the high-power emission function of the micro-light-emitting device. This significantly improves the performance of the micro-light-emitting device, meets the requirements of high-power applications, extends the device's lifespan, and reduces energy consumption.
[0062] In other examples, such as Figure 2 As shown, the aforementioned micro-light-emitting structure 10 is a vertical light-emitting diode chip, and the aforementioned light-scattering unit 121 is a nanopillar structure 121A, which can be disposed on the side of the first semiconductor layer 111 near the light-emitting layer 112 within the non-light-emitting region C2. Specifically, the material of the nanopillar structure 121A can be the same as or different from the material of the first semiconductor layer 111. Thus, by setting the nanopillar structure 121A as the light-scattering unit 121 on the surface of the first semiconductor layer 111 exposed by the mesa structure array 11 in the micro-light-emitting structure 10, the nanopillar structure 121A can disrupt the total internal reflection condition inside the first semiconductor layer 111, redirecting light that might otherwise be totally reflected into the escape cone, thereby improving the light extraction efficiency and enabling the high-power emission function of the micro-light-emitting device. This significantly improves the performance of the micro-light-emitting device, meets the requirements of high-power applications, extends the device's lifespan, and reduces energy consumption.
[0063] It should be noted that, in this embodiment, the material, quantity, shape, size, and distribution of the light scattering units 121 in the light scattering structure 12 can be designed as needed to achieve the best light scattering effect. In some examples, the quantity and distribution of the light scattering units 121 in the light scattering structure 12 can be designed according to the size and shape of the non-light-emitting region C11 to ensure that light can be uniformly scattered in all directions after passing through the light scattering structure 12.
[0064] For example, in a light scattering structure 12 including a plurality of light scattering units 121 spaced apart, the plurality of light scattering units 121 may have the same shape and size and be periodically arranged on the side of the first semiconductor layer 111 in the non-light-emitting region C2 near the light-emitting layer 112. For example, they may be periodically arranged in the form of a triangular lattice, a square lattice, a hexagonal lattice, or a grating structure array on the surface of the first semiconductor layer 111 in the non-light-emitting region C2 near the light-emitting layer 112, and the period may be 60 to 860 nm, for example, 60 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, or 860 nm, to ensure that the light scattering units 121 can effectively scatter the incident light, thereby achieving the expected optical effect.
[0065] In some examples, the shape of the cross section of the light scattering unit 121 perpendicular to the first direction Z can be a geometric shape such as a circle, hexagon, square or pentagon.
[0066] In some examples, the size (e.g., diameter) of the cross section of the light scattering unit 121 perpendicular to the first direction Z can be 50 to 400 nm, for example, it can be 50 nm, 100 nm, 150 nm, 200 nm, 210 nm, 250 nm, 300 nm, 35 nm or 400 nm, etc.
[0067] In this embodiment, as Figures 1 to 5 As shown, the micro light-emitting structure 10 may further include a second ohmic electrode 15, which is disposed on the side of the second semiconductor layer 113 in the mesa structure 100 away from the light-emitting layer 112 and forms an ohmic contact with the second semiconductor layer 113 (e.g., a P-type GaN layer 1132) in the mesa structure 100.
[0068] In some examples, the material of the second ohmic electrode 15 may include at least one of the following metals: titanium (Ti), gold (Au), platinum (Pt), nickel (Ni), and aluminum (Al). For example, the first ohmic electrode 15 may be a Ni / Au stacked structure, or a Ni / Al stacked structure, etc. Exemplarily, the second ohmic electrode 15 may specifically be a Ni / Au stacked structure, and in this stacked structure, the thickness of both the Ni layer and the Au layer may be 10 nm.
[0069] In the above embodiments, such as Figures 1 to 5As shown, the aforementioned micro-light-emitting structure 10 may further include a passivation layer 14, which covers at least the sidewall of the mesa structure 100. The passivation layer 14 can protect the mesa structure array 11, reduce the influence of external air or debris on the mesa structure array 11, thereby improving the reliability of the micro-light-emitting structure 10 and enhancing the stability and reliability of the micro-light-emitting device.
[0070] Specifically, such as Figures 1 to 5 As shown, the non-light-emitting region C2 of the mesa structure array 11 may include a spacing region C22. The spacing region C22 is the spacing region between the multiple light-emitting regions C1 of the mesa structure array 11. Furthermore, the passivation layer 14 may specifically cover at least the sidewall 101 of the mesa structure 100 and the surface of the first semiconductor layer 111 in the spacing region C22 near the light-emitting layer 112.
[0071] Specifically, such as Figures 1 to 5 As shown, in the above embodiment where the micro light-emitting structure 10 also includes a second ohmic electrode 15, the passivation layer 14 can also cover the surface of the second semiconductor layer 113 away from the light-emitting layer 112 in the mesa structure 100 and be penetrated by the second ohmic electrode 15, so as to ensure that the surface of the second ohmic electrode 15 away from the second semiconductor layer 113 is not covered by the passivation layer 14, thereby facilitating the electrical connection between the micro light-emitting structure 10 and the external circuit.
[0072] Specifically, such as Figure 1 , Figure 3 and Figure 5 As shown, when the micro-light-emitting structure 10 is a horizontal light-emitting diode chip and the first ohmic electrode 13 is disposed on the side of the first semiconductor layer 111 in the peripheral region C21 near the light-emitting layer 112, the passivation layer 14 can also cover the surface of the first semiconductor layer 111 in the peripheral region C21 near the light-emitting layer 112 and be penetrated by the first ohmic electrode 13, so as to ensure that the surface of the first ohmic electrode 13 away from the first semiconductor layer 111 is not covered by the passivation layer 14, thereby facilitating the electrical connection between the micro-light-emitting structure 10 and the external circuit.
[0073] In some examples, the passivation layer 14 can be made of dielectric materials such as silicon dioxide (SiO2), aluminum oxide (Al2O3), aluminum nitride (AlN), or diamond. The thickness of the passivation layer 14 can be 100–400 nm, specifically 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, or 400 nm.
[0074] For example, the passivation layer 14 can be specifically a stacked structure of Al2O3 layer / SiO2 layer, and the thicknesses of the Al2O3 layer and the SiO2 layer in the stacked structure can be 30nm and 200nm, respectively.
[0075] In the above embodiments, such as Figures 1 to 5 As shown, the aforementioned micro-light-emitting structure 10 may further include a reflective layer 16, which is disposed on the side of the micro-light-emitting structure 10 where the plurality of mesa structures 100 are formed. The reflective layer 16 can reflect light emitted from the light-emitting layer 112 but directed toward the backlight side (i.e., the side of the micro-light-emitting structure 10 where the plurality of mesa structures 100 are formed), redirecting it to the light-emitting side (i.e., the side of the first semiconductor layer 111 away from the light-emitting layer 112), thereby further improving the light extraction efficiency and further enhancing the luminous efficacy of the micro-light-emitting device.
[0076] In some examples, the material of the reflective layer 16 may include at least one of the following metallic materials: titanium (Ti), gold (Au), platinum (Pt), nickel (Ni), and aluminum (Al). For example, the reflective layer 16 may specifically be an Al / Ti / Au stacked structure, and the total thickness of the stacked structure may be 600 nm.
[0077] In some specific embodiments, such as Figures 1 to 4 As shown, the reflective layer 16 can cover the surface of the second ohmic electrode 15 facing away from the light-emitting layer 112 and the surface of the passivation layer 14 facing away from the mesa structure array 11. Specifically, the reflective layer 16 can cover the sidewall of each mesa structure 100 in the mesa structure array 11, the surface of the second ohmic electrode 15 facing away from the light-emitting layer 112, and the area of the surface of the first semiconductor layer 111 in the non-light-emitting region C2 near the light-emitting layer 112 that is not covered by the first ohmic electrode 13, and is electrically isolated from the mesa array structure 11 and the first ohmic electrode 13 by the passivation layer 14. In this way, the reflective layer 16 can effectively reflect light towards the backlight side back to the light-emitting side, and through the synergistic effect of the reflective layer 16 and the light scattering structure 12, the propagation path of light can be optimized, light loss can be reduced, thereby improving the overall luminous efficiency and realizing the high-power emission function of the micro light-emitting device. This significantly improves the performance of the micro light-emitting device, meets the requirements of high-power applications, extends the device lifespan, and reduces energy consumption.
[0078] In other specific embodiments, such as Figure 5 As shown, the reflective layer 16 can be disposed on the side of the plurality of mesa structures 100 of the mesa structure array 11 that is away from the first semiconductor layer 111, and air is maintained between the reflective layer 16 and the first semiconductor layer 111. Specifically, as Figure 5 As shown, the reflective layer 16 can specifically be plate-shaped and covers the surface of the second ohmic electrode 15 facing away from the second semiconductor layer 113 in the plurality of mesa structures 100. In this way, while effectively reflecting light towards the backlight side back to the light-emitting side using the reflective layer 16, the absorption of light emitted by the light-emitting layer 112 by the reflective layer 16 is reduced, thereby further improving the light extraction efficiency and further enhancing the luminous efficacy of the micro light-emitting device.
[0079] As can be seen from the above, the micro-light-emitting structure provided in this embodiment, by setting a light scattering structure on the surface of the first semiconductor layer exposed by the mesa structure array in the micro-light-emitting structure, wherein the mesa structure array has multiple light-emitting regions spaced apart and non-light-emitting regions surrounding each light-emitting region, and includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer, the light-emitting layer and the second semiconductor layer are stacked sequentially on one side of the first semiconductor layer in the multiple light-emitting regions to form multiple mesa structures, and the light scattering structure is set around the mesa structure array in each light-emitting region and configured to scatter the light emitted by the light-emitting layer, thereby improving the light scattering effect of the surface of the first semiconductor layer exposed by the mesa structure array, destroying the total internal reflection condition inside the first semiconductor layer, and redirecting the light to the light-emitting escape cone, so as to improve the problem of light reflecting back and forth inside the first semiconductor layer and not being able to escape, improve the light extraction efficiency, thus improving the luminous efficacy of the deep ultraviolet light-emitting device, and also realizing the high-power emission function of the deep ultraviolet light-emitting device, so that the performance of the deep ultraviolet light-emitting device is significantly improved, meeting the requirements of high-power applications, while extending the device life and reducing energy consumption, laying a solid foundation for the widespread application of deep ultraviolet technology.
[0080] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of the micro light-emitting device provided in the embodiments of this application. For example... Figure 6 As shown, the micro light-emitting device 20 may include the micro light-emitting structure 21 of any of the above embodiments.
[0081] Specifically, the micro-light-emitting structure 21 includes a mesa structure array and a light-scattering structure. The mesa structure array has multiple light-emitting regions spaced apart and non-light-emitting regions surrounding each light-emitting region. It includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The light-emitting layer and the second semiconductor layer are stacked sequentially on one side of the first semiconductor layer in the multiple light-emitting regions to form multiple mesa structures. The light-scattering structure is located on the side of the first semiconductor layer in the non-light-emitting region that is close to the light-emitting layer. The light-scattering structure is arranged around the mesa structure array in each light-emitting region and is configured to scatter the light emitted by the light-emitting layer.
[0082] For example, the aforementioned micro light-emitting device 20 can be a deep ultraviolet light-emitting diode device, such as a specific ultraviolet disinfection lamp.
[0083] It should be noted that the micro light-emitting device provided in this application embodiment, because it is provided with the micro light-emitting structure provided in this application embodiment, can achieve the beneficial effects that any micro light-emitting structure provided in this application embodiment can achieve, as detailed in the previous embodiments, and will not be repeated here.
[0084] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The features, structures, or characteristics described above can be combined in any suitable manner in one or more embodiments.
[0085] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A micro-luminescent structure, characterized in that, include: The mesa structure array has multiple light-emitting regions spaced apart and non-light-emitting regions surrounding each light-emitting region, and includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer, wherein the light-emitting layer and the second semiconductor layer are stacked sequentially on one side of the first semiconductor layer in the multiple light-emitting regions to form multiple mesa structures; A light scattering structure is disposed on the side of the first semiconductor layer near the light-emitting layer in the non-light-emitting region. The light scattering structure is arranged around the mesa structure array in each of the light-emitting regions and is configured to scatter the light emitted by the light-emitting layer.
2. The micro-light-emitting structure according to claim 1, characterized in that, The light scattering structure includes a light scattering unit or multiple light scattering units spaced apart, wherein the light scattering unit is a nanostructure.
3. The micro-light-emitting structure according to claim 2, characterized in that, The light scattering unit is a protrusion formed by a localized protrusion on the surface of the first semiconductor layer near the light-emitting layer within the non-light-emitting region.
4. The micro-light-emitting structure according to claim 2, characterized in that, The light scattering unit is a recessed portion formed by a localized depression on the surface of the first semiconductor layer near the light-emitting layer within the non-light-emitting region.
5. The micro-light-emitting structure according to claim 2, characterized in that, The light scattering structure includes a plurality of light scattering units spaced apart, and the plurality of light scattering units are periodically arranged on the side of the first semiconductor layer near the light-emitting layer in the non-light-emitting region.
6. The micro-light-emitting structure according to claim 1, characterized in that, The non-luminescent area includes a peripheral area, which is the area surrounding the plurality of luminescent areas; The micro-luminescent structure also includes: The first ohmic electrode is disposed on the side of the first semiconductor layer near the light-emitting layer in the peripheral region, and at least partially covers the light scattering structure disposed on the side of the first semiconductor layer near the light-emitting layer in the peripheral region.
7. The micro-light-emitting structure according to claim 1, characterized in that, The micro-luminescent structure also includes: The first ohmic electrode is disposed on the side of the first semiconductor layer away from the light-emitting layer.
8. The micro-light-emitting structure according to claim 1, characterized in that, The non-luminescent area includes a spacer area, which is the spacer area between the plurality of luminescent areas; The micro-luminescent structure also includes: A passivation layer covers at least the sidewalls of the mesa structure and the surface of the first semiconductor layer near the light-emitting layer within the spacing region; The second ohmic electrode is disposed on the side of the second semiconductor layer away from the light-emitting layer in the mesa structure and penetrates the passivation layer; A reflective layer covers the surface of the second ohmic electrode facing away from the light-emitting layer and the surface of the passivation layer facing away from the mesa structure array.
9. The micro-light-emitting structure according to claim 1, characterized in that, The micro-luminescent structure also includes: A reflective layer is disposed on the side of the plurality of mesa structures away from the first semiconductor layer, and air is maintained between the reflective layer and the first semiconductor layer.
10. A miniature light-emitting device, characterized in that, Includes the microluminescent structure as described in any one of claims 1 to 9.