A device for generating a radio frequency detection alarm signal
Patent Information
- Application Number
- CN202521964309.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-12
- Publication Date
- 2026-08-18
- Estimated Expiration
- 2035-09-12
AI Technical Summary
但是使用模数转换器读取精确电压值并分析处理,需要连接控制器同时与控制器之间需要协议通信,通信连接线多,电路结构过于复杂
[0022] This invention provides a device for generating radio frequency (RF) detection alarm signals. The device first linearly converts the input RF signal power value into a corresponding voltage value using a coupler and diode detection circuit. Then, a resistor divider circuit limits the detected voltage to within the input voltage range of the analog-to-digital converter (ADC). The ADC, based on the sampling timing provided by the oscillator, converts the detected analog voltage value into a digital voltage signal and inputs it to a comparator. Directly acquiring the detected voltage value through the ADC improves the accuracy of RF signal power detection. The comparator then compares the digital voltage signal with a voltage threshold value provided by a level-fixing circuit and outputs a corresponding alarm level signal. Finally, an inverter flips the alarm level signal before outputting it. By using a comparator and inverter instead of a controller, no communication lines or programs are required, allowing direct processing of the detected signal and simplifying the circuit complexity.
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Figure CN224651434U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of radio frequency signal detection circuit technology, and more specifically to a device for generating radio frequency detection alarm signals. Background Technology
[0002] In the field of radio frequency (RF) communication, the RF transceiver is a critical component of the system. The RF transceiver has specific requirements regarding the power, frequency, and phase of the signals passing through it. When the transmitter transmits a signal, it's necessary to check if the transmitted signal power meets the requirements. If the signal power is lower than the requirements, an alarm signal is generated and reported to the system for processing. For the antenna output port, if there is a poor connection or disconnection with the downstream system, it will cause an increase in the RF channel VSWR, resulting in high-power signals being reflected back to the transmitter, thus damaging the transmission system. Therefore, it's necessary to check if the reflected signal power exceeds the range to determine if the downstream system connection is normal. If it exceeds the range, an alarm signal is generated and reported to the system for processing.
[0003] However, the commonly used detection circuits for detecting the power of radio frequency signals and providing feedback systems employ a circuit structure of detector + comparator or detector + analog-to-digital converter + controller. But this circuit structure has the following shortcomings:
[0004] 1. The voltage range detected by the detector often exceeds the input range of the comparator, requiring a voltage divider circuit to reduce the detected voltage value. Simultaneously, the comparator also needs a voltage divider circuit to set the comparison voltage reference value. This compression of the detected voltage range leads to a higher required resolution for the power-voltage ratio. However, due to significant errors in resistor values, the comparator reference voltage is difficult to set precisely, resulting in values that are higher or lower than the voltage value corresponding to the alarm power, easily causing missed alarms and false alarms.
[0005] 2. Using an analog-to-digital converter (ADC) can directly obtain the detected voltage value, which is more accurate than using a comparator. However, reading and analyzing the accurate voltage value using an ADC requires connection to a controller and protocol communication between the controller, resulting in numerous communication lines and an overly complex circuit structure. Utility Model Content
[0006] In view of the shortcomings of the existing technology, the present invention provides a radio frequency detection alarm signal generation device to address the technical problem of large detection error in the radio frequency signal detection circuit in the existing technology.
[0007] To achieve the above objectives, the present invention adopts the following technical solution:
[0008] This utility model provides a device for generating radio frequency detection alarm signals, including a coupler, a diode detection circuit, a resistor voltage divider circuit, an analog-to-digital converter, a level fixing circuit, a comparator, an oscillator, and an inverter; wherein,
[0009] The input terminal of the coupler is connected to the RF signal input terminal, and the output terminal of the coupler is connected to the input terminal of the analog-to-digital converter via a diode detector circuit and a resistor voltage divider circuit in sequence.
[0010] The output of the oscillator is connected to the clock terminal of the analog-to-digital converter, and the output of the analog-to-digital converter is connected to the input terminal of the comparator.
[0011] The input terminal of the level-fixed circuit is connected to an external power supply, and the output terminal of the level-fixed circuit is connected to the level-fixed terminal of the comparator; the output terminal of the comparator is connected to the input terminal of the inverter.
[0012] Furthermore, the diode detection circuit includes a Schottky diode and an RC filter circuit; the input terminal of the Schottky diode is connected to the output terminal of the coupler, and the output terminal of the Schottky diode is connected to the input terminal of the resistor voltage divider circuit via the RC filter circuit.
[0013] Furthermore, the resistor divider circuit includes a first voltage divider resistor and a second voltage divider resistor;
[0014] The first end of the first voltage divider resistor is connected to the output of the RC filter circuit, and the output of the first voltage divider resistor is connected to the input of the analog-to-digital converter and the first end of the second voltage divider resistor, respectively; the output of the second voltage divider resistor is grounded.
[0015] Furthermore, the level-fixing circuit includes a pull-up resistor branch and a pull-down resistor branch; the level-fixing terminal of the comparator includes a pull-high pin and a pull-low pin; wherein,
[0016] The first end of the pull-up resistor branch is connected to an external power supply, and the second end of the pull-up resistor branch is connected to a pull-up pin.
[0017] The first end of the pull-down resistor branch is connected to the low-level pin and the external power supply, respectively, and the second end of the pull-down resistor branch is grounded.
[0018] Furthermore, the analog-to-digital converter is specifically one of an 8-bit analog-to-digital converter, a 10-bit analog-to-digital converter, a 12-bit analog-to-digital converter, a 14-bit analog-to-digital converter, and a 16-bit analog-to-digital converter.
[0019] Furthermore, the oscillator includes an oscillator chip, a filter capacitor, and a third voltage divider resistor; wherein,
[0020] The first end of the filter capacitor and the first end of the third voltage divider resistor are connected to the external power supply, respectively. The second end of the filter capacitor and the second end of the third voltage divider resistor are connected to the oscillator chip, respectively. The output of the oscillator chip is connected to the clock terminal of the analog-to-digital converter.
[0021] In summary, this utility model has the following beneficial effects:
[0022] This invention provides a device for generating radio frequency (RF) detection alarm signals. The device first linearly converts the input RF signal power value into a corresponding voltage value using a coupler and diode detection circuit. Then, a resistor divider circuit limits the detected voltage to within the input voltage range of the analog-to-digital converter (ADC). The ADC, based on the sampling timing provided by the oscillator, converts the detected analog voltage value into a digital voltage signal and inputs it to a comparator. Directly acquiring the detected voltage value through the ADC improves the accuracy of RF signal power detection. The comparator then compares the digital voltage signal with a voltage threshold value provided by a level-fixing circuit and outputs a corresponding alarm level signal. Finally, an inverter flips the alarm level signal before outputting it. By using a comparator and inverter instead of a controller, no communication lines or programs are required, allowing direct processing of the detected signal and simplifying the circuit complexity. Attached Figure Description
[0023] Figure 1 This is a circuit block diagram of a radio frequency detection alarm signal generation device according to the present invention;
[0024] Figure 2 This is a circuit diagram of the coupler of this utility model;
[0025] Figure 3 This is a structural diagram of the diode detector circuit of this utility model;
[0026] Figure 4 This is a structural diagram of the resistor voltage divider circuit of this utility model;
[0027] Figure 5 This is a circuit structure diagram of the analog-to-digital converter of this utility model;
[0028] Figure 6 This is a circuit diagram of the oscillator of this utility model;
[0029] Figure 7 This is a circuit diagram of the comparator and level-fixed circuit of this utility model;
[0030] Figure 8 This is the circuit structure diagram of the inverter of this utility model. Detailed Implementation
[0031] The present invention will be further described in detail below with reference to the accompanying drawings.
[0032] To make the objectives, solutions, and advantages of this utility model clearer, the following detailed description of this utility model is provided in conjunction with the embodiments and accompanying drawings. The illustrative embodiments and descriptions of this utility model are only used to explain this utility model and are not intended to limit this utility model.
[0033] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to implement the present invention. In other embodiments, well-known structures, circuits, materials, or methods are not specifically described in order to avoid obscuring the present invention.
[0034] In the field of radio frequency (RF) communication, the quality of the RF transceiver determines the quality of the received or transmitted signal, and thus the overall quality of the RF system. Depending on the application of the RF system, the RF transceiver has specific requirements regarding the power, frequency, and phase of the signals passing through it. Power is a common RF indicator, representing the amplitude of the signal. When the transmitter transmits a signal, it's necessary to check if the transmitted signal power meets the requirements. If the signal power is below the required level, an alarm signal is generated and reported to the system for processing. For the antenna output port, poor connection or disconnection with subsequent circuitry can increase the RF channel VSWR, causing high-power signals to be reflected back to the transmitter, potentially damaging the transmission system. Therefore, it's necessary to detect if the reflected signal power exceeds the specified range to determine if the subsequent system connections are normal. If it does, an alarm signal is generated and reported to the system for processing. Thus, correctly detecting the RF signal strength and promptly feeding it back to the system is an indispensable step in ensuring the normal operation of the RF transceiver system and preventing system damage. Common methods for detecting RF signal power and feeding it back to the system include using a detector + comparator or a detector + analog-to-digital converter + controller. However, the above methods have shortcomings:
[0035] 1. The voltage range detected by the detector often exceeds the comparator's input range, requiring a voltage divider circuit to reduce the detected voltage value. Simultaneously, the comparator also needs a voltage divider circuit to set the comparison voltage reference value. This compression of the detected voltage range necessitates a higher resolution for the power-voltage ratio. However, due to significant errors in resistor values, the comparator reference voltage is difficult to set precisely, resulting in values that are higher or lower than the voltage corresponding to the alarm power, causing missed alarms and false alarms. Furthermore, even within the same batch of products, different reference voltages can lead to different alarm states under the same input conditions.
[0036] Using an analog-to-digital converter (ADC) can directly obtain the detected voltage value, providing a more accurate value compared to a comparator. However, reading and analyzing the precise voltage value using an ADC requires connection to a controller and protocol communication, involving multiple communication lines and the writing of communication programs to obtain data. For simple alarm signal reporting requirements, the hardware and software complexity is excessive.
[0037] The following is in conjunction with the appendix of this utility model. Figures 1-8 The embodiments of this utility model will be described in detail below.
[0038] Example 1:
[0039] Reference Figure 1 As shown, this embodiment provides a device for generating radio frequency (RF) detection alarm signals, including a coupler, a diode detection circuit, a resistor divider circuit, an analog-to-digital converter (ADC), a level-fixing circuit, a comparator, an oscillator, and an inverter. The input terminal of the coupler is connected to the RF signal input terminal, and the output terminal of the coupler is connected to the input terminal of the ADC via the diode detection circuit and the resistor divider circuit. The output terminal of the oscillator is connected to the clock terminal of the ADC, and the output terminal of the ADC is connected to the input terminal of the comparator. The input terminal of the level-fixing circuit is connected to an external power supply, and the output terminal of the level-fixing circuit is connected to the level-fixing terminal of the comparator. The output terminal of the comparator is connected to the input terminal of the inverter.
[0040] In this embodiment, the input RF signal power value is linearly converted into a corresponding voltage value through a coupler and diode detection circuit. A resistor divider circuit then limits the detected voltage to within the input voltage range of the analog-to-digital converter (ADC). An oscillator provides the necessary timing for sampling to the ADC. The ADC converts the detected analog voltage value into a digital signal, which is then fed into a comparator and compared with a preset voltage threshold to obtain an alarm level signal that is opposite to the communication protocol requirements. Finally, an inverter flips the alarm level signal to ensure consistency with the protocol requirements, while also enhancing the ability to drive subsequent circuits and improving stability.
[0041] The radio frequency detection alarm signal generation device provided in this embodiment uses an analog-to-digital converter instead of a comparator to directly acquire the detection voltage value. The error during analog-to-digital conversion comes only from the quantization error of the device. The higher the number of bits, the smaller the error, which can improve accuracy. The comparator + inverter replaces the controller, eliminating the need for communication lines and programs. It can directly process the detection signal to obtain the high and low level values of the alarm signal, reducing the complexity of the circuit.
[0042] In this embodiment, the coupler is used to extract a portion of the radio frequency signal to determine the current signal power value while minimizing impact on the main radio frequency signal. (Refer to...) Figure 2 As shown, the coupler specifically uses a directional coupler of model ADC-20-132+.Figure 2 In this design, coupler U2 includes an INPUT pin, an OUTPUT pin, a GND pin, a DNU pin, a COUPLED pin, and a 50Ω termination matching pin. The INPUT pin is used to connect to the RF signal input terminal, receiving the RF signal. The OUTPUT pin is used to output the RF signal. The COUPLED pin is used to connect to the diode detection circuit. The 50Ω termination matching pin provides a 50Ω impedance matching environment for the coupler's internal directional coupling structure, ensuring efficient and stable RF signal transmission. The termination matching pin is connected to a 50Ω termination matching resistor R2 to achieve impedance matching.
[0043] In this embodiment, the diode detection circuit is used to linearly convert the radio frequency signal into a voltage value, facilitating subsequent processing by the analog-to-digital converter. (Refer to...) Figure 3 As shown, the diode detection circuit includes a Schottky diode U5 and an RC filter circuit. The input terminal of the Schottky diode is connected to the output terminal of the coupler, and the output terminal of the Schottky diode is connected to the input terminal of the resistor divider circuit via the RC filter circuit. The RC filter circuit consists of a 68pF capacitor C2 and a 10KΩ resistor R11. One end of capacitor C2 and resistor R11 are connected in parallel to the output terminal circuit of the Schottky diode, while the other end of capacitor C2 and resistor R11 are connected in parallel to ground. The specific Schottky diode used is a BAS70. The A pin of the Schottky diode is connected to the COUPLED pin of the coupler, and the K pin of the Schottky diode serves as the output terminal, outputting the detected voltage value.
[0044] In some other embodiments of this utility model, an integrated detector can be used to replace the diode detector circuit. The specific choice can be made according to actual needs, and will not be described in detail here.
[0045] In this embodiment, the resistor divider circuit is used to transform the detector voltage to a range of input signals allowed by the analog-to-digital converter. (Refer to...) Figure 4 As shown, the voltage divider circuit includes a first voltage divider resistor R12 and a second voltage divider resistor R16. The first terminal of the first voltage divider resistor R12 is connected to the output of the RC filter circuit. The output of the first voltage divider resistor R12 is connected to the input of the analog-to-digital converter and the first terminal of the second voltage divider resistor R16. The output of the second voltage divider resistor R16 is grounded. The resistance value of both the first voltage divider resistor R12 and the second voltage divider resistor R16 is 1KΩ.
[0046] In some other embodiments of this utility model, digital potentiometers or resistor networks can be used to replace resistor voltage divider circuits. The specific choice can be made according to actual needs, and will not be elaborated here.
[0047] In this embodiment, the analog-to-digital converter (ADC) is used to convert the detected analog voltage value into a corresponding digital signal. Specifically, the ADC is one of an 8-bit, 10-bit, 12-bit, 14-bit, or 16-bit ADC. (Refer to...) Figure 5 As shown, the analog-to-digital converter (ADC) used in this embodiment is an 8-bit ADC, model AD9057. The ENCODE pin of ADC U4 serves as the clock input, used to receive the clock signal output from the oscillator as the sampling timing. The signal processed by the resistor divider circuit is input through the AIN pin of the ADC. Simultaneously, the digital signal converted by the ADC is output to the comparator through pins D0~D7.
[0048] In some other embodiments of this utility model, an 8-bit analog-to-digital converter can be replaced with a higher precision analog-to-digital converter such as a 10-bit, 12-bit, 14-bit, or 16-bit converter. The specific settings can be selected according to the actual testing requirements, and will not be elaborated on in this embodiment.
[0049] In this embodiment, the oscillator is used to generate a clock signal, providing the timing information for the analog-to-digital converter to acquire the signal. (Refer to...) Figure 6 As shown, the oscillator includes an oscillator chip U6, a filter capacitor C3, and a third voltage divider resistor R22; wherein, the first terminal of the filter capacitor C3 and the first terminal of the third voltage divider resistor R22 are respectively connected to an external power supply, and the second terminal of the filter capacitor C3 and the second terminal of the third voltage divider resistor R22 are respectively connected to the oscillator chip U6; the output terminal of the oscillator chip U6 (corresponding to...) Figure 6 The OUT pin is connected to the clock input (ENCODE pin) of the analog-to-digital converter. Specifically, the oscillator chip U6 is model LTC6905-80. The third voltage divider resistor R22 has a resistance of 1KΩ. The third voltage divider resistor R22 can work with capacitor C3 to filter the power supply input to the chip's V+ pin (the presence of R22 affects the RC time constant of the filter, changing the filter characteristics). At the same time, the OE pin of the oscillator chip U6 is enabled at a high level. Therefore, the third voltage divider resistor R22 connected to the OE pin can also act as a pull-up resistor to determine the voltage level.
[0050] In this embodiment, the level-fixing circuit includes a pull-up resistor branch and a pull-down resistor branch; the comparator's level-fixing terminal includes a pull-up pin and a pull-down pin; wherein...
[0051] The first end of the pull-up resistor branch is connected to the external power supply, and the second end of the pull-up resistor branch is connected to the pull-up pin.
[0052] The first end of the pull-down resistor branch is connected to the low-level pin and the external power supply, respectively, and the second end of the pull-down resistor branch is grounded.
[0053] Specifically, one end of the pull-up resistor branch is connected to the power supply, and the other end is connected to the signal line that needs to be pulled high. Its function is to pull the signal line's level high, keeping the signal line in a high-level state when there is no other driving force. One end of the pull-down resistor branch is connected to ground (GND), and the other end is connected to the signal line that needs to be pulled low. Its function is to pull the signal line's level low, keeping the signal line in a low-level state when there is no other driving force.
[0054] Reference Figure 7 As shown, the pull-up resistor branch specifically includes pull-up resistor R1, with a resistance of 1KΩ. One end of pull-up resistor R1 is connected to the external operating power supply (i.e., the +5V end), and the other end is connected to the comparator's pull-up pin, pulling the comparator's level high. When there is no other drive, the signal line is kept at a high level, thus forming the comparator's threshold value.
[0055] The pull-down resistor branch specifically includes resistors R3, R4, R5, R6, R7, R8, R9, R10, R13, R14, R15, R17, R18, R19, R20, and R21. Among these, resistors R3, R5, R7, R9, R15, R18, R20, and R21 all have a resistance of 1KΩ. Resistors R4, R6, R8, R10, R13, R14, R17, and R19 all have a resistance of 0Ω. Figure 7 In this circuit, one end of resistors R3, R5, R7, R9, R15, R18, R20, and R21 is connected in parallel to the external power supply (i.e., the +5V end), and the other end is grounded through R4, R6, R8, R10, R13, R14, R17, and R19 respectively. Simultaneously, the comparator's low-level pins are connected to the circuits between resistors R3 and R4, R5 and R6, R7 and R8, R9 and R10, R15 and R13, R18 and R14, R20 and R17, and R21 and R19, thus keeping the comparator in a low-level state when there is no other driving force.
[0056] In this embodiment, the comparator compares the voltage value acquired by the analog-to-digital converter with a self-set threshold value to generate high and low level signals for alarm purposes. (Refer to...) Figure 7 As shown, the comparator U3 in this embodiment is an SN74LS685. Its P0~P7 pins are used to connect to the D0~D7 pins of the analog-to-digital converter (ADC) to receive the digital signals output by the ADC. The P>Q pin and the P=Q pin are connected in parallel as pull-up pins, connected to the pull-up resistor R1 in the pull-up resistor branch. The Q0~Q7 pins of the comparator are used as pull-down pins, connected to the pull-down resistor branches respectively. Specifically, this embodiment uses an 8-bit ADC; therefore, the comparator is also an 8-bit comparator.
[0057] In some other embodiments of this utility model, AND, OR, NOT logic gates can be used to replace the comparator. The specific choice can be made according to actual needs, and will not be elaborated here.
[0058] In this embodiment, the inverter is used to reverse the logic of the comparator output signal with the signal specified in the actual protocol. The inverter inverts the signal level, thereby enhancing the ability to drive subsequent circuits. The inverter model is SN74AHC1G04. (Refer to...) Figure 8 As shown, pin A of inverter U1 is connected to the junction of the comparator's pull-up pin and pull-up resistor R1, receiving the high / low level signal output from the comparator, i.e., the alarm level signal. The inverter's VCC pin is used to connect to an external power supply. The inverter's Y pin is used to output the alarm level signal.
[0059] In this embodiment, a circuit combination of diode detector circuit + resistor voltage divider circuit + 8-bit analog-to-digital converter + 8-bit comparator + inverter is used. The diode detector circuit obtains a linear RF signal power-voltage correspondence value. Then, the resistor voltage divider circuit converts the voltage value into the input voltage range of the analog-to-digital converter. The 8-bit analog-to-digital converter then performs analog-to-digital conversion, converting the analog voltage value into a corresponding digital signal, thus improving voltage resolution. The 8-bit comparator then compares the input digital signal with a fixed voltage threshold value and outputs an alarm signal based on the comparison result. The inverter enhances the ability to drive subsequent circuits.
[0060] In this embodiment, the working principle of the radio frequency detection alarm signal generation device is as follows:
[0061] The input RF signal passes through a coupler and a diode detector circuit to obtain the voltage value corresponding to the input RF signal power. Using a resistor voltage divider circuit to... Converted to voltage values within the input voltage range of the analog-to-digital converter. The oscillator generates a clock signal that is directly input to the clock input of the analog-to-digital converter (ADC). The 8-bit ADC will... Convert to the corresponding 8-bit binary voltage data The 8-bit binary voltage threshold value is set by adjusting the pull-up and pull-down resistors of the comparator's 8-bit comparison bits. A comparator is used to convert 8-bit binary voltage data. With the preset 8-bit binary voltage threshold value of the level-fixed circuit Comparison: When ≥ At that time, the inverted alarm level =0; when < At that time, the inverted alarm level =1. Inverted alarm level The required alarm level is then obtained by an inverter. .
[0062] To further illustrate the technical advantages of the RF detection alarm signal generation device in this embodiment, the following explanation is provided in conjunction with the parameter calculation formulas for the corresponding circuit components:
[0063] The coupling degree of a coupler has the following formula: , Right now (1). Wherein, "Couple" represents the degree of coupling. This indicates the signal power of the input radio frequency signal. This indicates the signal power output from the secondary path (coupled end) through the coupling structure of the directional coupler.
[0064] Input power With peak voltage The relationship has a formula: For radio frequency systems, the signal source internal resistance If the impedance is equal to 50Ω, then (2).
[0065] Since the power obtained from the detector corresponds to a very large voltage value, a resistor divider circuit is needed to transform the voltage range to the input range of a comparator or analog-to-digital converter to obtain a new voltage value. Here, the compression ratio is denoted as R. (3).
[0066] Integrating the above formulas (1) to (3), we can obtain the relationship between the input power and the voltage value used in the comparison circuit: (4).
[0067] Taking 80W as the alarm power as an example: the coupler coupling degree is 20dB, which means the alarm signal power after coupling an 80W signal. W corresponds to the peak voltage: =8.944272V. A resistor divider circuit is used to compress the alarm voltage to 1 / 5 of its original value, i.e., R = 1 / 5. =8.944272 / 5=1.7888544 V.
[0068] For existing detector + comparator signal detection schemes, the error originates from the resistor divider circuit used by the comparator to set the comparison voltage: the error of commonly used resistors is ±5%. If the alarm reference voltage is set to 1.7888544V using the comparator, then the actual voltage value obtained through the resistor divider circuit is 1.7888544×0.95~1.7888544×1.05=1.69941168~1.87829712 V.
[0069] Using formula (4) to deduce the corresponding signal power value at this time:
[0070] .
[0071] This scheme uses an analog-to-digital converter (ADC), and its error comes from the quantization error during the ADC conversion. Taking the ADC used in this scheme as an example, its input voltage range is 2V~3V, corresponding to LSB=(3-2) / 2^8=0.00390625 V. The manual indicates that the maximum quantization error is 2LSB=0.0078125 V, and the error is approximately ±0.8%. If the detector input voltage is 1.7888544V, the actual sampled voltage value is 1.7888544-2LSB~1.7888544+2LSB=1.7732294~1.8044794 V. Using formula (4) to reverse calculate the corresponding signal power value at this time:
[0072] .
[0073] As can be seen from the data above, the detection power of the device generated in this embodiment is more accurate than that of common comparator schemes. If further improvement in detection power accuracy is required, a higher bit-count analog-to-digital converter, such as a 12-bit or 16-bit converter, can be used.
[0074] Compared to existing detector + analog-to-digital converter + controller solutions, this embodiment uses an analog-to-digital converter for analog-to-digital conversion, achieving the same detection power accuracy. However, this solution eliminates the need for a controller, communication cables, and programming requirements, simplifying the circuit structure.
[0075] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this utility model. It should be understood that the above description is only a specific embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.
Claims
1. A device for generating radio frequency detection alarm signals, characterized in that, include: Coupler, diode detector circuit, resistor voltage divider circuit, analog-to-digital converter, level fixing circuit, comparator, oscillator, and inverter; among them, The input terminal of the coupler is connected to the radio frequency signal input terminal, and the output terminal of the coupler is connected to the input terminal of the analog-to-digital converter in sequence through a diode detector circuit and a resistor voltage divider circuit. The output of the oscillator is connected to the clock terminal of the analog-to-digital converter, and the output of the analog-to-digital converter is connected to the input terminal of the comparator. The input terminal of the level-fixing circuit is connected to an external power supply, and the output terminal of the level-fixing circuit is connected to the level-fixing terminal of the comparator; the output terminal of the comparator is connected to the input terminal of the inverter.
2. The device for generating radio frequency detection alarm signals according to claim 1, characterized in that: The diode detection circuit includes a Schottky diode and an RC filter circuit; the input terminal of the Schottky diode is connected to the output terminal of the coupler, and the output terminal of the Schottky diode is connected to the input terminal of the resistor voltage divider circuit via the RC filter circuit.
3. The device for generating radio frequency detection alarm signals according to claim 1, characterized in that: The resistor voltage divider circuit includes a first voltage divider resistor and a second voltage divider resistor; The first end of the first voltage divider resistor is connected to the output of the RC filter circuit, and the output of the first voltage divider resistor is connected to the input of the analog-to-digital converter and the first end of the second voltage divider resistor, respectively; the output of the second voltage divider resistor is grounded.
4. The device for generating radio frequency detection alarm signals according to claim 1, characterized in that: The level-fixing circuit includes a pull-up resistor branch and a pull-down resistor branch; the level-fixing terminal of the comparator includes a pull-high pin and a pull-low pin; wherein... The first end of the pull-up resistor branch is connected to an external power supply, and the second end of the pull-up resistor branch is connected to a pull-up pin. The first end of the pull-down resistor branch is connected to the low-level pin and the external power supply, respectively, and the second end of the pull-down resistor branch is grounded.
5. The device for generating radio frequency detection alarm signals according to claim 1, characterized in that: The analog-to-digital converter is specifically one of an 8-bit analog-to-digital converter, a 10-bit analog-to-digital converter, a 12-bit analog-to-digital converter, a 14-bit analog-to-digital converter, and a 16-bit analog-to-digital converter.
6. The device for generating radio frequency detection alarm signals according to claim 1, characterized in that: The oscillator includes an oscillator chip, a filter capacitor, and a third voltage divider resistor; wherein... The first end of the filter capacitor and the first end of the third voltage divider resistor are connected to the external power supply, respectively. The second end of the filter capacitor and the second end of the third voltage divider resistor are connected to the oscillator chip, respectively. The output of the oscillator chip is connected to the clock terminal of the analog-to-digital converter.