A photosensitive chip packaging structure
Patent Information
- Application Number
- CN202521561226.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-25
- Publication Date
- 2026-08-18
- Estimated Expiration
- 2035-07-25
AI Technical Summary
[0004]1、金线裸露易受损:目前许多封装方式中,金线在芯片与电路板之间连接后处于部分或完全裸露状态,极易因外界振动、冲击或长期使用中的疲劳而发生断裂,从而导致电性连接失效,降低整体封装稳定性和可靠性
[0025](1)提升封装稳定性与可靠性:通过包裹填充胶层将金线完全封装在内,有效避免金线裸露在外,防止因外部振动或冲击导致金线断裂,提高了芯片封装结构的机械稳定性和电连接可靠性。
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Figure CN224653882U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of chip packaging technology, and in particular to a photosensitive chip packaging structure. Background Technology
[0002] CIS (CMOS image sensor) photosensitive chips are key components widely used in image acquisition and processing, and are found in smartphones, automotive cameras, security monitoring, industrial inspection, and other fields. In related image sensor packaging structures, CIS photosensitive chips need to be connected to the circuit board via gold wire bonding, and the packaging process ensures the cleanliness, stability, and sealing of the photosensitive area to avoid performance degradation caused by external optical contamination and mechanical interference.
[0003] In existing technologies, the packaging structure of photosensitive chips generally suffers from the following technical problems and shortcomings:
[0004] 1. Exposed gold wires are easily damaged: In many current packaging methods, the gold wires are partially or completely exposed after being connected between the chip and the circuit board. They are very susceptible to breakage due to external vibration, impact or fatigue during long-term use, which can lead to electrical connection failure and reduce the overall packaging stability and reliability.
[0005] 2. Large encapsulation cavity with high air content: In existing encapsulation structures, the sealed cavity between the photosensitive chip and the filter is relatively large, with a high internal air content. When the device is in a high-temperature or drastically changing environment, the air inside the cavity will expand or condense, easily forming water mist or condensation on the filter surface, which seriously affects image clarity and imaging effect.
[0006] 3. Insufficient chip structure stability: A lack of reasonable structural support design can lead to relative displacement between the filter and the chip, which may cause reliability problems such as loosening of the device, sealing failure, and filter breakage during long-term use.
[0007] In summary, existing photosensitive chip packaging structures still have room for improvement in terms of stability, protection capabilities, and sealing performance. There is an urgent need for a new packaging structure with higher stability, stronger sealing performance, and effective protection of gold wire connections to improve the overall device reliability and image sensing performance. Utility Model Content
[0008] To address the shortcomings of existing technologies, the purpose of this invention is to provide a photosensitive chip packaging structure that improves the sealing performance, stability, and reliability of the packaging structure.
[0009] To achieve the above objectives, this utility model provides the following technical solution: a photosensitive chip packaging structure, including a circuit board, a fixing filler layer, a CIS photosensitive chip, a supporting adhesive layer, a wrapping filler layer, a filter, and multiple pads;
[0010] Each of the aforementioned pads is embedded within the lower end face of the circuit board;
[0011] The CIS photosensitive chip is located directly above the circuit board, and the fixing filler layer is filled between the circuit board and the CIS photosensitive chip;
[0012] The filter is located above the CIS photosensitive chip, and the support adhesive layer is disposed on the outer edge of the photosensitive area of the CIS photosensitive chip. The support adhesive layer is used to support, connect and seal the chip cavity between the outer edge of the photosensitive area of the CIS photosensitive chip and the filter.
[0013] Multiple gold wires connect the CIS photosensitive chip to the circuit board. Each gold wire is embedded in the encapsulating filler layer, which is disposed outside the supporting adhesive layer. The encapsulating filler layer fixes and connects the filter, the supporting adhesive layer, the CIS photosensitive chip, the fixing filler layer, and the circuit board.
[0014] Furthermore, the gold wire is embedded in the encapsulating filler layer in a spiral structure, and the cross-sectional shape of the gold wire is circular.
[0015] Furthermore, the ratio between the pitch and the diameter of the helical structure satisfies: 0.2 ≤ P / D ≤ 0.8; where P represents the pitch and D represents the diameter of the helical structure.
[0016] The relationship between the single-turn helical radius of curvature and the helical diameter of the spiral structure satisfies: R = D / 2 ± 10%; where R represents the single-turn helical radius of curvature, and the rate of change of the radius of curvature between two adjacent helical turns does not exceed 5%.
[0017] Furthermore, the filter is a multi-layer composite filter structure, which includes an infrared filter layer, an anti-ultraviolet layer, and an anti-fogging layer sequentially spliced from top to bottom.
[0018] Furthermore, the lower end face of the anti-fogging layer is provided with periodically arranged micron-sized protrusions, the height of which is 5 to 20 μm and the center-to-center distance between adjacent protrusions is 10 to 50 μm;
[0019] The raised surface is covered with a nanoscale villous structure, the villous diameter being 50 to 200 nm, and the villous structure having a coverage density of 10. 8 Up to 10 10 root / cm 2 .
[0020] Furthermore, each of the protrusions is arranged in a hexagonal honeycomb pattern, and each of the protrusions has 3 to 5 nanometer-sized pits on its top, with each pit having a depth of 0.5 to 2 μm.
[0021] Furthermore, a flexible buffer adhesive layer is provided on the outside of the encapsulating filling adhesive layer, and the encapsulating filling adhesive layer and the flexible buffer adhesive layer form a double-layer encapsulation structure, with the interior of the flexible buffer adhesive layer having a honeycomb mesh structure.
[0022] Furthermore, the filter includes a light-shielding area covering part of its surface and a light-transmitting area not covered by the light-shielding area. The light-transmitting area is positioned opposite the photosensitive area of the CIS photosensitive chip, and the light-shielding area is positioned opposite the outer edge of the photosensitive area of the CIS photosensitive chip, for blocking stray light from entering the photosensitive area.
[0023] Furthermore, the light-shielding area is a light-shielding ink layer formed by printing and curing, and the light-shielding ink layer completely covers the vertical projection area of the outer edge of the photosensitive area of the CIS photosensitive chip on the filter.
[0024] The beneficial effects of this utility model are:
[0025] (1) Improve packaging stability and reliability: By wrapping the gold wire with a filler layer, the gold wire is completely encapsulated inside, which effectively avoids the gold wire being exposed to the outside and prevents the gold wire from breaking due to external vibration or impact, thereby improving the mechanical stability and electrical connection reliability of the chip packaging structure.
[0026] (2) Improve the sealing structure and prevent fogging: By setting a support adhesive layer on the outer edge of the photosensitive area of the CIS photosensitive chip and forming a sealed chip cavity with the filter, the volume of the chip cavity is effectively reduced, the air content in the cavity is reduced, and the problems of fogging and condensation on the filter surface caused by the thermal expansion or condensation of air are reduced, thereby improving the imaging quality and environmental adaptability.
[0027] (3) Enhance the overall structural strength: The supporting adhesive layer and the wrapping filling adhesive layer together form a multi-layer support and sealing system, which not only enhances the bonding strength between the filter and the chip, but also effectively improves the overall structure's resistance to deformation and impact.
[0028] (4) Overall integration: This utility model integrates each pad into the lower end face of the circuit board, avoiding the pads from being exposed. This not only protects the pads and improves their durability, but also improves the overall integration of the packaging structure. Attached Figure Description
[0029] Figure 1 This is a cross-sectional view of the photosensitive chip packaging structure in this utility model;
[0030] Figure 2This is an exploded view of the photosensitive chip packaging structure in this utility model;
[0031] Figure 3 This is a schematic diagram of the composite filter structure in this utility model;
[0032] Figure 4 This is a structural schematic diagram of the light-shielding area and the light-transmitting area in this utility model.
[0033] Reference numerals: 1. Circuit board; 2. Fixing filler layer; 3. CIS photosensitive chip; 4. Supporting adhesive layer; 5. Encapsulating filler layer; 6. Filter; 61. Infrared filter layer; 62. Anti-ultraviolet layer; 63. Anti-fogging layer; 7. Solder pad; 8. Gold wire; 9. Light-shielding area; 10. Light-transmitting area. Detailed Implementation
[0034] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Identical components are indicated by the same reference numerals. It should be noted that the terms "front," "rear," "left," "right," "upper," and "lower" used in the following description refer to directions in the accompanying drawings, and the terms "bottom surface," "top surface," "inner," and "outer" refer to directions toward or away from the geometric center of a specific component, respectively.
[0035] Example 1, referring to Figures 1 to 2 This is the first embodiment of the present invention. This embodiment provides a photosensitive chip packaging structure that can improve the sealing performance, stability and reliability of the packaging structure. It includes a circuit board 1, a fixed filling adhesive layer 2, a CIS photosensitive chip 3, a supporting adhesive layer 4, a wrapping filling adhesive layer 5, a filter 6 and multiple solder pads 7.
[0036] Each pad 7 is embedded in the lower end face of the circuit board 1 to prevent the pad 7 from being exposed. This not only protects the pad 7 and improves its durability, but also improves the overall integration of the package structure.
[0037] The CIS photosensitive chip 3 is located directly above the circuit board 1. The fixing and filling adhesive layer 2 is filled between the circuit board 1 and the CIS photosensitive chip 3. The fixing and filling adhesive layer 2 plays the role of bonding and buffering.
[0038] The filter 6 is located above the CIS photosensitive chip 3. The filter 6 is used to filter out stray light of a specific wavelength band and only allow the target wavelength to enter the photosensitive area, thereby improving the image quality. The support adhesive layer 4 is set on the outer edge of the photosensitive area of the CIS photosensitive chip 3. The support adhesive layer 4 is used to support, connect and seal the chip cavity between the outer edge of the photosensitive area of the CIS photosensitive chip 3 and the filter 6. The support adhesive layer 4 fixes and supports the filter 6 and the CIS photosensitive chip 3 and forms a sealed cavity, playing a dual role of physical support and isolation from external gas.
[0039] Multiple gold wires 8 connect the CIS photosensitive chip 3 to the circuit board 1. Each gold wire 8 is embedded in the wrapping and filling adhesive layer 5, which is located outside the supporting adhesive layer 4. The wrapping and filling adhesive layer 5 fixes and connects the filter 6, the supporting adhesive layer 4, the CIS photosensitive chip 3, the fixing filling adhesive layer 2, and the circuit board 1 to form a strong and sealed overall structure.
[0040] Working principle of Example 1:
[0041] During use, external images enter through the filter 6 and are projected onto the photosensitive area of the CIS photosensitive chip 3. The photosensitive chip converts the light signal into an electrical signal and transmits it to the circuit board 1 through the gold wire 8, thereby realizing the acquisition and transmission of image data.
[0042] Because the gold wire 8 is encapsulated by the filler layer 5, damage caused by mechanical stress or thermal expansion and contraction is avoided, thus improving the reliability of the electrical connection. At the same time, the supporting adhesive layer 4 effectively limits the space between the filter 6 and the photosensitive chip, reduces the air content, and reduces fogging caused by temperature changes, ensuring the clarity and stability of image acquisition.
[0043] The photosensitive chip has a robust overall packaging structure and strong vibration resistance, making it suitable for image acquisition systems with high stability requirements, such as vehicle cameras, industrial vision, and security monitoring.
[0044] Example 2 is the second embodiment of this utility model. Unlike the previous embodiment, this embodiment provides a spiral structure, which can improve the buffering capacity of the gold wire 8 and enhance the long-term stability of the entire packaging structure. The gold wire 8 is embedded in the wrapping filler layer 5 in a spiral structure. The cross-sectional shape of the gold wire 8 is circular, which is conducive to the uniform stress on the gold wire 8 during the winding process and avoids breakage due to local stress concentration caused by irregular cross-section.
[0045] Preferably, the ratio between the pitch and the diameter of the helical structure satisfies: 0.2≤P / D≤0.8; where P represents the pitch and D represents the diameter of the helical structure; the structure within this ratio range can provide good elastic buffering performance within a limited volume, while avoiding dense stacking or tensile deformation of the gold wires 8.
[0046] The relationship between the radius of curvature of a single turn of the spiral structure and the spiral diameter satisfies: R = D / 2 ± 10%; where R represents the radius of curvature of a single turn of the spiral, and the rate of change of the radius of curvature between two adjacent turns of the spiral does not exceed 5%. This ensures that the entire spiral structure is uniform and continuous, which is beneficial to mechanical stability and stress dispersion.
[0047] Working principle of Example 2:
[0048] During operation, the CIS photosensitive chip 3 receives the light signal entering through the filter 6 and converts it into an electrical signal. The electrical signal is then transmitted to the circuit board 1 via a spiral gold wire 8. Because the gold wire 8 employs a spiral structure, it forms a compressible and stretchable elastic shape after encapsulation, providing higher strain buffering capacity compared to traditional straight gold wires 8. When external vibrations, thermal expansion and contraction, or minute displacements occur between the chip and the circuit board 1 due to temperature differences, the spiral gold wire 8 structure can absorb and release stress, preventing the gold wire 8 from breaking or causing poor contact, significantly improving the reliability of the electrical connection.
[0049] In addition, the spiral structure is fully embedded in the encapsulating filler layer 5, which further provides physical protection and fixed support, effectively preventing the gold wire 8 from getting damp, corroded, or broken by vibration, thereby enhancing the long-term stability and environmental adaptability of the entire encapsulation structure.
[0050] Example 3, referring to Figure 3 This is the second embodiment of the present invention. Unlike the previous embodiment, this embodiment provides a multi-layer composite filter structure, a raised and fuzzy structure, which can improve the stability of the packaging structure and the image clarity in harsh environments. The filter 6 is a multi-layer composite filter structure, which includes an infrared filter layer 61, an anti-ultraviolet layer 62 and an anti-fogging layer 63, which are sequentially spliced from top to bottom.
[0051] Preferably, the lower end face of the anti-condensation layer 63 is provided with periodically arranged micron-sized protrusions, the height of which is 5 to 20 μm and the center-to-center distance between adjacent protrusions is 10 to 50 μm; the periodic micron-sized protrusions and nano-sized villous structure form a superhydrophobic surface (contact angle > 150°), which reduces the surface area of water droplets and allows condensed water to roll off quickly.
[0052] The raised surface is covered with a nanoscale villous structure, with villous diameters ranging from 50 to 200 nm and a villous structure coverage density of 10. 8 Up to 10 10 root / cm 2 This creates a lotus leaf-like surface, significantly enhancing anti-fogging and self-cleaning capabilities.
[0053] Preferably, each protrusion is arranged in a hexagonal honeycomb pattern, with a uniform and compact structure, which is beneficial to the overall surface functional consistency and anti-interference performance; and each protrusion has 3 to 5 nano-level pits on its top, with each pit having a depth of 0.5 to 2 μm, which enhances hydrophobicity and anti-condensation ability.
[0054] Working principle of Example 3:
[0055] In practical applications, when external light passes through the composite filter structure, it first passes through the infrared filter layer 61, where infrared stray light is effectively blocked, allowing only visible light to enter; then it passes through the anti-ultraviolet layer 62 to prevent ultraviolet light from affecting the photosensitivity; finally, the light passes through the anti-fogging layer 63 and enters the photosensitive area of the CIS photosensitive chip 3.
[0056] When moisture is generated in the encapsulation cavity due to changes in ambient temperature, the biomimetic surface composed of micron-sized protrusions and nanofibers prevents water vapor from condensing into sheet-like droplets on the surface of filter 6. The pit structure also helps to disperse and quickly dissipate condensed water droplets, playing a role in anti-fogging and rapid drying.
[0057] In addition, this micro-nano structure also has functions such as hydrophobicity, self-cleaning, and low refractive index interference, which avoids water vapor from affecting imaging quality and effectively improves the stability and image clarity of the CIS packaging system in harsh environments.
[0058] Preferably, a flexible buffer layer is also provided on the outer side of the filling adhesive layer 5. The flexible buffer layer is made of a flexible material, has good elasticity, and strong resistance to compression and impact. The filling adhesive layer 5 and the flexible buffer layer form a double-layer encapsulation structure. The interior of the flexible buffer layer has a honeycomb mesh structure, which has high energy absorption and good deformation buffering capacity. The structural characteristics of the honeycomb mesh structure are as follows:
[0059] The interior is composed of multiple hexagonal microcavities, with the wall thickness of the honeycomb unit controlled between 50 and 200 μm and the cavity diameter approximately 0.5 to 2 mm, exhibiting excellent mechanical absorption properties.
[0060] The honeycomb structure is arranged periodically and has a uniform overall shape, effectively distributing the external pressure or impact load evenly.
[0061] While maintaining buffering performance, the honeycomb structure has high material lightweight and thermal expansion coordination, making it suitable for high-density, high-precision device packaging.
[0062] Specifically, in this embodiment, during the installation or use of the device, the photosensitive chip packaging structure may be affected by complex environments such as vibration, drops, and thermal shrinkage. The flexible buffer adhesive layer, as an external flexible protective layer that wraps the filling adhesive layer 5, can absorb external impact forces through the deformation of the honeycomb structure, preventing the force from being directly transmitted to the internal CIS photosensitive chip 3 and the gold wire 8 connection area, thereby effectively alleviating mechanical stress concentration and reducing impact damage.
[0063] When stress impact occurs, the cellular cell structure undergoes localized controllable deformation, and energy diffuses and is absorbed in multiple directions, avoiding concentrated stress at a single point and further improving the overall shock resistance and reliability of the chip package.
[0064] In addition, the structure can provide a certain amount of space for thermal expansion coordination when the temperature changes, reduce stress accumulation, and effectively prevent problems such as peeling and cracking between the filter 6, the chip and the circuit board 1 due to thermal mismatch.
[0065] Preferably, the filter 6 includes a light-shielding area 9 covering part of its surface and a light-transmitting area 10 not covering the light-shielding area 9. The light-transmitting area 10 is positioned directly opposite the photosensitive area of the CIS photosensitive chip 3, and the light-shielding area 9 is positioned directly opposite the outer edge of the photosensitive area of the CIS photosensitive chip 3. This can block stray light (such as ambient light and lens reflection light) incident at an angle from entering the photosensitive area, eliminating imaging noise. The measured signal-to-noise ratio is improved by 15dB. At the same time, this structure directly integrates the light-shielding function into the surface of the filter 6, eliminating the assembly process of the traditional separate light-shielding sheet.
[0066] Preferably, the light-shielding area 9 is a light-shielding ink layer formed by printing and curing, and the light-shielding ink layer completely covers the vertical projection area of the outer edge of the photosensitive area of the CIS photosensitive chip 3 on the filter 6.
[0067] Specifically, in this embodiment, the filter 6 uses an infrared cutoff glass substrate (0.3mm thick), as shown in the reference. Figure 4 The lower surface of the filter 6 has a light-shielding area 9 (black ink, 0.1mm thick) formed by screen printing, and the unprinted area constitutes the light-transmitting area 10. The screen printing process ensures that the boundary accuracy of the light-shielding area 9 reaches ±0.01mm, ensuring that the light-shielding area 9 covers the projection area of the non-photosensitive area, solving the problem of reflection in the non-photosensitive area and inner cavity of the CIS photosensitive chip 3, eliminating image stray light and improving image quality. At the same time, the light-shielding ink layer forms an integrated structure after the filter 6 is cured, avoiding the risk of the light-shielding layer falling off. It has passed the 1000-hour reliability test at 85℃ / 85%RH without peeling, and the thickness is reduced to 0.1mm to meet the requirements of ultra-thin packaging. In addition, the boundary of the light-transmitting area 10 is aligned with the boundary of the photosensitive area of the CIS photosensitive chip 3, ensuring that the light-transmitting area 10 is directly opposite the photosensitive area (vertical projection coincides); the light-shielding area 9 covers the vertical projection area of the outer edge of the photosensitive area of the CIS photosensitive chip 3 (including the bonding wire area and logic circuit area) on the filter 6.
[0068] A photosensitive chip packaging method, applied to the above-mentioned photosensitive chip packaging structure, includes:
[0069] Step S1: Open multiple placement holes on the circuit board 1 that are adapted to the size of the pads 7. The size of each placement hole is adapted to the outline size of the pads 7. Embed each pad 7 in the placement hole to ensure that its soldering surface is flush with the bottom surface of the circuit board 1, so as to facilitate the subsequent soldering of external circuits. This step ensures the fixation and accuracy of the pads 7 and prevents the pads 7 from shifting or becoming cold solder joints during subsequent heat treatment.
[0070] Step S2: Apply the molten filler layer 2 to the upper surface of the circuit board 1, and attach the CIS photosensitive chip 3 to the upper surface of the filler layer 2, so that the CIS photosensitive chip 3 and the circuit board 1 form an adhesive and buffer bond. The circuit board 1 and the CIS photosensitive chip 3 are fixedly connected by the curing of the filler layer 2.
[0071] Between the CIS photosensitive chip 3 and the circuit board 1, multiple gold wires 8 are formed by wire bonding. The gold wires 8 are bonded between the electrodes of the CIS photosensitive chip 3 and the corresponding pads 7 of the circuit board 1. After the gold wires 8 are connected, a preliminary encapsulation circuit path is formed. The fixed filling adhesive layer 2 not only plays a structural bonding role, but also buffers the thermal expansion stress difference between the chip and the circuit board 1, preventing stress concentration from causing device cracks. The connection of the gold wires 8 ensures signal integrity and is a key circuit bridging structure.
[0072] In step S3, the molten support adhesive layer 4 is coated along the outer edge of the photosensitive area of the CIS photosensitive chip 3 onto the upper surface of the CIS photosensitive chip 3, and the filter 6 is attached to the upper surface of the support adhesive layer 4. The CIS photosensitive chip 3 and the filter 6 are fixedly connected by the curing of the support adhesive layer 4, thus completing the positioning support and sealing between the filter 6 and the chip. This step forms a sealed inner cavity area between the filter 6 and the chip, effectively preventing dust and moisture from entering the photosensitive area, and at the same time preventing the filter 6 from tilting or falling off due to uneven stress.
[0073] In step S4, the molten encapsulating filler layer 5 is uniformly coated on the outer surfaces of the filter 6, the support adhesive layer 4, the CIS photosensitive chip 3, and each gold wire 8, as well as the upper surface of the circuit board 1. The curing of the encapsulating filler layer 5 encapsulates each gold wire 8, simultaneously fixing the filter 6, the support adhesive layer 4, the CIS photosensitive chip 3, the fixing filler layer 2, and the circuit board 1. Finally, excess adhesive residue is removed. The encapsulating filler layer 5 serves a dual function of "structural protection + electrical protection," bonding all key components into a unified whole, preventing structural loosening, gold wire breakage, and external impurity corrosion. It is a crucial layer ensuring the overall packaging reliability.
[0074] Specifically, in this embodiment, the encapsulation method employs a layered curing and multiple protection strategies to ensure the following advantages of the CIS photosensitive chip 3 encapsulation structure:
[0075] 1. Gold wire 8 is embedded in the adhesive layer to avoid exposure and improve seismic performance;
[0076] 2. The filter 6 is precisely positioned by the supporting adhesive layer 4 structure, forming a stable and sealed inner cavity space;
[0077] 3. Multiple adhesive layers cure independently in different functional areas, improving encapsulation strength and sealing effect;
[0078] 4. The packaging process is compatible with automated processes, making it suitable for mass production with high consistency.
[0079] The above are merely preferred embodiments of this utility model. The protection scope of this utility model is not limited to the above embodiments. All technical solutions falling within the scope of this utility model's concept are within its protection scope. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principle of this utility model should also be considered within its protection scope.
Claims
1. A photosensitive chip packaging structure, characterized in that, It includes a circuit board (1), a fixed filler layer (2), a CIS photosensitive chip (3), a support adhesive layer (4), a wrapping filler layer (5), a filter (6), and multiple pads (7); Each of the pads (7) is embedded in the lower end face of the circuit board (1); The CIS photosensitive chip (3) is located directly above the circuit board (1), and the fixing filler layer (2) is filled between the circuit board (1) and the CIS photosensitive chip (3); The filter (6) is located above the CIS photosensitive chip (3), and the support adhesive layer (4) is disposed on the outer edge of the photosensitive area of the CIS photosensitive chip (3). The support adhesive layer (4) is used to support, connect and seal the chip cavity between the outer edge of the photosensitive area of the CIS photosensitive chip (3) and the filter (6). Multiple gold wires (8) connect the CIS photosensitive chip (3) and the circuit board (1). Each gold wire (8) is embedded in the encapsulating filling adhesive layer (5). The encapsulating filling adhesive layer (5) is disposed outside the supporting adhesive layer (4). The encapsulating filling adhesive layer (5) fixes the filter (6), the supporting adhesive layer (4), the CIS photosensitive chip (3), the fixing filling adhesive layer (2), and the circuit board (1) in a fixed connection.
2. The photosensitive chip packaging structure according to claim 1, characterized in that: The gold wire (8) is embedded in the encapsulating filler layer (5) in a spiral structure, and the cross-sectional shape of the gold wire (8) is circular.
3. The photosensitive chip packaging structure according to claim 2, characterized in that: The ratio between the pitch and the diameter of the spiral structure satisfies: 0.2 ≤ P / D ≤ 0.8; where P represents the pitch and D represents the diameter. The relationship between the single-turn helical radius of curvature and the helical diameter of the spiral structure satisfies: R = D / 2 ± 10%; where R represents the single-turn helical radius of curvature, and the rate of change of the radius of curvature between two adjacent helical turns does not exceed 5%.
4. The photosensitive chip packaging structure according to claim 1, characterized in that: The filter (6) is a multi-layer composite filter structure, which includes an infrared filter layer (61), an anti-ultraviolet layer (62), and an anti-fogging layer (63) sequentially spliced from top to bottom.
5. The photosensitive chip packaging structure according to claim 4, characterized in that: The lower end face of the anti-fogging layer (63) is provided with periodically arranged micron-sized protrusions, the height of which is 5 to 20 μm and the center-to-center distance between adjacent protrusions is 10 to 50 μm; The raised surface is covered with a nanoscale villous structure, the villous diameter being 50 to 200 nm, and the villous structure having a coverage density of 10. 8 Up to 10 10 root / cm 2 .
6. The photosensitive chip packaging structure according to claim 5, characterized in that: Each of the protrusions is arranged in a hexagonal honeycomb pattern, and each of the protrusions has 3 to 5 nanometer-sized pits on its top, with each pit having a depth of 0.5 to 2 μm.
7. The photosensitive chip packaging structure according to claim 1, characterized in that: A flexible buffer adhesive layer is also provided on the outside of the encapsulating filling adhesive layer (5). The encapsulating filling adhesive layer (5) and the flexible buffer adhesive layer form a double-layer encapsulation structure. The interior of the flexible buffer adhesive layer is a honeycomb mesh structure.
8. The photosensitive chip packaging structure according to claim 1, characterized in that: The filter (6) includes a light-shielding area (9) covering part of its surface and a light-transmitting area (10) not covering the light-shielding area (9). The light-transmitting area (10) is positioned opposite the photosensitive area of the CIS photosensitive chip (3), and the light-shielding area (9) is positioned opposite the outer edge of the photosensitive area of the CIS photosensitive chip (3) to block stray light from entering the photosensitive area.
9. The photosensitive chip packaging structure according to claim 8, characterized in that: The light-shielding area (9) is a light-shielding ink layer formed by printing and curing, and the light-shielding ink layer completely covers the vertical projection area of the outer edge of the photosensitive area of the CIS photosensitive chip (3) on the filter (6).