Portable power distribution transformer fault detection device

CN224745125UActive Publication Date: 2026-09-11CHONGQING ELECTRIC POWER CO BEIBEI POWER SUPPLY BUREAU +2
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Patent Information

Application Number
CN202521446678.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-07-10
Publication Date
2026-09-11
Estimated Expiration
2035-07-10

AI Technical Summary

Technical Problem

[0003]现有技术中,对于配电变压器的绕组层间或者匝间短路、绕线断线等故障检测发展出了在线检测方式,虽然这种方式能够方便、快捷获取配电变压器的故障状态,但是,在线检测方式一般对于便于进行通信的场景,如果配电变压器处于较为偏远的地带,通过在线方式检测其数据传输成为了一个壁垒,通过有限的方式几乎不可能,因为布设成本太大,而通过无线的方式,往往受限于地形以及通信基站的影响,从而使得数据稳定性极差;因此,对于偏远地区的配电变压器的故障检测往往还是通过人工的方式,但是,现有的人工检测存在设备结构复杂,使用不便的缺点

Benefits of technology

[0027]本实用新型的有益效果:通过检测装置自身产生测试信号并加载于被测变压器的测试点,能够直接且准确的获取当前变压器的绕组层间或者匝间短路、绕线断线等故障状态,无需其他复杂的计算过程,从而方便使用,能够对一匝或者几匝的短路故障进行准确检测,尤其适应于位于偏远地区或者试验电源情况下的配电变压器的故障诊断。

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a kind of portable distribution transformer fault detection device, including power supply module, controller, detection module, test signal generating circuit and test signal loading circuit;The power supply module is used to provide working power to controller, detection module and test signal generating circuit;The test signal generating circuit is used to convert the direct current provided by power supply module into alternating current signal for testing and output to test signal loading circuit, the input end of test signal loading circuit is connected to the output end of test signal generating circuit, test signal loading circuit is used to load alternating current signal to the transformer to be measured and carry out fault indication when the transformer to be measured has fault, the detection module is used to detect the working state of test signal generating circuit and output to controller, the controller is used to control test signal loading circuit work according to the control signal output by detection module.
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Description

Technical Field

[0001] This utility model relates to a power fault detection device, and more particularly to a portable power distribution transformer fault detection device. Background Technology

[0002] When a distribution transformer malfunctions, it is necessary to detect the fault, such as quickly detecting short circuits between winding layers or turns, or broken windings.

[0003] In existing technologies, online detection methods have been developed for fault detection in distribution transformers, such as inter-layer or inter-turn short circuits and winding breaks. While these methods can conveniently and quickly obtain the fault status of distribution transformers, online detection is generally only suitable for scenarios with easy communication. If the distribution transformer is located in a remote area, data transmission becomes a barrier, making it almost impossible to implement via limited means due to high deployment costs. Wireless methods are often limited by terrain and communication base station limitations, resulting in extremely poor data stability. Therefore, fault detection in distribution transformers in remote areas is often still done manually. However, existing manual detection methods suffer from complex equipment structures and inconvenience of use. Furthermore, existing technologies cannot test for inter-layer or inter-turn short circuits and winding breaks in distribution transformers when there is no power supply. Moreover, existing DC resistance testers cannot detect short circuits in one or several turns, potentially leading to the escalation of the fault.

[0004] Therefore, in order to solve the above-mentioned technical problems, it is urgent to propose a new technical approach. Utility Model Content

[0005] In view of this, the purpose of this utility model is to provide a portable distribution transformer fault detection device. The device generates a test signal and applies it to the test point of the transformer under test. It can directly and accurately obtain the current fault status of the transformer, such as inter-winding or inter-turn short circuit or winding breakage, without the need for other complicated calculation processes. This makes it convenient to use and can accurately detect short circuit faults of one or several turns. It is especially suitable for fault diagnosis of distribution transformers located in remote areas or under test power conditions.

[0006] This utility model provides a portable power distribution transformer fault detection device, which includes a power supply module, a controller, a detection module, a test signal generation circuit, and a test signal loading circuit.

[0007] The power supply module is used to provide operating power to the controller, detection module and test signal generation circuit;

[0008] The test signal generating circuit is used to convert the DC power provided by the power supply module into an AC signal for testing and output it to the test signal loading circuit. The input terminal of the test signal loading circuit is connected to the output terminal of the test signal generating circuit. The test signal loading circuit is used to load the AC signal onto the transformer under test and to indicate a fault when the transformer under test has a fault. The detection module is used to detect the working status of the test signal generating circuit and output it to the controller. The controller is used to control the operation of the test signal loading circuit according to the control signal output by the detection module.

[0009] Furthermore, the test signal generation circuit includes an inverter circuit and a drive circuit; the power supply terminal of the inverter circuit is connected to the power supply module, the output terminal of the inverter circuit outputs an AC signal for testing, the control output terminal of the drive circuit is connected to the control input terminal of the inverter circuit, and the control input terminal of the drive circuit is connected to the controller.

[0010] Furthermore, the inverter circuit includes NMOS transistors Q1, Q2, Q3, and Q4, capacitor C4, inductor L1, capacitor C5, capacitor C7, and common-mode inductor LCC;

[0011] The drain of NMOS transistor Q1 is connected to the drain of NMOS transistor Q3. The common connection point between the drains of NMOS transistors Q1 and Q3 serves as the power supply terminal of the inverter circuit and is connected to the output terminal of the power supply module. The drain of NMOS transistor Q1 is grounded through capacitor C4. The source of NMOS transistor Q1 is connected to the drain of NMOS transistor Q2. The source of NMOS transistor Q2 is grounded through resistor R9. The source of NMOS transistor Q3 is connected to the drain of NMOS transistor Q4. The source of NMOS transistor Q4 is connected to the source of NMOS transistor Q3. One end of inductor L1 is connected to the source of NMOS transistor Q1, and the other end of inductor L1 is connected to the source of NMOS transistor Q3 through capacitor C5.

[0012] The positive input terminal of the common-mode inductor LCC is connected to the common connection point between inductor L1 and capacitor C5. The negative input terminal of the common-mode inductor LCC is connected to the common connection point between capacitor C5 and the source of NMOS transistor Q3. The positive and negative output terminals of the common-mode inductor LCC serve as the output terminals of the inverter circuit. The two ends of capacitor C7 are connected between the positive and negative output terminals of the common-mode inductor LCC, respectively. The gates of NMOS transistors Q1, Q2, Q3, and Q4 serve as the control input terminals of the inverter circuit and are connected to the drive output terminals of the drive circuit.

[0013] Furthermore, the driving circuit includes chip U1, chip U2, chip U3, P-type transistor T1, P-type transistor T2, P-type transistor T3, P-type transistor T4, capacitor C1, capacitor C2, capacitor C3, capacitor C6, capacitor C8, capacitor C13, diode D1, diode D2, diode D3, diode D4, diode D5, diode D6, resistor R1, resistor R2, resistor R3, resistor R4, resistor R6, resistor R7, resistor R8, resistor R10, resistor R12, resistor R13, resistor R14, resistor R15, resistor R16, resistor R17, and resistor R18.

[0014] Among them, chip U1 and chip U2 are both IR2110S chips, and chip U3 is an LM393 chip;

[0015] Pin 3 of chip U1 is connected to the 5V output of the power supply module. Pin 3 of chip U1 is grounded through capacitor C1. The emitter of transistor T1 is connected to the controller. The collector of transistor T1 is connected to pin 6 of chip U1. The collector of transistor T1 is grounded through resistor R2. The emitter of transistor T2 is connected to the controller. The base of transistor T1 is connected to the emitter of transistor T2 through resistor R1. The collector of transistor T2 is connected to pin 4 of chip U1. The base of transistor T2 is connected to the emitter of transistor T1 through resistor R3. The collector of transistor T2 is grounded through resistor R4. Pin 16 of chip U1 is connected to the gate of NMOS transistor Q1 through resistor R5. The positive terminal of diode D2... The cathode of diode D2 is connected to the gate of NMOS transistor Q1, and the cathode of diode D2 is connected to pin 16 of chip U1. Pin 15 of chip U1 is connected to the source of NMOS transistor Q1 through capacitor C2, pin 14 of chip U1 is connected to the source of NMOS transistor Q1, pin 11 of chip U1 is grounded through capacitor C3, pin 11 of chip U1 is connected to the anode of diode D1, and the cathode of diode D1 is connected to pin 15 of chip U1. Pin 10 of chip U1 is grounded, pin 9 of chip U1 is connected to the gate of NMOS transistor Q2 through resistor R7, the anode of diode D4 is connected to the gate of NMOS transistor Q2, the cathode of diode D4 is connected to pin 9 of chip U1, and pin 7 of chip U1 is grounded.

[0016] Pin 3 of chip U2 is connected to the 5V output of the power supply module. Pin 3 of chip U2 is grounded through capacitor C6. The emitter of transistor T3 is connected to the controller. The collector of transistor T3 is connected to pin 6 of chip U2. The collector of transistor T3 is grounded through resistor R11. The emitter of transistor T4 is connected to the controller. The base of transistor T3 is connected to the emitter of transistor T4 through resistor R10. The collector of transistor T4 is connected to pin 4 of chip U2. The base of transistor T4 is connected to the emitter of transistor T3 through resistor R12. The collector of transistor T4 is grounded through resistor R13. Pin 16 of chip U2 is connected to the gate of NMOS transistor Q3 through resistor R6. Diode D3... The positive terminal of the diode is connected to the gate of NMOS transistor Q3, and the negative terminal of the diode D3 is connected to pin 16 of chip U2. Pin 15 of chip U2 is connected to the source of NMOS transistor Q3 through capacitor C8, pin 14 of chip U2 is connected to the source of NMOS transistor Q3, pin 11 of chip U2 is grounded through capacitor C13, pin 11 of chip U2 is connected to the positive terminal of diode D6, and the negative terminal of diode D6 is connected to pin 15 of chip U2. Pin 10 of chip U2 is grounded, pin 9 of chip U2 is connected to the gate of NMOS transistor Q4 through resistor R8, the positive terminal of diode D5 is connected to the gate of NMOS transistor Q4, the negative terminal of diode D5 is connected to pin 9 of chip U2, and pin 7 of chip U2 is grounded.

[0017] Pin 8 of chip U3 is connected to a 5V power supply. Pin 8 of chip U3 is grounded through capacitor C10. Pin 8 of chip U3 is connected to one end of resistor R15. The other end of resistor R15 is grounded through capacitor C12. Pin 6 of chip U3 is connected to the output of the current detection circuit of the detection module. One end of resistor R16 is connected to a 5V power supply. Resistor R16 is grounded after being connected in parallel with resistor R17 and capacitor C11. The common connection point between resistors R16 and R17 is connected to pins 2 and 5 of chip U3. Pin 4 of chip U3 is grounded. Pin 1 of chip U3 is connected to pins 5 of chips U1 and U2. The two ends of resistor R18 are connected between pins 1 and 3 of chip U3, respectively.

[0018] Furthermore, the detection module includes a current detection circuit, a voltage detection circuit, and a temperature sensor;

[0019] The output terminals of the voltage detection circuit and temperature sensor are connected to the input terminal of the controller, and the output terminal of the current detection circuit is connected to the controller and pin 6 of chip U3, respectively.

[0020] Furthermore, the current detection circuit includes a resistor R14 and a capacitor C9. One end of the resistor R14 is connected to the common connection point between the resistor R9 and the source of the NMOS transistor Q4, and the other end of the resistor R14 is grounded through the capacitor C9. The common connection point between the resistor R14 and the capacitor C9 serves as the output terminal of the current detection circuit.

[0021] Furthermore, the voltage detection circuit includes resistors R19, R21, and R20, capacitor C14, and capacitor C15;

[0022] One end of capacitor C14 is connected to the positive output terminal of common-mode inductor LCC, and the other end of capacitor C14 is connected to one end of resistor R19. The other end of resistor R19 is grounded through resistor R20, resistor R21 and capacitor C15 connected in parallel. The common connection point between resistor R19 and capacitor C15 serves as the output terminal of the voltage detection circuit. Resistor R20 is an adjustable resistor.

[0023] Furthermore, the test signal loading circuit includes an adjustable resistor R22, an ammeter, and a voltmeter;

[0024] One end of the adjustable resistor R22 is connected to the positive output terminal of the common-mode inductor LCC, and the other end of the adjustable resistor R22 is connected to the negative output terminal of the common-mode inductor LCC. The input terminal of the ammeter is connected to the moving contact of the adjustable resistor R22, and the output terminal of the ammeter is connected to the input terminal of the voltmeter. The output terminal of the voltmeter is connected to the negative output terminal of the common-mode inductor LCC. The output terminal of the ammeter serves as the positive loading point of the test signal loading circuit, and the common connection point between the inductor L2 and the secondary output terminal of the common-mode inductor LCC serves as the negative loading point of the test signal loading circuit.

[0025] Furthermore, the power supply module includes a battery, a first voltage regulator circuit, and a second voltage regulator circuit;

[0026] The positive terminal of the battery is connected to the input terminal of the first voltage regulator circuit, the output terminal of the first voltage regulator circuit is connected to the input terminal of the second voltage regulator circuit, the output terminal of the second voltage regulator circuit serves as a 5V power supply and supplies power to the controller and the test signal generation circuit, and the positive terminal of the battery also supplies power to the power supply terminal of the inverter circuit.

[0027] The beneficial effects of this utility model are as follows: by generating a test signal by the detection device itself and applying it to the test point of the transformer under test, the fault status of the current transformer, such as short circuit between winding layers or between turns, and broken winding, can be obtained directly and accurately without the need for other complicated calculation processes, thus making it convenient to use. It can accurately detect short circuit faults of one or several turns, and is especially suitable for fault diagnosis of distribution transformers located in remote areas or under test power conditions. Attached Figure Description

[0028] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0029] Figure 1 This is a schematic diagram of the structure of this utility model.

[0030] Figure 2 This is a schematic diagram of the test signal generation circuit of this utility model.

[0031] Figure 3 This is a schematic diagram of the voltage detection circuit of this utility model.

[0032] Figure 4 This is a schematic diagram of the test signal loading circuit of this utility model. Detailed Implementation

[0033] The present invention will be further described in detail below:

[0034] This utility model provides a portable power distribution transformer fault detection device, which includes a power supply module, a controller, a detection module, a test signal generation circuit, and a test signal loading circuit.

[0035] The power supply module is used to provide operating power to the controller, detection module and test signal generation circuit;

[0036] The test signal generation circuit converts the DC power supplied by the power supply module into an AC signal for testing and outputs it to the test signal loading circuit. The input terminal of the test signal loading circuit is connected to the output terminal of the test signal generation circuit. The test signal loading circuit loads the AC signal onto the transformer under test and indicates a fault when the transformer under test has a fault. The detection module detects the operating status of the test signal generation circuit and outputs it to the controller. The controller controls the operation of the test signal loading circuit according to the control signal output by the detection module. With this structure, by generating a test signal itself and loading it onto the test point of the transformer under test, the current transformer's winding inter-layer or inter-turn short circuit, winding breakage, and other fault states can be directly and accurately obtained without other complex calculations, making it convenient to use. It can accurately detect short circuit faults of one or several turns, and is particularly suitable for fault diagnosis of distribution transformers located in remote areas or under test power conditions.

[0037] Of course, in practice, a corresponding housing is also needed to house the circuit boards and other components that carry the various circuits in this utility model. This is existing technology and will not be elaborated here.

[0038] In this embodiment, the test signal generation circuit includes an inverter circuit and a drive circuit; the power supply terminal of the inverter circuit is connected to the power supply module, the output terminal of the inverter circuit outputs an AC signal for testing, the control output terminal of the drive circuit is connected to the control input terminal of the inverter circuit, and the control input terminal of the drive circuit is connected to the controller.

[0039] Specifically, the inverter circuit includes NMOS transistors Q1, Q2, Q3, and Q4, capacitor C4, inductor L1, capacitor C5, capacitor C7, and common-mode inductor LCC.

[0040] The drain of NMOS transistor Q1 is connected to the drain of NMOS transistor Q3. The common connection point between the drains of NMOS transistors Q1 and Q3 serves as the power supply terminal of the inverter circuit and is connected to the output terminal of the power supply module. The drain of NMOS transistor Q1 is grounded through capacitor C4. The source of NMOS transistor Q1 is connected to the drain of NMOS transistor Q2. The source of NMOS transistor Q2 is grounded through resistor R9. The source of NMOS transistor Q3 is connected to the drain of NMOS transistor Q4. The source of NMOS transistor Q4 is connected to the source of NMOS transistor Q3. One end of inductor L1 is connected to the source of NMOS transistor Q1, and the other end of inductor L1 is connected to the source of NMOS transistor Q3 through capacitor C5.

[0041] The positive input terminal of the common-mode inductor LCC is connected to the common connection point between inductor L1 and capacitor C5. The negative input terminal of the common-mode inductor LCC is connected to the common connection point between capacitor C5 and the source of NMOS transistor Q3. The positive and negative output terminals of the common-mode inductor LCC serve as the output terminals of the inverter circuit. The two ends of capacitor C7 are connected between the positive and negative output terminals of the common-mode inductor LCC, respectively. The gates of NMOS transistors Q1, Q2, Q3, and Q4 serve as the control input terminals of the inverter circuit and are connected to the drive output terminals of the drive circuit. For the common-mode inductor LCC, it has no polarity. To clearly describe the circuit connection structure, the four terminals of the common-mode inductor are defined as positive output, negative output, positive input, and negative input. The controller generates a corresponding PWM signal, which is then input to chips U1 and U2. These two chips generate corresponding PWM drive signals to control the inverter circuit to generate the required AC test signal. The duty cycle of the PWM signal output by the drive circuit is used to adjust the amplitude and frequency of the AC test signal. The adjustment is based on the feedback signal detected by the detection module, including the output current, voltage, and temperature information of the test signal generation circuit. How to determine the duty cycle of the PWM signal based on this information can be achieved using existing technology and will not be elaborated here.

[0042] In this embodiment, the driving circuit includes chip U1, chip U2, chip U3, P-type transistor T1, P-type transistor T2, P-type transistor T3, P-type transistor T4, capacitor C1, capacitor C2, capacitor C3, capacitor C6, capacitor C8, capacitor C13, diode D1, diode D2, diode D3, diode D4, diode D5, diode D6, and resistors R1, R2, R3, R4, R6, R7, R8, R10, R12, R13, R14, R15, R16, R17, and R18.

[0043] Among them, chip U1 and chip U2 are both IR2110S chips, and chip U3 is an LM393 chip;

[0044] Pin 3 of chip U1 is connected to the 5V output of the power supply module. Pin 3 of chip U1 is grounded through capacitor C1. The emitter of transistor T1 is connected to the controller. The collector of transistor T1 is connected to pin 6 of chip U1. The collector of transistor T1 is grounded through resistor R2. The emitter of transistor T2 is connected to the controller. The base of transistor T1 is connected to the emitter of transistor T2 through resistor R1. The collector of transistor T2 is connected to pin 4 of chip U1. The base of transistor T2 is connected to the emitter of transistor T1 through resistor R3. The collector of transistor T2 is grounded through resistor R4. Pin 16 of chip U1 is connected to the gate of NMOS transistor Q1 through resistor R5. The positive terminal of diode D2... The cathode of diode D2 is connected to the gate of NMOS transistor Q1, and the cathode of diode D2 is connected to pin 16 of chip U1. Pin 15 of chip U1 is connected to the source of NMOS transistor Q1 through capacitor C2, pin 14 of chip U1 is connected to the source of NMOS transistor Q1, pin 11 of chip U1 is grounded through capacitor C3, pin 11 of chip U1 is connected to the anode of diode D1, and the cathode of diode D1 is connected to pin 15 of chip U1. Pin 10 of chip U1 is grounded, pin 9 of chip U1 is connected to the gate of NMOS transistor Q2 through resistor R7, the anode of diode D4 is connected to the gate of NMOS transistor Q2, the cathode of diode D4 is connected to pin 9 of chip U1, and pin 7 of chip U1 is grounded.

[0045] Pin 3 of chip U2 is connected to the 5V output of the power supply module. Pin 3 of chip U2 is grounded through capacitor C6. The emitter of transistor T3 is connected to the controller. The collector of transistor T3 is connected to pin 6 of chip U2. The collector of transistor T3 is grounded through resistor R11. The emitter of transistor T4 is connected to the controller. The base of transistor T3 is connected to the emitter of transistor T4 through resistor R10. The collector of transistor T4 is connected to pin 4 of chip U2. The base of transistor T4 is connected to the emitter of transistor T3 through resistor R12. The collector of transistor T4 is grounded through resistor R13. Pin 16 of chip U2 is connected to the gate of NMOS transistor Q3 through resistor R6. Diode D3... The positive terminal of the diode is connected to the gate of NMOS transistor Q3, and the negative terminal of the diode D3 is connected to pin 16 of chip U2. Pin 15 of chip U2 is connected to the source of NMOS transistor Q3 through capacitor C8, pin 14 of chip U2 is connected to the source of NMOS transistor Q3, pin 11 of chip U2 is grounded through capacitor C13, pin 11 of chip U2 is connected to the positive terminal of diode D6, and the negative terminal of diode D6 is connected to pin 15 of chip U2. Pin 10 of chip U2 is grounded, pin 9 of chip U2 is connected to the gate of NMOS transistor Q4 through resistor R8, the positive terminal of diode D5 is connected to the gate of NMOS transistor Q4, the negative terminal of diode D5 is connected to pin 9 of chip U2, and pin 7 of chip U2 is grounded.

[0046] Pin 8 of chip U3 is connected to a 5V power supply. Pin 8 of chip U3 is grounded through capacitor C10. Pin 8 of chip U3 is connected to one end of resistor R15. The other end of resistor R15 is grounded through capacitor C12. Pin 6 of chip U3 is connected to the output of the current detection circuit of the detection module. One end of resistor R16 is connected to a 5V power supply. Resistor R16 is grounded after being connected in parallel with resistor R17 and capacitor C11. The common connection point between resistors R16 and R17 is connected to pins 2 and 5 of chip U3. Pin 4 of chip U3 is grounded. Pin 1 of chip U3 is connected to pins 5 of chips U1 and U2. The two ends of resistor R18 are connected between pins 1 and 3 of chip U3, respectively. In the above structure, the function of diodes D2 to D5 is to accelerate the discharge of the junction capacitance of the corresponding NMOS transistor, thereby improving the response characteristics of the NMOS transistor and reducing switching losses.

[0047] Figure 2 CON1, CON2, CON3, and CON4 correspond to the four different PWM signal output terminals of the controller. The controller uses an existing chip, which will not be described in detail here.

[0048] In this embodiment, the detection module includes a current detection circuit, a voltage detection circuit, and a temperature sensor;

[0049] The outputs of the voltage detection circuit and the temperature sensor are connected to the input of the controller, and the output of the current detection circuit is connected to the controller and pin 6 of chip U3, respectively. The temperature sensor in the detection module is powered by a 5V DC supply from the power supply module.

[0050] Specifically, the current detection circuit includes a resistor R14 and a capacitor C9. One end of the resistor R14 is connected to the common connection point between the resistor R9 and the source of the NMOS transistor Q4, and the other end of the resistor R14 is grounded through the capacitor C9. The common connection point between the resistor R14 and the capacitor C9 serves as the output terminal of the current detection circuit.

[0051] The voltage detection circuit includes resistors R19, R21, and R20, capacitor C14, and capacitor C15.

[0052] One end of capacitor C14 is connected to the positive output terminal of the common-mode inductor LCC, and the other end of capacitor C14 is connected to one end of resistor R19. The other end of resistor R19 is grounded after being connected in parallel with resistors R20 and R21 and capacitor C15. The common connection point between resistor R19 and capacitor C15 serves as the output terminal of the voltage detection circuit. Resistor R20 is an adjustable resistor. This structure makes the AC signal generated by the inverter circuit more stable, resulting in more accurate final test results.

[0053] In this embodiment, the test signal loading circuit includes an adjustable resistor R22, an ammeter, and a voltmeter;

[0054] One end of the adjustable resistor R22 is connected to the positive output terminal of the common-mode inductor LCC, and the other end of the adjustable resistor R22 is connected to the negative output terminal of the common-mode inductor LCC. The input terminal of the ammeter is connected to the moving contact of the adjustable resistor R22, and the output terminal of the ammeter is connected to the input terminal of the voltmeter. The output terminal of the voltmeter is connected to the negative output terminal of the common-mode inductor LCC. The output terminal of the ammeter serves as the positive loading point of the test signal loading circuit, and the common connection point between the inductor L2 and the secondary output terminal of the common-mode inductor LCC serves as the negative loading point of the test signal loading circuit. These two loading points are connected to the test points of the transformer under test through existing connection methods, such as alligator clips. When the transformer has an open circuit fault, no current flows through the ammeter, and its display is close to 0. This display result can be used to determine that the transformer has an open circuit fault. If there is a short circuit between winding layers or between turns in the transformer, the value flowing through the ammeter will be much greater than the normal value. Therefore, this display result can be used to determine that the transformer has a short circuit between winding layers or between turns. Furthermore, three-phase imbalance affects the transformer winding current. Although the current is small under no-load conditions, winding faults are exacerbated by three-phase imbalance, leading to magnetic circuit imbalance, uneven magnetic flux distribution, and increased no-load losses. By calculating the ratio of no-load current to voltage for each phase, the imbalance coefficient between the three phases can be accurately compared. When the imbalance coefficient on the high-voltage side exceeds 2% and on the low-voltage side exceeds 4%, it can be identified as an inter-layer or inter-turn short circuit fault in the transformer windings. In actual fault tests, this value far exceeds the imbalance coefficient value.

[0055] In this embodiment, the power supply module includes a battery, a first voltage regulator circuit, and a second voltage regulator circuit;

[0056] The positive terminal of the battery is connected to the input terminal of the first voltage regulator circuit, and the output terminal of the first voltage regulator circuit is connected to the input terminal of the second voltage regulator circuit. The output terminal of the second voltage regulator circuit serves as a 5V power supply and supplies power to the controller and the test signal generation circuit. The positive terminal of the battery also supplies power to the power supply terminal of the inverter circuit. The first voltage regulator circuit uses a 7812 voltage regulator chip and its peripheral circuits, while the second voltage regulator circuit can use a 7805 voltage regulator chip. The battery is a lithium battery capable of outputting 14.4V.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model and are not intended to limit it. Although this utility model has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this utility model without departing from the spirit and scope of the technical solutions of this utility model, and all such modifications or substitutions should be covered within the scope of the claims of this utility model.

Claims

1. A portable distribution transformer fault detection device, characterized in that: It includes a power supply module, a controller, a detection module, a test signal generation circuit, and a test signal loading circuit; The power supply module is used to provide operating power to the controller, detection module and test signal generation circuit; The test signal generating circuit is used to convert the DC power provided by the power supply module into an AC signal for testing and output it to the test signal loading circuit. The input terminal of the test signal loading circuit is connected to the output terminal of the test signal generating circuit. The test signal loading circuit is used to load the AC signal onto the transformer under test and to indicate a fault when the transformer under test has a fault. The detection module is used to detect the working status of the test signal generating circuit and output it to the controller, and to input a current detection signal to the test signal generating circuit. The controller is used to control the operation of the test signal loading circuit according to the control signal output by the detection module.

2. The portable distribution transformer fault detection device according to claim 1, characterized in that: The test signal generation circuit includes an inverter circuit and a drive circuit; the power supply terminal of the inverter circuit is connected to the power supply module, the output terminal of the inverter circuit outputs an AC signal for testing, the control output terminal of the drive circuit is connected to the control input terminal of the inverter circuit, and the control input terminal of the drive circuit is connected to the controller.

3. The portable power distribution transformer fault detection apparatus of claim 2, wherein: The inverter circuit includes NMOS transistors Q1, Q2, Q3, and Q4, capacitor C4, inductor L1, capacitor C5, capacitor C7, and common-mode inductor LCC. The drain of NMOS transistor Q1 is connected to the drain of NMOS transistor Q3. The common connection point between the drains of NMOS transistors Q1 and Q3 serves as the power supply terminal of the inverter circuit and is connected to the output terminal of the power supply module. The drain of NMOS transistor Q1 is grounded through capacitor C4. The source of NMOS transistor Q1 is connected to the drain of NMOS transistor Q2. The source of NMOS transistor Q2 is grounded through resistor R9. The source of NMOS transistor Q3 is connected to the drain of NMOS transistor Q4. The source of NMOS transistor Q4 is connected to the source of NMOS transistor Q3. One end of inductor L1 is connected to the source of NMOS transistor Q1, and the other end of inductor L1 is connected to the source of NMOS transistor Q3 through capacitor C5. The positive input terminal of the common-mode inductor LCC is connected to the common connection point between inductor L1 and capacitor C5. The negative input terminal of the common-mode inductor LCC is connected to the common connection point between capacitor C5 and the source of NMOS transistor Q3. The positive and negative output terminals of the common-mode inductor LCC serve as the output terminals of the inverter circuit. The two ends of capacitor C7 are connected between the positive and negative output terminals of the common-mode inductor LCC, respectively. The gates of NMOS transistors Q1, Q2, Q3, and Q4 serve as the control input terminals of the inverter circuit and are connected to the drive output terminals of the drive circuit.

4. The portable power distribution transformer fault detection apparatus of claim 3, wherein: The driving circuit includes chips U1, U2, U3, P-type transistors T1, T2, T3, and T4, capacitors C1, C2, C3, C6, C8, and C13, diodes D1, D2, D3, D4, D5, and D6, and resistors R1, R2, R3, R4, R6, R7, R8, R10, R12, R13, R14, R15, R16, R17, and R18. Among them, chip U1 and chip U2 are both IR2110S chips, and chip U3 is an LM393 chip; Pin 3 of chip U1 is connected to the 5V output of the power supply module. Pin 3 of chip U1 is grounded through capacitor C1. The emitter of transistor T1 is connected to the controller. The collector of transistor T1 is connected to pin 6 of chip U1. The collector of transistor T1 is grounded through resistor R2. The emitter of transistor T2 is connected to the controller. The base of transistor T1 is connected to the emitter of transistor T2 through resistor R1. The collector of transistor T2 is connected to pin 4 of chip U1. The base of transistor T2 is connected to the emitter of transistor T1 through resistor R3. The collector of transistor T2 is grounded through resistor R4. Pin 16 of chip U1 is connected to the gate of NMOS transistor Q1 through resistor R5. The positive terminal of diode D2... The cathode of diode D2 is connected to the gate of NMOS transistor Q1, and the cathode of diode D2 is connected to pin 16 of chip U1. Pin 15 of chip U1 is connected to the source of NMOS transistor Q1 through capacitor C2, pin 14 of chip U1 is connected to the source of NMOS transistor Q1, pin 11 of chip U1 is grounded through capacitor C3, pin 11 of chip U1 is connected to the anode of diode D1, and the cathode of diode D1 is connected to pin 15 of chip U1. Pin 10 of chip U1 is grounded, pin 9 of chip U1 is connected to the gate of NMOS transistor Q2 through resistor R7, the anode of diode D4 is connected to the gate of NMOS transistor Q2, the cathode of diode D4 is connected to pin 9 of chip U1, and pin 7 of chip U1 is grounded. Pin 3 of chip U2 is connected to the 5V output of the power supply module. Pin 3 of chip U2 is grounded through capacitor C6. The emitter of transistor T3 is connected to the controller. The collector of transistor T3 is connected to pin 6 of chip U2. The collector of transistor T3 is grounded through resistor R11. The emitter of transistor T4 is connected to the controller. The base of transistor T3 is connected to the emitter of transistor T4 through resistor R10. The collector of transistor T4 is connected to pin 4 of chip U2. The base of transistor T4 is connected to the emitter of transistor T3 through resistor R12. The collector of transistor T4 is grounded through resistor R13. Pin 16 of chip U2 is connected to the gate of NMOS transistor Q3 through resistor R6. Diode D3... The positive terminal of the diode is connected to the gate of NMOS transistor Q3, and the negative terminal of the diode D3 is connected to pin 16 of chip U2. Pin 15 of chip U2 is connected to the source of NMOS transistor Q3 through capacitor C8, pin 14 of chip U2 is connected to the source of NMOS transistor Q3, pin 11 of chip U2 is grounded through capacitor C13, pin 11 of chip U2 is connected to the positive terminal of diode D6, and the negative terminal of diode D6 is connected to pin 15 of chip U2. Pin 10 of chip U2 is grounded, pin 9 of chip U2 is connected to the gate of NMOS transistor Q4 through resistor R8, the positive terminal of diode D5 is connected to the gate of NMOS transistor Q4, the negative terminal of diode D5 is connected to pin 9 of chip U2, and pin 7 of chip U2 is grounded. Pin 8 of chip U3 is connected to a 5V power supply. Pin 8 of chip U3 is grounded through capacitor C10. Pin 8 of chip U3 is connected to one end of resistor R15. The other end of resistor R15 is grounded through capacitor C12. Pin 6 of chip U3 is connected to the output of the current detection circuit of the detection module. One end of resistor R16 is connected to a 5V power supply. Resistor R16 is grounded after being connected in parallel with resistor R17 and capacitor C11. The common connection point between resistors R16 and R17 is connected to pins 2 and 5 of chip U3. Pin 4 of chip U3 is grounded. Pin 1 of chip U3 is connected to pins 5 of chips U1 and U2. The two ends of resistor R18 are connected between pins 1 and 3 of chip U3, respectively.

5. The portable distribution transformer fault detection device according to claim 4, characterized in that: The detection module includes a current detection circuit, a voltage detection circuit, and a temperature sensor; The output terminals of the voltage detection circuit and temperature sensor are connected to the input terminal of the controller, and the output terminal of the current detection circuit is connected to the controller and pin 6 of chip U3, respectively.

6. The portable distribution transformer fault detection device according to claim 5, characterized in that: The current detection circuit includes a resistor R14 and a capacitor C9. One end of the resistor R14 is connected to the common connection point between the resistor R9 and the source of the NMOS transistor Q4, and the other end of the resistor R14 is grounded through the capacitor C9. The common connection point between the resistor R14 and the capacitor C9 serves as the output terminal of the current detection circuit.

7. The portable power distribution transformer fault detection apparatus of claim 5, wherein: The voltage detection circuit includes resistors R19, R21, and R20, capacitor C14, and capacitor C15. One end of capacitor C14 is connected to the positive output terminal of common-mode inductor LCC, and the other end of capacitor C14 is connected to one end of resistor R19. The other end of resistor R19 is grounded through resistor R20, resistor R21 and capacitor C15 connected in parallel. The common connection point between resistor R19 and capacitor C15 serves as the output terminal of the voltage detection circuit. Resistor R20 is an adjustable resistor.

8. The portable distribution transformer fault detection device according to claim 3, characterized in that: The test signal loading circuit includes an adjustable resistor R22, an ammeter, and a voltmeter. One end of the adjustable resistor R22 is connected to the positive output terminal of the common-mode inductor LCC, and the other end of the adjustable resistor R22 is connected to the negative output terminal of the common-mode inductor LCC. The input terminal of the ammeter is connected to the moving contact of the adjustable resistor R22, and the output terminal of the ammeter is connected to the input terminal of the voltmeter. The output terminal of the voltmeter is connected to the negative output terminal of the common-mode inductor LCC. The output terminal of the ammeter serves as the positive loading point of the test signal loading circuit, and the common connection point between the inductor L2 and the secondary output terminal of the common-mode inductor LCC serves as the negative loading point of the test signal loading circuit.

9. The portable power distribution transformer fault detection apparatus of claim 2, wherein: The power supply module includes a battery, a first voltage regulator circuit, and a second voltage regulator circuit. The positive terminal of the battery is connected to the input terminal of the first voltage regulator circuit, the output terminal of the first voltage regulator circuit is connected to the input terminal of the second voltage regulator circuit, the output terminal of the second voltage regulator circuit serves as a 5V power supply and supplies power to the controller and the test signal generation circuit, and the positive terminal of the battery also supplies power to the power supply terminal of the inverter circuit.