A bias circuit and an amplifier

Abstract

The application provides a bias circuit and an amplifier, the bias circuit comprising a bias voltage supply circuit and a low-frequency stray discharge circuit; the low-frequency stray discharge circuit comprising a first transistor, a first resistor, a first inductor, a first capacitor and a source voltage control circuit; the first transistor is electrically connected with the output end of the bias voltage supply circuit at the gate, and is electrically connected with a voltage source, the input end of the bias voltage supply circuit and the first end of the first capacitor at the drain, respectively; the source is electrically connected with the first end of the source voltage control circuit and the first end of the first inductor, respectively; the second end of the first capacitor and the second end of the source voltage control circuit are grounded; the first resistor is electrically connected with the second end of the first inductor and the amplifier circuit, respectively; the low-frequency stray discharge circuit is used for discharging the low-frequency stray signal to the ground through the filtering effect of the first inductor and the first capacitor when the low-frequency stray signal appears. The bias circuit provided by the application can provide a path for the low-frequency stray of the amplifier to the ground, and improves the working stability of the amplifier.

Description

Technical Field

[0001] This utility model relates to the field of analog circuit technology, and more specifically, to a bias circuit and an amplifier. Background Technology

[0002] With the rapid development of wireless communication technology, higher requirements are being placed on the performance indicators of amplifiers, such as operating frequency, gain stability, linearity, and power consumption. Amplifiers made using gallium arsenide (GaAs) technology play a key role in radio frequency and microwave applications such as wireless communication, radar systems, and satellite communication due to their excellent high-frequency performance and low noise characteristics.

[0003] Existing amplifier circuits implemented using GaAs technology often exhibit stray signals when the signal is small, which is particularly noticeable when the input power is high. This causes the amplifier to degrade in performance under small signal or high power conditions, affecting the amplifier's operational stability. Utility Model Content

[0004] In view of this, the purpose of this application is to provide a bias circuit and amplifier that can provide a ground path for the low-frequency spurious signals of the amplifier, thereby improving the operational stability of the amplifier.

[0005] In a first aspect, embodiments of this application provide a bias circuit, characterized in that the bias circuit includes a bias voltage supply circuit and a low-frequency spurious discharge circuit; the low-frequency spurious discharge circuit includes a first transistor, a first resistor, a first inductor, a first capacitor, and a source voltage control circuit; wherein, The gate of the first transistor is electrically connected to the output terminal of the bias voltage providing circuit. The drain of the first transistor is electrically connected to the voltage source, the input terminal of the bias voltage providing circuit, and the first terminal of the first capacitor. The source of the first transistor is electrically connected to the first terminal of the source voltage control circuit and the first terminal of the first inductor. The second terminal of the first capacitor and the second terminal of the source voltage control circuit are grounded. The first resistor is electrically connected to the second terminal of the first inductor and the amplifier circuit. The low-frequency spurious discharge circuit is used to discharge the low-frequency spurious signal to ground through the filtering effect of the first inductor and the first capacitor when a low-frequency spurious signal is present.

[0006] Furthermore, the first transistor is an enhancement-mode transistor; the first transistor operates in the saturation region to provide a low-impedance path for the low-frequency spurious signal.

[0007] Furthermore, the resistance values ​​of the first inductor and the first resistor are less than 1000 ohms, so as to provide a low-impedance path for the low-frequency spurious signal.

[0008] Furthermore, the source voltage control circuit includes a second resistor; wherein, the first end of the second resistor is electrically connected to the source of the first transistor, and the second end of the second resistor is grounded.

[0009] Furthermore, the source voltage control circuit includes a third resistor, a fourth resistor, and a second transistor; wherein the drain of the second transistor is electrically connected to the first terminal of the third resistor and the source of the first transistor, the gate of the second transistor is electrically connected to the second terminal of the third resistor, and the source of the second transistor is electrically connected to the first terminal of the fourth resistor; the second terminal of the fourth resistor is grounded.

[0010] Furthermore, the bias voltage providing circuit includes at least one of an active bias circuit and a purely resistive bias circuit.

[0011] Furthermore, when the bias voltage providing circuit is an active bias circuit, the bias voltage providing circuit includes a fifth resistor, a sixth resistor, a seventh resistor, and a third transistor; wherein, the first terminal of the fifth resistor is electrically connected to the voltage source; the drain of the third transistor is electrically connected to the second terminal of the fifth resistor, the first terminal of the sixth resistor, and the gate of the first transistor, respectively; the gate of the third transistor is electrically connected to the second terminal of the sixth resistor; the source of the third transistor is electrically connected to the first terminal of the seventh resistor; and the second terminal of the seventh resistor is grounded.

[0012] Furthermore, when the bias voltage providing circuit is a purely resistive bias circuit, the bias voltage providing circuit includes an eighth resistor and a ninth resistor; wherein, the first end of the eighth resistor is electrically connected to the voltage source, the second end of the eighth resistor is electrically connected to the gate of the first transistor and the first end of the ninth resistor respectively; the second end of the ninth resistor is grounded.

[0013] Secondly, embodiments of this application also provide an amplifier, the amplifier including a voltage source, an amplifier circuit and at least one bias circuit as described above; wherein the voltage source is electrically connected to the amplifier circuit and each of the bias circuits respectively; the amplifier circuit is electrically connected to each of the bias circuits respectively.

[0014] Furthermore, the amplifier circuit includes one of a multi-stage current multiplexing architecture amplifier, a common-gate amplifier, a common-source amplifier, and a multi-stage stacked amplifier.

[0015] This application provides a bias circuit and an amplifier. The bias circuit includes a bias voltage supply circuit and a low-frequency spurious discharge circuit. The low-frequency spurious discharge circuit includes a first transistor, a first resistor, a first inductor, a first capacitor, and a source voltage control circuit. The gate of the first transistor is electrically connected to the output terminal of the bias voltage supply circuit. The drain of the first transistor is electrically connected to a voltage source, the input terminal of the bias voltage supply circuit, and the first terminal of the first capacitor. The source of the first transistor is electrically connected to the first terminal of the source voltage control circuit and the first terminal of the first inductor. The second terminal of the first capacitor and the second terminal of the source voltage control circuit are grounded. The first resistor is electrically connected to the second terminal of the first inductor and the amplifier circuit. The low-frequency spurious discharge circuit is used to discharge low-frequency spurious signals to ground through the filtering effect of the first inductor and the first capacitor when low-frequency spurious signals are present. The bias circuit provided by this application can provide a path to ground for low-frequency spurious signals of the amplifier, improving the operating stability of the amplifier.

[0016] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This illustration shows one of the structural schematic diagrams of a bias circuit provided in an embodiment of this application; Figure 2 This is a second schematic diagram of a bias circuit provided in an embodiment of this application; Figure 3 The third schematic diagram shows the structure of a bias circuit provided in an embodiment of this application; Figure 4 The fourth schematic diagram shows a bias circuit provided in an embodiment of this application; Figure 5 The fifth schematic diagram shows the structure of a bias circuit provided in an embodiment of this application; Figure 6 A schematic diagram of the structure of an amplifier provided in an embodiment of this application is shown.

[0019] Explanation of key component symbols: 100 - Bias circuit; 110 - Bias voltage supply circuit; 120 - Low-frequency spurious discharge circuit; Q1 - First transistor; R1 - First resistor; L1 - First inductor; C1 - First capacitor; 121 - Source voltage control circuit; VDD - Voltage source; 200 - Amplifier circuit; R2 - Second resistor; R3 - Third resistor; R4 - Fourth resistor; Q2 - Second transistor; R5 - Fifth resistor; R6 - Sixth resistor; R7 - Seventh resistor; Q3 - Third transistor; R8 - Eighth resistor; R9 - Ninth resistor; 20 - Amplifier. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0022] In the description of this utility model, it should be noted that the terms "inner" and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first" and "second," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0023] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0024] It is worth noting that prior to this application, existing amplifier circuits implemented using GaAs technology often exhibited stray signals when the signal was small, which was particularly noticeable when the input power was high. This caused the amplifier to degrade in performance under small signal or high power conditions, affecting the stability of the amplifier's operation.

[0025] To overcome the above-mentioned defects, embodiments of this application provide a bias circuit and an amplifier that can provide a ground path for the low-frequency spurious signals of the amplifier, thereby improving the operating stability of the amplifier.

[0026] Please see Figure 1 , Figure 1 This is one of the structural schematic diagrams of a bias circuit 100 provided in an embodiment of this application. For example... Figure 1 As shown, the bias circuit 100 provided in this embodiment includes a bias voltage supply circuit 110 and a low-frequency spurious discharge circuit 120; the low-frequency spurious discharge circuit 120 includes a first transistor Q1, a first resistor R1, a first inductor L1, a first capacitor C1, and a source voltage control circuit 121; wherein, The gate of the first transistor Q1 is electrically connected to the output terminal of the bias voltage supply circuit 110. The drain of the first transistor Q1 is electrically connected to the voltage source VDD, the input terminal of the bias voltage supply circuit 110, and the first terminal of the first capacitor C1. The source of the first transistor Q1 is electrically connected to the first terminal of the source voltage control circuit 121 and the first terminal of the first inductor L1. The second terminal of the first capacitor C1 and the second terminal of the source voltage control circuit 121 are grounded. The first resistor R1 is electrically connected to the second terminal of the first inductor L1 and the amplifier circuit 200. The low-frequency spurious signal discharge circuit 120 is used to discharge the low-frequency spurious signal to ground through the filtering effect of the first inductor L1 and the first capacitor C1 when a low-frequency spurious signal is present.

[0027] The bias circuit 100 provided in this embodiment is designed to provide a stable bias voltage for the amplifier circuit and effectively suppress low-frequency spurious signals. The bias circuit 100 includes two main parts: a bias voltage providing circuit 110 and a low-frequency spurious discharge circuit 120.

[0028] The bias voltage supply circuit 110 is responsible for generating a stable voltage that provides the gate voltage for the first transistor Q1 in the low-frequency spurious discharge circuit 120, so that the first transistor Q1 is in normal working condition. The source voltage control circuit 121 and the first transistor Q1 provide a suitable bias voltage for the amplifier circuit 200, so that the amplifier circuit 200 is in normal working condition.

[0029] The low-frequency spurious discharge circuit 120 consists of a first transistor Q1, a first resistor R1, a first inductor L1, a first capacitor C1, and a source voltage control circuit 121. It is connected between the bias voltage supply circuit 110 and the amplifier circuit 200 to provide a path to ground for the low-frequency spurious discharge of the amplifier circuit 200 while isolating the in-band radio frequency signal of the amplifier circuit 200.

[0030] In this embodiment, the first transistor Q1 is an enhancement-mode transistor. Operating in the saturation region, it provides a low-impedance path for low-frequency spurious signals. In this application, the die size of the first transistor Q1 affects its on-resistance, thus determining the impedance of the amplifier circuit 200 to the radio frequency (RF) signal. A die size that is too small increases the impedance of the amplifier circuit 200 to the RF signal, while a die size that is too large increases its area in the circuit. Therefore, the die size of the first transistor Q1 should be considered in a balanced way.

[0031] The bias voltage supply circuit 110 determines the gate voltage of the first transistor Q1 and the quiescent current of the corresponding bias portion.

[0032] The source voltage control circuit 121 determines the source voltage of the first transistor Q1 and the corresponding quiescent current biased.

[0033] The first inductor L1 and the first capacitor C1 are used to suppress the leakage of in-band radio frequency signals from the amplifier circuit 200 into the bias circuit 100, and also to provide a path to ground for low-frequency signals, thereby reducing or suppressing spurious conditions in the main radio frequency circuit.

[0034] In one possible implementation, if the bias circuit 100 and the amplifier circuit 200 share the same voltage source VDD, the first capacitor C1 can be reused with the filter capacitor at the chock inductor of the VDD of the amplifier circuit 200, without the need to add a separate filter capacitor.

[0035] The first resistor R1 can strengthen the isolation of radio frequency signals, but at the same time it will increase the impedance to low frequency signals. Therefore, the value of the first resistor R1 can be given according to the actual circuit needs. Its resistance value is generally between 0 ohms and several hundred ohms. The smaller the resistance value of the first resistor R1, the better it will improve the spurious effect of the amplifier.

[0036] In a preferred embodiment of this application, the resistance values ​​of the first inductor L1 and the first resistor R1 are less than 1000 ohms, so as to provide a low impedance path for low-frequency spurious signals.

[0037] Specifically, existing bias circuits and amplifier circuits typically use a large resistor with a resistance of several thousand to tens of thousands of ohms to isolate the amplifier circuit's radio frequency (RF) signal. This results in a high impedance state for low-frequency signals, making it impossible for the amplifier circuit to eliminate low-frequency spurious signals through the bias circuit. However, in this embodiment, the impedance of the amplifier circuit 200 to the RF signal is the equivalent resistance of the source voltage control circuit 121 when the first transistor Q1 is turned on, connected in parallel with the equivalent resistance of the source voltage control circuit 121 when it is turned on, and then connected in series with the inductor L1 and the resistor R1. The resistances of inductor L1 and resistor R1 are typically from 0 ohms to several hundred ohms. The source voltage control circuit 121 is connected in parallel with the equivalent resistance when the first transistor Q1 is turned on. Although the resistance of the source voltage control circuit 121 can be in the thousands of ohms range, the equivalent resistance when the first transistor Q1 is turned on is small, and the resistance after parallel connection is very small, approximately less than a hundred ohms. Based on the above circuit architecture, the impedance of the amplifier circuit 200 for low-frequency signals is between tens of ohms and several hundred ohms. Compared to the impedance of several thousand to tens of thousands of ohms in existing bias circuits, the low-frequency spurious discharge circuit 120 of this embodiment significantly reduces the impedance to low-frequency signals, providing a good low-frequency path to ground and improving or suppressing low-frequency spurious signals in the amplifier. This circuit architecture does not affect the main RF circuit; it only processes the spurious signals at the amplifier power supply bias, providing a low-frequency path to ground. This allows the amplifier chip to provide a low-frequency path to ground without affecting performance, and in application, it can improve the system link performance degradation and stability problems caused by amplifier spurious signals to a certain extent.

[0038] In one possible implementation, please refer to Figure 2 , Figure 2 This is a second schematic diagram of a bias circuit provided in an embodiment of this application. Figure 2 As shown, the source voltage control circuit 121 includes a second resistor R2.

[0039] The first end of the second resistor R2 is electrically connected to the source of the first transistor Q1, and the second end of the second resistor R2 is grounded.

[0040] In this embodiment, the second resistor R2 is used to stabilize the source voltage of the first transistor Q1, so that the first transistor Q1 can operate stably in the saturation region.

[0041] The second resistor has a resistance value in the thousands of ohms range, and its value is adjusted according to the voltage and current required by the circuit.

[0042] In one possible implementation, please refer to Figure 3 , Figure 3 This is a third schematic diagram of a bias circuit provided in an embodiment of this application. Figure 3 As shown, the source voltage control circuit 121 includes a third resistor R3, a fourth resistor R4, and a second transistor Q2.

[0043] In this configuration, the drain of the second transistor Q2 is electrically connected to the first terminal of the third resistor R3 and the source of the first transistor Q1, the gate of the second transistor Q2 is electrically connected to the second terminal of the third resistor R3, and the source of the second transistor Q2 is electrically connected to the first terminal of the fourth resistor R4; the second terminal of the fourth resistor R4 is grounded.

[0044] In this embodiment, the source voltage control circuit 121 can be a purely resistive circuit, or it can be replaced by an active device composed of a third resistor R3, a fourth resistor R4, and a second transistor Q2.

[0045] Here, the third resistor R3 is a large resistor used to provide equipotential for the second transistor Q2, and the fourth resistor R4 is used to stabilize the operating voltage of the second transistor Q2. The source voltage control circuit 121 composed of the third resistor R3, the fourth resistor R4, and the second transistor Q2 operates on the same principle as the second resistor R2. Compared to a purely resistive circuit, this circuit can change the ability of the amplifier circuit 200 to adjust for fluctuations in high and low temperatures as well as fluctuations in the power supply voltage VDD.

[0046] In one possible implementation, the source voltage control circuit 121 can be composed of more than one transistor connected in series with a resistor. The dies of these transistors can be enhancement-mode (E-mode) transistors or depletion-mode (D-mode) transistors, and can be amplification transistors or logic transistors. The main principle is to use the resistance of the dies when they are turned on, and adjust their size and connection method according to the voltage and current required by the circuit.

[0047] Furthermore, the bias voltage providing circuit 110 includes at least one of an active bias circuit and a purely resistive bias circuit.

[0048] The bias circuit in this application embodiment can be applied to bias circuits with pure resistive voltage dividers, as well as to various types of active bias circuits.

[0049] In one possible implementation, please refer to Figure 4 , Figure 4 This is a fourth schematic diagram of a bias circuit provided in an embodiment of this application. Figure 4 As shown, when the bias voltage supply circuit 110 is an active bias circuit, the bias voltage supply circuit 110 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and a third transistor Q3.

[0050] In this configuration, the first terminal of the fifth resistor R5 is electrically connected to the voltage source VDD; the drain of the third transistor Q3 is electrically connected to the second terminal of the fifth resistor R5, the first terminal of the sixth resistor R6, and the gate of the first transistor Q1, respectively; the gate of the third transistor Q3 is electrically connected to the second terminal of the sixth resistor R6; the source of the third transistor Q3 is electrically connected to the first terminal of the seventh resistor R7; and the second terminal of the seventh resistor R7 is grounded.

[0051] In this embodiment, the fifth resistor R5 is directly connected to the voltage source VDD to provide a stable reference voltage for the entire bias circuit.

[0052] The third transistor Q3, along with the seventh resistor R7 and the fifth resistor R5, provides the gate voltage for the first die Q1. The third transistor Q3 can regulate the fluctuations in the gate voltage of the first die Q1 due to changes in high and low temperatures. The sixth resistor R6 and the seventh resistor R7 together set the operating point of the third transistor Q3. R6 is used to set the gate voltage to control the on-resistance of Q3, while R7 provides a stable source voltage for Q3, ensuring its stable operation.

[0053] This active bias circuit design significantly improves the stability of the bias voltage, reducing the impact of power supply voltage fluctuations and temperature variations on amplifier performance. A stable bias voltage helps the amplifier maintain optimal performance under different operating conditions, improving linearity and gain stability. Furthermore, by adjusting the resistor values, the active bias circuit can adapt to different amplifier designs and application requirements, enhancing the circuit's versatility.

[0054] In summary, Figure 4 The bias voltage supply circuit 110 shown in the diagram provides a stable and precise bias voltage to the amplifier circuit 200 by accurately controlling the bias voltage, thereby optimizing the amplifier's performance and stability. This design is particularly suitable for applications with high amplifier performance requirements, such as radio frequency and microwave applications in wireless communication, radar systems, and satellite communication.

[0055] In one possible implementation, please refer to Figure 5 , Figure 5 This is the fifth schematic diagram of a bias circuit provided in an embodiment of this application. Figure 5 As shown, when the bias voltage supply circuit 110 is a purely resistive bias circuit, the bias voltage supply circuit 110 includes an eighth resistor R8 and a ninth resistor R9.

[0056] Among them, the first end of the eighth resistor R8 is electrically connected to the voltage source VDD, the second end of the eighth resistor R8 is electrically connected to the gate of the first transistor Q1 and the first end of the ninth resistor R9 respectively; the second end of the ninth resistor R9 is grounded.

[0057] In this embodiment, the first terminal of the eighth resistor R8 is directly connected to the voltage source VDD, ensuring that the circuit can receive a stable power supply voltage. The second terminal of R8 is connected to the gate of the first transistor Q1 and the first terminal of the ninth resistor R9, forming a voltage divider network to generate a bias voltage. The second terminal of the ninth resistor R9 is grounded, providing a stable reference point for the voltage divider network, which helps reduce the impact of power supply voltage fluctuations and ambient temperature changes on the bias voltage, thereby improving the amplifier's operational stability. The resistance values ​​of the eighth resistor R8 and the ninth resistor R9 are in the kiloohm range.

[0058] This application provides a bias circuit including a bias voltage providing circuit 110 and a low-frequency spurious discharge circuit 120. The low-frequency spurious discharge circuit 120 includes a first transistor Q1, a first resistor R1, a first inductor L1, a first capacitor C1, and a source voltage control circuit 121. The gate of the first transistor Q1 is electrically connected to the output terminal of the bias voltage providing circuit 110, the drain of the first transistor Q1 is electrically connected to the voltage source VDD, the input terminal of the bias voltage providing circuit 110, and the first terminal of the first capacitor C1, and the source of the first transistor Q1 is electrically connected to the first terminal of the source voltage control circuit 121 and the first terminal of the first inductor L1. The second terminal of the first capacitor C1 and the second terminal of the source voltage control circuit 121 are grounded. The first resistor R1 is electrically connected to the second terminal of the first inductor L1 and the amplifier circuit 200. The low-frequency spurious discharge circuit 120 is used to discharge the low-frequency spurious signal to ground through the filtering effect of the first inductor L1 and the first capacitor C1 when a low-frequency spurious signal is present. The bias circuit provided in this application can provide a ground path for the low-frequency spurious signals of the amplifier, thereby improving the operating stability of the amplifier. Here, this application embodiment also provides an amplifier, please refer to Figure 6 , Figure 6 This is a schematic diagram of the structure of an amplifier provided in an embodiment of this application. Figure 6 As shown, the amplifier 20 provided in this embodiment includes a voltage source VDD, an amplifier circuit 200, and at least one bias circuit 100 provided in the above embodiment.

[0059] The voltage source VDD is electrically connected to the amplifier circuit 200 and each bias circuit 100 respectively; the amplifier circuit 200 is electrically connected to each bias circuit 100 respectively.

[0060] The bias circuit 100 provided in this application embodiment can be used in the gate bias circuit of each amplifier stage or in a single bias circuit. The more times it is used, the more low-frequency signals can reach ground, and the more obvious the effect of improving or suppressing the low-frequency spurious signal of the amplifier becomes.

[0061] Furthermore, the amplifier circuit 200 includes one of a multi-stage current-multiplexed architecture amplifier, a common-gate amplifier, a common-source amplifier, and a multi-stage stacked amplifier.

[0062] In this application embodiment, the amplifiers that can be applied to the bias circuit 100 include, but are not limited to, multi-stage current multiplexing architecture amplifiers, common gate amplifiers, common source amplifiers, and multi-stage stacked amplifiers.

[0063] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The scope of protection of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A bias circuit, characterized in that, The bias circuit (100) includes a bias voltage supply circuit (110) and a low-frequency spurious discharge circuit (120); the low-frequency spurious discharge circuit (120) includes a first transistor (Q1), a first resistor (R1), a first inductor (L1), a first capacitor (C1), and a source voltage control circuit (121); wherein, The gate of the first transistor (Q1) is electrically connected to the output terminal of the bias voltage providing circuit (110). The drain of the first transistor (Q1) is electrically connected to the voltage source (VDD), the input terminal of the bias voltage providing circuit (110), and the first terminal of the first capacitor (C1). The source of the first transistor (Q1) is electrically connected to the first terminal of the source voltage control circuit (121) and the first terminal of the first inductor (L1). The second terminal of the first capacitor (C1) and the second terminal of the source voltage control circuit (121) are grounded. The first resistor (R1) is electrically connected to the second terminal of the first inductor (L1) and the amplifier circuit (200). The low-frequency spurious discharge circuit (120) is used to discharge the low-frequency spurious signal to ground through the filtering effect of the first inductor (L1) and the first capacitor (C1) when a low-frequency spurious signal is present.

2. The bias circuit according to claim 1, characterized in that, The first transistor (Q1) is an enhancement-mode transistor; the first transistor (Q1) operates in the saturation region to provide a low-impedance path for the low-frequency spurious signal.

3. The bias circuit according to claim 2, characterized in that, The resistance values ​​of the first inductor (L1) and the first resistor (R1) are less than 1000 ohms, so as to provide a low impedance path for the low-frequency spurious signal.

4. The bias circuit according to claim 3, characterized in that, The source voltage control circuit (121) includes a second resistor (R2); wherein, the first end of the second resistor (R2) is electrically connected to the source of the first transistor (Q1), and the second end of the second resistor (R2) is grounded.

5. The bias circuit according to claim 3, characterized in that, The source voltage control circuit (121) includes a third resistor (R3), a fourth resistor (R4), and a second transistor (Q2); wherein the drain of the second transistor (Q2) is electrically connected to the first terminal of the third resistor (R3) and the source of the first transistor (Q1), the gate of the second transistor (Q2) is electrically connected to the second terminal of the third resistor (R3), and the source of the second transistor (Q2) is electrically connected to the first terminal of the fourth resistor (R4); the second terminal of the fourth resistor (R4) is grounded.

6. The bias circuit according to claim 1, characterized in that, The bias voltage providing circuit (110) includes at least one of an active bias circuit and a purely resistive bias circuit.

7. The bias circuit according to claim 6, characterized in that, When the bias voltage providing circuit (110) is an active bias circuit, the bias voltage providing circuit (110) includes a fifth resistor (R5), a sixth resistor (R6), a seventh resistor (R7), and a third transistor (Q3); wherein, the first terminal of the fifth resistor (R5) is electrically connected to the voltage source (VDD); the drain of the third transistor (Q3) is electrically connected to the second terminal of the fifth resistor (R5), the first terminal of the sixth resistor (R6), and the gate of the first transistor (Q1), respectively; the gate of the third transistor (Q3) is electrically connected to the second terminal of the sixth resistor (R6); the source of the third transistor (Q3) is electrically connected to the first terminal of the seventh resistor (R7); and the second terminal of the seventh resistor (R7) is grounded.

8. The bias circuit according to claim 6, characterized in that, When the bias voltage providing circuit (110) is a pure resistive bias circuit, the bias voltage providing circuit (110) includes an eighth resistor (R8) and a ninth resistor (R9); wherein, the first end of the eighth resistor (R8) is electrically connected to the voltage source (VDD), the second end of the eighth resistor (R8) is electrically connected to the gate of the first transistor (Q1) and the first end of the ninth resistor (R9) respectively; the second end of the ninth resistor (R9) is grounded.

9. An amplifier, characterized in that, The amplifier (20) includes a voltage source (VDD), an amplifier circuit (200), and at least one bias circuit (100) as described in any one of claims 1-8; wherein the voltage source (VDD) is electrically connected to the amplifier circuit (200) and each of the bias circuits (100); and the amplifier circuit (200) is electrically connected to each of the bias circuits (100).

10. The amplifier according to claim 9, characterized in that, The amplifier circuit (200) includes one of the following: a multi-stage current multiplexing architecture amplifier, a common gate amplifier, a common source amplifier, and a multi-stage stacked amplifier.

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