A 36v battery pack control circuit

Abstract

The utility model relates to battery control circuit technical field especially 36V battery pack control circuit, including microcontroller unit, power module, battery voltage sampling module, wake -up module and charge -discharge control module, the battery voltage sampling module contains multiple partial voltage sampling branch and an enable control switch unit, this switch unit is connected in series in the common ground terminal of partial voltage network, and is controlled by microcontroller its on -off, and microcontroller only when needing sampling switch on the switch to establish sampling passage, and immediately turn off after sampling end, thereby thoroughly eliminated the continuous power consumption of partial voltage resistance in standby state in traditional scheme, realized super -low static power consumption, the utility model discloses integrated button, charging, load access multi -source wake -up mechanism to contain fuse, TVS pipe's hardware protection circuit, has low power consumption, high security, high degree of intelligence's advantage.

Description

Technical Field

[0001] This utility model relates to the field of battery control circuit technology, specifically to a 36V battery pack control circuit. Background Technology

[0002] With the widespread use of electric bicycles, power tools, and portable energy storage devices, 36V lithium battery packs have become increasingly common. The battery management system (BMS) is the core component ensuring the safe, reliable, and long-life operation of lithium battery packs. Traditional BMS solutions mainly fall into two categories: one uses dedicated battery management front-end chips, which have fixed functions, poor programmability, and high costs; the other uses discrete components and microcontrollers, which offer good flexibility but often suffer from shortcomings in power consumption, accuracy, and integration.

[0003] A prominent issue is that when sampling battery voltage using discrete components, a resistor divider network is typically used to reduce the high battery voltage to a level readable by the microcontroller. However, this divider network remains grounded during system standby or hibernation, continuously drawing current from the battery pack. This results in high static power consumption and significantly shortens the battery pack's standby time and lifespan.

[0004] In addition, the existing solutions are relatively simple in terms of wake-up methods and lack sufficient intelligence; in terms of protection measures, they may rely too much on software and lack sufficient hardware protection redundancy, which poses security risks.

[0005] Therefore, there is an urgent need for a battery pack control and protection circuit solution that combines low power consumption, high security, high flexibility, and reasonable cost. Utility Model Content

[0006] In view of the shortcomings of the existing technology, the purpose of this utility model is to provide a 36V battery pack control circuit.

[0007] To achieve the above objectives, this utility model provides the following technical solution: a 36V battery pack control circuit, comprising:

[0008] Microcontroller unit;

[0009] The power module is connected to the positive and negative terminals of the battery pack and is used to provide operating voltage for the microcontroller unit and peripheral circuits.

[0010] The battery voltage sampling module has its input terminal connected to each battery cell node of the battery pack and its output terminal connected to the analog-to-digital conversion pin of the microcontroller unit, and is used to collect the voltage of each battery cell.

[0011] The wake-up module has at least one wake-up signal input terminal, and its output terminal is connected to the interrupt or wake-up pin of the microcontroller unit;

[0012] The charging and discharging control module, controlled by the microcontroller unit, is used to connect or disconnect the charging and discharging circuits of the battery pack.

[0013] The battery voltage sampling module includes multiple voltage divider sampling branches and an enable control switch unit, with each voltage divider sampling branch corresponding to a battery cell node. The enable control switch unit is connected in series with the common ground terminal or low-voltage reference terminal of the voltage divider sampling branches, and its control terminal is connected to a general-purpose input / output pin of the microcontroller unit. The microcontroller unit is configured to control the enable control switch unit to turn on only when voltage sampling is required, thereby establishing a sampling path.

[0014] In some embodiments, the enable control switch unit includes an N-channel MOSFET with its drain connected to the ground of all voltage divider sampling branches, its source grounded, and its gate connected to the general-purpose input / output pin of the microcontroller unit via a resistor.

[0015] In some embodiments, the wake-up module includes at least two of the following: a button wake-up unit, a charging wake-up unit, and a load access wake-up unit;

[0016] The button wake-up unit includes a button, one end of which is connected to a reference voltage or ground, and the other end is directly or through a pull-up / pull-down resistor connected to a pin of the microcontroller unit to form the wake-up signal input terminal.

[0017] The charging wake-up unit includes a charging interface detection circuit, which is used to detect the voltage change of the charging interface when the charger is connected, and output a wake-up signal to the microcontroller unit.

[0018] The load access wake-up unit includes a load-side voltage detection circuit, which is used to detect voltage changes when the discharge port is connected to a load and output a wake-up signal to the microcontroller unit.

[0019] In some embodiments, the charging wake-up unit includes a first voltage divider resistor, a second voltage divider resistor, and a first NPN transistor; one end of the first voltage divider resistor is connected to the charging positive interface, and the other end is connected to one end of the second voltage divider resistor and the base of the first NPN transistor; the other end of the second voltage divider resistor is grounded; the emitter of the first NPN transistor is grounded, and the collector serves as the output terminal of the wake-up signal, connected to a pin of the microcontroller unit.

[0020] In some embodiments, the charge / discharge control module includes:

[0021] The discharge control unit includes a main discharge N-channel MOSFET, whose source and drain are connected in series between the total negative terminal of the battery pack and the negative terminal of the load, and whose gate is connected to a control pin of the microcontroller unit through a driving circuit.

[0022] The charging control unit includes at least one charging control P-channel MOSFET, whose source and drain are connected in series between the charging positive interface and the overall positive terminal of the battery pack, and whose gate is connected to a control pin of the microcontroller unit through a driving transistor.

[0023] In some embodiments, a hardware protection module is also included, the hardware protection module comprising:

[0024] A fusible fuse connected in series in the main circuit of the battery pack;

[0025] Transient voltage suppression diodes connected in parallel to the charging and / or discharging interfaces;

[0026] A reverse polarity protection Schottky diode connected in series in the charging circuit.

[0027] In some embodiments, a temperature detection module and a current detection module are also included;

[0028] The temperature detection module includes at least one thermistor interface for connecting a thermistor attached to a battery pack or power device. The thermistor interface is connected to the analog-to-digital conversion pin of the microcontroller unit.

[0029] The current detection module includes a sampling resistor connected in series in the total discharge circuit or total charging circuit of the battery pack. The voltage signal across the sampling resistor is connected to the analog-to-digital conversion pin of the microcontroller unit through a differential amplifier circuit or directly.

[0030] In some embodiments, the power module includes a two-stage low-dropout linear regulator:

[0031] The first-stage regulator connects its input terminal to the positive terminal of the battery pack and reduces the battery voltage to the first intermediate voltage.

[0032] The second-stage regulator has its input connected to the first intermediate voltage and its output providing the core operating voltage required by the microcontroller unit.

[0033] In some embodiments, the microcontroller unit is an ACM32F070RBT7 control chip.

[0034] Compared with the prior art, the beneficial effects of this utility model are:

[0035] 1. Ultra-low static power consumption: Through the unique controlled voltage sampling circuit, the problem of continuous power consumption in standby mode of traditional resistor voltage divider networks is fundamentally eliminated, significantly reducing the overall static current of the system and greatly extending the storage and standby life of the battery pack.

[0036] 2. High safety and reliability: It integrates hardware circuit protection, including independent charging and discharging control circuits, fuses, TVS diodes, etc., forming a multi-layer protection mechanism with high safety.

[0037] 3. Intelligent and high-quality user experience: Supports three wake-up methods: button, charger plug, and load connection. The system responds quickly and is easy to use.

[0038] 4. High cost-effectiveness and flexibility: It adopts a general-purpose microcontroller and standard discrete components, avoiding expensive dedicated chips. While controlling costs, the controller can flexibly define protection parameters and logic to adapt to different application scenarios.

[0039] 5. Complete functionality: It integrates core BMS functions such as voltage, current, and temperature detection, charge and discharge management, and communication interface, making it a complete single-chip solution.

[0040] Details of one or more embodiments of this application are set forth in the following drawings and description to make other features, objects and advantages of this application more readily apparent. The embodiments of this application will provide a detailed description and understanding of the application. Attached Figure Description

[0041] Figure 1 This is a schematic diagram of the principle of this utility model;

[0042] Figure 2 This is a circuit schematic diagram of an embodiment of the present utility model;

[0043] Figure 3 This is a circuit diagram of the battery voltage sampling module and the enable control switch unit in an embodiment of the present invention;

[0044] Figure 4 This is a circuit diagram of the power module and the multi-source wake-up module in an embodiment of this utility model;

[0045] Figure 5 This is a circuit diagram of the charging / discharging control module and the hardware protection module in this embodiment of the utility model;

[0046] Figure 6 This is a schematic diagram of the MCU circuit in an embodiment of this utility model. Detailed Implementation

[0047] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0048] This utility model embodiment provides a control and protection circuit for a 36V battery pack. The core objective of this circuit is to achieve comprehensive battery management functions (voltage, current, temperature monitoring, charge and discharge control, communication) while reducing the system standby power consumption to an extremely low level and supporting multiple wake-up methods.

[0049] like Figure 1 As shown, a 36V battery pack control circuit of this utility model includes:

[0050] Microcontroller unit;

[0051] The power module is connected to the positive and negative terminals of the battery pack and is used to provide operating voltage for the microcontroller unit and peripheral circuits.

[0052] The battery voltage sampling module has its input terminal connected to each battery cell node of the battery pack and its output terminal connected to the analog-to-digital conversion pin of the microcontroller unit, and is used to collect the voltage of each battery cell.

[0053] The wake-up module has at least one wake-up signal input terminal, and its output terminal is connected to the interrupt or wake-up pin of the microcontroller unit;

[0054] The charging and discharging control module, controlled by the microcontroller unit, is used to connect or disconnect the charging and discharging circuits of the battery pack.

[0055] The battery voltage sampling module includes multiple voltage divider sampling branches and an enable control switch unit, with each voltage divider sampling branch corresponding to a battery cell node. The enable control switch unit is connected in series with the common ground terminal or low-voltage reference terminal of the voltage divider sampling branches, and its control terminal is connected to a general-purpose input / output pin of the microcontroller unit. The microcontroller unit is configured to control the enable control switch unit to turn on only when voltage sampling is required, thereby establishing a sampling path.

[0056] The specific implementation process of the above technical solution is as follows:

[0057] I. System Overall Architecture and Connection Relationships

[0058] Please see Figure 2The circuit system in this embodiment is based on a general-purpose microcontroller (MCU) U5 (model ACM32F070RBT7) with an ARM Cortex-M0 core. The positive terminal (BAT+) and negative terminal (BAT-) of the battery pack are connected to the system. The power module draws power from BAT+, and after two stages of voltage regulation, provides a stable 3.3V operating voltage (VDD_3V3) to the MCU and all peripheral digital and analog circuits.

[0059] The battery pack consists of multiple lithium-ion cells connected in series, with the intermediate connection points between each cell marked as B1, B2, ..., B9. The input terminals of the battery voltage sampling module are connected to these 10 nodes: BAT+, B1, B2, ..., B9, and the output terminal (i.e., the midpoint of the voltage divider) is connected to the 10 independent analog-to-digital converter (ADC) input pins of the MCU U5.

[0060] The wake-up module contains three independent detection channels: a button wake-up detection terminal connected to the user's button; a charging wake-up detection terminal connected to the charger's positive input terminal (C+); and a load wake-up detection terminal connected to the discharge output terminal (P3). The output signals of these three channels are respectively connected to the GPIO pins of the MCU U5 that have interrupt or wake-up functions.

[0061] The input terminal of the charge / discharge control module receives the Discharge_CTRL and Charge_EN digital control signals from the MCU U5. Its power output terminal controls the switching on and off of the main discharge MOSFET (N1) connected in series in the discharge circuit and the charge control MOSFETs (PM1, PM2, Q1, Q2) connected in series in the charging circuit, respectively.

[0062] The temperature detection module is connected to an external negative temperature coefficient (NTC) thermistor via connectors J1 and J3, and the current detection module obtains the signal through sampling resistor R59. Both are connected to the ADC input pin of MCU U5.

[0063] II. Detailed Explanation of the Implementation Methods of Each Module

[0064] 1. Ultra-low power battery voltage sampling module

[0065] One of the key innovations of this invention lies in the low-power design of the voltage sampling circuit. In traditional solutions, the voltage divider resistor network is directly grounded, continuing to consume current even when the MCU is in sleep mode (for multiple batteries, the total current can reach hundreds of microamps). This embodiment completely solves this problem.

[0066] Please see Figure 3 and 6The sampling process will be illustrated using the sampling of the first battery string (node ​​B1) as an example. The sampling circuit consists of high-precision, high-resistance voltage divider resistors R33 (upper resistor, e.g., 1MΩ) and R34 (lower resistor, e.g., 1MΩ). One end of resistor R33 is connected to battery node B1, and the other end is connected to resistor R34. This connection point is the sampling point ADC_B1, which is directly connected to the ADC input pin PA0 of MCU U5. The other end of resistor R34 is grounded.

[0067] The enable control switch unit consists of an N-channel enhancement-mode MOSFET Q7 (model 2N7002). MOSFET Q7 is connected in series between resistors R33 and R34. The drain (D) of MOSFET Q7 is connected to resistor R33, the source (S) of MOSFET Q7 is connected to resistor R34, and the gate (G) is connected to a general-purpose input / output pin PC11 of MCU U5, which is defined as the Bat_AD_ enable signal.

[0068] For the other nine battery nodes (B2 to B9 and BAT+), their sampling circuit structures are exactly the same, consisting of corresponding voltage divider resistor pairs (such as R25 / R26, R41 / R42, etc.).

[0069] Workflow:

[0070] Sampling Phase: When MCU U5 needs to read the battery voltage, it first outputs a high level (approximately 3.3V) on its PC11 pin (Bat_AD_Enable). This high level causes the gate-source voltage (Vgs) of MOSFET Q7 to exceed its turn-on threshold, quickly turning on MOSFET Q7 and creating a low-resistance state between its drain and source (DS). At this time, the lower ends of all voltage divider resistor networks (R33 / R34, R25 / R26, etc.) are turned on through the corresponding MOSFETs, forming a complete closed loop. MCU U5 then activates its internal ADC, sequentially reading the voltage values ​​of ADC_B1 to ADC_B9 and BAT.

[0071] Standby Phase: After all voltage sampling is complete, MCU U5 outputs a low level (0V) on pin PC11. MOSFET Q7's Vgs drops to 0V, turning off the device and creating an extremely high impedance (typically greater than 10MΩ) between its drain and source (DS). At this time, the path from battery node B1 through R33 and R34 to ground is completely blocked by MOSFET Q7, theoretically resulting in zero current flowing through this branch. This applies to all 10 sampling branches, thus ensuring that the total quiescent current of the voltage sampling module approaches zero during system standby or sleep mode.

[0072] 2. Multi-source wake-up module

[0073] To meet the wake-up requirements of different application scenarios, this embodiment integrates three independent hardware wake-up sources.

[0074] Button wake-up: such as Figure 4 and 6 As shown, one end of the wake-up button SW1 is grounded, and the other end is connected to the system power supply VDD_3V3 (3.3V) through a pull-up resistor R58 (e.g., 10kΩ). Simultaneously, this connection point, Key_Wake, is directly connected to a pin of the MCU U5 with external interrupt functionality (e.g., PA0). By default, the Key_Wake point is high. When the user presses the button, this point is pulled low to ground, generating a falling edge signal that triggers an external interrupt on the MCU U5, thus waking it from sleep mode.

[0075] Wake-up while charging: such as Figure 4 As shown, the charger's positive terminal C+ is connected to the MCU via a high-voltage side detection circuit. Specifically, C+ is divided by resistors R17 (e.g., 51kΩ) and R18 (e.g., 5.1kΩ). The midpoint of the voltage divider is connected to the base of an NPN small-signal transistor Q9 (model MMBT5551). The emitter of transistor Q9 is grounded, and its collector is connected to VDD_3V3 via a pull-up resistor. Its collector output is the Wake_Chg signal, which is connected to another wake-up pin of MCU U5.

[0076] Operating principle: When no charger is connected, C+ is floating or at a low level, the base of transistor Q9 is cut off due to lack of bias voltage, and the Wake_Chg signal is pulled high. When a charger is connected and its voltage exceeds a certain threshold, the high voltage of C+ is divided by R17 and R18, providing sufficient voltage to the base of transistor Q9 to saturate and conduct, pulling the Wake_Chg signal low to near ground. This falling edge signal triggers the MCU to wake up. This design achieves "plug and play," requiring no user intervention.

[0077] Load access wake-up (motor start wake-up): such as Figure 4 As shown, the voltage at the discharge output terminal is monitored through a voltage divider network consisting of resistors R45, R46, etc. The divided signal triggers MOSFET Q12 to conduct, and the motor start-up wake-up detection IO is directly connected to an ADC of MCU U5 or a GPIO pin with interrupt function.

[0078] Operating Principle: When no load (such as a motor controller) is connected, the P3 port voltage is the battery voltage or floating, and the motor start-up wake-up detection IO is high. When the load is connected and ready to work, there is usually a pre-charging or detection process, causing the P3 port voltage to fluctuate. The MCU U5 can be configured to use an edge-triggered interrupt mode or a periodic ADC scan mode. When a specific change in the pin level is detected (such as a falling edge), it is determined that a load is connected, triggering the MCU to wake up. This function achieves "seamless start," improving the user experience.

[0079] 3. Charge / discharge control and hardware protection module

[0080] The power path management in this embodiment balances efficiency, safety, and cost.

[0081] Discharge control circuit: Please refer to Figure 5 and 6 The main discharge switch uses a low-internal-resistance (Rds(on)) N-channel MOSFET N1 (model HYG025N06LS1P / B). Its source (S) is connected to the battery's negative terminal BAT-, and its drain (D) is connected to the load's negative terminal. Its gate (G) is controlled by the PB1 (MOS On I / O) pin of the MCU U5 through a gate drive circuit. When the MCU needs to allow discharge, the PB1 pin outputs a high level to drive MOSFET N1 to turn on; when it needs to turn off discharge (such as when overcurrent, undervoltage, or abnormal temperature is detected), the PB1 pin outputs a low level to turn off MOSFET N1.

[0082] Charging control circuit: such as Figure 5 As shown, the charging path uses P-channel MOSFETs as switches. This embodiment uses parallel AP13P06 (PM1, PM2) and SI2301 (Q1, Q2) switches to reduce on-resistance and distribute heat. The sources (S) of these PMOS transistors are connected to the battery's overall positive terminal BAT+, and their drains (D) are connected to the charger's positive terminal C+. Their gates (G) are connected together and controlled by the MCU via a drive network.

[0083] The control logic is as follows: The MCU's PC12 and PA12 pins are connected to the bases of two NPN transistors Q4 and Q5 (MMBT5551), respectively. When PC12 and PA12 pins are high, transistors Q4 and Q5 are turned on, pulling the common point of the PMOS gate low to near ground. This makes the gate-source voltage (Vgs) of the PMOS negative and its absolute value greater than its turn-on threshold, so all PMOS transistors are turned on, and the charging circuit is established. When PC12 and PA12 pins are low, transistors Q4 and Q5 are turned off, the PMOS gate is pulled up to the BAT+ potential through the pull-up resistor, Vgs is approximately 0V, the PMOS transistors are turned off, and the charging circuit is disconnected. Schottky diodes D1 and D2 (SS510) are connected in series in the charging circuit, mainly to prevent reverse connection damage to the circuit when the charger is connected in reverse.

[0084] Hardware protection module:

[0085] Overcurrent / short circuit protection: A fusible nickel fuse F1 is connected in series at the main positive terminal BAT+ of the battery pack. When a severe overcurrent or short circuit occurs in the main circuit, F1 will melt due to overheating, providing the most fundamental and irreversible physical isolation protection.

[0086] Surge voltage protection: Transient voltage suppressor diodes (TVS) F3 (model SMBJ_51CA) are connected in parallel near the charging interface C+ and the discharging interface P3. When the interface is exposed to a high voltage spike due to electrostatic discharge (ESD), lightning strike, or sudden load change, F3 can quickly clamp the voltage and protect sensitive devices such as downstream MOSFETs and MCUs.

[0087] Voltage clamping protection: Zener diodes (such as D5, BZT52C4V7; D7, BZT52C15) are used on some sensitive signal lines (such as wake-up signal lines) to clamp the voltage and prevent accidental high voltage from damaging the MCU I / O ports.

[0088] 4. Temperature and Current Detection Module

[0089] Temperature detection: The internal temperature of the battery pack is detected by an external 10K NTC thermistor (B value 3950). This resistor is connected to the circuit via a connector, forming a voltage divider network with the onboard fixed resistor. The midpoint battery temperature AD_IO is connected to the ADC pin of MCU U5. The temperature of the power MOSFET is detected by a surface-mount 10K NTC (J3), with a similar connection method. The signal MOSFET temperature AD_IO is sent to another ADC. The MCU can calculate the corresponding temperature by measuring the voltage at the voltage divider point and referring to the NTC's temperature-resistance characteristic table.

[0090] Current detection: A precision sampling resistor R63 is connected in series in the discharge circuit (between BAT- and the source of N1). When the discharge current flows through R63, a small voltage drop is generated. This voltage drop signal is sent to the high-precision ADC pin AD_IO of the MCU U5 after passing through differential traces or a filter network. By measuring this voltage value and combining it with the known resistance value, the MCU can calculate the discharge current in real time, which is used for coulomb counting (electrical quantity calculation) and overcurrent protection judgment.

[0091] 5. Power Management Module

[0092] This embodiment employs a two-stage LDO step-down scheme to ensure an extremely clean power supply for the control core.

[0093] The first-stage step-down circuit uses an LDO chip U1 (model PJ54M50SQ) whose input is connected to the positive terminal BAT+ of the battery (after passing through F1 and D1), providing a stable 5V output (VCC_5V). This chip can withstand input voltages up to 45V and output a maximum current of 500mA. Electrolytic capacitors and ceramic capacitors are used at both the input and output terminals for filtering and energy storage.

[0094] The second-stage step-down circuit: The LDO chip U4 (model HT7533-1) is connected to VCC_5V at its input and provides a stable 3.3V voltage (VDD_3V3) at its output to power the MCU U5, operational amplifiers (if any), and other digital logic circuits. Its input and output terminals are also equipped with decoupling capacitors.

[0095] III. System Workflow Overview

[0096] 1. Power-on and initialization: When the battery pack is connected to the circuit, the power module starts working, supplying power to the MCU U5. The MCU completes power-on reset, clock initialization, and peripheral (ADC, GPIO, timer, etc.) initialization.

[0097] 2. Normal Operation and Monitoring: The MCU periodically (e.g., once per second) performs the following operations:

[0098] a. Set the Bat_AD_ enable pin high to turn on Q7;

[0099] b. After a short delay, sample all battery voltages, total voltage, current, battery temperature, and MOS temperature in sequence;

[0100] c. Set the Bat_AD_ enable pin low to turn off Q7;

[0101] d. Based on the sampled data, execute the battery management algorithm to determine if there is overvoltage, undervoltage, overcurrent, or overtemperature.

[0102] e. Based on the preset parameter results, control the state of the enable and discharge enable pins to enable or disable charging and discharging;

[0103] f. Status data can be reported via serial port (J2);

[0104] 3. Low-power sleep mode: After a period of no charging or discharging activity and no user operation, the MCU controls all peripheral circuits to enter a low-power state (such as turning off unnecessary peripheral clocks), and then enters deep sleep (Stop) mode. At this time, the static current of the entire system is mainly the static current of the power module LDO, the MCU sleep current and the microampere leakage current of the wake-up detection circuit, and the voltage sampling circuit has zero power consumption.

[0105] 4. Wake-up and Response:

[0106] If the user presses a button, the button wake-up signal triggers an MCU interrupt, and the MCU immediately wakes up and performs corresponding processing (such as lighting up an indicator light).

[0107] If a charger is connected, the charging wake-up signal triggers an MCU interrupt, waking up the MCU and initiating the charging process.

[0108] If a load is connected, the motor starts and wakes up the detection of changes in the IO signal, triggering an MCU interrupt. The MCU then wakes up and begins the discharge process.

[0109] After being awakened, the system returns to the normal operation and monitoring cycle in step 2.

[0110] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

[0111] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A 36V battery pack control circuit, characterized in that: include: Microcontroller unit; The power module is connected to the positive and negative terminals of the battery pack and is used to provide operating voltage for the microcontroller unit and peripheral circuits. The battery voltage sampling module has its input terminal connected to each battery cell node of the battery pack and its output terminal connected to the analog-to-digital conversion pin of the microcontroller unit, and is used to collect the voltage of each battery cell. The wake-up module has at least one wake-up signal input terminal, and its output terminal is connected to the interrupt or wake-up pin of the microcontroller unit; The charging and discharging control module, controlled by the microcontroller unit, is used to connect or disconnect the charging and discharging circuits of the battery pack. The battery voltage sampling module includes multiple voltage divider sampling branches and an enable control switch unit, with each voltage divider sampling branch corresponding to a battery cell node. The enable control switch unit is connected in series with the common ground terminal or low-voltage reference terminal of the voltage divider sampling branches, and its control terminal is connected to a general-purpose input / output pin of the microcontroller unit. The microcontroller unit is configured to control the enable control switch unit to turn on only when voltage sampling is required, thereby establishing a sampling path.

2. The 36V battery pack control circuit according to claim 1, characterized in that: The enable control switch unit includes an N-channel MOSFET, whose drain is connected to the ground terminal of all voltage divider sampling branches, its source is grounded, and its gate is connected to the general-purpose input / output pin of the microcontroller unit through a resistor.

3. A 36V battery pack control circuit according to claim 1 or 2, characterized in that: The wake-up module includes at least two of the following: a button wake-up unit, a charging wake-up unit, and a load access wake-up unit; The button wake-up unit includes a button, one end of which is connected to a reference voltage or ground, and the other end is directly or through a pull-up / pull-down resistor connected to a pin of the microcontroller unit to form the wake-up signal input terminal. The charging wake-up unit includes a charging interface detection circuit, which is used to detect the voltage change of the charging interface when the charger is connected, and output a wake-up signal to the microcontroller unit. The load access wake-up unit includes a load-side voltage detection circuit, which is used to detect voltage changes when the discharge port is connected to a load and output a wake-up signal to the microcontroller unit.

4. The 36V battery pack control circuit according to claim 3, characterized in that: The charging wake-up unit includes a first voltage divider resistor, a second voltage divider resistor, and a first NPN transistor; one end of the first voltage divider resistor is connected to the positive charging interface, and the other end is connected to one end of the second voltage divider resistor and the base of the first NPN transistor; the other end of the second voltage divider resistor is grounded; the emitter of the first NPN transistor is grounded, and the collector serves as the output terminal of the wake-up signal, connected to a pin of the microcontroller unit.

5. A 36V battery pack control circuit according to claim 1, characterized in that: The charge / discharge control module includes: The discharge control unit includes a main discharge N-channel MOSFET, whose source and drain are connected in series between the total negative terminal of the battery pack and the negative terminal of the load, and whose gate is connected to a control pin of the microcontroller unit through a driving circuit. The charging control unit includes at least one charging control P-channel MOSFET, whose source and drain are connected in series between the charging positive interface and the overall positive terminal of the battery pack, and whose gate is connected to a control pin of the microcontroller unit through a driving transistor.

6. A 36V battery pack control circuit according to claim 5, characterized in that: It also includes a hardware protection module, which includes: A fusible fuse connected in series in the main circuit of the battery pack; Transient voltage suppression diodes connected in parallel to the charging and / or discharging interfaces; A reverse polarity protection Schottky diode connected in series in the charging circuit.

7. A 36V battery pack control circuit according to claim 1, characterized in that: It also includes a temperature detection module and a current detection module; The temperature detection module includes at least one thermistor interface for connecting a thermistor attached to a battery pack or power device. The thermistor interface is connected to the analog-to-digital conversion pin of the microcontroller unit. The current detection module includes a sampling resistor connected in series in the total discharge circuit or total charging circuit of the battery pack. The voltage signal across the sampling resistor is connected to the analog-to-digital conversion pin of the microcontroller unit through a differential amplifier circuit or directly.

8. A 36V battery pack control circuit according to claim 1, characterized in that: The power module includes a two-stage low-dropout linear regulator: The first-stage regulator connects its input terminal to the positive terminal of the battery pack and reduces the battery voltage to the first intermediate voltage. The second-stage regulator has its input connected to the first intermediate voltage and its output providing the core operating voltage required by the microcontroller unit.

9. A 36V battery pack control circuit according to claim 1, characterized in that: The microcontroller unit is an ACM32F070RBT7 control chip.

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