A low-cost full-wave rectification circuit

Abstract

The low-cost full-wave rectifier circuit is characterized in that the rectifier circuit adopts full N-MOS tubes for rectification, thereby solving the problems of the forward voltage drop of the traditional diode rectification and the serious heat generation at a large current, the N-MOS tube has a simple manufacturing process, a low cost, a lower internal resistance at conduction, a high efficiency and low heat generation, is more suitable for a low-voltage and large-current occasion, and thus effectively reduces the cost of the rectifier circuit, avoids excessive heat generation of the low-voltage and large-current, is favorable for improving the rectification efficiency and reducing the rectification power consumption. Meanwhile, through the input conduction voltage, and then through the cooperation of the first optocoupler, the second optocoupler and the rectifier circuit, the positive half cycle and the negative half cycle of the alternating current input at the first alternating current input end are controlled to correspond to the conduction of the corresponding N-MOS tube, the full-wave rectification timing can be realized without an additional control IC, the alternating current input at the first alternating current input end can be converted into pulsating direct current and output, the circuit structure is simple, and thus the production cost of the circuit is reduced.

Description

Technical Field

[0001] This utility model relates to the field of rectification and filtering technology, and in particular to a low-cost full-wave rectifier circuit. Background Technology

[0002] In the global power supply system, the transmission and distribution network has long relied on alternating current (AC) as the primary transmission method. However, the core circuits of the vast majority of electronic terminal devices, from micro-sensors to large data center servers, depend on direct current (DC) for operation. Therefore, AC / DC conversion technology, especially the technology that rectifies AC to DC, has become a crucial link in connecting the power supply network and electrical equipment.

[0003] Among various rectifier topologies, bridge full-wave rectification is widely used due to its advantages such as high efficiency and the elimination of the need for a center-tapped transformer. However, its core rectifier components—whether silicon PN junction diodes or Schottky diodes—inherently suffer from forward voltage drop (VF) and reverse recovery losses. Especially in low-voltage, high-current applications, these losses cause severe overheating of the rectifier bridge, resulting in a significant decrease in overall efficiency and limiting further performance improvements.

[0004] To overcome the performance limitations of diodes, existing technologies have introduced schemes that use MOSFETs to replace diodes in the construction of active rectifier bridges. Although MOSFETs have extremely low on-resistance (RDS(on)), which helps reduce conduction losses, their gates require independent drive signals. Traditional active rectification schemes typically rely on dedicated control integrated circuits (ICs) or complex auxiliary power supplies to provide the drive, which not only increases system cost but also enhances circuit complexity.

[0005] Therefore, it is necessary to provide a full-wave rectifier circuit that balances high efficiency and low cost. Utility Model Content

[0006] To address the technical problems of high cost and circuit complexity of existing rectifier circuits, which require reliance on dedicated control integrated circuits (ICs) or complex auxiliary power supplies for driving, this invention provides a low-cost full-wave rectifier circuit.

[0007] A low-cost full-wave rectifier circuit includes a first N-MOS transistor, a second N-MOS transistor, a third N-MOS transistor, a fourth N-MOS transistor, and a first control circuit. The first control circuit includes a first optocoupler and a second optocoupler. Each of the first, second, third, and fourth N-MOS transistors has a built-in parasitic diode. The drain of the first N-MOS transistor is connected to the source of the second N-MOS transistor and to the first terminal of a first AC input terminal. The gate of the first N-MOS transistor is connected to pin 2 of the first optocoupler and to the drain of the third N-MOS transistor. Pin 3 of the first optocoupler is connected to the gate of the second N-MOS transistor. The source of the second N-MOS transistor is also connected to pin 1 of the first optocoupler, and the drain of the second N-MOS transistor is connected to the drain of the fourth N-MOS transistor, with a DC output connection line led out. The gate of the third N-MOS transistor is connected to pin 2 of the second optocoupler and to the first terminal of the first N-MOS transistor. The drains of the first N-MOS transistor are connected; the source of the third N-MOS transistor is connected to the source of the first N-MOS transistor and connected to ground; the drains of the third N-MOS transistor are connected to the source of the fourth N-MOS transistor and connected to the second terminal of the first AC input terminal; the gate of the fourth N-MOS transistor is connected to pin 3 of the second optocoupler; the source of the fourth N-MOS transistor is also connected to pin 1 of the second optocoupler; pins 4 of the first optocoupler and pin 4 of the second optocoupler each lead out a turn-on voltage input terminal; the turn-on voltage input terminal is used to input the turn-on voltage, and then the first control circuit controls the rectifier circuit to convert the AC power input to the first AC input terminal into pulsed DC power and output it; wherein, Vp + Vgs ≤ turn-on voltage, Vp is the peak value of the input AC voltage of the first AC input terminal; Vgs is the turn-on voltage of the first N-MOS transistor, and the turn-on voltages of the first N-MOS transistor, the second N-MOS transistor, the third N-MOS transistor, and the fourth N-MOS transistor are the same.

[0008] Furthermore, it also includes a filter circuit, a fifth N-MOS transistor disposed between the rectifier circuit and the filter circuit, a second control circuit, and a sampling resistor; the second control circuit includes a comparator, the DC output connection line is connected to the comparator and the first terminal of the DC output terminal respectively; the non-inverting input terminal of the comparator is connected to the first terminal of the sampling resistor; the inverting input terminal of the comparator is connected to a reference voltage, and the output terminal of the comparator is connected to the gate of the fifth N-MOS transistor; the second terminal of the sampling resistor is grounded and connected to the source of the fifth N-MOS transistor, and the drain of the fifth N-MOS transistor is connected to ground; the filter circuit includes a filter capacitor connected in parallel across a DC input terminal, the DC input terminal and the DC output terminal are correspondingly disposed; the comparator is used to detect the current on the sampling resistor and compare it with a preset current value, and outputs a high level or low level to control the conduction or cutoff of the fifth N-MOS transistor; the filter capacitor is used to convert the pulsed DC current into smooth DC current.

[0009] Furthermore, the inverting input terminal of the comparator is grounded through resistor R1 and connected to the anode of diode D5 through resistor R2. The anode of diode D5 is also connected to the drain of the second N-MOS transistor through resistor R3, and the cathode of diode D5 is grounded. The positive terminal of the comparator is connected to the drain of the second N-MOS transistor, thereby causing resistors R2 and R3 to divide the voltage to generate the reference voltage.

[0010] Furthermore, the non-inverting input of the comparator is connected to the first end of the sampling resistor through a resistor R4, and a capacitor C7 is connected in parallel with the resistor R1.

[0011] Furthermore, it also includes a voltage doubler rectifier circuit, a BOOST circuit, or a bootstrap circuit for providing the turn-on voltage.

[0012] Preferably, the voltage doubler rectifier circuit includes a first branch and a second branch. The first branch includes a capacitor C1 and a capacitor C2, a diode D1 and a diode D2. The first terminal of capacitor C1 is connected to the first terminal of a second AC input terminal, and the other terminal is connected to the anode of diode D1. The cathode of diode D1 is connected to the first terminal of capacitor C2, and the capacitor C2... The second terminal of the diode D1 is connected to the second terminal of the second AC input terminal; the cathode of the diode D2 is connected to the second terminal of the capacitor C1, and the anode of the diode D2 is connected to the second terminal of the capacitor C2; the cathode of the diode D1 has a first terminal for connection to pin 4 of the first optocoupler; the second branch includes a capacitor C3 and a capacitor C4, a diode and a diode D4; the first terminal of the capacitor C3 is connected to the second terminal of the second AC input terminal, and the other terminal is connected to the anode of the diode D3; the cathode of the diode D3 is connected to the first terminal of the capacitor C4, and the second terminal of the capacitor C4 is connected to the first terminal of the second AC input terminal; the cathode of the diode D4 is connected to the second terminal of the capacitor C3, and the anode of the diode D4 is connected to the second terminal of the capacitor C4; the cathode of the diode D3 has a second terminal for connection to pin 4 of the second optocoupler.

[0013] Preferably, the bootstrap circuit includes a third branch and a fourth branch. The third branch includes a capacitor C5 and a diode D5. The first end of the capacitor C5 is connected to the first end of a second AC input terminal, and the other end is connected to the second end of the second AC input terminal. A third terminal is led out and connected to pin 4 of the first optocoupler. The cathode of the diode D5 is connected to the second end of the capacitor C5, and the anode of the diode D5 is connected to the second end of the second AC input terminal and the third terminal. The third branch includes a capacitor C6 and a diode D6. The first end of the capacitor C6 is connected to the second end of a second AC input terminal, and the other end is connected to the first end of the second AC input terminal. A fourth terminal is led out and connected to pin 4 of the second optocoupler. The cathode of the diode D6 is connected to the second end of the capacitor C5, and the anode of the diode D6 is connected to the second end of the second AC input terminal and the fourth terminal.

[0014] Furthermore, the filter capacitor is a polarized capacitor.

[0015] Furthermore, a resistor R5 is connected in parallel between the source and gate of each of the first N-MOS transistor, the second N-MOS transistor, the third N-MOS transistor, and the fourth N-MOS transistor.

[0016] Furthermore, pins 1 and 2 of the first optocoupler are connected by a resistor R6, and pins 1 and 2 of the second optocoupler are connected by a resistor R7.

[0017] The beneficial effects of this utility model are as follows: This utility model provides a low-cost full-wave rectifier circuit, which uses all N-MOS transistors for rectification. This solves the problems of forward voltage drop and severe heat generation under high current in traditional diode rectification. Furthermore, N-MOS transistors are simpler to manufacture, lower in cost, have lower internal resistance during conduction, higher efficiency, and lower heat generation than P-MOS transistors, making them more suitable for low-voltage, high-current applications. Therefore, it effectively reduces the cost of the rectifier circuit, avoids excessive heat generation under low voltage, high current, and helps improve rectification efficiency and reduce power consumption. Simultaneously, by inputting the conduction voltage, and through the cooperation of the first optocoupler, the second optocoupler, and the rectifier circuit, the corresponding N-MOS transistors are controlled to conduct during the positive and negative half-cycles of the AC current input at the first AC input terminal, respectively. Full-wave rectification timing can be achieved without additional control ICs, converting the AC current input at the first AC input terminal into pulsating DC current for output. The circuit structure is simple, thus helping to reduce circuit production costs and heat generation.

[0018] In addition, the comparator detects the current across the sampling resistor and compares it with a preset value, causing the comparator output to go high or low, controlling the conduction or cutoff of the fifth N-MOS transistor. This charges and discharges the filter capacitor, converting the pulsed DC current into smooth DC current for output. This avoids the severe heat generation and high energy consumption of traditional diode rectifier filter circuits. Furthermore, it eliminates the need for a dedicated controller IC to control the conduction or cutoff of the fifth N-MOS transistor, resulting in a simple control logic structure and the use of a low-cost N-MOS transistor, effectively reducing the cost of rectification and filtering. Simultaneously, when the input AC voltage is lower than the filter capacitor voltage, the current across the sampling resistor is less than the preset value, causing the comparator output to go low, cutting off the fifth N-MOS transistor. This completely blocks the backflow of energy from the filter capacitor to the AC input, preventing damage to the N-MOS transistor and significantly improving rectification and filtering efficiency, thus contributing to lower rectification and filtering costs. Attached Figure Description

[0019] Figure 1 A schematic diagram of the circuit structure of a low-cost full-wave rectifier circuit provided by this utility model; Figure 2 A schematic diagram of the circuit structure of the filter circuit, the second control circuit, the sampling resistor, and the comparator provided by this utility model; Figure 3 A schematic diagram of the circuit structure of the voltage doubler rectifier circuit provided by this utility model; Figure 4 A schematic diagram of the bootstrap circuit provided by this utility model.

[0020] Attached Figure Labels

[0021] 1. Rectifier circuit; 2. First control circuit; 21. First optocoupler; 22. Second optocoupler; 3. Filter circuit; 4. Voltage doubler rectifier circuit; 41. First branch; 42. Second branch; 5. Second control circuit; 6. Sampling resistor; 7. Comparator; 8. First AC input terminal; 9. DC output terminal; 10. DC input terminal; Q1. First N-MOS transistor; Q2. Second N-MOS transistor; Q3. Third N-MOS transistor; Q4. Fourth N-MOS transistor; Q5. Fifth N-MOS transistor; 11. Second AC input terminal; 12. Bootstrap circuit; 121. Third branch; 122. Fourth branch. Detailed Implementation

[0022] To better understand the above-mentioned objectives, features, and advantages of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0023] refer to Figure 1 and Figure 2 As shown, a low-cost full-wave rectifier circuit includes a rectifier circuit 1, a first control circuit 2, a filter circuit 3, and a voltage doubler rectifier circuit 4 or a BOOST circuit for providing the turn-on voltage.

[0024] Specifically, the rectifier circuit 1 includes a first N-MOS transistor Q1, a second N-MOS transistor Q2, a third N-MOS transistor Q3, and a fourth N-MOS transistor Q4. The four N-MOS transistors form a full-bridge rectifier, replacing traditional diodes. Utilizing the low on-resistance characteristic of MOS transistors, the forward voltage drop is significantly reduced, making it suitable for high-current applications.

[0025] The first control circuit 2 includes a first optocoupler 21 and a second optocoupler 22. A fifth N-MOS transistor Q5, a second control circuit 5, and a sampling resistor 6 are also provided between the rectifier circuit 1 and the filter circuit 3. The second control circuit includes a comparator 7.

[0026] Each of the following N-MOS transistors—Q1, Q2, Q3, Q4, and Q5—integrates a parasitic diode. These parasitic diodes within each N-MOS transistor provide basic filtering and isolation functions. They can provide a temporary current path to prevent output interruptions and ensure rectification continuity, and they can also discharge reverse current during input voltage transients to prevent gate-source breakdown of the N-MOS transistors.

[0027] The drain of the first N-MOS transistor Q1 is connected to the source of the second N-MOS transistor Q2, and is also connected to the first terminal of a first AC input terminal 8; the gate of the first N-MOS transistor Q1 is connected to pin 2 of the first optocoupler 21, and is also connected to the drain of the third N-MOS transistor Q3; pin 3 of the first optocoupler 21 is connected to the gate of the second N-MOS transistor Q2; the source of the second N-MOS transistor Q2 is also connected to pin 1 of the first optocoupler 21, and the drain of the second N-MOS transistor Q2 is connected to the drain of the fourth N-MOS transistor Q4, and a DC output connection line is led out.

[0028] The gate of the third N-MOS transistor Q3 is connected to pin 2 of the second optocoupler 22 and to the drain of the first N-MOS transistor Q1; the source of the third N-MOS transistor Q3 is connected to the source of the first N-MOS transistor Q1 and to ground; the drain of the third N-MOS transistor Q3 is connected to the source of the fourth N-MOS transistor Q4 and to the second terminal of the first AC input terminal 8; the gate of the fourth N-MOS transistor Q4 is connected to pin 3 of the second optocoupler 22; the source of the fourth N-MOS transistor is also connected to pin 1 of the second optocoupler.

[0029] Each of the four pins of the first optocoupler 21 and the four pins of the second optocoupler 22 has a conduction voltage input terminal. The conduction voltage input terminal is used to input the conduction voltage, and then the first control circuit 2 controls the rectifier circuit 1 to convert the AC power input from the first AC input terminal 8 into pulse DC power and output it. Wherein, Vp+Vgs≤the turn-on voltage, Vp is the peak value of the input AC voltage at the first AC input terminal 8; Vgs is the turn-on voltage of the first N-MOS transistor Q1, and the turn-on voltages of the first N-MOS transistor Q1, the second N-MOS transistor Q2, the third N-MOS transistor Q3, and the fourth N-MOS transistor Q4 are the same.

[0030] Specifically, when the first AC input terminal 7 is positive relative to the second terminal, meaning the AC current input to the first AC input terminal 7 is in the positive half-cycle, the gate of the first N-MOS transistor Q1 is connected to the second terminal of the first AC input terminal, and its source is connected to ground. Since the gate potential is lower than the source potential, the conduction condition is not met, and therefore the first N-MOS transistor Q1 is turned off. At this time, pin 1 of the first optocoupler 21 is at a positive potential, and pin 2 of the first optocoupler 21 is at a negative potential. Therefore, a positive voltage difference is formed between pins 1 and 2 of the first optocoupler 21. This voltage difference causes the LED inside the first optocoupler 21 to conduct and emit light, thereby activating the output side of the first optocoupler 21. When the LED of the first optocoupler 21 emits light, the phototransistor on the output side conducts, making pins 3 and 4 conduct. Therefore, the turn-on voltage is transferred from pin 4 to pin 3, i.e., applied to the gate of the second N-MOS transistor Q2. At this time, even if the source potential of the second N-MOS transistor Q2 reaches its peak value Vp, the gate voltage (i.e., the turn-on voltage) Vd - Vp ≥ Vgs, thus satisfying the turn-on condition of the second N-MOS transistor Q2. Therefore, the gate voltage of the second N-MOS transistor Q2 is higher than the source voltage, and the second N-MOS transistor Q2 is turned on.

[0031] Simultaneously, the gate of the third N-MOS transistor Q3 is connected to the first terminal of the first AC input, and its source is connected to ground. Since its gate potential is higher than its source potential, the conduction condition is met, and therefore the third N-MOS transistor Q3 is turned on. At this time, pin 2 of the second optocoupler 22 is at a positive potential, and pin 1 of the second optocoupler 22 is at a negative potential, causing the LED inside the second optocoupler 22 to be in a reverse bias state. The LED will not conduct and emit light, so the output side of the second optocoupler 22 cannot be activated, causing the phototransistor on the output side to be in a cutoff state. At this time, pins 3 and 4 of the second optocoupler 22 are in a high impedance state, and the conduction voltage Vd cannot be applied to the gate of the fourth N-MOS transistor Q4 through the second optocoupler 22. The gate does not have a sufficiently high voltage, and the fourth N-MOS transistor Q4 is turned off.

[0032] When the first AC input terminal 7 is negative relative to the second terminal, meaning the AC current input to the first AC input terminal 7 is in the negative half-cycle, the gate of the first N-MOS transistor Q1 is connected to the second terminal of the first AC input terminal 8, and its source is connected to ground. Since the gate potential is higher than the source potential, the first N-MOS transistor Q1 is turned on. At this time, pin 1 of the first optocoupler 21 is at a negative potential, and pin 2 of the first optocoupler 21 is at a positive potential, causing the LED inside the first optocoupler 21 to be in a reverse bias state. The LED will not conduct and emit light, so the output side of the first optocoupler 21 cannot be activated, causing the phototransistor on the output side to be in a cutoff state. At this time, pins 3 and 4 of the first optocoupler 221 are in a high impedance state, and the conduction voltage Vd cannot be applied to the gate of the second N-MOS transistor Q2 through the second optocoupler 22. The gate does not have a sufficiently high voltage, and the second N-MOS transistor Q2 is turned off.

[0033] Simultaneously, the gate of the third N-MOS transistor Q3 is connected to the first terminal of the first AC input, and its source is connected to ground. Since the gate potential is lower than the source potential, the third N-MOS transistor Q3 is turned off. At this time, pin 1 of the second optocoupler 22 is at a positive potential, and pin 2 of the second optocoupler 21 is at a negative potential. Therefore, a positive voltage difference is formed between pins 1 and 2 of the second optocoupler 22. This voltage difference will cause the LED inside the second optocoupler 22 to conduct and emit light, thereby activating the output side of the second optocoupler 22. When the LED of the second optocoupler 22 emits light, the phototransistor on the output side conducts, making pins 3 and 4 conduct. Therefore, the conduction voltage is transmitted from pin 4 to pin 3, that is, applied to the gate of the fourth N-MOS transistor Q4. At this time, even if the source potential of the fourth N-MOS transistor Q4 reaches the peak value Vp, the gate voltage (i.e., the conduction voltage) Vd - Vp ≥ Vgs, thus satisfying the conduction condition of the second N-MOS transistor Q2. Therefore, the gate voltage of the fourth N-MOS transistor Q4 is higher than the source voltage, and the fourth N-MOS transistor Q4 is turned on.

[0034] In summary, during the positive half-cycle, Q2 and Q3 are on, while Q1 and Q4 are off; during the negative half-cycle, Q1 and Q4 are on, while Q2 and Q3 are off. During the positive and negative half-cycles of the AC input at the first AC input terminal 5, the corresponding N-MOS transistors are turned on, converting the AC input at the first AC input terminal 5 into pulsating DC, which is then output through the DC output connection line and connected to the inverting input terminal, positive terminal, and first terminal of the DC output terminal 9 of the comparator 7, thus achieving full-wave rectification timing.

[0035] The negative terminal of the comparator 7 is grounded, and the non-inverting input terminal of the comparator 7 is connected to the first terminal of the sampling resistor 6; the inverting input terminal of the comparator 7 is connected to a reference voltage, and the output terminal of the comparator 7 is connected to the gate of the fifth N-MOS transistor Q5; the second terminal of the sampling resistor 6 is grounded and connected to the source of the fifth N-MOS transistor Q5, and the drain of the fifth N-MOS transistor Q5 is connected to ground.

[0036] The second control circuit controls the on / off state of the fifth N-MOS transistor Q5 connected in reverse according to the current on the sampling resistor 6. When the current on the sampling resistor 6 is less than a preset value, the gate voltage of the fifth N-MOS transistor Q5 increases and it turns on; otherwise, it turns off, thereby realizing the rectification and filtering function.

[0037] The filter circuit 3 includes a filter capacitor 31 connected in parallel across a DC input terminal 10, which is correspondingly positioned to the DC output terminal 9. In this embodiment, the filter capacitor 31 is a polarized capacitor. The pulsed DC current output from the DC output terminal is input to the DC input terminal and then converted into a smooth DC current output by the filter circuit.

[0038] Specifically, when the pulsating DC voltage output by rectifier circuit 1 is higher than the voltage of filter capacitor 21, current flows through rectifier circuit 1, through sampling resistor and DC output terminal 10. Comparator 7 detects that the current on sampling resistor 6 exceeds a preset value, and the voltage drop across sampling resistor 6 increases. At this time, the voltage at the non-inverting input terminal is higher than that at the inverting input terminal, causing the output terminal of comparator 7 to output a high level, which raises the gate voltage of the fifth N-MOS transistor Q5 and turns it on. At this time, pulsed DC power is output and charges filter capacitor 31, raising its voltage to close to the AC peak value. The pulsed DC power is then filtered to output smooth DC power.

[0039] When the pulsating DC voltage output by rectifier circuit 1 is less than the voltage of filter capacitor 21 (for example, at the end of the positive half-cycle, when the energy of filter capacitor 31 is about to flow back to the first AC input terminal 5), comparator 7 detects that the current on sampling resistor 6 is less than a preset value, and the voltage drop of sampling resistor 4 decreases. At this time, the voltage at the non-inverting input terminal is less than that at the inverting input terminal, and the output terminal of comparator 7 outputs a low level, which reduces the gate voltage of the fifth N-MOS transistor Q5, and the fifth N-MOS transistor Q5 is turned off. At this time, the path of energy flow from filter capacitor 31 back to rectifier circuit 1 is cut off, and filter capacitor 31 discharges independently to the DC output terminal. Through its energy storage characteristics, it maintains the smoothness of the output voltage, realizes the filtering function, and outputs smooth DC power; at the same time, it completely blocks the backflow of energy from filter capacitor 31 to the first AC input terminal 8, avoiding damage to the N-MOS transistor by the backflow energy. When the fifth N-MOS transistor Q5 is turned off, the cathode of its built-in parasitic diode is grounded. When the anode potential rises, the cathode potential rises synchronously, causing its parasitic diode to be reverse biased and unable to conduct, thus preventing reverse current and assisting comparator 7 as an alternative to prevent energy backflow.

[0040] Finally, when the pulsating DC voltage output by rectifier circuit 1 rises again (for example, entering the negative half-cycle), the second control circuit detects that the current on sampling resistor 6 exceeds the preset value. At this time, the voltage drop on sampling resistor 6 increases, the output of comparator 7 outputs a high level, the fifth N-MOS transistor Q5 turns on, and a new round of charging and discharging of filter capacitor 31 begins.

[0041] In some embodiments, the BOOST circuit, voltage doubler rectifier circuit, and bootstrap circuit may be selected to input the conduction voltage to the conduction voltage input terminal respectively.

[0042] Preferably, the BOOST circuit is a common switching DC-DC boost circuit that boosts voltage through the periodic switching of a switching transistor. Based on the energy storage characteristics of an inductor, it ensures the output voltage is higher than the input voltage. By setting the BOOST circuit, the input voltage at the second AC input terminal is boosted to meet the required turn-on voltage, which is then input to the turn-on voltage input terminal. This circuit is existing and will not be described in detail here.

[0043] Preferably, refer to Figure 3 As shown, the voltage doubler rectifier circuit 4 includes a first branch 41 and a second branch 42. The first branch 41 includes a capacitor C1 and a capacitor C2, a diode D1 and a diode D2. The first end of the capacitor C1 is connected to the first end of the second AC input terminal 11, and the other end is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the second AC input terminal 11. The cathode of the diode D2 is connected to the second end of the capacitor C1, and the anode of the diode D2 is connected to the second end of the capacitor C2. The diode D1 has a second terminal for connecting to pin 4 of the first optocoupler 21.

[0044] The second branch 42 includes a capacitor C3 and a capacitor C4, a diode and a diode D4; the first end of the capacitor C3 is connected to the second end of the second AC input terminal 11, and the other end is connected to the anode of the diode D3; the cathode of the diode D3 is connected to the first end of the capacitor C4, and the second end of the capacitor C4 is connected to the first end of the second AC input terminal 11; the cathode of the diode D4 is connected to the second end of the capacitor C3, and the anode of the diode D4 is connected to the second end of the capacitor C4; the second terminal led out from the cathode of the diode D3 is used to connect to pin 4 of the second optocoupler 22. In this embodiment, the peak AC voltage output from the second AC input terminal 11 can be equal to the peak AC voltage Vp output from the first AC input terminal 8, so that the voltage doubler rectifier circuit 4 outputs approximately twice the peak voltage Vp as the corresponding input for the conduction voltage.

[0045] Specifically, when the first terminal of the second AC input terminal 11 is positive relative to the second terminal, that is, the AC current input to the second AC input terminal 11 is in the positive half-cycle, D1 is turned on, D2 is turned off, and C1 is charged to near the input peak voltage Vp. At this time, the first P-type transistor Q8 is not triggered and only stores energy. When the first terminal of the second AC input terminal 11 is negative relative to the second terminal, that is, the AC current input to the second AC input terminal 11 is in the negative half-cycle, D2 is turned on, D1 is turned off, and the input voltage and the voltage of C1 are superimposed in series to charge capacitor C2, thereby causing the output voltage to jump to approximately twice the peak voltage Vp and be delivered to pin 4 of the first optocoupler 21, providing energy reserves for the gate drive of Q2. Similarly, after the second branch passes through the positive and negative half-cycles of the second AC input terminal 11, it outputs a voltage value approximately twice the peak voltage Vp to pin 4 of the second optocoupler 22, providing energy reserves for the gate drive of Q4.

[0046] The voltage doubler rectifier circuit 4 has a simple structure. It only needs to work alternately in the positive and negative half-cycles of the second AC input terminal 11 through a capacitor-diode network. It directly uses the AC input energy to generate a high-voltage drive signal with twice the peak voltage. It can make the gate-source voltage of the MOSFETs high without the need for an external power supply or dedicated IC, ensuring that Q2 and Q4 can conduct quickly in the negative half-cycle. This helps to reduce production and usage costs and significantly reduce power consumption.

[0047] Preferably, refer to Figure 4 As shown, the bootstrap circuit 12 includes a third branch 121 and a fourth branch 122. The third branch 121 includes a capacitor C5 and a diode D5. The first end of the capacitor C5 is connected to the first end of a second AC input terminal 11, and the other end is connected to the second end of the second AC input terminal 11. A third terminal is led out and connected to pin 4 of the first optocoupler. The cathode of the diode D5 is connected to the second end of the capacitor C5, and the anode of the diode D5 is connected to the second end of the second AC input terminal. The third branch 122 includes a capacitor C6 and a diode D6; the first end of the capacitor C6 is connected to the second end of a second AC input terminal, the other end is connected to the first end of the second AC input terminal 11, and a fourth terminal is led out and connected to the fourth pin of the second optocoupler 22; the cathode of the diode D6 is connected to the second end of the capacitor C5, and the anode of the diode D6 is connected to the second end of the second AC input terminal 11.

[0048] A bootstrap circuit, also known as a boost circuit, is a circuit structure that uses a combination of components such as diodes, capacitors, and inductors to increase voltage. The bootstrap circuit 12 provided in this application utilizes the alternating positive and negative half-cycles of the AC input at the second AC input terminal 11 to achieve voltage boosting. During the positive AC half-cycle, current flows through C5 and D5 to charge C5, establishing a voltage across its terminals. This voltage on C5 is then superimposed in series with the main DC bus voltage, resulting in a higher voltage at the output terminal, thus meeting the turn-on voltage requirement. During the negative AC half-cycle, the symmetrical branch composed of C6 and D6 operates, charging C6 and similarly superimposing it in series with the main DC voltage. Through the alternating cooperation of these two branches during the positive and negative half-cycles, a stable driving voltage that meets the turn-on voltage requirement is provided for the optocoupler.

[0049] In some embodiments, the inverting input of comparator 7 is grounded through resistor R1, and a capacitor C7 is connected in parallel with resistor R1. The inverting input of the comparator is grounded through resistor R1, and the parallel capacitor C5 forms an RC low-pass filter network to filter out high-frequency noise and enhance the purity of the current sampling signal.

[0050] In some embodiments, the non-inverting input terminal of the comparator 7 is connected in series with a resistor R2 and a resistor R3 and then connected to the drain of the second N-MOS transistor Q2; the resistors R2 and R3 are connected to the anode of a diode D5, and the cathode of the diode D5 is grounded.

[0051] The series resistors R2 and R3 divide the voltage, limiting the current input to comparator 7 by the high voltage signal at the drain of Q2, thus preventing overload damage to comparator 7. The anode of D5 is connected to the voltage divider point of R2 / R3, and the cathode is grounded, forming a negative voltage clamping circuit that can prevent the inverting input of the operational amplifier from breaking down.

[0052] In some embodiments, the non-inverting input of the comparator 7 is connected to the first terminal of the sampling resistor 6 via a resistor R14.

[0053] In some embodiments, a resistor R5 is connected in parallel between the source and gate of the first N-MOS transistor Q1, the second N-MOS transistor Q2, the third N-MOS transistor Q3, and the fourth N-MOS transistor Q4.

[0054] In some embodiments, pins 1 and 2 of the first optocoupler 21 are connected by a resistor R6, and pins 1 and 2 of the second optocoupler 22 are connected by a resistor R7.

[0055] This invention provides a low-cost full-wave rectifier circuit that uses all N-MOS transistors for rectification. This solves the problems of forward voltage drop and severe heat generation in traditional diode rectification. Furthermore, N-MOS transistors are simpler to manufacture and lower in cost than P-MOS transistors. They also have lower internal resistance, higher efficiency, and lower heat generation, making them more suitable for low-voltage, high-current applications. Therefore, this invention effectively reduces the cost of the rectifier circuit, avoids excessive heat generation at low voltage and high current, and helps improve rectification efficiency and reduce power consumption.

[0056] Meanwhile, by inputting the conduction voltage, and through the cooperation of the first optocoupler 21, the second optocoupler 22 and the rectifier circuit 1, the corresponding N-MOS transistors are controlled to conduct during the positive and negative half-cycles of the AC power input at the first AC input terminal 8, respectively. The full-wave rectification timing can be achieved without additional control ICs, and the AC power input at the first AC input terminal 8 can be converted into pulsating DC power and output. The circuit structure is simple, which helps to reduce the production cost of the circuit.

[0057] In addition, by alternating between the positive and negative half-cycles of the first branch 41 and the second branch 43 of the voltage doubler rectifier circuit 4 at the second AC input terminal 11, a high-voltage drive signal with twice the peak voltage can be generated directly using the AC input energy. This eliminates the need for an external power supply or dedicated IC to enable the gate-source voltage of the MOS transistors, ensuring that Q2 and Q4 can be quickly turned on during the negative half-cycle. This helps reduce production and usage costs and significantly reduces power consumption.

[0058] Finally, the comparator 7 detects the current on the sampling resistor 6 and compares it with a preset value, thereby causing the output of the comparator 7 to output a high or low level, controlling the conduction or cutoff of the fifth N-MOS transistor Q5, charging and discharging the filter capacitor 31, thus converting the pulsed DC current into smooth DC current and outputting it. While avoiding the serious heat generation and high energy consumption of traditional diode rectifier filter circuits, it does not require a dedicated controller IC to control the conduction or cutoff of the fifth N-MOS transistor Q5. The control logic structure is simple, and the use of low-cost N-MOS transistors for control effectively reduces the cost of rectification and filtering.

[0059] Meanwhile, when the input AC voltage is less than the filter capacitor voltage, the current on the sampling resistor 6 is less than the preset value, and the output of the comparator 7 is low, which turns off the fifth N-MOS transistor Q5, completely blocking the backflow of energy from the filter capacitor 31 to the AC input terminal, avoiding damage to the N-MOS transistor by the backflow energy, thereby significantly improving the rectification and filtering efficiency and helping to reduce the cost of rectification and filtering.

[0060] In summary, the low-cost full-wave rectifier circuit provided by this utility model features low power consumption, low heat generation, low cost, and high efficiency, and is suitable for use in low-voltage, high-current applications.

[0061] Many specific details are set forth in the following description in order to provide a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.

[0062] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A low-cost full-wave rectifier circuit, characterized in that, It includes a first N-MOS transistor, a second N-MOS transistor, a third N-MOS transistor, a fourth N-MOS transistor, and a first control circuit; The first control circuit includes a first optocoupler and a second optocoupler; the first N-MOS transistor, the second N-MOS transistor, the third N-MOS transistor, and the fourth N-MOS transistor each have a built-in parasitic diode; The drain of the first N-MOS transistor is connected to the source of the second N-MOS transistor and to the first terminal of a first AC input terminal; the gate of the first N-MOS transistor is connected to pin 2 of the first optocoupler and to the drain of the third N-MOS transistor; pin 3 of the first optocoupler is connected to the gate of the second N-MOS transistor; the source of the second N-MOS transistor is also connected to pin 1 of the first optocoupler; the drain of the second N-MOS transistor is connected to the drain of the fourth N-MOS transistor and a DC output connection line is led out. The gate of the third N-MOS transistor is connected to pin 2 of the second optocoupler and to the drain of the first N-MOS transistor; the source of the third N-MOS transistor is connected to the source of the first N-MOS transistor and to ground; the drain of the third N-MOS transistor is connected to the source of the fourth N-MOS transistor and to the second terminal of the first AC input terminal; the gate of the fourth N-MOS transistor is connected to pin 3 of the second optocoupler. The source of the fourth N-MOS transistor is also connected to pin 1 of the second optocoupler; Each of the four pins of the first optocoupler and the four pins of the second optocoupler has a conduction voltage input terminal. The conduction voltage input terminal is used to input the conduction voltage, and then the first control circuit controls the rectifier circuit to convert the AC power input from the first AC input terminal into pulsed DC power and output it. Wherein, Vp + Vgs ≤ turn-on voltage, Vp is the peak value of the input AC voltage at the first AC input terminal; Vgs is the turn-on voltage of the first N-MOS transistor, and the turn-on voltages of the first N-MOS transistor, the second N-MOS transistor, the third N-MOS transistor, and the fourth N-MOS transistor are the same.

2. The low-cost full-wave rectifier circuit according to claim 1, characterized in that, It also includes a filter circuit, a fifth N-MOS transistor disposed between the rectifier circuit and the filter circuit, a second control circuit, and a sampling resistor; the second control circuit includes a comparator, the DC output connection line is connected to the comparator and the first terminal of the DC output terminal respectively; the non-inverting input terminal of the comparator is connected to the first terminal of the sampling resistor; the inverting input terminal of the comparator is connected to a reference voltage, and the output terminal of the comparator is connected to the gate of the fifth N-MOS transistor; The second terminal of the sampling resistor is grounded and connected to the source of the fifth N-MOS transistor, and the drain of the fifth N-MOS transistor is connected to ground; the filtering circuit includes a filter capacitor connected in parallel across a DC input terminal, and the DC input terminal and DC output terminal are correspondingly configured; the comparator is used to detect the current on the sampling resistor and compare it with a preset current value, and outputs a high level or low level to control the conduction or cutoff of the fifth N-MOS transistor; the filter capacitor is used to convert the pulsed DC current into a smooth DC current.

3. The low-cost full-wave rectifier circuit according to claim 2, characterized in that, The inverting input of the comparator is grounded through resistor R1 and connected to the anode of diode D5 through resistor R2. The anode of diode D5 is also connected to the drain of the second N-MOS transistor through resistor R3. The cathode of diode D5 is grounded. The positive terminal of the comparator is connected to the drain of the second N-MOS transistor, thereby causing resistors R2 and R3 to divide the voltage and generate the reference voltage.

4. A low-cost full-wave rectifier circuit according to claim 2, characterized in that, The non-inverting input of the comparator is connected to the first end of the sampling resistor through a resistor R4, and a capacitor C7 is connected in parallel with the resistor R1.

5. A low-cost full-wave rectifier circuit according to claim 1, characterized in that, It also includes a voltage doubler rectifier circuit, a BOOST circuit, or a bootstrap circuit for providing the turn-on voltage.

6. A low-cost full-wave rectifier circuit according to claim 5, characterized in that, The voltage doubler rectifier circuit includes a first branch and a second branch. The first branch includes a capacitor C1 and a capacitor C2, a diode D1 and a diode D2. The first end of the capacitor C1 is connected to the first end of the second AC input terminal, and the other end is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the second AC input terminal. The cathode of the diode D2 is connected to the second end of the capacitor C1, and the anode of the diode D2 is connected to the second end of the capacitor C2. The cathode of the diode D1 has a first terminal for connecting to pin 4 of the first optocoupler. The second branch includes a capacitor C3 and a capacitor C4, a diode and a diode D4; the first end of the capacitor C3 is connected to the second end of the second AC input terminal, and the other end is connected to the anode of the diode D3; the cathode of the diode D3 is connected to the first end of the capacitor C4, and the second end of the capacitor C4 is connected to the first end of the second AC input terminal; the cathode of the diode D4 is connected to the second end of the capacitor C3, and the anode of the diode D4 is connected to the second end of the capacitor C4; the cathode of the diode D3 has a second terminal for connection to pin 4 of the second optocoupler.

7. A low-cost full-wave rectifier circuit according to claim 5, characterized in that, The bootstrap circuit includes a third branch and a fourth branch. The third branch includes a capacitor C5 and a diode D5. The first end of the capacitor C5 is connected to the first end of a second AC input terminal, and the other end is connected to the second end of the second AC input terminal. A third terminal is led out and connected to pin 4 of the first optocoupler. The cathode of the diode D5 is connected to the second end of the capacitor C5, and the anode of the diode D5 is connected to the second end of the second AC input terminal. The third branch includes a capacitor C6 and a diode D6; the first end of the capacitor C6 is connected to the second end of a second AC input terminal, the other end is connected to the first end of the second AC input terminal, and a fourth terminal is led out and connected to pin 4 of the second optocoupler; the cathode of the diode D6 is connected to the second end of the capacitor C5, and the anode of the diode D6 is connected to the second end of the second AC input terminal.

8. A low-cost full-wave rectifier circuit according to claim 2, characterized in that, The filter capacitor is a polarized capacitor.

9. A low-cost full-wave rectifier circuit according to claim 1, characterized in that, A resistor R5 is connected in parallel between the source and gate of each of the first, second, third, and fourth N-MOS transistors.

10. A low-cost full-wave rectifier circuit according to claim 1, characterized in that, The first optocoupler's pins 1 and 2 are connected by a resistor R6, and the second optocoupler's pins 1 and 2 are connected by a resistor R7.

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