FREQUENCY SIGNAL GENERATOR, FREQUENCY MODULATED CONTINUOUS STRIP RADAR SYSTEM AND METHOD FOR GENERATING A FREQUENCY SIGNAL

Abstract

Frequency signal generator (100), comprising: a phase-controlled loop (110) configured to generate and provide a frequency signal (112); a frequency control unit (120) connected to the phase-locked loop and configured to generate a frequency control signal (122), wherein the phase-locked loop (110) is configured to change a frequency of the frequency signal (112) based on the frequency control signal (122); and a fault detection unit (130) configured to receive the frequency control signal (122), detect a fault in the frequency control signal, and provide a fault signal, wherein the fault signal includes information about a detected fault; the fault detection unit (130) includes a comparison unit configured to compare the frequency control signal (122) or comparison information derived from the frequency control signal with a reference comparison signal or reference comparison information; and the fault detection unit (130) includes a hash value generator configured to generate the comparison information by determining characteristic hash values ​​based on the frequency control signal (122).

Description

AREA

[0001] Embodiments relate to the field of electrical signal generation and in particular a frequency signal generator, a frequency-modulated continuous-wave radar system and a method for generating a frequency signal. BACKGROUND

[0002] Electrical signals can be generated in various ways and with a wide range of characteristics. Phase-locked loops (PLLs) are frequently used today for signal generation (e.g., to generate local oscillator signals, clock signals, or carrier signals). For example, in frequency-modulated continuous-wave radar (FMCW) systems, phase-locked loops can be used in combination with voltage-controlled oscillators (VCOs).

[0003] The implementation of new safety standards (e.g., for motor vehicles) also necessitates new safety requirements for electronic systems (e.g., radar systems). Therefore, continuous improvement of the reliability and safety of electronic systems is desirable.

[0004] Publication US 2008 / 0094147 A1 describes: The control word input to a digitally controlled oscillator (DCO) is modified to reduce non-monotonic regions in the DCO's output response. The DCO can be integrated into a phase-locked loop (PLL) to generate an output signal that adapts to either the phase or the frequency of a reference signal input. By modifying the control word input to the DCO to avoid non-monotonic regions in the DCO's output response, the PLL phase noise is reduced. In one embodiment, the control word is modified by rearranging or skipping control word values ​​input to the DCO that correspond to non-monotonic regions in the DCO circuit's output response.

[0005] The publication by C.-M. Hsu, M.Z. Straayer, and M.H. Perrott: A Low-Noise Wide-BW 3.6-GHz Digital ΔΣ Fractional-N Frequency Synthesizer with a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation. In: IEEE Journal of Solid-State Circuits, Vol. 43, Dec. 2008, No. 12, pp. 2776–2786. doi: 10.1109 / JSSC.2008.2005704 deals with a digital PLL with digital noise shaping. SUMMARY

[0006] There is a need to provide an improved concept for a frequency signal generator, a frequency-modulated continuous-wave radar system, and a method for generating a frequency signal.

[0007] This need is met by the subject matter defined in the independent patent claims.

[0008] A frequency signal generator according to one embodiment comprises a controllable oscillator unit, a frequency control unit, and a fault detection unit. The controllable oscillator unit is configured to generate and provide a frequency signal. The frequency control unit is configured to generate a frequency control signal. Furthermore, the controllable oscillator unit is configured to change the frequency of the frequency signal based on the frequency control signal. The fault detection unit is configured to receive the frequency control signal and detect a fault in the frequency control signal. Furthermore, the fault detection unit is configured to provide a fault signal containing information about a detected fault.

[0009] Since the fault detection unit analyzes the frequency control signal, a faulty control or triggering of the controllable oscillator unit by the frequency control signal can be detected very early. Furthermore, such a fault can be detected with minimal effort because the frequency control signal is easier to analyze than the frequency signal generated by the controllable oscillator unit, which often includes very high frequencies. By implementing the proposed fault detection, the reliability of the frequency signal generator and / or the safety of devices using such a generator can be improved.

[0010] In some embodiments, the fault detection unit comprises a comparator and a hash generator. The hash generator is configured to produce characteristic hash values ​​based on the frequency control signal. Furthermore, the comparator is configured to compare these characteristic hash values ​​with reference information or reference hash values. In this way, faults in the frequency control signal can be detected with high probability and low effort.

[0011] Some embodiments relate to a frequency-modulated continuous-wave radar system that includes a frequency signal generator according to the proposed concept.

[0012] Such a radar system can provide high reliability and / or improved safety in use due to the implemented fault detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Some embodiments of devices and / or methods are described below in a purely exemplary manner and with reference to the accompanying drawings, wherein Fig. 1 shows a block diagram of a frequency signal generator; Fig. 2 shows a block diagram of another frequency signal generator; Fig. Figure 3 shows a block diagram of a frequency-modulated continuous-wave radar system; and Fig. Figure 4 shows a flowchart of a procedure for generating a frequency signal. DETAILED DESCRIPTION

[0014] Several exemplary embodiments will now be described in full with reference to the accompanying drawings, which illustrate some of these exemplary embodiments. The thickness of lines, layers, and / or regions may be exaggerated in the drawings for illustrative purposes.

[0015] Although exemplary embodiments allow for various modifications and alternative forms, these embodiments are illustrated in the figures and described in detail here. It should be noted, however, that the intention is not to limit exemplary embodiments to the specific disclosed forms; on the contrary, exemplary embodiments encompass all modifications, equivalents, and alternatives that fall within the scope of protection of the disclosure. Throughout the description of the figures, the same numbers refer to the same or similar elements.

[0016] It should be noted that when an element is described as "connected" or "coupled" to another element, it may be directly connected or directly coupled to the other element, or there may be intermediary elements. Conversely, when an element is described as "immediately connected" or "immediately coupled" to another element, there are no intermediary elements whatsoever. Other words used to describe the relationship between elements are to be interpreted in the same way (e.g., "between" as opposed to "immediately between," "adjacent" as opposed to "immediately adjacent," etc.).

[0017] The terminology used here serves solely to describe specific embodiments and is not to be understood as limiting exemplary embodiments. As used here, the singular forms "a" and "the" also include the plural forms, unless the context indicates otherwise. The terms "comprising," "comprising," "indicates," and / or "indicating" used here refer to the presence of the aforementioned features, integers, steps, processes, elements, and / or components, but do not exclude the presence or addition of one or more further features, integers, steps, processes, elements, components, and / or groups thereof.

[0018] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the meanings generally understood by those skilled in the art in the field to which exemplary embodiments belong. Furthermore, terms, e.g., those defined in commonly used dictionaries, should be regarded as corresponding to their meaning in the context of the relevant field of technology and should not be interpreted in an idealized or overly formal sense, unless expressly stated otherwise herein.

[0019] Fig. Figure 1 shows a block diagram of a frequency signal generator 100 according to one embodiment. The frequency signal generator 100 comprises a controllable oscillator unit 110, a frequency control unit 120, and a fault detection unit 130. The frequency control unit 120 is connected to the controllable oscillator unit 110 and the fault detection unit 130. The controllable oscillator unit 110 generates and provides a frequency signal 112. The frequency control unit 120 generates a frequency control signal 122, and the controllable oscillator unit 110 modifies a frequency of the frequency signal 112 based on the frequency control signal 122. The fault detection unit 130 also receives the frequency control signal 122 and detects a fault (or disturbance or failure) in the frequency control signal 122. Furthermore, the fault detection unit 130 provides a fault signal 132 containing information about a detected fault.

[0020] Since the fault detection unit 130 analyzes the frequency control signal 122, a faulty control or triggering of the controllable oscillator unit by the frequency control signal can be detected very early. Furthermore, such a fault can be detected with minimal effort, as the frequency control signal 122 is easier to analyze than the frequency signal 112 generated by the controllable oscillator unit 110. By implementing the proposed fault detection, the reliability of the frequency signal generator 100 and / or the safety of devices using a proposed frequency signal generator 100 can be improved.

[0021] The frequency signal generator 100 is an electronic device that can generate and provide an electrical signal with specific properties relating to at least one frequency component of the signal. An electrical signal with such properties is the frequency signal 112, which is to be generated by the controllable oscillator unit 110.

[0022] The frequency signal 112 can be an electrical signal with only one time-varying frequency component, or a signal with a multitude of frequency components with different frequency bands, or with one or more different frequencies at the same time, where one or more of the different frequency components can be time-varying. The frequency signal 112 can also be referred to as an oscillator signal, local oscillator signal, clock signal, or carrier signal. Below, the frequency signal 112 can comprise only one frequency component, always with only one frequency at any given time, with low tolerance (e.g., less than 1%, less than 0.1%, or less than 0.01% of the single frequency of the frequency signal), which can be varied based on the frequency control signal 122, although, for example, other frequency signals (e.g., with more frequency components) can also be generated by the frequency signal generator.

[0023] By changing the frequency of the frequency signal 112 based on the frequency control signal 122, the frequency signal 112 can be a digital signal (or an analog signal) and can be frequency-modulated or changed according to a predetermined frequency characteristic or a predetermined frequency ramp (e.g., sawtooth or sine wave). In other words, the frequency signal 112 can be generated, for example, with a controlled, changed signal frequency.

[0024] The controllable oscillator unit 110 can provide such a frequency signal 112 with high accuracy.

[0025] The controllable oscillator unit can be any type of oscillator that can be controlled by a control signal to change the frequency of the signal generated by the oscillator. Optionally, the controllable oscillator unit 110 generates and provides a frequency signal 112 based on the reference frequency signal 102, such that the phase of the frequency signal 112 is aligned with the phase of the reference frequency signal 102. In this example, the controllable oscillator unit can also be referred to as a phase-locked loop unit.

[0026] By using a feedback loop, the controllable oscillator unit can align the phase of the frequency signal 112 with the phase of a reference frequency signal 102. The phase of the frequency signal 112 can be aligned with or adjusted to the phase of the reference frequency signal 102 if the phase of the frequency signal is the same as the reference frequency signal 102 or if it has a predetermined phase shift (e.g., 90°, 120°, 180°, 270°, or any other shift) compared to the phase of the reference frequency signal 102. In this context, a deviation of less than 5°, less than 1°, or less than 0.1° from the predetermined phase can be negligible (e.g., depending on the quality of the controllable oscillator unit).

[0027] The reference frequency signal 102 can be provided by any source of electrical signals (e.g., depending on the device using the frequency signal generator). For example, the frequency signal generator can be used to track a reference frequency signal 102, or it can generate a frequency signal that includes a frequency multiple of the reference frequency signal 102. For example, a reference oscillator, compared to a voltage-controlled oscillator, can generate the reference frequency signal 102 with high accuracy (e.g., a crystal oscillator). This reference frequency signal 102 can be used by the controllable oscillator unit 110 to generate the frequency signal 112 with a frequency multiple of the reference frequency signal 102, so that the frequency signal 112 can also exhibit very accurate frequency response.The reference oscillator can be an external oscillator or part of the frequency signal generator 100.

[0028] The frequency control unit 120 generates a frequency control signal that can control the controllable oscillator unit 110, so that the frequency of the frequency signal 112 is changed according to the frequency control signal 122 (e.g., depending on information, values, or trigger pulses contained in the frequency control signal). This can be done in various ways.

[0029] For example, the frequency control unit 120 can provide the frequency control signal 122 for a variable frequency divider or a variable voltage-controlled oscillator of the controllable oscillator unit 110, which causes a change in the frequency of the frequency signal 112 (e.g., at least the frequency of at least one frequency component of the frequency signal). In this way, the frequency signal 112 can be frequency-modulated, or the frequency of the frequency signal 112 can be changed according to a predetermined frequency characteristic or frequency ramp.

[0030] The fault detection unit 130 can analyze the frequency control signal 122 to detect a fault in the frequency control signal 122. The fault detection unit 122 can be implemented so that it is able to detect at least one of possible fault types with at least a predetermined probability. Depending on the effort required for the fault detection unit 130, the number of detectable fault types and / or the probability of detecting a specific fault type can be higher or lower, so that the effort can be adapted to the desired fault detection capability.

[0031] The fault detection unit 130 also provides a fault signal 132 that indicates detected faults. The information contained in the fault signal 132 simply indicates whether a fault has been detected or not, or it can include more specific information (e.g., information about the fault type, the time of the fault, and / or other fault characteristics).

[0032] The error signal 132 can optionally be used to trigger a warning for a user, trigger error correction mechanisms and / or switch the frequency signal generator to a safe state (e.g. the generated frequency signal is no longer used or is only used for restricted applications with low safety requirements) when the error signal 132 indicates a detected error.

[0033] The controllable oscillator unit 110 can be implemented in various ways. The controllable oscillator unit 110 can be a control system that generates a frequency signal 112 or an output signal whose phase is related to the phase of a reference frequency signal 102 or a reference input signal. The controllable oscillator unit 110 can be an electronic circuit comprising a variable frequency oscillator and a phase detection unit. The phase detection unit can compare the phase of the reference frequency signal 102 with the phase of the frequency signal 112 generated by the variable frequency oscillator and adjust the frequency or phase of the frequency signal 112 generated by the variable frequency oscillator to keep the phases aligned or matched. The signal (e.g.,The alignment deviation signal from the phase detection unit can be used to control the variable frequency oscillator in a feedback loop.

[0034] Frequency is the time derivative of a phase. For example, aligning the phase of the frequency signal with the phase of the reference frequency signal in a locked state can ensure that the frequency of the reference frequency signal and the frequency of the frequency signal are kept in a predetermined ratio.

[0035] Optionally, alternatively, or in addition to one or more of the aspects mentioned above, the controllable oscillator unit 110 can include a frequency divider unit. This frequency divider unit can generate a division frequency signal based on the frequency signal 112 provided by the controllable oscillator unit 110, such that the division frequency signal includes a frequency corresponding to a frequency of the frequency signal 112 provided by the controllable oscillator unit 110 divided by a variable factor (e.g., an integer or a decimal). Furthermore, the frequency divider unit can be able to change the variable factor based on the frequency control signal 122 provided by the frequency control unit 120. The controllable oscillator unit 110 can also change the frequency of the frequency signal 112 based on the division frequency signal generated by the variable factor.In this way, a change in the frequency of the frequency signal 112 can easily be triggered by the frequency control unit 120.

[0036] The frequency divider unit can be implemented in various ways. For example, the frequency divider unit can comprise a variety of different frequency dividers that can be selected by a multiplexer controllable by the frequency control signal 122.

[0037] Optionally, the division frequency signal can be fed back into the frequency control unit 120, allowing the frequency control unit 120 to use the division frequency signal to generate the frequency control signal 122. In other words, the frequency control unit 120 can generate the frequency control signal 122 based on the division frequency signal generated by the frequency divider unit. In this way, deviations from a desired frequency characteristic can be used to control the variation of the variable factor used by the frequency divider unit.

[0038] The frequency divider unit can, for example, be connected to a variable frequency oscillator of the controllable oscillator unit 110 to receive the frequency signal 112, and to a phase detection unit of the controllable oscillator unit 110 to provide the division frequency signal for the phase detection unit.

[0039] As previously mentioned, the controllable oscillator unit 110 can include a phase detection unit. The phase detection unit can generate a misalignment signal based on a comparison of the reference frequency signal 102 and the division frequency signal provided by the frequency divider unit. The misalignment signal can contain information about any deviation in the phase alignment of the frequency signal 112 relative to the phase of the reference frequency signal 102. The misalignment signal can be provided to a variable frequency oscillator of the controllable oscillator unit 110 to correct any deviation in the phase alignment of the signal. This allows the frequency signal 112 to be provided with a very precise predetermined frequency response. Alternatively, the phase detection unit can, for example, generate a similar signal that can be used to control a variable frequency oscillator.

[0040] The controllable oscillator unit 110 can include a variable frequency oscillator implemented in various ways. For example, the variable frequency oscillator can be an analog or a digital oscillator. The controllable oscillator unit 110 can also include a voltage-controlled oscillator. Such an oscillator can change the frequency of an output signal based on a supplied voltage signal. In other words, the voltage-controlled oscillator of the controllable oscillator unit 110 can generate the frequency signal 112, for example, based on the alignment deviation signal provided by the phase detection unit.

[0041] Optionally, in addition to or as an alternative to one or more of the aspects mentioned above, the controllable oscillator unit 110 can include a filter unit. The filter unit can low-pass filter the alignment deviation signal generated by the phase detection unit and provide the filtered alignment deviation signal to the voltage-controlled oscillator to generate the frequency signal 112 based on the filtered alignment deviation signal. In other words, a filter unit can be placed between the phase detection unit and the voltage-controlled oscillator of the controllable oscillator unit 110 to low-pass filter the deviation correction signal that drives the voltage-controlled oscillator. In this way, frequencies of phases occurring in the frequency signal 112 and detected by the phase detection unit can be removed from the alignment deviation signal (e.g., occurring during startup or power-up of the frequency signal generator).

[0042] The frequency control unit 120 can trigger a wide variety of frequency characteristics or frequency modulations of the generated frequency signal 112 by providing a corresponding frequency control signal 122. A currently desired frequency characteristic or frequency modulation can be specified by at least one frequency modulation parameter (e.g., frequency variation rate or frequency variation amplitude). In other words, the frequency control unit 120 can generate the frequency control signal 122 based on at least one frequency modulation parameter, so that the controllable oscillator unit 110 generates the frequency signal 112 with a predetermined frequency characteristic or frequency modulation specified by the at least one frequency modulation parameter.In this way, various predetermined frequency characteristics or frequency modulations of the frequency signal 112 can be provided by the frequency signal generator 100. Alternatively, the frequency signal generator 100 can only generate a frequency signal with a fixed frequency modulation or frequency characteristic, so that the frequency control unit 120 can be implemented with minimal effort (e.g., without a circuit for triggering different modulations by different frequency modulation parameters).

[0043] As already mentioned, the fault detection unit 130 can be implemented in various ways. For example, the fault detection unit 130 can include a comparator unit. The comparator unit can compare the frequency control signal 122 or comparator information derived from the frequency control signal 122 with a reference comparator signal or reference comparator information.

[0044] For example, the comparison unit can compare the frequency control signal 122 with a reference comparison signal represented by a stored version of the frequency control signal (e.g., by an internal or external storage unit). Thus, any error can be detected; however, the required storage space can be very large.

[0045] Alternatively, the fault detection unit can include a second frequency control unit (e.g., corresponding to the first frequency control unit that provides the frequency control signal). This second frequency control unit can generate another frequency control signal, which serves as the reference signal. This second frequency control signal can be generated to match the frequency control signal 122, which is generated by the first frequency control unit 120 when no fault is present. By comparing the frequency control signal 122 with the second frequency control signal, a wide variety of fault types can be detected with a high probability (e.g., a malfunction in one of the frequency control units). However, a fault in the signals driving the frequency control units may not be detected, and the hardware overhead can be significant due to the additional frequency control unit.

[0046] Alternatively, the fault detection unit 130 can include a hash value generator. The hash value generator can produce comparison information by determining characteristic hash values ​​(e.g., a characteristic bit sequence or a matrix of characteristic values) based on the frequency control signal 122. The comparison unit can compare this characteristic hash with reference comparison information to detect a fault in the frequency control signal 122.

[0047] The comparison unit can include reference comparison information that displays reference hash values ​​corresponding to a specific characteristic hash value from a storage unit, or it can calculate such reference hash values ​​according to the specific characteristic hash values ​​based on a predetermined function. Subsequently, the error detection unit 130 can generate the error signal 132, which indicates an error, for example, if the specific characteristic hash values ​​do not correspond to the reference hash values.

[0048] In this way, an error detection mechanism can be implemented with minimal effort and a high probability of error detection. The characteristic hash values ​​can be values ​​determined by the hash value generator based on a corresponding hash function. A hash function is an algorithm that, for example, maps large data sets of variable or fixed length to smaller data sets of fixed length. A hash function is, for example, a mathematical function that maps values ​​from a large domain to a smaller range. An example could be a hash algorithm that divides a binary file into a collection of smaller parts and performs a cumulative exclusive OR operation between successive parts, thereby creating a hash that is smaller than the original data.By changing a single bit in the original message, very different hash values ​​can be generated, making the hash values ​​characteristic of the input data. In other words, the specific characteristic hash values ​​can be characteristic of the frequency control signal 122 provided by the frequency control unit 120. Depending on the complexity of the hash function, a desired error detection probability can be obtained.

[0049] For example, the hash value generator can determine the characteristic hash values ​​based on a periodic redundancy check algorithm (e.g., a CRC16 can provide an error detection probability of over 99.99%) or any other hash algorithm.

[0050] As mentioned previously, a storage unit can optionally store reference hash values ​​corresponding to specific characteristic hash values ​​and provide these reference hash values ​​to the comparison unit. The storage unit can be an internal storage unit of the frequency signal generator 100 or an external storage unit that provides the reference hash values ​​to the frequency signal generator. For example, the storage unit can optionally store a plurality of reference hash values ​​corresponding to a plurality of different predetermined frequency characteristics of the frequency signal 112 to be generated. In this example, the storage unit provides reference hash values ​​of the plurality of reference hash values ​​to the comparison unit based on at least one frequency modulation parameter that indicates a predetermined frequency characteristic from the plurality of different predetermined frequency characteristics.Optionally, this at least one frequency modulation parameter can also be used by the frequency control unit 120 to select a predetermined frequency characteristic or frequency modulation. Thus, the frequency signal generator 100 can be able to provide frequency signals 112 with different frequency characteristics or frequency modulations, selectable by the at least one frequency modulation parameter. Furthermore, fault detection, for example, can be performed independently of the selected frequency characteristic or frequency modulation.

[0051] Fig. Figure 2 shows a block diagram of a frequency signal generator 200 according to one embodiment. In this example, the controllable oscillator unit 110 (PLL) comprises a voltage-controlled oscillator 212 connected to a frequency divider unit 214. The controllable oscillator unit 110 also includes a phase detection unit 216 connected to the voltage-controlled oscillator 212 via a filter unit 218 (e.g., a loop filter). The frequency divider unit 214 divides the frequency of the frequency signal 112 (e.g., PLL output, FMCW) provided by the voltage-controlled oscillator 212 by a variable factor and provides the division frequency signal 215 to the phase detection unit 216 and the frequency control unit 120 (e.g., for fine-tuning or clocking the frequency control unit without affecting the hash values), as mentioned above. Furthermore, the phase detection unit 216 compares the reference frequency signal 102 (e.g.The reference clock is combined with the division frequency signal 215 to generate a tuning deviation signal 217 as mentioned above. The tuning deviation signal 217 is low-pass filtered by the filter unit 218, and the filtered tuning deviation signal 219 is provided to the voltage-controlled oscillator 212. The frequency control unit 120 (e.g., ramp generator) generates a frequency control signal 122 based on the division frequency signal 215 and at least one frequency modulation parameter 224 (e.g., frequency ramp parameter) and provides the frequency control signal 122 to the frequency divider unit 214 of the controllable oscillator unit 110 and the fault detection unit 130. The fault detection unit 130 includes a hash value generator 232 connected to a comparator unit 234.The hash value generator 232 generates characteristic hash values ​​based on the frequency control signal 122, and the comparison unit 234 compares the determined characteristic hash values ​​with the reference hash values ​​235 (e.g. expected hash value) to generate the error signal 132 (e.g. to indicate status or secured state) as mentioned above.

[0052] Optionally, the frequency modulation parameters 224 may also include additional information or parameters (e.g., amplitude information, gain information, or synchronization information) which can also be analyzed by the fault detection unit 130 to detect a fault in these parameters.

[0053] Fig. Figure 2 further shows a possible frequency property or frequency modulation, represented by the frequency-over-time diagram 290 in the upper right corner. In this example, the frequency is controlled in a sawtooth pattern. The frequency increases over a predetermined time interval and is then reduced to the output frequency, followed by a further increase in frequency, and so on. Alternatively, an arbitrary number of other frequency properties or frequency modulations can be generated by a proposed frequency signal generator.

[0054] Some embodiments relate to a device and a method for the safe operation of a frequency ramp generator for a phase-locked loop. Such a concept can be used to verify the correct control or drive of a frequency divider (e.g., the output signals of a ramp unit or a frequency control unit).

[0055] According to one embodiment, the control signals of the frequency divider (output signals of the ramp unit or frequency control unit) are tapped for the entire duration of the process (e.g., ramp sequence) and can be used to calculate the hash values. This hash value can be unique for the required ramp sequence and, if an error occurs in the ramp unit (or frequency control unit), it can deviate from the expected result with a very high probability. The probability depends, for example, on the length of the hash values ​​and the selected method for their calculation. One way to calculate the hash values ​​is to use a periodic redundancy code (CRC).

[0056] In addition to verifying the correct functioning of the ramp unit, the correct control or operation of the ramp unit (e.g., of the frequency ramp parameter or frequency modulation parameter) can also be checked or tested by comparing the calculated hash values ​​with the expected hash value. A deviation may indicate a malfunction in the control or operation of the ramp unit, or a problem with the ramp unit's function itself. The system can be put into a safe state if a deviation is detected.

[0057] For example, correct control of the frequency divider by the ramp unit provides improved operational reliability of the device. The proposed concept can be implemented easily and efficiently to ensure operational reliability. One aspect of this is the use of a hash value generator and a comparison unit.

[0058] For example, a periodic redundancy code CRC16 can be used, which provides, for example, a fault detection probability of more than 99.99%.

[0059] Alternatively, the ramp unit can be implemented redundantly, and the output signals can be compared. However, this does not allow verification of the correctness of the ramp unit's control signals. Optionally, the blocks (circuits) for providing the control signals (e.g., at least one frequency modulation parameter) can also be implemented redundantly or twice.

[0060] By using a proposed device, a phase control loop with improved operational reliability can be provided.

[0061] For example, to generate the frequency modulation required for a frequency-modulated continuous-wave radar (FMCW), a frequency ramp generator (ramp unit or frequency control unit) can be used to control the frequency divider of the PLL's closed-loop system. One function of the ramp unit is, for example, to convert a predetermined or given frequency ramp parameter into a suitable control signal for the frequency divider in the PLL's closed loop.

[0062] Some embodiments relate to a frequency-modulated continuous-wave radar system comprising a frequency signal generator according to the proposed concept or one or more embodiments described above.

[0063] Some embodiments relate to a device for generating a frequency signal. The device comprises a means for generating a frequency signal, a means for controlling a change in the frequency of the frequency signal, and a means for generating an error signal. The means for controlling a change in frequency is connected to the means for generating a frequency signal and the means for generating an error signal. The means for generating a frequency signal generates and provides a frequency signal based on a reference frequency signal such that the phase of the frequency signal is synchronized with the phase of the reference frequency signal. The means for controlling a change in the frequency of the frequency signal generates a frequency control signal, and the means for generating a frequency signal modifies the frequency of the frequency signal based on the frequency control signal.The fault signal generation device also receives the frequency control signal and detects a fault in the frequency control signal. Furthermore, the fault signal generation device provides a fault signal that includes information about a detected fault.

[0064] The device may also include optional features corresponding to one or more aspects mentioned in connection with the proposed concept or one or more embodiments described above.

[0065] Fig. Figure 3 shows a block diagram of a frequency-modulated continuous-wave radar system 300 according to embodiments. The frequency-modulated continuous-wave radar system 300 comprises a frequency signal generator 310 according to the proposed concept or one or more embodiments described above, which is connected to a transceiver 320, and a processor 330, which is connected to the transceiver 320. The frequency signal generator 310 provides a frequency signal 312 to the transceiver 320. The transceiver 320 transmits the frequency signal 322 (e.g., to an area in front of a vehicle). Furthermore, the transceiver 320 is capable of receiving a reflected signal 324 caused by reflection of the frequency signal 322 by an object (e.g., another vehicle in front of the vehicle with the radar system). The reflected signal 324, or a (e.g.,The reflected signal 326, processed by downward conversion, can be provided to the processor 330. The processor 330 can calculate a distance, an angle, or a relative velocity of the object reflecting the transmitted signal 322.

[0066] The frequency signal generator 310 of the frequency-modulated continuous-wave radar system 300 may include one or more further optional features according to one or more aspects mentioned in connection with the proposed concept or one or more embodiments described above.

[0067] Fig.Figure 4 shows a flowchart of a method 400 for generating a frequency signal according to one embodiment. The method 400 comprises generating 410 a frequency signal. The method 400 further comprises generating 420 a frequency control signal and changing 430 a frequency of the frequency signal based on the frequency control signal. In addition, the method 400 comprises detecting 440 a fault in the frequency control signal and providing 450 a fault signal that includes information about a detected fault.

[0068] In this way, a frequency signal with very reliable frequency behavior can be provided.

[0069] Method 400 may include one or more further optional operations corresponding to one or more aspects mentioned in connection with the proposed concept or one or more embodiments described above.

[0070] Embodiments may further provide a computer program that includes program code for performing one of the aforementioned methods when the computer program is executed on a computer or processor. Those skilled in the art would immediately recognize that steps of various methods described above can be performed by programmed computers. Some embodiments are also intended to include program storage devices, such as media for storing digital data that are machine- or computer-readable and encode instruction programs executable by machine- or computer-executable instructions, the instructions performing one or all of the operations of the aforementioned methods. The program storage devices may be, for example, digital storage devices, magnetic storage media such as magnetic disks and magnetic tapes, hard disks, or optically readable digital data storage media.The embodiments are also intended to cover computers programmed to perform the operations of the above-mentioned methods, or (field)programmable logic applications ((F)PLA) or (field)programmable gate arrangements ((F)PGA) programmed to perform the operations of the above-mentioned methods.

[0071] The description and drawings serve solely to illustrate the principles of revelation. It will therefore be evident that experts can devise various arrangements which, although not explicitly described or shown here, embody the principles of revelation and are included within its spirit and scope of protection. Furthermore, all examples presented here are expressly intended, in principle, for educational purposes only, to help readers better understand the principles of revelation and the concepts contributed by the inventor(s) to the advancement of the technology, and are not intended to limit the specifically mentioned examples and circumstances. Moreover, all statements made here concerning principles, aspects, and embodiments of revelation, as well as specific examples thereof, also include equivalents thereof.

[0072] Functional blocks such as "means for" (the execution of a specific function) are to be understood as functional blocks that each comprise circuits configured to perform a specific function. Therefore, "means for something" can also be understood as "means that are configured for something." A means configured to perform a specific function thus does not necessarily imply that such a means will actually perform the function (at any given time).

[0073] The functions of various elements shown in the figures, including functional blocks designated as "means," "means for providing a sensor signal," "means for generating a transmit signal," etc., can be provided by dedicated hardware, such as "signal provision unit," "signal processing unit," "processor," "control unit," etc., as well as by hardware capable of executing software in conjunction with suitable software. Units described herein as "means" can be implemented as "one or more modules," "one or more devices," "one or more units," etc. When provided by a processor, the functions can be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared.The explicit use of the terms "processor" or "control unit" does not refer exclusively to hardware capable of running software and may implicitly include, without limitation, digital signal processing (DSP) hardware, network processors, integrated circuits for specific functions (ASICs), field-programmable gate arrays (FPGAs), read-only memory (ROM) for storing software, instant-access memory (RAM), and non-volatile memory. It may also include other conventional and / or user-specific hardware.

[0074] Experts should be aware that the block diagrams presented here are conceptual views of illustrative circuits that embody the principles of disclosure. Similarly, it should be clear that flowcharts, process diagrams, state transition diagrams, pseudocodes, and the like represent various processes that are essentially depicted in a computer-readable medium and can thus be executed by a computer or processor, regardless of whether such a computer or processor is explicitly shown.

[0075] The following claims are hereby included in the detailed description, each claim being to be considered a separate embodiment. Although each claim is to be considered independent, further embodiments may—even though a dependent claim may refer in the claims to a specific combination with one or more other claims—comprise a combination of the dependent claim with the subject matter claim of the other dependent or independent claim. Such combinations are proposed here, unless it is stated that a specific combination is not provided for. Furthermore, it is provided that features of a claim are also included in other independent claims, even if the claim is not directly dependent on the independent claim.

[0076] It should be noted that methods disclosed in the description or in the claims can be implemented by a device which includes means for carrying out each of the respective operations of these methods.

[0077] Furthermore, it should be noted that the disclosure of several processes or functions disclosed in the description or in the claims need not correspond to any specific order. The disclosure of several processes or functions thus does not restrict them to a particular sequence, unless these processes or functions are not interchangeable for technical reasons. In some embodiments, a single action step may comprise or be divided into several sub-steps. Such sub-steps may be part of the disclosure of the individual step and included therein, unless this is expressly excluded.

Claims

[1] Frequency signal generator (100), comprising: a phase-locked loop (110) configured to generate and provide a frequency signal (112); a frequency control unit (120) connected to the phase-locked loop and configured to generate a frequency control signal (122), wherein the phase-locked loop (110) is configured to change a frequency of the frequency signal (112) based on the frequency control signal (122); and an error detection unit (130) configured to receive the frequency control signal (122), detect an error in the frequency control signal, and provide an error signal, wherein the error signal comprises information about a detected error, wherein the error detection unit (130) comprises a comparison unit configured to compare the frequency control signal (122) or comparison information derived from the frequency control signal with a reference comparison signal or reference comparison information; and wherein the error detection unit (130) comprises a hash value generator configured to generate the comparison information by determining characteristic hash values ​​based on the frequency control signal (122). [2] The frequency signal generator (100) of claim 1, wherein the hash value generator is configured to determine the characteristic hash values ​​based on a periodic redundancy check algorithm. [3] The frequency signal generator (100) according to claim 1 or 2, wherein the comparison unit is configured to receive or calculate reference comparison information indicating hash values ​​corresponding to the determined characteristic hash values. [4] Frequency signal generator (100) according to claim 3, comprising a storage unit configured to store a plurality of reference hash values ​​corresponding to a plurality of different predetermined frequency characteristics of the frequency signal (112) to be generated, wherein the storage unit is configured to provide reference hash values ​​of the plurality of reference hash values ​​to the comparison unit based on at least one frequency modulation parameter indicative of a predetermined frequency characteristic of the plurality of different predetermined frequency characteristics. [5] Frequency signal generator (100) according to one of claims 1 to 4, wherein the error detection unit (130) comprises a further frequency control unit configured to generate a further frequency control signal representing the reference comparison signal. [6] Frequency signal generator (100) according to one of the preceding claims, wherein the phase-locked loop (110) is configured to generate and provide the frequency signal (112) based on a reference frequency signal such that a phase of the frequency signal is aligned with a phase of the reference frequency signal. [7] Frequency signal generator (100) according to claim 6, wherein the phase-locked loop (110) comprises a frequency divider unit configured to generate a division frequency signal based on the frequency signal (112) provided by the phase-locked loop (110), such that the division frequency signal comprises a frequency equal to a frequency of the frequency signal provided by the controllable oscillator unit divided by a variable factor, wherein the frequency divider unit is configured to change the variable factor based on the frequency control signal. [8] The frequency signal generator (100) of claim 7, wherein the frequency control unit (120) is configured to generate the frequency control signal (122) further based on the division frequency signal generated by the frequency divider. [9] Frequency signal generator (100) according to claim 7 or 8, wherein the phase-locked loop (110) comprises a phase detection unit configured to generate an alignment deviation signal based on a comparison of the reference frequency signal and the division frequency signal, wherein the alignment deviation signal comprises information about a deviation of the alignment of the phase of the frequency signal (112) with the phase of the reference frequency signal. [10] The frequency signal generator (100) of claim 9, wherein the phase-locked loop (110) comprises a voltage-controlled oscillator configured to generate the frequency signal (112) based on the trim error signal. [11] Frequency signal generator (100) according to claim 10, wherein the phase-locked loop (110) comprises a filter unit configured to low-pass filter the adjustment error signal generated by the phase detection unit and to provide the adjustment error signal to the voltage-controlled oscillator for generating the frequency signal (112) based on the filtered adjustment error signal. [12] Frequency signal generator (100) according to one of the preceding claims, wherein the frequency control unit (120) is configured to generate the frequency control signal based on at least one frequency modulation parameter, such that the phase-locked loop (110) generates the frequency signal (112) with a predetermined frequency characteristic specified by the at least one frequency modulation parameter. [13] Frequency signal generator (100) according to one of claims 6 to 12, further comprising a reference oscillator configured to generate the reference frequency signal. [14] Frequency signal generator (100) according to one of the preceding claims, which is configured to trigger a switching to a secured state when the error signal indicates a detected error. [15] A frequency modulated continuous wave radar system (300) comprising a frequency signal generator (310) according to any one of claims 1 to 14. [16] A method (400) for generating a frequency signal, the method comprising: generating (410) a frequency signal by a phase-locked loop; generating (420) a frequency control signal by a frequency control unit connected to the phase-locked loop; Changing (430) a frequency of the frequency signal based on the frequency control signal; detecting (440) an error in the frequency control signal; and Providing (450) an error signal comprising information about a detected error. wherein detecting the error comprises comparing the frequency control signal or comparison information derived from the frequency control signal with a reference comparison signal or reference comparison information, wherein the comparison information is generated by determining characteristic hash values ​​based on the frequency control signal.

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