A CIRCUIT ARRANGEMENT AND A METHOD FOR OPERATING A CIRCUIT ARRANGEMENT

Abstract

Circuit arrangement (100) comprising: a driver circuit (101) configured to provide a switching signal (106) to a power switch (104) such that the power switch (104) controls a load current; a gate feedback circuit (103) selectively connected to the driver circuit (101) and the load current; and a diagnostic circuit (102) configured to provide an enable signal (111) that allows the gate back regulation circuit (103) to become active; wherein the enable signal (111) depends at least in part on a condition independent of the load current.

Description

Various aspects relate to a circuit arrangement and a method for operating a circuit arrangement.In circuit arrangements having a power transistor for switching or regulating a current flowing through load, it may be necessary to measure a load current flowing through the power transistor. A sense transistor is provided which is connected to operate at approximately the same source, gate and drain voltage as the power transistor, i.e., the same operating point. The current through the sense transistor is then directly related to the load current; the ratio of the currents through the power and sense transistors is referred to as KILIS ("K"):When operating at exactly the same operating point, K will remain constant. However, due to manufacturing differences, the transistors are not operated at the same operating point. K will have a "scattering width" between a minimum and a maximum value. Since the accuracy of K is important to the circuitry, this spread should be kept within prescribed limits. FIG. 7 illustrates a typical diagnostic behavior of K for a diagnostic current proportional to a load current under various operating conditions. In particular, the maximum and minimum values of K are shown at different load currents, indicating the spread width of K.With gate feedback ("GRR"), the power and sense transistors are operated at a constant drain voltage. It is common to use GRR to improve accuracy at low load currents. The principle is to regulate the drain-source voltage to a constant voltage by reducing the gate voltage.In systems with GRR, sudden activation of a high current load may cause a load stage (i.e., a surge) of sufficient magnitude, resulting in a significant voltage drop across a corresponding module switch. The normal delay in operating GRR during a load stage with such a voltage drop may inadvertently trigger an under-voltage shutdown in a microcontroller. This case is illustrated in FIGS. 8A and 8B, in which a circuit arrangement 800 contains a module 801, a pre-regulator 804, a microcontroller 803 and a load switch 802. If the module 801 is turned on, the current (I OUT in FIGS. 8A and 8B ) may be low so that the module 801 operates in GRR mode. The load switch 802 is turned on causing V OUT to decrease, which takes some time to return to its previous level. Then, an under voltage condition as seen in FIG. 8B may occur.In addition, power consumption can be affected by whether the GRR module is used. This is illustrated in FIG. 9, which compares the power consumption for different currents with and without a GRR module.U.S. Pat. No. 8,471,605 B2 describes a driver circuit having current compensation functionality. The driver circuit includes a controller, a bias resistor, a current switch, and a plurality of driver modules. The control unit is used for generating a control signal comprising at least one bit according to a control current. The bias resistor is used for providing a bias voltage according to a bias current.In one embodiment, circuitry is provided that includes: a driver circuit configured to provide a switching signal to a power switch such that the power switch controls a load current; a gate feedback circuit selectively connected to the driver circuit and the load current; and a diagnostic circuit configured to provide an enable signal that allows the gate feedback circuit to become active. The enable signal depends at least in part on a condition independent of the load current.In one embodiment, circuitry is provided that includes: a plurality of driver circuits, each driver circuit comprising a power switch and configured to provide a switching signal to the power switch such that the power switch controls a respective load current, a gate feedback circuit selectively connected to the plurality of power circuits with the plurality of load currents, and a diagnostic circuit configured to provide an enable signal that allows the gate feedback circuit to become active. The enable signal depends at least on a condition independent of the plurality of load currents.According to further embodiments, methods of operating a circuit arrangement are provided, comprising: applying a load current, providing a gate feedback circuit coupled to the load current, and enabling the gate feedback circuit at least on the basis of a condition independent of the load current.According to various embodiments, a circuit arrangement may include a driver circuit configured to provide a switching signal to a power switch such that the power switch controls a load current, a gate feedback circuit selectively connected to the driver circuit and the load current, and a diagnostic circuit configured to provide an enable signal that allows the gate feedback circuit to become active. The enable signal may depend at least in part on a condition independent of the load current.According to various embodiments, the diagnostic circuit or the driver circuit may be further configured to turn on the enable signal when the diagnostic circuit is active.According to various embodiments, the gate feedback circuit is configured to control a ratio of the load current with respect to a current through the diagnostic circuit.According to various embodiments, the gate feedback circuit may be configured to maintain the ratio between a minimum and a maximum. According to various embodiments, the minimum may be 3500 and the maximum may be 4500.According to various embodiments, the gate feedback circuit may be disabled when the load current exceeds a predetermined threshold.According to various embodiments, the gate feedback circuit may control the drain-source voltage of the switching signal by decreasing the gate voltage of the switching signal.According to various embodiments, the diagnostic circuit or the driver circuit may be configured to turn off the enable signal before increasing the load current.According to various embodiments, the diagnostic circuit or the driver circuit may be configured to turn off the enable signal when the load current exceeds a predetermined threshold value.According to various embodiments, the diagnostic circuit or the driver circuit may be configured to turn on the enable signal for scheduled time periods.According to various embodiments, the diagnostic circuit may be configured to turn on the enable signal in advance until the condition is satisfied.According to various embodiments, the condition may predict a current hop.According to various embodiments, the condition may depend on factors outside the circuit arrangement.According to various embodiments, the diagnostic circuit may be configured to turn on the enable signal based on a predetermined schedule.According to various embodiments, the diagnostic circuit may include multiple input pins.According to various embodiments, one of the plurality of input pins may enable the diagnostic circuit. According to various embodiments, one of the plurality of input pins may select a measurement target.According to various embodiments, the driver circuit may be further configured to turn on the enable signal based on the values of the plurality of input pins.According to various embodiments, the gate feedback circuit may include an operational amplifier.According to various embodiments, the circuit arrangement may further include a compensation signal, wherein the gate feedback circuit is coupled to the compensation signal.According to various embodiments, the circuit arrangement may include an output load coupled to the load current.According to various embodiments, the output load may include multiple loads. According to various embodiments, the plurality of loads may receive different currents.According to various embodiments, one of the plurality of loads may receive a low current and one of the plurality of loads may receive a high current. According to various embodiments, a low current is less than 100 mA and a high current is greater than 1 A.According to various embodiments, the plurality of loads receiving the low current may include a light emitting diode. According to various embodiments, the light emitting diode may be for a display.According to various embodiments, the plurality of loads receiving the high current may include a bulb. According to various embodiments, the bulb may be a headlamp.According to various embodiments, the power switch may be a high voltage switch.According to various embodiments, the power switch may be a low voltage switch.According to various embodiments, the power switch may include a field effect transistor (FET). According to various embodiments, the power switch may comprise a MOSFET. According to various embodiments, the power switch may comprise a bipolar transistor.According to various embodiments, a gate of the power switch may be coupled to the output of the gate feedback circuit.According to various embodiments, the circuit arrangement may further comprise a microcontroller. According to various embodiments, the microcontroller may be coupled to the power switch.According to various embodiments, the diagnostic circuit may include an operational amplifier. According to various embodiments, the operational amplifier may be coupled to the enable signal.According to various embodiments, the circuit arrangement may be an integrated circuit.According to various embodiments, the circuit arrangement may be used in a motor vehicle.According to various embodiments, the circuit arrangement may include a plurality of driver circuits, each driver circuit comprising a power switch and configured to provide a switching signal to the power switch such that the power switch controls a respective load current, a gate feedback circuit selectively connected to the plurality of power circuits and the plurality of load currents, and a diagnostic circuit configured to provide an enable signal that allows the gate feedback circuit to become active. The enable signal depends at least on a condition independent of the plurality of load currents.According to various embodiments, the diagnostic circuit or the driver circuit may be further configured to turn on the enable signal when the diagnostic circuit is active.According to various embodiments, the diagnostic circuit may be configured to select one of the plurality of load currents to collect diagnostic information.According to various embodiments, the circuit arrangement may include a multiplexer coupled to the plurality of load currents.According to various embodiments, the circuit arrangement may comprise at least one multiplexer.According to various embodiments, the at least one multiplexer may be configured to select one of the plurality of load currents.According to various embodiments, the at least one multiplexer may be configured to select a measurement voltage associated with one of the plurality of load currents.According to various embodiments, the at least one multiplexer may be configured to selectively output a measurement voltage associated with one of the plurality of load currents.According to various embodiments, the circuit arrangement may comprise at least one demultiplexer.According to various embodiments, the at least one demultiplexer may be coupled to the enable signal and the plurality of driver circuits.According to various embodiments, the at least one demultiplexer may be configured to selectively output the enable signal to one of the plurality of driver circuits.According to various embodiments, a method for operating a circuit arrangement may comprise: applying a load current; providing a diagnostic circuit coupled to the load current; providing a gate feedback circuit coupled to the load current; and enabling the gate feedback circuit at least on the basis of a condition independent of the load current.In the drawings, like reference numerals refer generally to the same parts throughout the several views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. In the following description, various embodiments will be described with reference to the following drawings. The following are shown: FIG. 1 shows a current measurement circuit arrangement having a driver circuit, a gate feedback circuit and a diagnostic circuit, FIG. 2 shows a circuit arrangement for which current measurement circuitry can be used, FIG. 3 shows current measurement circuitry including a plurality of driver circuits, a gate feedback circuit, and a diagnostic circuit, FIG. 4 shows a current measurement circuit arrangement with a compensation signal, FIG. 5 shows a current measurement circuit arrangement, FIG. 6 shows a method for operating a current measurement circuit arrangement, FIG. 7 shows a typical diagnostic behavior for a parameter K under various operating conditions, FIG. 8A shows a circuit arrangement, FIG. 8B shows a circuit behavior during the operation of a circuit arrangement, FIG. 9 shows the power consumption of a circuit arrangement under various operating conditions.The following detailed description refers to the accompanying drawings, which show by way of illustration specific details and embodiments in which the invention may be practiced. These embodiments will be described in sufficient detail to enable those skilled in the art to practice the invention. Other embodiments may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the invention. The various embodiments are not necessarily mutually exclusive, as some embodiments may be combined with one or more other embodiments to form new embodiments. Various embodiments are described in connection with devices and various embodiments are described in connection with methods, but it should be understood that embodiments described in connection with devices may also be applied to methods and vice versa.The word "exemplary" is used herein to mean "serving as an example, case, or representation.". Any embodiment or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs.The words "coupled" or "connected" used with respect to a first link "coupled" or "connected" to a second link may be used herein to mean that the first link may be "directly mechanically connected" to the second link or "indirectly mechanically connected" to the second link, wherein one or more additional links may be disposed between the first and second links such that the additional link or the more than one additional link provide the physical connection. The words "selectively coupled" or "selectively connected" used with respect to a first link "selectively coupled" to a second link may be used herein to mean that the first link may be "directly selectively connected" to the second link or "indirectly selectively connected" to the second link, wherein one or more additional links may be disposed between the first and second links such that the additional link or the more than one additional link may provide the selective connection.FIG. 1 illustrates a current measurement circuitry 100 having a driver circuit 101 configured to provide a switching signal 106 to a power switch 104 such that the power switch 104 further controls a load current flowing to the output terminal 107. The circuit arrangement 100 also has a diagnostic circuit 102 configured to collect diagnostic information. Diagnostic information may be collected from, for example, a detection switch 105. The circuit arrangement 100 may further include a gate feedback circuit 103, here shown as an operational amplifier, selectively connected to the driver circuit 101 and the load current. The diagnostic circuit 102 may provide an enable signal 111 that allows the gate feedback circuit 103 to become active. In FIG. 1, the enable signal 111 is shown to be generated by a logic block 110 within the driver circuit 101. However, the enable signal 111 may be generated by other components within the circuit arrangement 100, for example by a logic block 109 in the diagnostic circuit 102. In various embodiments, diagnostic circuit 102 may include a sense operational amplifier 115 that may be coupled to an enable signal. The enable signal 111 depends on conditions in the circuit arrangement 100 that are independent of the load current.In one embodiment, diagnostic circuit 102 is configured to turn on enable signal 111 when diagnostic circuit 102 is active. This may occur, for example, when the diagnostic circuit 102 is used to measure the current at the sensing switch 105. In particular, input pins 113 and 114 may be provided, which may activate the diagnostic circuit 102 depending on which signals are applied to the input pins 113 and 114, respectively. For example, the input pin 113 may be a diagnostic enable pin. When turned on, the diagnostic circuit 102 may be turned on, thereby turning on the enable signal 111.When the enable signal 111 is on, the gate feedback switch 103 is allowed to activate, for example, to allow the circuitry 100 to operate in the GRR mode. Enable signal 111 does not necessarily enable gate feedback circuit 103 as other factors may determine whether to do so. For example, the gate feedback circuit 103 may be configured to only activate when the load current is in a predefined range. Conversely, turning off the enable signal 111 may disable the gate feedback circuit 103. In other words, although the enable signal 111 may be coupled to the gate feedback circuit 103, it is necessary, but not sufficient, for the enable signal 111 to be turned on to enable the gate feedback circuit 103.In an embodiment, the sense operational amplifier 115 may be configured to regulate the ratio of the load current to another current in the circuitry. This ratio may be the ratio of the current through the power switch 104 to the current through the sense switch 105, also known as "KILIS", or simply "K".In one embodiment, the sense operational amplifier 115 is configured to maintain the KILISratio between a minimum and a maximum, which may be referred to as the "spread width.". The spread width may be maintained between 3500 and 4500, for example (i.e. the load current is 3500 to 4500 times greater than the current through the sensing switch 105), but the spread width may vary depending on the operating conditions of the circuit arrangement 100.Activation of the gate feedback circuit 103 may allow the circuitry 100 to operate in a gate feedback mode ("GRR" mode). In one embodiment, the gate feedback circuit 103 includes an operational amplifier. The output of the operational amplifier may be coupled to the power switch 104 or the sense switch 105, or both. In another embodiment, the gate feedback circuit 103 may be coupled to the gate, source, or drain electrodes of switches 104, 105. In another embodiment, the gate feedback circuit 103 may be coupled to a compensation signal 425 (as shown in FIG. 4 ). In various embodiments, the drain-source voltage of the power switch 104 is coupled to the input of the gate feedback circuit 103.Several conditions may result in the enable signal 111 being turned on or off. In one embodiment, enable signal 111 is turned on when diagnostic circuit 102 is active and turned off when diagnostic circuit 102 is inactive. This may correspond to the case when the circuit arrangement 100 is used to perform a measurement or to collect diagnostic information. In one embodiment, enable signal 111 may be generated based on multiple input pins 113, 114. For example, if diagnostic enable pin 113 is active, enable signal 111 may then be turned on.In a further embodiment, the enable signal 111 may be turned off before increasing the load current by a certain amount, for example during a "load jump", during which the current increases from a low to a high current within a relatively short time.According to various embodiments, the diagnostic circuit 102 may turn on the enable signal 111 until a condition is met. The condition may be that a fast or sudden increase in current (i.e., a "current step") is imminent anywhere in the circuit arrangement 100. Such a current jump can influence a load current, for example. Thus, the condition can predict relevant circuit characteristics. Enable signal 111 would therefore be turned off until the condition is cleared - for example after the current jump is completed, indicating that GRR mode can be permitted to enable again. In further embodiments, the condition may depend on factors outside the circuit arrangement 100. For example, a connected microcontroller (such as microcontroller 203 shown in FIG. 2) may provide information indicating that enable signal 111 should be turned off.In another embodiment, diagnostic circuit 102 may be configured to enable enable signal 111 based on a predetermined timed schedule. The schedule may indicate, for example, time periods in which a skip current or other adverse condition may not occur. Alternatively, the schedule may indicate time periods in which a measurement is known to be expected or, conversely, may not be expected.In a further embodiment, the enable signal 111 may be turned off when the load current exceeds a threshold value. For example, a threshold value of 2.5 amperes may be used. The detection of a threshold value may be performed by the driver circuit 101 or the diagnostic circuit 102, for example.In a further embodiment, the enable signal 111 may be enabled at scheduled time intervals. For example, regular measurements may be performed with the diagnostic circuit 102 while the enable signal 111 is on. Such a plan could be performed by the diagnostic circuit 102 or the driver circuit 101, for example.The generation of the enable signal 111 may depend on any of the components or conditions in the circuit arrangement 100. At least one of such components or conditions may be independent of the load current. In some embodiments, logic blocks 109, 111 are used to determine whether the enable signal 111 should be turned on or not turned on. As described above, information taken elsewhere in the circuitry 100 - e.g., load current; input pins 112, 113, 114; power switches 104 or sense switches 105; and gate feedback circuit 103 - may be used to set the enable signal 111. In addition, information that has been taken outside the circuit arrangement can be used to set the enable signal 111.The input pins 112, 113, 114 may serve other purposes than turning on the enable signal 111. The input pin 113 may be, for example, a diagnostic enable pin that may enable the diagnostic circuit 102 and / or enable the enable signal 111. The input pin 114 may be a diagnostic select pin, for example, used to specify a channel or component to be measured.The power switch 104, the sense switch 105, and the other switches described herein may be realized as, for example, a transistor, a field effect transistor (FET), a metal oxide semiconductor FET (MOSFET), a power MOSFET, a double diffused MOSFET (DMOS), a junction fat FET (JFET), or a bipolar junction transistor (BJT).In the circuit arrangement 100, the power switch 104 and the detection switch 105 can be designed such that the current through the power switch 104 is a multiple of the current through the detection switch 105. The power switch 104 may be configured as a high voltage switch and a low voltage switch. The sensing switch 105 may also be configured as a high voltage switch or a low voltage switch.In various embodiments, the circuit arrangement 100 may be an integrated circuit. The circuit arrangement 100 may additionally be used in automotive equipment and for testing automotive equipment.FIG. 2 illustrates an example circuit arrangement 200 for which current measurement circuitry 100 may be used. The circuit arrangement 200 may include a module switch 201 and a module 202 coupled between module switch 201 and one or more output loads 206, 207. A microcontroller 203 may be coupled to the module switch 201, the module 202, and / or the power switch 104. The circuit arrangement 200 may further comprise a voltage source 205, such as a battery or other voltage or current source, and a voltage regulator 204 coupled to the microcontroller 203. The voltage regulator 204 may be, for example, a low dropout regulator.The circuitry 200 may have an output load, which in some embodiments may include multiple loads 206, 207. Some or all of these loads may be coupled to an output terminal 107, shown in FIG. 1. In the case of multiple loads, each load may have different power requirements and therefore consume different currents. Some of the loads may receive a low current while others may receive a high current. This disparity may contribute to load jumps as described above. Here, "low" and "high" currents relative to each other can be understood. In some embodiments, a low current may be 100 milliamps or less; a high current may be 1 amp or more. The difference in currents between loads may be due to differences in load types. For example, the load 207 may include a light emitting diode (LED) or a string of LEDs 207 a- 207 cand may receive a low current. The LEDs 207 a- 207 cmay be used for a display, such as in an automotive environment. The load 206 may be, for example, a light bulb or a headlamp for an automobile and require a high current. It should be understood that these examples are illustrative and that the load or loads could be any electronic components.FIG. 3 illustrates a circuit arrangement 300 having a plurality of driver circuits 301 x, 301 ycoupled to respective load currents. Analogous to the circuit arrangement 100 shown in FIG. 1, each driver circuit 301 comprises a power switch 304 and is configured to provide a switching signal 306 to the power switch 304 such that the power switch 304 controls its respective load current. The circuitry 300 may also include a diagnostic circuit 302 configured to collect diagnostic information and a gate feedback circuit 303 selectively coupled to driver circuits 301 x, 301 yand the respective load currents. An enable signal 311, independent of the load currents, allows the gate feedback circuit 303 to become active. The circuit arrangement 300 illustrates an embodiment where the enable signal 311 may be generated by a sensing logic block 309 arranged in the diagnostic circuit 302.In one embodiment, an output multiplexer 321 and a sense multiplexer 322 may be used to select which driver circuit 301 is being measured with which corresponding load current. Output multiplexer 321 may select and channel a respective load current from one of power switches 304 x, 304 yto gate feedback circuit 303. Sense multiplexer 322 may accordingly select the output of one of sense switches 305 x, 305 yand channel it to sense pin 108, for example. A gate demultiplexer 323 may couple the output of the gate feedback circuit 303 to the gate electrodes of one of the power switch 304 xand the sense switch 305 xor the power switch 304 yand the sense switch 305 y. In one embodiment, multiplexers 321, 322 and demultiplexer 323 may be coupled to input pins 113 and 114. For example, the diagnostic select pin 114 may specify which channel of the multiplexer 321, 322 and demultiplexer 323 is selected. This embodiment allows a single diagnostic circuit 302 and a single gate feedback circuit 303 to be used for the circuitry 300.The circuit arrangement 300 is shown with two driver circuits. Multiplexers 321, 322 and demultiplexer 323 can scale the array to accommodate an arbitrary number of inputs 312 x, 312 yand driver circuits 301 x, 301 y. Although the number of driver circuits can be made arbitrarily large (i.e., three or more), the circuit arrangement 300 will still operate adequately with the diagnostic circuit 302 and the gate feedback circuit 303, as described for the case where there are only two driver circuits. Additionally, a reference voltage may be coupled to the input of the gate feedback circuit 303.FIG. 4 illustrates a circuit arrangement with a compensation signal. In the current measurement circuitry 400, a compensation signal 425 is provided that may compensate for the systemic offset of the gate feedback circuit 103 caused by an output current required for driving the current igbrn. The compensation signal 425 may depend on, for example, the topology within an operational amplifier GRR_opamp used in the gate feedback circuit 103. In the circuit arrangement 400, for example, GRR_opamp may be a folded cascode circuit. The compensation signal 425 may be coupled to the gate feedback circuit 103. Circuitry 400 may provide implementation for current measurement circuitry, such as those found in FIGS. 1-3.FIG. 5 illustrates a circuit arrangement without a compensation signal. Current measurement circuitry 500 may provide an implementation for current measurement circuitry such as those found in FIGS. 1-3.FIG. 6 illustrates a flow diagram of a method for operating a circuit arrangement according to various embodiments, such as the circuit arrangements shown in FIGS. 1 and 3. The method 600 may include 601 applying a load current, 602 providing a gate feedback circuit coupled to the load current, and 603 enabling the gate feedback circuit based on at least one condition independent of the load current. The method 600 may further describe the operation of a circuit arrangement having a plurality of load currents, as illustrated in FIG. 3.While the invention has been particularly shown and described with reference to specific embodiments, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. The scope of the invention is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced.

Claims

A circuit arrangement (100) comprising: a driver circuit (101) configured to provide a switching signal (106) to a power switch (104) such that the power switch (104) controls a load current; a gate feedback circuit (103) selectively connected to the driver circuit (101) and the load current; and a diagnostic circuit (102) configured to provide an enable signal (111) that allows the gate feedback circuit (103) to become active; wherein the enable signal (111) depends at least in part on a condition independent of the load current.The circuit arrangement (100) of claim 1, wherein the gate feedback circuit (103) is deactivated when the load current exceeds a predetermined threshold.The circuit arrangement (100) according to claim 1 or 2, wherein the diagnostic circuit (102) is configured to turn off the enable signal (111) before increasing the load current.The circuit arrangement (100) according to any one of claims 1 to 3, wherein the diagnostic circuit (102) is configured to turn off the enable signal (111) when the load current exceeds a predetermined threshold value.The circuit arrangement (100) of any of claims 1 to 4, wherein the diagnostic circuit (102) is configured to turn on the enable signal (111) until the condition is met; optionally wherein the condition predicts a current surge; further optionally wherein the condition depends on factors outside the circuit arrangement (100).The circuit arrangement (100) according to any one of claims 1 to 5, wherein the diagnostic circuit (102) is configured to turn on the enable signal (111) on the basis of a predetermined schedule.The circuit arrangement (100) according to any one of claims 1 to 6, wherein the first circuit is further configured to turn on the enable signal (111) when the diagnostic circuit (102) is active.The circuit arrangement (100) of claim 7, wherein the diagnostic circuit (102) comprises a plurality of input pins; optionally wherein one of the plurality of input pins enables the diagnostic circuit (102); and / or optionally wherein one of the plurality of input pins selects a measurement target.The circuit arrangement (100) of claim 8, wherein the diagnostic circuit (102) is further configured to turn on the enable signal (111) based on the values of the plurality of input pins.The circuit arrangement (100) of any of claims 1 to 9, further comprising: a compensation signal; wherein the gate feedback circuit (103) is coupled to the compensation signal.The circuit arrangement (100) according to any of claims 1 to 10, wherein the operation of the gate feedback circuit (103) is independent of the load current.The circuit arrangement (100) of any of claims 1 to 11, further comprising an output load coupled to the load current; optionally wherein the output load comprises a plurality of loads; further optionally wherein the plurality of loads receive different currents.A circuit arrangement comprising: a plurality of driver circuits, each driver circuit comprising a power switch and configured to provide a switching signal to the power switch such that the power switch controls a respective load current; a gate feedback circuit selectively connected to the plurality of power circuits and the respective load currents; and a diagnostic circuit configured to provide an enable signal that allows the gate feedback circuit to become active; wherein the enable signal depends on at least one condition independent of the load current.The circuitry of claim 13, wherein the circuitry is configured to select one of the load currents to collect diagnostic information.The circuit arrangement of claim 13 or 14, further comprising: at least one multiplexer; wherein the at least one multiplexer is configured to select one of the load currents; wherein optionally the at least one multiplexer is configured to select a measurement voltage associated with one of the load currents; and / or wherein optionally the at least one multiplexer is configured to selectively output a measurement voltage associated with one of the load currents.The circuit arrangement of any of claims 13 to 15, further comprising: at least one demultiplexer, wherein the at least one demultiplexer is coupled to the enable signal and the driver circuits; optionally wherein the at least one demultiplexer is configured to selectively output the enable signal to one of the plurality of driver circuits.A method of operating a circuit arrangement (100), comprising: applying a load current; providing a gate feedback circuit coupled to the load current; and enabling the gate feedback circuit based at least in part on a condition independent of the load current.

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