Video adapter adjustment
The BIOS-driven system automatically sets GPGPU adapters to graphics or computer modes based on display presence, addressing performance optimization challenges and improving resource utilization.
Patent Information
- Application Number
- DE102016109511
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2015-06-04
- Filing Date
- 2016-05-24
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2036-05-24
AI Technical Summary
Existing systems lack efficient methods for managing the operating mode of General Purpose Computing on Graphics Processing Unit (GPGPU) adapters, leading to suboptimal performance and resource utilization.
A system and method that utilizes a Basic Input/Output System (BIOS) to interrogate the presence of a GPGPU adapter, determine its communication with a visual display, and automatically set it to either a graphics mode for enhanced video output or a computer mode for accelerated mathematical operations based on the presence and capabilities of the display.
Enables dynamic mode switching of GPGPU adapters, optimizing performance by ensuring high-resolution graphics or computational efficiency based on display capabilities, thereby enhancing overall system functionality.
Smart Images

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Abstract
Description
background
[0001] The embodiments described herein relate to adapting a video adapter in relation to its functionality. More specifically, the embodiments relate to managing an operating mode of a General Purpose Computing on Graphics Processing Unit (GPGPU) adapter.
[0002] A graphics processing unit (GPU) is an electronic circuit designed to accelerate the generation of images in a frame buffer intended to provide output to a visual display. GPUs are found and used in many computing devices, including, but not limited to, personal computers, game consoles, mobile phones, workstations, embedded systems, etc. In the case of a personal computer, a GPU may be present on a video adapter. A video adapter, also known in the art as a video card, graphics card, graphics circuit board, graphics adapter, etc., is a device connected to the motherboard of the personal computer and interfaces with a visual display to output an image allocation to the visual display.
[0003] Video adapters connect to the motherboard via a motherboard interface (e.g., a computer bus). An example of a computer bus is a Peripheral Component Interconnect, or PCI. Such PCIs include conventional PCI (PCI), enhanced PCI (PCI-X), and PCI Express (PCIe). PCI and PCI-X are sometimes referred to as "parallel PCI," in contrast to the more modern PCIe, which uses a serial lane-based architecture. Video adapters can connect to the visual display via an output interface. Types of output interface include, but are not limited to, Video Graphics Array (VGA), High-Definition Multimedia Interface (HDMI), DisplayPort, Digital Visual Interface (DVI), Separate Video (S-Video), Composite Video, and Component Video.
[0004] From the publication US 2009 / 0027402A1 a method is known for controlling the parallel operation mode of a multi-stage parallel graphics processing system included in a host computer system and having host memory space for storing one or more graphics-based applications and a graphics library for generating graphics commands and data during runtime of the graphics-based application, one or more CPUs for executing the graphics-based applications, a display device for displaying images containing graphics during execution of the graphics-based applications and a multi-stage parallel graphics rendering subsystem that supports multiple modes of parallel operation.
[0005] From the publication US 2005 / 0237327 A1 a computer system is known which comprises an integrated graphics subsystem and a graphics port for connecting an additional graphics subsystem or a loopback card.
[0006] From the publication US 2007 / 0076006A1 a method and a device for automatically determining whether a display is connected to a display interface port is known.
[0007] The publication US 2004 / 0230705A1 describes a Universal Graphics Adapter that encapsulates and abstracts low-level graphics hardware in a standard way via firmware. Summary
[0008] It is an object of the present invention to provide an improved control of the function of a GPGPU adapter.
[0009] This object is solved by the subject matter of main claim 1 and the independent claims 9 and 14, which determine the present invention.
[0010] Preferred embodiments of the present invention are the subject of the subclaims.
[0011] The aspects described herein include a system, a method, and a program product for controlling the function of a GPGPU adapter.
[0012] According to one aspect, a system for managing an operating mode of a GPGPU adapter is provided. The system comprises a computer system. The computer system includes a processing unit operatively coupled to a memory, a video device for outputting the video data, and a basic input / output system (BIOS). The system further includes a GPGPU adapter, a video display, and a tool in communication with the processing unit to control the function of the GPGPU adapter. The tool includes an input / output (I / O) interface. The processing unit is operatively coupled to the I / O interface. The GPGPU adapter and the visual display are in communication with the I / O interface and with the GPGPU adapter via a communication bus. The tool further includes a BIOS for determining the presence of a GPGPU adapter.In particular, the BIOS is configured to interrogate the GPGPU adapter and to automatically set an operating mode of the GPGPU adapter based on data collected during the interrogation. The modes of the GPGPU adapter include a first mode and a second mode. The interrogation includes determining that the GPGPU adapter is in communication with the visual display. The GPGPU adapter is set to a first mode in response to determining that the GPGPU adapter is in communication with the visual display. The GPGPU adapter is automatically set to the second mode if the adapter is not in communication with the visual display.
[0013] According to another aspect, a method for managing an operating mode of a GPGPU adapter is provided. The BIOS determines the presence of a GPGPU adapter. The GPGPU adapter is polled to determine if the GPGPU adapter is in communication with a visual display. An operating mode of the GPGPU adapter is automatically set in response to the polling. The mode of the GPGPU adapter includes a first mode and a second mode. The GPGPU adapter is set to the first mode in response to determining that the GPGPU adapter is in communication with the visual display. The GPGPU adapter is automatically set to the second mode if the adapter is not in communication with the visual display.
[0014] According to yet another aspect, a computer program product is provided for controlling a function of a GPGPU adapter. The computer program product comprises a computer-readable storage device having program code embodied therein. The program code is executable by a processing unit to determine the presence of a GPGPU adapter. Once the presence of the GPGPU adapter is confirmed, the GPGPU adapter is interrogated, including determining whether the GPGPU adapter is in communication with a visual display. An operating mode of the GPGPU adapter is automatically set in response to the interrogation. The mode of the GPGPU adapter includes a first mode and a second mode. The GPGPU adapter is set to the first mode in response to determining that the adapter is in communication with the visual display.The GPGPU adapter is automatically set to the second mode if the adapter is not in communication with the visual display.
[0015] These and other features and advantages will become apparent from the following detailed description of the presently preferred embodiment(s) taken in conjunction with the accompanying drawings. Brief description of several views of the drawings
[0016] The drawings referred to herein form a part of the specification. Features shown in the drawings represent only some embodiments and not all embodiments, unless expressly indicated otherwise. Fig. 1 shows a block diagram illustrating a computer system for controlling the function of a GPGPU adapter according to one embodiment Fig. 2 shows a flowchart illustrating a process for controlling the function of a GPGPU adapter according to one embodiment. Detailed description
[0017] It is readily understood that the components of the embodiments generally described and embodied in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the system and method illustrated in the figures herein is not intended to limit the scope of the embodiments as claimed, but rather to illustrate only selected embodiments.
[0018] References throughout this specification to "a selected embodiment," "a single embodiment," or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the phrases "a selected embodiment," "in a single embodiment," or "in an embodiment" in various places throughout this specification do not necessarily refer to the same embodiment.
[0019] The illustrated embodiments are best understood by reference to the drawings, wherein like parts are designated by like numerals throughout. The following description is intended as an example only and simply illustrates certain selected embodiments of the devices, systems, and processes consistent with the embodiments claimed herein.
[0020] With reference to Fig. 1, a block diagram (100) is provided illustrating an exemplary system for controlling the function of a GPGPU adapter. The system (100) includes a computer system or server (120), also referred to herein as a host. As shown, a GPGPU adapter is provided in communication with the host (120). The GPGPU adapter (140) operates in the first mode to provide enhanced video output to the visual display (190).
[0021] The components of the host (120) include one or more processors, such as a processing unit (110), a memory system (128), and a bus (112) that couples various system components, including system memory (128), to the processing unit (110). As shown, the processing unit (110) is operatively coupled to the system memory (128) via a bus (112). Additionally, the processing unit (110) is operatively coupled to the system memory via the memory bus (114) in parallel with the bus (112). More specifically, the bus (112) represents one or more of any several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, and a processor or local bus using any variety of bus architectures.By way of example and without limitation, such architectures include an Industry Standard Architecture (ISA) bus, an Enhanced ISA (EISA) bus, a Micro Channel Architecture (MCA) bus, a Video Electronics Standard Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus. The host (120) typically includes a variety of computer-readable media. Such media may be any available media accessible by the host (120) and include both volatile and non-volatile media, and removable and non-removable media.
[0022] The memory (128) is shown as a group or collection of one or more volatile or persistent memory components. For example, and in Fig. 1, the memory (128) may include a random access memory (RAM) (130), a cache memory (132), a persistent storage system (134), and a program / utility (150). In one embodiment, the persistent storage system (130) may be located remotely from the host (120), such as in a remote data center. By way of example only, the persistent storage system (134) may be provided for reading and writing a non-volatile magnetic medium, typically referred to as a "hard disk" (not shown). Although not shown, a magnetic hard disk may be provided for reading from and writing to a removable non-volatile magnetic diskette (e.g., a "floppy disk") and an optical disk drive may be provided for reading from and writing to a removable non-volatile optical diskette (e.g., a "CD-ROM"). In such cases, each of the devices may be connected to the bus (112) through one or more data media interfaces.It will also be understood that the components of the memory (128) may be arranged as individual components incorporated into a single device, or arranged in any combination thereof.
[0023] A program / utility (150) is shown herein as being incorporated into the memory (128). The program / utility (150) includes a set of one or more stored program modules (152). Such program modules (152) may include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Any of the operating system, one or more application programs, other program modules, and program data, or some combination thereof, may include execution in a networked environment. Program modules (152) generally perform the functions and methodologies of the embodiments of the invention as described herein.
[0024] A Basic Input / Output System (BIOS) firmware (122), hereinafter referred to as BIOS, is provided in communication with the processing unit (110). The BIOS is a set of computer instructions stored in memory that enable a computer to boot the operating system and communicate with various devices in the system, including, but not limited to, a keyboard, a visual display, persistent storage, serial communications, adapters, etc. In one embodiment, the BIOS 122 is in a non-volatile storage device in communication with the memory (128) to ensure that the BIOS is always available and not subject to corruption associated with a floppy disk failure.Examples of such non-volatile memory devices include, but are not limited to, read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, etc. In one embodiment, the BIOS (122) is a microcontroller that is built into or otherwise in communication with a printed circuit board (PCB).
[0025] As shown, the host (120) is equipped with one or more I / O interfaces, including an I / O interface (170). As is known in the art, the I / O interface (170) enables the host (120) to communicate with external devices. As shown, the I / O interface (170) is operatively coupled to the processing unit (110), and the I / O interface (170) is in communication with the GPGPU adapter (140) via a communication bus (172). The I / O interface (170) is also in communication with the visual display (190). As shown in Fig. 1, the communication bus (172) may be a PCIe bus. It should also be appreciated that the communication bus (172) is not limited to a PCIe bus and may be any type of communication bus that transfers data between the I / O interface (170) and the GPGPU (140), according to the embodiments described herein. Various types of such communication buses are known to those skilled in the art and therefore will not be discussed in further detail.
[0026] The video device (168) is provided in communication with the processing unit (110) and is configured to output video data. In one embodiment, the video device (168) is an application-specific integrated circuit (ASIC) designed to output video data.
[0027] As in Fig. 1, the visual display (190) is in communication with both the GPGPU adapter (140) and a third terminal of the I / O interface (170). In one embodiment, the visual display (190) provides Extended Display Identification Data (EDID) (192) to the GPGPU adapter (140). The visual display (190) is configured to output graphics from the video data output of either the GPGPU adapter (140) or the video device (168). The source of the video data output is determined by the operating mode of the GPGPU adapter (140). More specifically, the GPGPU adapter (140) includes at least two operating modes, including a first mode and a second mode. The first mode refers herein to a graphics mode and the second mode refers herein to a computing mode.While the GPGPU adapter (140) is operating in graphics mode, the visual display (190) receives video data output from the GPGPU adapter (140), and while the GPGPU adapter (140) is operating in computer mode, the visual display (190) receives video data output from the video device (168). Accordingly, the visual display (190) receives video data from one or two different sources, depending on the operating mode of the GPGPU adapter (140).
[0028] The Fig. The system (100) shown in Figure 1 is configured to automatically set the operating mode of the GPGPU adapter (140). A method performed by the system (100) to automatically set the operating mode of the GPGPU adapter (140) is described below with reference to Fig. 2 described.
[0029] As in Fig. 1, the host (120) may include a network adapter (160). As shown, the network adapter (160) communicates with the other components of the host (120) via a bus (162). The network adapter (160) enables the components of the host (120) to communicate with one or more networks, including, but not limited to, a local area network (LAN), a wide area network (WLAN), a private network (e.g., an intranet), or a public network (e.g., the Internet). Examples of the network adapter include, but are not limited to, an Ethernet card, a wireless network adapter (e.g., a Wi-Fi adapter), etc. Data transmitted via the network adapter (160) takes the form of one or more signals, which may be, for example, electronic, electromagnetic, optical, etc. The data is transmitted over a communication path (namely, over a channel).This communication path carries signals and may be implemented using wire or cable, fiber optics, a telephone line, a cellular connection, a radio frequency (RF) connection, any other communication channel, or any combination of the foregoing.
[0030] It is understood that, although not shown, other hardware and / or software components may be used in conjunction with the host (120). Examples include, but are not limited to, microcode, device drivers, redundant processing units, external floppy disk drive arrays, redundant arrays of low-cost hard disk (RAID) systems, tape drives, data archive storage systems, etc.
[0031] The system (100) described above in Fig. 1 has been characterized with tools in the form of components provided for automatically setting the operating mode of a GPGPU adapter. The tools may be embodied in programmable hardware devices, such as a field programmable gate array, programmable array logic, programmable logic devices, and the like. The tools may also be embodied in software for execution by various types of processors. An identified functional unit of executable code may, for example, comprise one or more physical or logical blocks of computer instructions, which may, for example, be organized into an object, an operation, a function, or another construct.Nevertheless, the executable codes of the tools need not be physically located together, but may comprise widespread instructions stored at different locations which, when logically linked together, comprise the tools for achieving the stated purpose of the tools.
[0032] Indeed, the executable code could be a single instruction or many instructions, and may itself be distributed across several different code segments among different applications and across multiple storage devices. Similarly, the operational data identified and illustrated herein may be within the tool and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set or may be distributed across various locations, including across different storage devices, and may exist at least partially as electronic signals on a system or network.
[0033] Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided as examples of means to provide a thorough understanding of the embodiments. However, one of ordinary skill in the art will recognize that the embodiments may be practiced without one or more of the specific details, or with different methods, components, materials, etc. In other instances, structures, materials, or acts are not shown or described in detail to avoid obscuring aspects of the embodiments.
[0034] Now with reference to Fig. 2, a flowchart (200) illustrating a method for controlling the function of the GPGPU adapter as in Fig. 1. The presence of the GPGPU adapter is determined by the BIOS of a computer system or server (namely, the host) (202). This aspect may include scanning a communications bus for the presence of the GPGPU adapter in communication with the communications bus. In one embodiment, the communications bus is a PCIe bus. It will be understood that the embodiments are not limited to a PCIe bus. Other types of communications buses known to those skilled in the art may be used instead, the details of which are not described herein.
[0035] A positive response to the determination at step (202) is followed by a query of the adapter to determine if the adapter is in communication with a visual display (204). However, a negative response to the determination at step (202) terminates the process of controlling the function of the GPGPU adapter because no such adapter has been detected by the BIOS. The positive response to the determination at step (204) is followed by the BIOS reading Extended Display Identification Data (EDID) provided by the visual display (208). In one embodiment, the EDID is encoded with information corresponding to the display capabilities of the visual display. Information encoded within the EDID may include, but is not limited to, resolution data, scan rates, and display size associated with the capabilities of the visual display.
[0036] The GPGPU adapter can operate in multiple modes, including a first mode and a second mode. In one embodiment, the first mode of the GPGPU adapter is also referred to as a graphics mode to output high-resolution video data to provide enhanced viewing of the graphics, and the second mode is also referred to as a computational mode to mathematically accelerate operations while limiting the enhanced viewing of the graphics. In graphics mode, the GPGPU adapter has limited computational capabilities. Similarly, in computational mode, the GPGPU adapter has limited graphics capabilities.
[0037] The GPGPU adapter is automatically set to an operating mode with the setting based on the result of the read at step (208). In another embodiment, automatically setting the GPGPU adapter to an operating mode includes the BIOS automatically reinitializing the GPGPU adapter. More specifically, to ensure that the read has been performed, it is determined at step (210) whether the BIOS has read the EDID information. As shown, a positive response to the determination at step (210) by the BIOS is automatically followed by setting the operating mode of the GPGPU adapter to graphics mode (212). In one embodiment, the resolution of the video data output while the GPGPU adapter is in graphics mode is determined by the EDID information provided by the visual display.In one embodiment, setting the GPGPU adapter to graphics mode causes the BIOS to disable the video ASIC. A negative response to the determination at step (210) is followed by the BIOS setting the GPGPU adapter's operating mode to compute mode (214). During compute mode, the GPGPU adapter uses its computing power to accelerate the performance of mathematical operations. Such mathematical operations include, for example, arithmetic calculations.
[0038] Following step (214) or following a negative response to the determination at step (204) results in the assumption that a GPGPU adapter is not transitioning to use of graphics mode. This assumption is based on the determination that a GPGPU adapter is not detected or that the BIOS was unable to read the EDID information. In either case, the result is an output of video data associated with the video ASIC (206) to display graphics. The resolution of the video data output associated with the video ASIC may be considered a "faulty" resolution of the host. In one embodiment, the video data output by the video ASIC is associated with a lower resolution than the video data output by the GPGPU adapter in graphics mode.
[0039] The procedure used in Fig.2, may be included as a computer-implemented method in the control function of the GPGPU adapter, and more specifically, may control the setting of the operating mode of the GPGPU adapter. The embodiments described herein may be incorporated into a system, method, and / or computer program product. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to perform aspects of the present invention.
[0040] The computer-readable storage medium may be a tangible device capable of retaining and storing instructions for use by an instruction-executing device. The computer-readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination of the foregoing.A non-exhaustive list of more specific examples of a computer-readable storage medium may include the following: a portable computer diskette, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as print cards or raised structures in a groove having instructions recorded thereon, and any other suitable combination of the foregoing.A computer-readable storage medium, as used herein, cannot be interpreted as consisting of transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses traveling through fiber optic cables), or electrical signals transmitted through a wire.
[0041] Computer-readable program instructions described herein can be downloaded to corresponding computers / processing devices from a computer-readable storage medium or an external computer or external storage device over a network, for example, the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computer / processing device receives computer-readable program instructions and forwards the computer-readable program instructions for storage in a computer-readable storage medium within the corresponding computer / processing device.
[0042] Computer-readable program instructions for performing operations of the present invention may be assembly language instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including an object-oriented programming language such as Smalltalk, C++, or the like, and conventional procedural programming languages such as the "C" programming language or similar programming languages. The computer-readable program instructions may be executed entirely on a user's computer, partially on a user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server.In the latter scenario, the remote computer may be connected to a user's computer over any type of network, including a local area network (LAN) or wide area network (WAN), or the connection may be made to an external computer (e.g., through the Internet using an Internet service provider). In some embodiments, electronic circuits, including, for example, programmable logic circuits, field programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), may execute the computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuit and to implement aspects of the present invention.
[0043] Aspects of the embodiments are described herein with reference to flowchart illustrations and / or block diagrams of the methods, apparatus (systems), and computer program products according to embodiments of the invention. It is understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, may be implemented by computer-readable program instructions.
[0044] These computer-readable program instructions may be provided by a processor of a general-purpose computer, a special-purpose computer, and / or other programmable data processing device to produce a machine such that the instructions, which execute via the processor of the computer or other programmable data processing device, produce means for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, a programmable data processing apparatus, and / or other devices to perform functions in a particular manner, such that the computer-readable storage medium having the instructions stored therein comprises an article of manufacture that includes instructions that perform aspects of the functions / acts specified in the flowchart and / or block diagram block or blocks.
[0045] The computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other device to produce a computer-implemented process such that the instructions executing on the computer, other programmable apparatus, or other device perform the functions / actions specified in the flowchart and / or block diagram block or blocks.
[0046] The flowcharts or block diagrams in the figures illustrate architecture, functionality, and operation of possible implementations of the systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of instructions comprising one or more executable instructions for performing the specified logical function(s). In some alternative implementations, the functions occurring in the block may appear out of the order illustrated in the figures. For example, two consecutive blocks may actually execute substantially concurrently, or the blocks may sometimes execute in reverse order, depending on the functionality involved.It should also be noted that each block of the block diagram and / or flowchart illustration, and combinations of the blocks in the block diagram and / or flowchart illustration, may be implemented by special purpose hardware systems that perform the specific functions or actions, or combinations of special purpose hardware and computer instructions.
[0047] The terminology used herein is used only for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It is further understood that the terms "comprise" and / or "comprising," when used in this specification, exclude the presence of fixed features, integers, steps, acts, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, acts, elements, components, and / or groups thereof.
[0048] The corresponding structures, materials, acts, and equivalents of all means or steps plus functional elements in the claims below are intended to encompass any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the embodiments provided herein has been presented for purposes of illustration and description, but is not intended to disclose an exhaustive or limiting list of the invention in this form. Many modifications and variations will become apparent to those skilled in the art without departing from the scope and spirit of the embodiments.The embodiments were chosen and described to best explain the principles of the invention and its practical application, and to enable others of ordinary skill in the art to understand the various embodiments with various modifications as suited to the particular use contemplated. In particular, embodiments were chosen and described to enable one of ordinary skill in the art to automatically set an operating mode of the GPGPU adapter.
[0049] It will be appreciated that although specific embodiments have been described herein for illustrative purposes, various modifications may be made without departing from the spirit and scope of the embodiments. Accordingly, the scope of this invention is limited only by the following claims and their equivalents.
Claims
[1] System (100), comprising: - a computer system (120) comprising a processing unit (110) operatively coupled to a memory (128), a video device (168) for outputting video data, and a basic input / output system (BIOS) (122); - a General Purpose Computing on Graphics Processing Unit (GPGPU) adapter (140); - a visual display (190); and - a tool in communication with the processing unit (110) to control the function of the GPGPU adapter (140), the tool comprising: - an input / output (I / O) interface (170) operatively coupled to the processing unit (110), wherein the GPGPU adapter (140) and the visual display (190) are in communication with the I / O interface (170), and wherein the GPGPU adapter (140) is in communication with the I / O interface (170) via a communication bus; and - the BIOS (122) queries the GPGPU adapter (140) to determine the presence of the GPGPU adapter (140) and automatically sets an operating mode of the GPGPU adapter (140), the mode comprising a first mode and a second mode; - wherein the interrogation comprises determining that the GPGPU adapter (140) is in communication with the visual display (190), and wherein the GPGPU adapter (140) is set to the first mode in response to determining that the GPGPU adapter (140) is in communication with the visual display (190), and is automatically set to the second mode if the GPGPU adapter (140) is not in communication with the visual display (190); and wherein the first mode of the GPGPU adapter (140) is a graphics mode to output video data at a first resolution, and the second mode of the GPGPU adapter (140) is a computational mode to accelerate the mathematical operations, wherein video data is output in the second mode at a second resolution. [2] The system (100) of claim 1, further comprising the BIOS (122) automatically reinitializing the GPGPU adapter (140) to operate in the first mode after reading Extended Display Identification Data (EDID) information provided to the BIOS (122) by the visual display (190). [3] The system (100) of claim 2, further comprising the GPGPU adapter (140) outputting video at a first resolution from the GPGPU adapter (140), and the BIOS (122) turning off the video device (168). [4] The system (100) of claim 3, wherein the on-board video device (168) is a Video Application Specific Integrated Circuit (ASIC). [5] The system (100) of claim 1, further comprising the BIOS (122) setting the GPGPU adapter (140) to the second mode in response to determining that the GPGPU adapter (140) is not in communication with the visual display (190). [6] The system (100) of claim 5, further comprising the video device (168) outputting video data in response to the GPGPU adapter (140) being set to the second mode and the GPGPU adapter (140) performing computations. [7] The system (100) of claim 5, wherein setting the GPGPU adapter (140) to the second mode includes the BIOS (122) automatically reinitializing the GPGPU adapter (140) to operate in the second mode. [8] The system (100) of claim 1, wherein the communication bus is a PCIe bus. [9] Method comprising: - determining (202), by a Basic Input / Output System (BIOS), a presence of a General-Purpose Computing on Graphics Processing Unit (GPGPU) adapter; - querying the GPGPU adapter, including determining (210) that the GPGPU adapter is in communication with a visual display; and - automatically setting (212, 214) an operating mode of the GPGPU adapter, the mode comprising a first mode and a second mode; - wherein the GPGPU adapter is set (212) to the first mode in response to determining that the GPGPU adapter is in communication with the visual display and is automatically set (214) to the second mode when the adapter is not in communication with the visual display, and - wherein the first mode of the GPGPU adapter is a graphics mode to output video data at a first resolution, and the second mode of the GPGPU adapter is a computing mode to accelerate the mathematical operations, wherein video data is output in the second mode at a second resolution. [10] The method of claim 9, further comprising the BIOS automatically reinitializing the GPGPU adapter to operate in the first mode after reading Extended Display Identification Data (EDID) information provided by the visual display. [11] The method of claim 10, further comprising outputting a video at a first resolution from the GPGPU adapter and disabling a video device for outputting video data by the BIOS. [12] The method of claim 9, wherein setting (214) the GPGPU adapter to the second mode further includes the BIOS automatically reinitializing the GPGPU adapter to operate in the second mode. [13] The method of claim 12, further comprising outputting (206) the video associated with the video device and using the GPGPU adapter to perform computations. [14] A computer program product for controlling a function of a General-Purpose Computing on Graphics Processing Unit (GPGPU) adapter, the computer program product comprising a computer-readable storage device having program code embodied therein, the program code being executable by a processing unit for performing a method according to any one of claims 9 to 13.
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