Embedded Computing Device

Abstract

Device comprising: a first processing core configured to generate first control signals and to control a display (230) by providing the first control signals to the display (230) via a first display interface (212); and a second processing core configured to generate second control signals and to control the display (230) by providing the second control signals to the display (230) via a second display interface (222), wherein the first processing core is further configured to cause the second processing core to enter and exit a sleep state based at least in part on a determination by the first processing core regarding an instruction from outside the device, and wherein the device is configured to obtain microphone data internal to the device from a microphone included in the device, wherein the first processing core is configured to cause the second processing core to exit the sleep state in response to a determination that a preconfigured spoken instruction has been recorded in the microphone data, wherein the instruction from outside the device comprises the preconfigured spoken instruction,wherein the first processing core is configured to process the microphone data to identify the spoken instruction from a plurality of possible spoken instructions and to select from a plurality of active states a state into which the second processing core is to be started depending on which spoken instruction was identified by the first processing core in the microphone data, each of the active states having a unique functionality.

Description

FIELD OF THE INVENTION

[0001] The present invention generally relates to, for example, implementing embedded multi-core or multi-chip solutions. BACKGROUND OF THE INVENTION

[0002] Embedded devices generally include objects that contain an embedded computing system encapsulated within the object. The embedded computing system may be designed for a specific application, or the embedded computing system may be designed, at least in part, for a general purpose in the sense that a user may be enabled to install software within it. An embedded computing system may, for example, be based on a microcontroller or microprocessor (CPU).

[0003] Embedded devices may include one or more processors, user interfaces, and displays so that a user can interact with the device using the user interface. The user interface may include buttons, for example. An embedded device may include a connectivity function configured to communicate with a communications network, such as a wireless communications network, for example. The embedded device may be capable of receiving information from such a communications network, for example, regarding a current time and current time zone.

[0004] More complex embedded devices, such as mobile phones, may allow a user to install applications into memory, such as solid-state storage, contained within the device. Embedded devices are often resource-constrained compared to desktop or laptop computers. For example, memory capacity may be more limited than in desktop or laptop computers, processor processing power may be lower, and power may be provided by a battery. The battery, which may be small, may be rechargeable.

[0005] Conserving battery power is a critical consideration in the design of embedded devices. Lower power consumption allows for longer battery intervals. Smartphones, for example, benefit greatly from being able to last a full day before needing to be recharged, as this allows users to charge their phones overnight and enjoy uninterrupted use throughout the day.

[0006] Battery resources can be conserved by throttling a processor clock frequency between a maximum clock frequency and a lower clock frequency, for example, half the maximum clock frequency. Another way to conserve battery power is to cause a display of an embedded device to turn itself off when the device is not in use, since presenting content on a display consumes energy to cause the display to emit light that humans can see. Document US 2014 / 0149754 A1 further discloses reducing the power consumption and processing capacity required to process gesture input for a computer by distributing the management of sensors used to detect the input among different processing components.Document US 2008 / 0158117 A1 further discloses a mobile computing device comprising a power source, a display, a display driver, and a control circuit. The power source is configured to provide a power signal. The display includes a plurality of pixels. The display driver is configured to receive the power signal and control the pixels based on the power signal and the display data. The control circuit is configured to periodically remove the power signal from at least a portion of the display driver. SUMMARY OF THE INVENTION

[0007] The object of the invention is to provide a device with a display that can be converted to a power-saving functionality. The invention is defined by the features of the independent claims. Some specific embodiments are defined in the dependent claims.

[0008] According to a first aspect of the present invention, there is provided an apparatus comprising a first processing core configured to generate first control signals and control a display by providing the first control signals to the display via a first display interface, a second processing core configured to generate second control signals and control the display by providing the second control signals to the display via a second display interface, and wherein the first processing core is further configured to cause the second processing core to enter and exit a sleep state (hibernation state) based at least in part on a determination by the first processing core regarding an instruction from outside the apparatus.

[0009] Various embodiments of the first aspect may include at least one feature from the following list: • the device is configured to receive microphone data internally in the device from a microphone included in the device • the second processing core has an electrical interface with at least one of: cellular communication circuitry, non-cellular wireless communication circuitry, and second wired communication port • the first processing core and the second processing core both have electrical interfaces with a shared random access memory • the first processing core is configured to cause the second processing core to exit the sleep state in response to a determination recorded as a preconfigured spoken instruction in the microphone data, wherein the instruction from outside the device comprises the preconfigured spoken instruction • the first processing core is configured to cause the second processing core to exit the sleep state in response to a determination recorded as a preconfigured auditory control signal in the microphone data, wherein the instruction from outside the device comprises the preconfigured auditory control signal • the first processing core is configured to cause the second processing core to exit the sleep state in response to a determination that a notification is received in the device, the notification requiring a capability of the second processing core, the instruction from outside the device comprising the notification • the second graphics mode includes a reduced map view graphics mode • the first processing core is configured to cause the second processing core to enter a sleep state in response to a determination that a user interface type not supported by the first processing core is no longer requested • the device comprises the display, wherein the display has a first electrical connection to the first display interface in the first processing core and a second electrical connection to the second display interface in the second processing core • the first processing microcontroller and the second processing core are included in a microprocessor, wherein the microcontroller is external to the microprocessor and the microprocessor is external to the microcontroller • the device is configured to store, at least in part, a context of the second processing core in connection with the transition of the second processing core to the sleep state.

[0010] According to a second aspect of the present invention, there is provided a method in a device comprising generating, by a first processing core, first control signals, controlling a display by providing the first control signals to the display via a first display interface, generating, by a second processing core, second control signals, controlling the display by providing the second control signals via a second display interface, and causing the second processing core to enter and exit a sleep state based at least in part on a determination by the first processing core regarding an instruction from outside the device.

[0011] Various embodiments of the first aspect may include at least one feature from the following list: • Obtaining microphone data internally in the device from a microphone contained in the device • the second processing core has an electrical interface with at least one of: cellular communication circuitry, non-cellular wireless communication circuitry, and a second wired communication port • the first processing core and the second processing core are both connected to a shared random access memory via electrical interfaces • the method further comprises causing, by the first processing core, the second processing core to exit the sleep state in response to a determination that a preconfigured spoken instruction was recorded in the microphone data, wherein the instruction from outside the device comprises the preconfigured spoken instruction • the method further comprises causing, by the first processing core, the second processing core to exit the sleep state in response to a determination that a preconfigured auditory control signal was recorded in the microphone data, wherein the instruction from outside the device comprises the preconfigured auditory control signal • the method further comprises causing, by the first processing core, the second processing core to enter the sleep state in response to a determination that a notification has been received in the device, the notification requiring a capability of the second processing core, wherein the instruction from outside the device comprises the notification to exit • the second graphics mode includes a reduced map view graphics mode • the method further comprises causing, by the first processing core, the second processing core to enter the sleep state in response to a determination that a user interface type not supported by the first processing core is no longer requested • the method is carried out in a device comprising the display, wherein the display has a first electrical connection to the first display interface in the first processing core and a second electrical connection to the second display interface in the second processing core • the first processing core and the second processing core are contained in the same integrated circuit • the first processing core is included in a microcontroller and the second processing core is included in a microprocessor, wherein the microcontroller is external to the microprocessor and the microprocessor is external to the microcontroller.

[0012] According to a third aspect of the present invention, a device is provided comprising at least one processing core and at least one memory containing computer program code, wherein the at least one memory and the computer program code are configured to, with the at least one processing core, at least cause the device to generate first control signals from a first processing core, control a display by providing the first control signals to the display via a first display interface, generate second control signals from a second processing core, control the display by providing the second control signals to the display via a second display interface, and cause the second processing core to, based at least in part on a determination by the first processing core regarding an instruction from outside the device,to enter and exit a sleep state.,

[0013] According to a fourth aspect of the present invention, an apparatus is provided comprising means for generating, by a first processing core, first control signals, means for controlling a display by providing the first control signals to the display via a first display interface, means for generating, by a second processing core, second control signals, means for controlling the display by providing the second control signals to the display via a second display interface, and means for causing the second processing core to enter and exit a sleep state based at least in part on a determination by the first processing core regarding microphone data.

[0014] According to a fifth aspect of the present invention, there is provided a non-transitory, computer-readable, non-transitory medium having stored thereon a set of computer-readable instructions that, when executed by at least one processor, cause a device to generate first control signals from at least a first processing core, control a display by providing the first control signals to the display via a first display interface, generate second control signals from a second processing core, control the display by providing the second control signals to the display via a second display interface, and cause the second processing core to enter and exit a sleep mode based at least in part on a determination by the first processing core regarding an instruction from outside the device.

[0015] According to a sixth aspect of the present invention, there is provided a computer program configured, when executed, to cause a method according to the second aspect to be performed. Commercial applicability

[0016] At least some embodiments of the present invention find commercial application in embedded multi-chip or multi-core and power optimizations thereof. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 illustrates an exemplary system capable of supporting at least some embodiments of the present invention; Fig. 2 illustrates a first exemplary apparatus capable of supporting at least some embodiments of the present invention; Fig. 3 illustrates a second exemplary device capable of supporting at least some embodiments of the present invention; Fig. 4 illustrates signaling according to at least some embodiments of the present invention; Fig. 5 is a first flowchart of a first method according to at least some embodiments of the present invention, and Fig. 6 is a state transition diagram according to at least some embodiments of the present invention. DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

[0017] Equipping an embedded device with two or more processor cores, at least some of which are capable of controlling the device's display, enables power savings where a less capable processor core is configured to transition a more capable processor core into and out of a sleep state. For example, a sleep state may include setting a clock frequency of the more capable processor core to zero. In a sleep state, in addition to or alternatively to setting the clock frequency of the more capable processor core to zero, a memory refresh rate of memory used by the more capable core may be set to zero. As an alternative to zero, a low non-zero frequency may be used for the clock frequency and / or the memory refresh rate.In some embodiments, a more capable core may employ a higher-density memory technology, such as double data rate memory (DDR), and a less capable processing core may employ a lower-density memory technology, such as static random access memory (SRAM). In a sleep state, the processor core in the sleep state, or more generally, the processing unit, may be turned off. Alternatively, in some embodiments, an entire processor may enter a sleep state. One benefit of putting an entire processor into a sleep state is that circuitry in the processor outside the core is also put into a sleep state, further reducing power consumption.

[0018] Fig. 1 illustrates an exemplary system capable of supporting at least some embodiments of the present invention. The exemplary system in Fig. 1 includes the device 110, which may include an embedded device such as a smartwatch, personal health monitor, mobile phone, smartphone, or other suitable device, for example.

[0019] Device 110 is in the example in Fig. 1 is configured with a plurality of communication interfaces. A first communication interface enables the device 110 to receive satellite positioning information from satellite constellations 140 via a satellite link 114. Examples of suitable satellite positioning constellations include the Global Positioning System, GPS, GLONASS, Beidou, and the Galileo satellite positioning constellation.

[0020] A second communication interface enables device 110 to communicate with a cellular communication system, such as a Wideband Code Division Multiple Access (WCDMA) or a Long Term Evolution Network (LTE). A cellular link 112 may be configured to communicate information between device 110 and base station 120. Cellular link 112 may be configured according to the same cellular communication standard that device 110 and base station 120 support. Base station 120 may be included in a cellular radio access network comprising a plurality of base stations. Base station 120 may be arranged to communicate with core network node 150 via link 125. Core network node 155 may comprise, for example, a switch, a mobility management entity, or a gateway.Core network node 150 may be arranged to communicate with another network 170, such as the Internet, for example, via connection 157.

[0021] A third communication interface enables device 110 to communicate with a non-cellular communication system, such as a wireless local area network (WLAN), Bluetooth, or a Worldwide Interoperability for Microwave Access (WiMAX) system, for example. Another example is an inductive underwater communication interface. A non-cellular connection 113 may be configured to communicate information between device 110 and access point 130. The non-cellular connection 113 may be configured according to the same non-cellular technology that device 110 and access point 130 support. Access point 130 may be arranged to communicate with gateway 160 via connection 136. Gateway 160 may be arranged to communicate with further network 170 via connection 167. Each of connections 125, 157, 136, and 167 may be wired or at least partially wireless.Not all of these connections need to be of the same type. In certain embodiments, the first communication interface, the second communication interface, and / or the third communication interface are missing.

[0022] A fourth communication connection may enable device 110 to communicate with a mobile device. For example, a low-power wireless interface may enable communication with a mobile device when device 110 does not have cellular capability and a mobile device other than device 110 has cellular capability. An example of a low-power wireless interface is Bluetooth Low Energy (BLE), or Bluetooth Smart.

[0023] In use, device 110 may use satellite position information from satellite constellation 140 to determine a geolocation of device 110. The geolocation may be determined, for example, in terms of coordinates. Device 110 may be configured to display, on a display that may be included in device 110, a map with the determined geolocation of device 110 displayed thereon. For example, device 110 may display a street or a map of surrounding features with an icon indicating the current location of device 110 on the map. Providing a map with a current location of device 110 displayed thereon and / or providing navigation instructions may be referred to as a mapping service.

[0024] In some embodiments, device 110 may provide connectivity services to the user, such as web browsing, instant messaging, and / or email, for example. Device 110 may be configured to provide a connectivity service to its features and / or applications, which in some embodiments includes enabling remote access to these features and / or services via a network, such as the Internet. Device 110 may therefore be trackable via the Internet, for example. Such connectivity services may run via bidirectional communication links, such as cellular link 112 and / or non-cellular link 113, for example. Device 110 may generally provide a service to the user via a display, such as a mapping service or a connectivity service, for example.

[0025] Device 110 may include two or more processing units. The two or more processing units may each include a processing core. Each processing unit may include one or more uniform or heterogeneous processor cores and / or different volatile and non-volatile memories. For example, device 110 may include a microprocessor having at least one processing core and a microcontroller having at least one processing core. The processing cores do not have to be of the same type; for example, a processing core in a microcontroller may have more limited processing capability and / or a less capable memory technology than a processing core included in a microprocessor.In some embodiments, a single integrated circuit includes two processing cores; a first one with less processing capability and lower power consumption, and a second one with greater processing capability and higher power consumption. In general, a first one of the two processing units may have less processing capability and consume less power, and a second one of the two processing units may have greater processing capability and consume more power. Each of the processing units may be capable of controlling the display of device 110. The more capable processing unit may be configured to provide a richer visual experience via the display. The less capable processing unit may be configured to present a reduced visual experience via the display.An example of a reduced visual experience is a reduced color representation mode as opposed to a rich color representation mode. Another example of a reduced visual experience is one that is black and white. An example of a richer visual experience is one that uses color. Colors can be represented with 16 bits or 24 bits, for example.

[0026] Each of the two processing units may include a display interface configured to communicate with the display. For example, if the processing units include a microprocessor and a microcontroller, the microprocessor may include transceiver circuitry connected to at least one metallic pin beneath the microprocessor, wherein the at least one metallic pin is electrically connected to an input interface of a display controller. The display controller, which may be included in the display, is configured to cause the display to present information in response to electrical signals received at the display controller.Likewise, in this example, the microcontroller may include transceiver circuitry connected to at least one metallic pin beneath the microcontroller, wherein the at least one metallic pin is electrically connected to an input interface of a display controller. The display controller may include two input interfaces, one connected to each of the two processing units, or alternatively, the display controller may include a single input interface to which both processing units are capable of providing input via their respective display interfaces. A display interface in a processing unit may therefore include transceiver circuitry that enables the processing unit to transmit electrical signals to the display.

[0027] One of the processing units, for example, the less capable or the more capable, may be configured to at least partially control the other processing unit. The less capable processing unit, for example, a less capable processing core, may be capable of causing the more capable processing unit, for example, a more capable processing core, to transition into or out of a sleep state. These transitions may be caused to occur by signaling via an inter-processing unit interface, such as an inter-core interface.

[0028] When transitioning from an active state to a sleep state, the transitioning processing unit may store at least part of its context into memory, such as pseudo-static random access memory (PSRAM), SRAM, FLASH, or ferroelectric RAM (FRAM), for example. The context may include, for example, the contents of registers and / or addressing. When transitioning from a sleep state using context stored in memory, a processing unit may resume processing more quickly and / or from a position the processing unit was in when it was placed into the sleep state. In this way, any delay experienced by a user may be minimized. Alternative terms sometimes used for context include state / status and image.In a sleep state, a clock frequency of the processing unit and / or associated memory may be set to zero, meaning the processing unit is turned off and not consuming power. Circuitry configured to provide operating power to at least one processing unit may include, for example, a power management integrated circuit (PMIC). Since device 110 already includes another processing unit, the processing unit in the sleep state may be completely turned off while maintaining the usability of device 110.

[0029] When transitioning from a sleep state to an active state, the clock frequency of the processing unit transitioning to the sleep state may be set to a non-zero value. The processing unit transitioning to the sleep state may read a context from memory, where the context may comprise a previously stored context, for example, a context stored in association with the transition to the sleep state, or the context may comprise a default state or context of the processing unit stored in memory in the factory. The memory may comprise, for example, pseudo-static memory, SRAM, FLASH, and / or FRAM. The memory used by the processing unit transitioning to and from the sleep state may comprise, for example, DDR memory.

[0030] With a processing unit in a sleep state, the non-sleep processing unit can control device 110. The non-sleep processing unit can control the display via the display interface in the non-sleep processing unit. For example, if a less capable processing unit has caused a more capable processing unit to enter the sleep state, the less capable processing unit can provide a reduced user experience, for example, at least partially via the display. An example of a reduced user experience is a mapping experience with a reduced visual experience that includes a black and white rendering of the mapping service.The reduced experience may be sufficient for the user to derive benefit, with the advantage that battery power is conserved by the sleep state of the more capable processing unit. In some embodiments, a more capable processing unit, such as a microprocessor, might consume one milliampere of current when not in a low-power sleep state, while a less capable processing unit, such as a microcontroller, might consume only one microampere when not in a low-power sleep state. In non-sleep states, the power consumption of the processing units may be modified by setting an operating clock frequency to a value between a maximum clock frequency and a minimum non-zero clock frequency.In at least some embodiments, processing units, for example, less capable processing units, may be configurable to enter a power-saving mode for short periods, such as 10 or 15 microseconds, before being woken up. In the context of this document, this is not described as a sleep state, but as an active low-power configuration. An average clock frequency calculated over several such periods and the intervening active periods is a positive non-zero value. A more capable processing unit may be capable of, for example, executing the Android operating system.

[0031] Trigger events for causing a processing unit to enter the sleep state include a user indicating that a non-reduced experience is no longer required, that a communication interface of the processing unit is no longer required, and that device 110 has not been used for a predetermined period of time. An example of an indication that a non-reduced experience is no longer required is when the user deactivates a full version of an application, such as a mapping application. Trigger events for causing a processing unit to enter the sleep state may include a user indicating that a non-reduced experience is required, requesting a communication interface of the processing unit, and interacting with device 110 after a period of inactivity.Alternatively or additionally, external events may be configured as trigger events, such as events based on sensors included in device 110, for example. An example of such an external event is a clock-based event configured to occur at a preconfigured time of day, such as an alarm clock function, for example. In at least some embodiments, the non-reduced experience includes using a graphics mode that the non-sleep processing unit cannot support, but that the sleep processing unit can support. A graphics mode may include, for example, a combination of resolution, color depth, and / or refresh rate.

[0032] In some embodiments, a user need or request for the non-reduced experience may be predicted. Such a prediction may be based at least in part on a user's usage pattern, such as when the user tends to perform a particular action in the reduced experience before requesting the non-reduced experience. In this case, in response to a determination that the user performs the particular action in the reduced experience, the non-reduced mode may be triggered.

[0033] If the processing units are located in separate devices or enclosures, such as a wrist-mounted computer and a handheld device or a rigidly mounted display device, for example, a bus can be implemented wirelessly using a wireless communication protocol. Radio transceiver units functionally connected to their respective processing units could thus perform the function of the bus, forming a personal area network (PAN). The wireless communication protocol can be one used for communication between computers and / or between distributed sensors, such as Bluetooth LE or the proprietary ANT+ protocol. These use direct-sequence spread spectrum (DSSS) modulation techniques, or an adaptive isochronous network configuration, respectively.Enabling descriptions of the necessary hardware for various wireless implementations are available, for example, in the Texas Instrument® Wireless Connectivity Handbook, which contains IC circuits and associated hardware configurations for protocols operating in sub-1 and 2.4 GHz frequency bands, such as ANT™, Bluetooth®, Bluetooth® Low Energy, RFID / NFC, PurePath™ Wireless audio, ZigBee®, IEEE 802.15.4, ZigBee RF4CE, 6LoWPAN, WiFi®.

[0034] The PAN can be kept operational in conjunction with the sleep state by the non-sleep processing unit, so that when the sleep state ends, the processing unit exiting the sleep state can have access to the PAN without having to re-establish it.

[0035] In some embodiments, microphone data in a first processor is used to determine whether a second processor should be awakened. The first processor may be less capable and consume less power than the second processor. For example, the first processor may comprise a microcontroller and the second processor may comprise a microprocessor. The microphone data may be compared with reference data and / or preprocessed to identify features in the microphone data that enable the determination of whether a spoken instruction was spoken and recorded in the microphone data. Alternatively, or in addition to a spoken instruction, the microphone data may be searched for an auditory control signal, such as a fire alarm or short tone signal.

[0036] In response to the first processor detecting the spoken instruction and / or auditory control signal in the microphone data, the first processor may launch the second processor. In some embodiments, the first processor launches the second processor into a state selected by the first processor depending on which spoken instruction and / or auditory signal was in the microphone data. For example, if the spoken instruction identifies a web search engine, the second processor may launch into a user interface of that particular web search engine. As another example, if the auditory control signal is a fire alarm, the second processor may launch into a user interface of an application that provides emergency instructions to the user.Selecting the initial state for the second processor already in the first processor saves time compared to the case where the user or the second processor itself selects the state.

[0037] In cases where a microphone is included in the device, the microphone may, in particular, be enclosed within a waterproof housing. While such a housing may prevent the generation of high-quality microphone data, it may allow the generation of a microphone quality sufficient for the first processor to determine whether the spoken instructions and / or the audible control signal are present.

[0038] In some embodiments, the first processor is configured to process a notification arriving at the device and decide whether the second processor is needed to handle the notification. The notification may, for example, relate to a multimedia message or an incoming video call. The notification may relate to a software update presented to the device, wherein the first processor may cause the second processor to exit the sleep state to handle the notification. The first processor may, depending on the notification, select an initial state in which the second processor boots from the sleep state. For a period of a software update, the second processor may cause the first processor to enter a sleep state.

[0039] Generally, the device may receive an instruction from outside the device, and the first processor may, in response, cause the second processor to exit the sleep state. The instruction from outside the device may include, for example, the notification, the spoken instruction, or the auditory control signal.

[0040] Fig. 2 illustrates a first exemplary device capable of supporting at least some embodiments of the present invention. The illustrated device includes a microcontroller 210 and a microprocessor 220. Microcontroller 210 may, for example, include a Silabs EMF32 or a Renesas RL78 microcontroller or the like. Microprocessor 220 may, for example, include a Qualcomm Snapdragon processor or an ARM Cortex-based processor. Microcontroller 210 and microprocessor 220 are shown in the example in Fig. 2 communicatively connected to an inter-core interface, which may, for example, comprise a serial or parallel communication interface. More generally, an interface arranged between microcontroller 210 and microprocessor 220 may be considered an inter-processing unit interface.

[0041] Microcontroller 210, in the illustrated example, is communicatively coupled to a buzzer 270, a Universal Serial Bus (USB) interface 280, a pressure sensor 290, an accelerometer 2100, a gyroscope 2110, a magnetometer 2120, satellite position circuitry 2130, a Bluetooth interface 2140, user interface buttons 2150, and a touch interface 2160. Pressure sensor 290 may, for example, comprise an atmospheric pressure sensor.

[0042] Microprocessor 220 is communicatively connected to an optional cellular interface 240, a non-cellular interface 250, and a USB interface 260. Microprocessor 220 is further communicatively connected to display 230 via microprocessor display interface 222. Microcontroller 210 is also communicatively connected to display 230 via microcontroller display interface 212. Microprocessor display interface 222 may include communication circuitry included in microprocessor 220. Microcontroller display interface 212 may include communication circuitry included in microcontroller 210.

[0043] Microcontroller 210 may be configured to determine whether trigger events occur, and microcontroller 210 may be configured to, in response to the trigger events, cause microprocessor 220 to enter and exit the sleep state described above. When microprocessor 220 is in the sleep state, microcontroller 210 may control display 230 via microcontroller display interface 222. Thus, when microprocessor 220 is in the sleep state, microcontroller 210 may provide a reduced experience to a user, for example, via display 230.

[0044] Microcontroller 210 may, in response to a trigger event, cause microprocessor 220 to transition from the sleep state to an active state. For example, if a user indicates, for example, via buttons 2150, that they wish to establish a cellular communication connection, microcontroller 210 may cause microprocessor 220 to transition to an active state, since cellular interface 240 is controllable by microprocessor 220, but in the example in Fig. 2 is not directly usable by microcontroller 210. In some embodiments, when microprocessor 220 is in a sleep state, cellular interface 240 is also in a sleep state. Cellular interface 230 may include an electrical interface, for example, to a cellular transceiver. Cellular interface 240 may include control circuitry of a cellular transceiver.

[0045] In various embodiments, at least two of the Fig. 2 may be integrated on the same integrated circuit. Microprocessor 220 and microcontroller 210 may, for example, be arranged as processing cores in the same integrated circuit. Where this is the case, cellular interface 240 may, for example, be a cellular interface of this integrated circuit, included in this integrated circuit, wherein cellular interface 240 is controllable by microprocessor 220 but not by microcontroller 210. In other words, individual hardware functions of the integrated circuit may be controllable by microcontroller 210 or by microprocessor 220, but not by both. On the other hand, some hardware functions may be controllable by either processing unit.For example, in such an integrated embodiment, USB interface 206 and USB interface 280 may be one and the same USB interface of the integrated circuit that is controllable by each processing core.

[0046] In Fig. 2 further illustrates memory 2170 and memory 2180. Memory 2170 is utilized by microprocessor 220 and may be based on a DDR memory technology, such as DDR2 or DDR3, for example. Memory 2180 is utilized by microcontroller 210 and may be based on SRAM technology, for example.

[0047] Fig. 3 illustrates a second exemplary device capable of supporting at least some embodiments of the present invention.

[0048] Device 300 is illustrated, which may be, for example, an embedded device 110 in Fig. 1. Device 300 includes processor 310, which may, for example, comprise a single- or multi-core processor, wherein a single-core processor comprises one processing core and a multi-core processor comprises more than one processing core. Processor 310 may, for example, be the processor shown in Fig. 2, except for display 230. Processor 310 may include more than one processor or processing unit. Processor 310 may include at least one application-specific integrated circuit (ASIC). Processor 310 may include at least one field-programmable gate array (FPGA). Processor 310 may be means for performing method steps in device 300. Processor 310 may be configured, at least in part by computer instructions, to perform actions.

[0049] Device 300 may include memory 320. Memory 320 may include random access memory and / or persistent memory. Memory 320 may include volatile and / or non-volatile memory. Memory 320 may include at least one RAM chip. Memory 320 may include, for example, magnetic, optical, and / or holographic memory. Memory 320 may be at least partially accessible to processor 310. Memory 320 may be means for storing information. Memory 320 may include computer instructions that processor 310 is configured to execute.If computer instructions configured to cause processor 310 to perform particular actions are stored in memory 320, and device 300 as a whole is configured to run under the direction of processor 310 using computer instructions from memory 320, processor 310 and / or at least one processing core may be considered configured to perform the particular actions. Memory 320 may be at least partially contained within processor 310. Memory 320 may be at least partially external to device 300 but accessible to device 300.

[0050] Device 300 may include a transmitter 330. Device 300 may include a receiver 340. Transmitter 330 and receiver 340 may be configured to transmit and receive information, respectively, in accordance with at least one cellular or non-cellular standard. Transmitter 330 may include more than one transmitter. Receiver 340 may include more than one receiver. Transmitter 330 and / or receiver 340 may be configured to operate, for example, in accordance with the Global System for Mobile Communication (GSM), Wideband Code Division Multiple Access (WCDMA), Long Term Evolution (LTE), IS-95, Wireless Local Area Network (WLAN), Ethernet, and / or Worldwide Interoperability for Microwave Access (WiMAX) standards. Transmitter 330 and / or receiver 340 may communicate, for example, via cellular interface 240, non-cellular interface 250, and / or USB interface 280 in Fig. 2 be controllable.

[0051] Device 300 may include a near field communication (NFC) transceiver 350. NFC transceiver 350 may support at least one NFC technology, such as NFC, Bluetooth, Wi-Fi, or similar technologies.

[0052] Device 300 may include a user interface (UI) 360. UI 360 may include a display, a keyboard, a touchscreen, a vibrator arranged to signal a user by causing device 300 to vibrate, a speaker, and / or a microphone. User input in UI 360 may be pattern-based, such as when a user shakes device 300 to initiate actions via UI 360, for example. A user may be able to operate device 300 via UI 360, for example, to answer incoming phone calls, to initiate phone calls or video calls, to browse the internet, to manage digital files stored in storage 320 or in the cloud, which may be accessed via transmitter 330 and receiver 340, or via NFC transceiver 350, and / or to play games. For example, UI 360 can convert 2150 keys and 230 displays into Fig. 2 include.

[0053] Device 300 may include or be arranged to include a user identity module 370. User identity module 370 may include, for example, a Subscriber Identity Module (SIM) card installable within device 300. User identity module 370 may include information for identifying a registration of a user of device 300. User identity module 370 may include cryptographic information that may be used to verify the identity of a user of device 300 and / or to enable encryption of communicated information and billing of the user of device 300 for communications conducted via device 300.

[0054] Processor 310 may be equipped with a transmitter arranged to output information from processor 310 via electrical lines internal to device 300 to other devices included in device 300. Such a transmitter may comprise a serial bus transmitter arranged, for example, to output information via at least one electrical line to memory 320 for storage therein. Alternatively to a serial bus, the transmitter may comprise a parallel bus transmitter. Likewise, processor 310 may comprise a receiver arranged to receive in processor 310 information via electrical lines internal to device 300 from other devices included in device 300. Such a receiver may comprise a serial bus receiver arranged, for example, to receive information via at least one electrical line from receiver 340 for processing in processor 310.As an alternative to a serial bus, the receiver may include a parallel bus receiver.

[0055] Device 300 may include other devices that are Fig. 3 are not illustrated. For example, if device 300 comprises a smartphone, it may include at least one digital camera. Some devices 300 may include a rear-facing camera and a forward-facing camera, with the rear-facing camera being for digital photography and the forward-facing camera being for video telephony. Device 300 may include a fingerprint sensor arranged to at least partially authenticate a user of device 300. In some embodiments, device 300 lacks at least one of the devices described above. For example, some devices 300 do not include an NFC transceiver 350 and / or a user identity module 370.

[0056] Processor 310, memory 320, transmitter 330, receiver 340, NFC transceiver 350, UI 360, and / or user identity module 370 may be interconnected internally within device 300 in a variety of different ways by electrical lines. For example, each of the aforementioned devices may be separately connected internally within device 300 to a master bus to enable the devices to exchange information. However, as one skilled in the art will understand, this is only an example, and depending on the embodiment, various ways of interconnecting at least two of the aforementioned devices may be chosen without departing from the scope of the present invention.

[0057] Fig. Figure 4 illustrates signaling according to at least some embodiments of the present invention. From left to right, the vertical axes show user interfaces UI, processing unit PU1, processing unit 2 PU2, and finally display DISP. Time progresses from top to bottom. Processing unit 2 may have higher processing capability and be associated with higher power consumption than processing unit 1.

[0058] In phase 410, processing unit 2, which may include a processing core, controls the display. For example, processing unit 2 may execute an application and provide instructions to the display to present information reflecting the state of the application.

[0059] In phase 420, processing unit 1 determines that a trigger event occurs, where the trigger event is associated with a transition of processing unit 2 from an active state to a sleep state. Processing unit 1 may determine an occurrence of a trigger event, for example, by receiving an indication from processing unit 2 that a task performed by processing unit 2 has completed. As discussed above, the sleep state may include setting a clock frequency of processing unit 2 to zero. In response to the phase 420 determination, processing unit 1 assumes control of the display in phase 430 and causes processing unit 2 to transition to the sleep state in phase 440. Thereafter, processing unit 2 is in the sleep state in phase 450.When processing unit 2 is in the sleep state, battery resources may be depleted at a reduced rate. In some embodiments, phase 430 may start at the same time that phase 440 occurs, or phase 440 may occur before phase 430 starts.

[0060] In phase 460, a user interacts with the user interface UI such that processing unit 1 detects a trigger event to transition processing unit 2 from the sleep state to an active state. For example, the user might trigger a web browser application that requires connectivity capability that only processing unit 2 can provide. In response, in phase 470, processing unit 1 causes processing unit 2 to wake up from the sleep state. In response, processing unit 2 might read a state from memory and wake up to that state and assume control of the display, which is illustrated as phase 480.

[0061] Fig. 5 is a first flowchart of a first method according to at least some embodiments of the present invention. The phases of the illustrated method may, for example, be performed in the device 110 in Fig. 1 or in the device in Fig. 2 be carried out.

[0062] Phase 510 includes generating, by a first processing core, first control signals. Phase 520 includes controlling a display by providing the first control signals to the display via a first display interface. Phase 530 includes generating, by a second processing core, second control signals. Phase 540 includes controlling the display by providing the second control signals to the display via a second display interface. Finally, phase 550 includes causing the second processing core to enter and exit a sleep state based at least in part on a determination by the first processing core regarding an instruction from outside the device.

[0063] Fig. 6 is a state transition diagram according to at least some embodiments of the present invention.

[0064] PU1 corresponds to processing unit 1, for example, a less capable processing unit. PU2 corresponds to processing unit 2, for example, a more capable processing unit. These units may be similar to those used, for example, in conjunction with Fig. 4. In an initial state, the device comprising PU1 and PU2 is in an inactive state, with the zeros indicating the states of PU1 and PU2. PU1 and PU2 are both off.

[0065] Starting with the initial off state, PU1 is the first to be turned on, which is indicated by "1" in the PU1 state, while PU2 remains in the off state, indicated by zero. The composite state is thus "10," which corresponds to a case where PU1 is active and PU2 is not. In this state, the device can provide a reduced experience to a user and consume relatively little power from the battery reserves.

[0066] In addition to or alternatively to a powered-off state, PU1 and / or PU2 may have an intermediate low-power state from which they can transition to an active state more quickly than from a fully powered-off state. For example, a processing unit may be placed into such an intermediate low-power state before being placed into a powered-off state. If the processing unit is needed soon thereafter, it may be caused to transition back to the powered-on state. If no need for the processing unit is identified within a preconfigured time, the processing unit may be caused to transition from the intermediate low-power state to a powered-off state.

[0067] Arrow 610 marks a transition from state "10" to state "11"; in other words, a transition where PU2 transitions from the sleep state to an active state, e.g., a state where its clock frequency is non-zero. PU1 may initiate the transition marked by arrow 610, for example, in response to a trigger event. In state "11," the device may be able to offer a richer experience at the expense of faster battery consumption.

[0068] Arrow 620 marks a transition from state "11" to state "10"; in other words, a transition whereby PU2 transitions from an active state to the sleep state. PU1 can initiate the transition marked by arrow 620, for example, in response to a trigger event.

Claims

[1] Device comprising: a first processing core configured to generate first control signals and to control a display (230) by providing the first control signals to the display (230) via a first display interface (212); and a second processing core configured to generate second control signals and to control the display (230) by providing the second control signals to the display (230) via a second display interface (222), wherein the first processing core is further configured to cause the second processing core to enter and exit a sleep state based at least in part on a determination by the first processing core regarding an instruction from outside the device, and wherein the device is configured to obtain microphone data internal to the device from a microphone included in the device, wherein the first processing core is configured to cause the second processing core to exit the sleep state in response to a determination that a preconfigured spoken instruction has been recorded in the microphone data, wherein the instruction from outside the device comprises the preconfigured spoken instruction,wherein the first processing core is configured to process the microphone data to identify the spoken instruction from a plurality of possible spoken instructions and to select from a plurality of active states a state into which the second processing core is to be started depending on which spoken instruction was identified by the first processing core in the microphone data, each of the active states having a unique functionality. [2] The apparatus of claim 1, wherein the second processing core has an electrical interface with at least one of: cellular communication circuitry (240), non-cellular wireless communication circuitry (250), and a second wired communication port (260). [3] The apparatus of claim 1, wherein the first processing core and the second processing core both have an electrical interface with a shared random access memory. [5] The apparatus of claim 1, wherein the first processing core is configured to cause the second processing core to exit the sleep state in response to a determination that a preconfigured auditory control signal has been recorded in the microphone data, wherein the instruction from outside the apparatus comprises the preconfigured auditory control signal. [6] The device of claim 1, wherein the first processing core is configured to cause the second processing core to exit the sleep state in response to a determination that a notification is received in the device, the notification requiring a capability of the second processing core, the instruction from outside the device comprising the notification. [7] The apparatus of claim 6, wherein the second graphics mode comprises a graphics mode with a reduced map view. [8] The apparatus of claim 1, wherein the first processing core is configured to cause the second processing core to enter the sleep state in response to a determination that a user interface type not supported by the first processing core is no longer requested. [9] The apparatus of claim 1, wherein the apparatus comprises the display (230), the display (230) having a first electrical connection to the first display interface (212) in the first processing core and a second electrical connection to the second display interface (222) in the second processing core. [10] The apparatus of claim 1, wherein the first processing core and the second processing core are included in a same integrated circuit. [11] The apparatus of claim 1, wherein the first processing core is included in a microcontroller (210) and the second processing core is included in a microprocessor (220), the microcontroller (210) being external to the microprocessor (220) and the microprocessor (220) being external to the microcontroller (210). [12] The apparatus of claim 1, wherein the apparatus is configured to at least partially store a context of the second processing core in connection with the transition of the second processing core to the sleep state. [13] Method in a device, comprising: generating (510), by a first processing core, first control signals; Controlling (520) a display (230) by providing the first control signals to the display (230) via a first display interface (212); generating (530) second control signals by a second processing core; Controlling (540) the display (230) by providing the second control signals to the display (230) via a second display interface (222), and Causing (550) the second processing core to enter a sleep state based on at least a partial determination by the first processing core concerning an instruction from outside the device, and to exit said sleep state, wherein microphone data is obtained internally in the device from a microphone included in the device, wherein the first processing core causes the second processing core to exit the sleep state in response to a determination that a preconfigured spoken instruction has been recorded in the microphone data, wherein the instruction from outside the device comprises the preconfigured spoken instruction, and processing the microphone data to identify the spoken instruction from a plurality of possible spoken instructions and selecting, by the first processing core, from a plurality of active states, a state into which the second processing core is to be started depending on which spoken instruction had been identified by the first processing core in the microphone data, wherein each of the active states has unique functionality.

Images