Buffer mapping scheme that involves pre-allocation of memory
Patent Information
- Application Number
- DE102017104839
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2016-10-24
- Filing Date
- 2017-03-08
- Publication Date
- 2025-10-16
- Estimated Expiration
- 2037-03-08
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Abstract
Description
BACKGROUND
[0001] The present disclosure relates generally to a memory buffer and more particularly to a buffer mapping scheme that includes pre-allocation of memory.
[0002] In a UNIX-based storage / server system, there are various applications and device drivers, each performing a specific task. To ensure effective communication between the applications, the operating system (OS) / kernel, and the hardware, they often pass a memory buffer. Typically, during these communications, an application communicates its application-level virtual address to the operating system / kernel. The memory buffer calls the driver using the application-level virtual address, and the driver maps the application-level virtual address to the operating system / kernel-level virtual address.
[0003] To simplify this translation, virtual and physical memory are divided into manageable-sized pieces called pages. In this paged model, a virtual address is made up of an offset and a virtual page frame number. Each time the processor encounters a virtual address, the processor extracts the offset and virtual page frame number from the virtual address. The processor then translates the virtual page frame number to a physical page frame number to access the location at the correct offset within that physical page. To translate a virtual address to a physical address, the processor first works out the virtual address page frame number and the offset within the virtual page. The processor uses the virtual page frame number as an index into the process page table to retrieve its page table entry.If the page table entry at this offset is valid, the processor takes the physical page frame number from that entry. The tables the processor uses to convert the virtual page frame number into a physical frame number are called page tables.
[0004] A virtual address is calculated by adding an offset to the virtual page number. To further protect the application, separate page tables exist for the user-space application and the kernel. To access a virtual user-space address, kernel-level software maps the user-space address to a kernel address space. This process involves creating kernel page table entries for the user-space address.
[0005] As for the hardware, the connection between the OS / kernel and the hardware occurs via direct memory access (DMA). By using DMA, a hardware device can transfer data to / from a computer's main memory without involving a CPU. For DMA to work, memory buffers are often mapped to an address range visible to the hardware device. This address range is called a virtual IO address. Depending on the architecture, this may involve establishing a translation between a virtual IO address and a physical address of the computer's main memory. Typically, this is done using an IOMMU hardware. On some architectures, the virtual IO address may be the same as the physical address of the computer's main memory.
[0006] The mapping scheme described above places a heavy burden on the OS / kernel, which must first translate the application-level virtual address into an OS-level virtual address by setting up page table entries. Similarly, a DMA mapping should be established for each DMA transfer. A more efficient method for the OS, applications, and hardware to communicate is desired.
[0007] US Pat. No. 9,092,426 B1 discloses a method for a network-attached storage (NAS) server to write data directly to a hard disk or block device within a storage subsystem. An Ethernet interface of a NAS server receives a file and writes the file data into kernel memory as PDU segments. A TCP / IP stack maps the file data to kernel space RAM as sequentially ordered segments. The NAS / CIFS server application sends a call specifying the file storage data. A zero-copy DMA application receives the call, maps a file offset to a logical block address (LBA) in the block device, and requests the block device's DMA application to transfer the file data.Without rewriting the file data in system RAM, the block driver DMA application transfers the file data in units of file system blocks directly from the kernel space RAM to the block device, with each file system block being written in a single write operation.
[0008] Address translation in a virtualized system environment is known from US 2015 / 0 095 610 A1. For example, a memory management device is described that includes a shared translation look-aside buffer (TLB) containing a plurality of translation types, each supporting a plurality of page sizes, one or more processors, and a memory management controller configured to operate with the one or more processors.The memory management controller includes logic configured to cache virtual address to physical address translations and intermediate physical address to physical address translations in the shared TLB, logic configured to receive a virtual address for translation from a requestor, logic configured to perform a table walk of a translation table in the shared TLB to determine a translated physical address according to the virtual address, and logic configured to transmit the translated physical address to the requestor. SUMMARY
[0009] The object of the invention is to provide a computer-implemented method by which an operating system communicates with a first application and a second application, a computer-implemented method by which a first application, a second application, an operating system, and hardware in a single node communicate with each other using a buffer, and a device for controlling data transmission, with which an increase in efficiency is achieved compared to the known methods and devices described above. The object of the invention is achieved by a computer-implemented method according to the main claim. The object is also achieved by a computer-implemented method according to the independent claim 4 and by a device according to the independent claim 9. Further developments of the invention are specified in the subclaims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a conceptual illustration of user space, kernel space, and hardware in a single node, providing a possible environment according to one embodiment. Fig. 2A is a schematic diagram illustrating communication between applications, an operating system, and hardware according to one embodiment. Fig. 2B is another schematic diagram showing the multiple applications in user space and various virtual addresses in the kernel pointing to a common physical address that enable buffer sharing according to one embodiment. Fig. 3 is a diagram illustrating communication methods between an application, an operating system, and hardware according to one embodiment. DETAILED DESCRIPTION
[0010] The present system eliminates the need for the OS to perform kernel-level page table-based translations each time the memory buffer is allocated. In the disclosure, the application communicates the physical address to the kernel. According to one embodiment, the kernel has the required mapping for this buffer. Thus, the kernel can calculate the virtual address and does not need to perform a mapping operation each time. Since all kernel modules share the same virtual address space, any OS module (not just the OS module that allocated the memory) can obtain the virtual address using the physical address and operate on the buffer.
[0011] Communication between different applications occurs using a buffer offset. An application uses a virtual address to operate on the buffer. The application can calculate its own virtual address by simply adding the offset to the virtual address of the buffer's start.
[0012] An application can determine the DMA address of an offset by simply adding the offset to a DMA address at the start of the buffer. Applications can propagate the buffer address directly to a hardware device without kernel involvement.
[0013] While the disclosure is written in the context of a single node, this is not a limitation of the present disclosure.
[0014] Fig. Figure 1 is a conceptual illustration of user space, kernel space, and hardware in a single node, providing a possible environment according to one embodiment. As shown, applications 100 comprising user space, an operating system (OS) / kernel 200, and hardware 300 communicate with each other to receive and execute user requests. Hardware 300 includes various devices, the central processing unit, and system memory. Operating system 200 couples between user space and hardware 300, allowing applications 100 to access system memory, among other things. Device drivers are typically part of OS 200. A memory mapper maps image and data files into applications in user space. Memory mapping links the contents of a file to its virtual address.
[0015] Fig. Figure 2A is a schematic diagram illustrating communication between applications, an operating system, and hardware according to one embodiment. Regarding applications 100, two applications are shown, Application X and Application Y. Each of the two applications has its own virtual memory with its own set of virtual addresses, which are Fig. 2A as VM-X and VM-Y. Each application also has its own page table 110, which maps its respective virtual pages into physical pages of memory. For example, as shown, application X's virtual page frame number 0 (VPFN 0) is mapped into memory at physical page frame number 1 (PFN 1), and application Y's virtual page frame number 1 (VPFN 1) is mapped into memory at physical page frame number 4 (PFN 4).
[0016] The page table 110 is accessed using the virtual page frame number as an offset. To translate a virtual address into a physical address, the virtual address page frame number and the offset within that virtual page are first determined. If a virtual memory address is valid and the table entry is valid, the processor takes the physical page frame number and multiplies it by the page size to obtain the address of the page's base in physical memory. The offset is then added.
[0017] For example, in the case which is Fig. 2A, a page size of 0x2000 is assumed. For an address of 0x2194 in VM-Y, the processor would translate this address to an offset of 0x194 into a virtual page frame number 1. This virtual page frame number 1 is mapped to the physical page frame number 4, which starts at 0x8000 (4x2000). Adding the 0x194 offset to the physical page frame number creates a final physical address of 0x8194. While applications communicate with each other only using virtual addresses and offsets to the base virtual addresses, the present system allows applications to communicate with the kernel using a physical address. As shown, a kernel translation table 210 is used to translate the physical address into an OS-level virtual address.The kernel translation table 210 allows a translation from a physical to a virtual address and can be OS-specific.
[0018] According to one embodiment, the memory is pre-allocated and shared with applications 100 so that applications 100 and operating system 200 can both access the physical address table. "Pre-allocation," as used herein, means allocation prior to any use of the buffer to transfer data between application / kernel / hardware domains. Furthermore, different modules in operating system 200, all of which share the same virtual address space, convert a physical address into their own OS-level virtual address. The method each OS uses to convert a physical address to a virtual address depends on the architecture of each OS. For example, the Linux OS may translate a physical address to a virtual address using simple arithmetic for a specific range of addresses.When implemented in Linux, the system's preallocated buffers fall into this range of addresses, where simple arithmetic is used to arrive at a physical address. Some other operating systems may have a different mechanism for doing this.
[0019] An application can calculate the DMA address of an offset by simply adding the offset to the DMA address of the buffer's start point. In this way, an application can propagate the buffer address directly to a hardware 300 device without involving the operating system 200.
[0020] Fig. 2B is another schematic diagram showing the multiple applications in user space and different virtual addresses in the kernel pointing to the same physical address, enabling buffer sharing according to one embodiment. Fig. Figure 2B shows an application X and an application Y in the application user space 100. In application X, the data named “Buffer-1” is stored at 0 x 3000 in the address space of application X. This data translates to a kernel address space 0 x 5000, for example, by using the operation described in Fig. 2A. The same data (Buffer-1) corresponds to the data at address 0 x 1000 in the address space of application Y, but both applications X and Y are able to point to the same data using a physical address. The data, named "Buffer-2", is stored at the virtual address of application Y 0 x 4000, which corresponds to the kernel address space 0 x 7000. Due to the fact that kernel modules share the same virtual address space, any OS module can point to the virtual address using the kernel address specified in Fig. 2B is shown.
[0021] Fig. 3 is a diagram illustrating communication methods between an application, an operating system, and hardware according to one embodiment. More specifically, the embodiment of the Fig. 3 shows an application-1 102 and an application-2 104 in user space (applications 100) communicating with each other using an offset 106, and application-2 104 communicating with a kernel module 202 using a physical address 204. The applications (application-2 104 in this example) can also communicate directly with hardware devices 302 using a DMA address generated using the offset.
[0022] According to one embodiment, the present system comprises a machine-readable memory having stored thereon a computer program having at least one section of code executable by a machine, causing the machine to perform the steps as described above.
[0023] According to one embodiment, the present system may be implemented in hardware, software, or a combination of software and software. While the disclosure focuses on a single-node implementation involving a computer system, it may be adapted for use in a distributed manner where different elements are distributed across various connected computer systems. Any type of computer system or device adapted to perform the methods described herein is suitable. A typical combination of hardware and software may be a general-purpose computer system with a computer program that, when loaded and executed, controls the computer system to perform the methods described herein.
[0024] The present system may be embedded in a computer program product having all the features enabling the implementation of the methods described above, and which, when loaded into a computer system, is capable of executing those methods. "Computer program" in the present context means any expression in any language, code, or notation of a set of instructions intended to cause a system to have information processing capability to perform a particular function, either directly or after one or both of the following: conversion into another language, code, or notation; reproduction in a different material form.
Claims
[1] A computer-implemented method by which an operating system (200) communicates with a first application (102) and a second application (104), the method comprising: Receiving a first physical address from the first application (102), wherein the first application (102) has a first page table (110) and the first physical address is determined by mapping virtual pages of the first application into physical pages of a memory using the first page table (110), and using a first physical page frame number and a first offset to determine the first physical address corresponding to the first application; communicating the second application with the first application using an application offset (106), wherein the application offset (106) is applied to the first physical address to determine a second physical address corresponding to the second application; and Determining a virtual operating system (OS) level address based on the first physical address to achieve data transfer, wherein the virtual operating system (OS) level address is determined by a kernel translation table (210) based only on the first physical address, and wherein the operating system (200) communicates with the first application (102) and the second application (104) only via the first physical address. [2] The method of claim 1, further comprising: Performing a memory allocation and sharing the allocation with the first application (102) and the second application (104) before the first application (102) or the second application (104) receives a user input. [3] The method of claim 1, wherein there are multiple modules in the operating system (200), each of the modules having its own OS-level virtual memory, further comprising allowing all of the modules to communicate directly with the first application (102) using the first physical address. [4] A computer-implemented method by which a first application (102), a second application (104), an operating system (200), and hardware (300) in a single node communicate with each other by using a buffer, the method comprising: the first application (102) converts a virtual application-level address into a first physical address corresponding to the first application (102) and communicates the first physical address to the operating system (200); and the first application (102) and the second application (104) communicate with each other using an application offset (106), wherein the application offset (106) is applied to the first physical address to determine the second physical address corresponding to the second application; and the operating system (200) uses the first physical address to determine a virtual OS-level address, wherein the virtual OS-level address is determined by a kernel translation table (210) based only on the first physical address, and wherein the operating system (200) communicates with the first application (102) and the second application (104) only via the first physical address. [5] The method of claim 4, wherein the first application (102) communicates with the hardware (302) using a direct memory access (DMA) address calculated using a hardware offset without involvement of the operating system (200). [6] The method of claim 4, wherein the operating system (200) pre-allocates a memory buffer and provides a way to map physical addresses to applications (102, 104) prior to receiving user input. [7] The method of claim 4, wherein the first application (102) obtains the first physical address and the DMA address of a memory before transferring data between the first application (102), the operating system (200) and the hardware (300) by using a buffer. [8] The method of claim 4, wherein there are a plurality of modules in the operating system (200), and wherein each of the modules communicates directly with the first application (102) and determines its virtual OS level address using the first physical address. [9] An apparatus for controlling data transmission, the apparatus comprising a memory mapper that allows a first application (102) to convert a first application-level virtual address into a first physical address corresponding to the first application (102) and communicate the first physical address to an operating system (200), and allows a second application (104) to communicate with the first application (102) using an application offset (106), the application offset (106) being applied to the first physical address to determine a second physical address corresponding to the second application (104), a kernel translation table being used to determine an operating system (OS) level virtual address based only on the first physical address,and wherein the operating system communicates with the first application (102) and the second application (104) only via the first physical address., [10] The apparatus of claim 9, wherein the memory mapper allows the first application (102) to communicate directly with hardware (300) using a DMA address and a hardware offset.
Citation Information
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