System and method for circuit protection

Abstract

A method of operating a gate driver circuit (100), comprising: Supplying power to the gate driver circuit (100) from a power supply having a positive power supply voltage (VCC2) and a negative power supply voltage (VEE2); Comparing the negative power supply voltage (VEE2) with a first voltage (GND) at an output terminal of a transistor (112), wherein the gate driver circuit (100) is coupled to a gate terminal of the transistor (112); Operating the gate driver circuit (100) when the negative power supply voltage (VEE2) is more negative than a trigger voltage, the trigger voltage being a predetermined voltage above the first voltage; and Deactivating at least a portion of the gate driver circuit (100) when the negative power supply is more positive than the trigger voltage.

Description

[0001] The present invention relates generally to a system and method for a voltage protection circuit and, in certain embodiments, to a system and method for circuit protection.

[0002] Gate driver circuits are widely used in many electronic applications, from computers to automobiles to solar power generation. A gate driver circuit can be used to implement part of a switched-mode circuit, including, for example, a switched-mode power supply or other switched-mode circuit. Switched-mode circuits can be implemented using a gate driver circuit to drive the gates of one or more switching transistors, such as IGBT or MOSFET power devices.

[0003] In some cases, a negative voltage supply for a gate driver circuit may become floating or indeterminate due to a physical defect such as a bond wire lift, a bond wire break, a solder joint lift, or other factors such as the failure of an external power supply or other circuit. In an event such as this, a parasitic diode between the negative supply voltage and another voltage reference may become forward-biased and create a high current path. For example, the negative voltage supply may be a VEE supply, and the voltage reference may be a GND connected to the emitter or source of the driven switching transistor. In some cases, a gate driver circuit may include an undervoltage lockout (OWL) circuit.Under-voltage lock-out (UVLO) circuits can include an under-voltage lock-out (VEE) that compares the VEE voltage with the GND voltage and disables the circuit when VEE is within a certain voltage of GND. However, in some cases, it may be desirable for part or all of the circuit to continue operating even when VEE is close to or equal to GND, in which case a UVLO circuit is unsuitable. Furthermore, in some designs that use a gate driver circuit, VEE is connected to GND, so it is not possible to use a UVLO circuit that compares VEE to GND. For example, VEE and GND may be connected in some gate driver circuits that use an active Miller clamp to prevent the switching transistor from turning back on.Some gate driver circuits may include a protection circuit that detects the onset of a high current condition and takes preventive action to avoid or reduce the high current.

[0004] US 2015 / 0137619 A1 describes a control circuit for a cascode circuit with two transistors. The control circuit is configured to receive a negative and a positive external supply voltage and to generate an internal supply voltage based on the positive supply voltage. A monitoring circuit monitors the external supply voltages and the internal supply voltage and deactivates the cascode circuit if one of these voltages is not within a specified range.

[0005] THOMAS, A.: Dual / Triple Power Supply Monitor for Undervoltage and Overvoltage on Positive and Negative Supplies. In: Linear Technology Magazine, June 2006, pp. 19-26, describes a circuit for monitoring positive and negative supply voltages for the presence of overvoltage or undervoltage conditions.

[0006] According to one aspect of the present invention, a method of operating a gate driver circuit comprises supplying power to the gate driver circuit from a power supply including a positive power supply voltage and a negative power supply voltage. The method also comprises comparing the negative power supply voltage to a first voltage at an output terminal of a transistor, wherein the gate driver circuit is coupled to a gate terminal of the transistor. The method also comprises operating the gate driver circuit when the negative power supply voltage is more negative than a trigger voltage, wherein the trigger voltage is a predetermined voltage above the first voltage. The method further comprises disabling at least a portion of the gate driver circuit when the negative power supply voltage is more positive than the trigger voltage.

[0007] According to a further embodiment of the present invention, a gate driver circuit comprises a first voltage reference terminal configured to be coupled to an output terminal of a transistor. The gate driver circuit further comprises a voltage detection circuit coupled to a power supply terminal and the first voltage reference terminal, wherein the voltage detection circuit is configured to detect a first supply voltage state, a second supply voltage state, and a third supply voltage state.In the first supply voltage state, the voltage at the power supply terminal is negative relative to the voltage at the first voltage reference terminal; in the second supply voltage state, the voltage at the power supply terminal is positive relative to the voltage at the first voltage reference terminal and the voltage at the power supply terminal is less than a positive trigger voltage; and in the third supply voltage state, the voltage at the power supply terminal is positive relative to the voltage at the first voltage terminal and the voltage at the power supply terminal is greater than the positive trigger voltage. The gate driver circuit also includes a shutdown circuit configured to deactivate at least a portion of the gate driver circuit when the voltage detection circuit detects the third supply voltage state.

[0008] According to a further embodiment of the present invention, a circuit comprises a voltage monitoring circuit. The voltage monitoring circuit includes a first comparator, a first voltage divider coupled between a reference voltage node and a first power supply terminal, wherein an output of the first voltage divider is coupled to a first input of the comparator, and a second voltage divider coupled between a reference voltage node and an output terminal of a transistor, wherein an output of the second voltage divider is coupled to a second input of the comparator.The voltage monitoring circuit further includes a gate driver circuit coupled to the voltage monitoring circuit, wherein a portion of the gate driver circuit is configured to be active when the output of the comparator is in a first state, wherein the portion of the gate driver circuit is configured to be inactive when the output of the comparator is in a second state, wherein the output of the comparator is in the first state when the first power supply terminal has a voltage that is more negative than a positive trigger voltage, and wherein the output of the comparator is in the second state when the first power supply terminal has a voltage that is greater than or equal to the positive trigger voltage.

[0009] For a more complete understanding of the present invention and its advantages, reference is now made to the following descriptions taken in conjunction with the accompanying drawings in which: Fig. 1 is a circuit diagram of a gate driver circuit having a protection circuit; Fig. 2 is an embodiment of a protection circuit having a voltage terminal; Fig. 3 is an embodiment of a protection circuit comprising a voltage-limiting transistor; and Fig. 4 is an embodiment of a protection circuit having comparator circuit inputs referenced to GND.

[0010] Before embodiments of the present invention are explained in more detail in the following reference to the figures, it should be noted that the same or functionally equivalent elements are provided with the same reference numerals in the figures, and a repeated description of these elements is omitted. Therefore, the description of the elements provided with the same reference numerals is interchangeable and / or applicable to the various embodiments.

[0011] According to one embodiment, a protection circuit may turn off part of an integrated circuit when the voltage of a negative power supply (e.g., VEE2) is increased by a certain trigger voltage above another voltage reference (e.g., GND). The protection circuit may allow the integrated circuit to operate even if, for example, the VEE2 voltage is the same as the GND voltage, or the VEE2 voltage is higher than the GND voltage but less than the trigger voltage. The protection circuit may be connected to or part of an integrated circuit, such as a gate driver circuit or another type of circuit.

[0012] In some cases, an integrated gate driver may include a bipolar power supply for the gate driver portion of the circuit. For example, the integrated gate driver may include a positive power supply, a negative power supply, and a voltage reference. In some cases, and as an illustrative example, the positive power supply VCC2 may be at +15 V, the negative power supply may be at VEE2 at -5 to -15 V, and the voltage reference GND may be at 0 V. In other cases, the integrated gate driver may be a unipolar device that includes a positive power supply (e.g., VCC2 at +15 V) and a voltage reference (e.g., GND and / or VEE2 at 0 V). On some integrated chips that have p-doped substrates, the most negative power supply (e.g., VEE2) is used to bias the chip substrate.

[0013] In some cases, such as the lifting or breakage of a bond wire, the lifting of a solder joint, or the failure of an external power supply, the bias of the VEE2 potential may be lost. In situations such as these, VEE2 could be floating or indeterminate. In cases where a p-doped substrate is nominally biased by VEE2, the substrate may become charged due to the floating VEE2 potential. If VEE2 is indeterminate, there is a risk that circuits placed between VCC2 and VEE2 may be inadvertently powered by a parasitic diode or an ESD diode from VEE2 to GND that is forward biased. For example, a parasitic diode may be switched on between a p-doped substrate nominally biased by VEE2 and an n-well nominally biased by GND.Current flowing from VEE2 to GND in this manner may increase the risk of latch-up, overheating due to overcurrent, or other undesirable conditions leading to application failure.

[0014] Some gate drivers monitor the differential voltage between GND and VEE2 and stop the gate driver operation when this differential voltage is zero or less than a predetermined differential voltage, in some cases equal to several volts. In this way, a parasitic diode between VEE2 and GND can be turned off or prevented from turning on, or the current flowing through an activated parasitic diode can be limited to reduce potential damage to the device. However, in some situations or circuit configurations, it may be desirable for the device to continue operating even when the GND-VEE2 differential voltage is zero. For example, the device may be designed to operate using a bipolar power supply or a unipolar power supply.As another example, continued operation of the device may be a higher priority than reducing an overcurrent or reducing the risk of damage to the device.

[0015] The present disclosure describes protection circuit methods and systems that enable an integrated circuit to operate even when, for example, the VEE2 voltage is higher than the GND voltage. The protection circuit may turn off all or part of the integrated circuit when the VEE2 voltage is higher than the GND voltage by a certain trigger voltage. To provide protection against any parasitic diodes between VEE2 and GND, the trigger voltage may be placed anywhere between GND and the forward voltage of a diode. For example, the protection circuit may become active when VEE2 is 0.3 V above GND, 0.5 V above GND, or some other voltage above GND. In this way, the protection circuit may allow operation of part or all of the integrated circuit even when VEE2 = GND, or when VEE2 is more positive than GND.This may allow greater flexibility and a wider operating range of the gate driver circuit, and it may also allow circuit protection for unipolar configurations of gate driver circuits where VEE2 is connected to GND. Therefore, the protection circuit may be used with a gate driver circuit that cannot employ a UVLO circuit. In some cases, the protection circuit may be integrated into the integrated circuit and may disable a gate driver circuit and part of the integrated circuit's internal auxiliary circuitry in the event that VEE2 has a voltage above the trigger voltage. According to some embodiments, the protection circuit may prevent the integrated circuit from turning on in the event that the VEE2 potential is higher than the GND potential at power-on.

[0016] In some embodiments, the protection circuit may be configured to turn off part or all of the integrated circuit in the event that the VCC2 voltage is less than the GND voltage. For example, the protection circuit may become active when VCC2 is less than a trigger voltage below the GND voltage to prevent any parasitic diodes from GND to VCC2 from turning on. Embodiments of the protection circuits described herein may be configured between a positive power supply voltage (e.g., VCC2) and a reference voltage (e.g., GND) and are within the scope of this disclosure.

[0017] Fig. 1 shows a schematic drawing of an embodiment of a protection circuit 102. The protection circuit 102 may, for example, be part of an integrated circuit, a gate driver circuit, a clocked circuit, or another circuit. The example circuit 102 is shown in Fig. 1 as part of a gate driver circuit 100, although in other embodiments, the protection circuit 102 may be part of a different type of integrated circuit or other circuit. The gate driver circuit 100 uses a bipolar power supply including VCC2, GND, and VEE2, where VCC2 has a nominally higher voltage than GND, and VEE2 has a nominally lower voltage than GND. In other embodiments, the protection circuit 102 may be part of a circuit using a unipolar power supply or part of another type of circuit. The example protection circuit 102 is also shown in Fig. 1 as being configured to compare the differential voltage GND - VEE2, but in other embodiments, the protection circuit 102 may be configured to compare the differential voltage VCC2 - GND or another differential voltage.

[0018] The protection circuit 102 includes a shutdown circuit 104 connected to a comparator circuit 106. The comparator circuit 106 is connected to the reference voltage GND pin and the reference voltage VEE2 pin of the gate driver circuit. The shutdown circuit 104 is also connected to a driver circuit 108 of the gate driver circuit 100. The shutdown circuit 104 and the driver circuit 108 can also be connected to other circuits 110 within the gate driver circuit 100. The driver circuit 106 is connected to an external power device 112 through the OUTPUT pin of the gate driver circuit 100 and is configured to control the external power device 112. The external power device 112 is also connected to GND. For example, an external power device 112, which is an IGBT, may have its emitter terminal connected to GND and its gate terminal connected to the OUTPUT.In other embodiments, the external power device 112 is a different type of transistor, and GND may be connected to the emitter terminal or the source terminal of the external power device 112. In some cases, the gate driver circuit 100 may also include circuitry that detects the voltage across the external power device 112 using GND as a reference voltage (e.g., a DESAT detection circuit). The comparator circuit 106 monitors the differential voltage between GND and VEE2. If the voltage of VEE2 rises to more than a trigger voltage above GND, the comparator circuit 106 sends a signal to the shutdown circuit 104, which operates to shut down part or all of the gate driver circuit 100. In some embodiments, an optional filter 114 may be coupled to the output of the comparator circuit 106 and / or to one or both of the inputs of the comparator circuit 106.The optional filter 114 may operate to reduce voltage noise or voltage fluctuations at the inputs or outputs of the comparator circuit 106, thereby reducing the possibility of inadvertent triggering of the shutdown circuit 104.

[0019] Fig. 2 shows a circuit diagram of an embodiment of a protection circuit 200. The protection circuit 200 is designed for a bipolar power source including VCC2, GND and VEE2, and in this embodiment the differential voltage between GND and VEE2 is monitored.

[0020] The Fig. The example protection circuit 200 shown in Figure 2 includes a comparator circuit 202 whose output is connected to a shutdown circuit 104. The inputs 204, 206 of the comparator circuit 202 are connected to a divider network 208, which is connected to both VEE2 and GND. Fig. The example divider network 208 shown in Figure 2 includes four resistive elements R1, R2, R3, and R4. A first branch of the divider network 208 includes R1 and R2 in series, with one end of the first branch at R1 connected to an internal reference node 210 (explained in more detail below), and the opposite end of the first branch at R2 connected to VEE2. The first comparator input 204 is connected between R1 and R2 to the first branch. A second branch of the divider network 208 includes R3 and R4 in series, with one end of the second branch at R3 connected to the internal reference node 210, and the opposite end of the second branch at R4 connected to GND. The second comparator input 206 is connected between R3 and R4 in the second branch. The resistive elements R1, R2, R3 or R4 can each be one or more resistors, circuits, transistors or other types of elements.In some embodiments, the divider network 208 and / or the resistive elements R1, R2, R3, or R4 may have a different configuration, connections, or arrangements. In some configurations, a filter is implemented before and / or after the comparator circuit 202 to reduce noise from the supply lines VEE2 and GND. In other embodiments, other configurations, other comparator circuits, or other detection circuits may be used. For example, circuits employing an ADC, switched capacitors, or other circuits may be used.

[0021] The internal reference node 210 has a regulated voltage of Vref, provided by the internal reference circuit 212. The example internal reference circuit 212 is a voltage regulator that includes a reference voltage source Vref, an OP-AMP 214, a transistor NM1, and an optional transistor NM2. The internal reference circuit 212 supplies a regulated voltage to the internal reference node 210 and is configured to withstand DC current stresses. The optional transistor NM2 is connected to a voltage reference VDD and to NM1 and may be configured to handle high voltages. For example, NM1 may have a relatively thick gate dielectric. In this way, NM2 may help protect NM1, the comparator circuit 202, or the OP-AMP 214 from high voltages.In some configurations, NM2 may be connected to another voltage reference, and in some configurations, NM2 may be omitted, with the drain of NM1 connected directly to VDD. The internal reference circuit 212 is an example circuit for providing a regulated voltage; other circuits and configurations are possible. In some embodiments, the internal reference circuit 212 is optional. For example, the internal reference circuit 212 may not be required in embodiments where the regulated voltage Vref is supplied to the internal reference node 210 by a separate circuit, in embodiments where the internal reference node 210 is coupled directly or via a resistor to VCC2, or in other embodiments.

[0022] The protection circuit 200 also includes an optional clamp circuit 216 connected to the second input 206 of the comparator circuit 202. Fig. 2 shows the clamp circuit 216 connected to VDD, although in other configurations the clamp circuit 216 may be connected to VEE2 or another voltage supply. The clamp circuit 216 operates to limit the voltage of the second input 206 to protect the comparator circuit 202 from high voltages. The protection circuit 200 may be configured to limit the voltage at the second input 206 to below a certain value above the voltage VEE2. In some cases, the comparator circuit 202 may be configured to be less sensitive to high voltages at its inputs, and the clamp circuit 216 may not be required. In other configurations, the clamp circuit 216 may limit the first input 204 to a certain voltage.

[0023] The comparator circuit 202 compares the voltages between its first input 204 and its second input 206 and activates the shutdown circuit 104 when the voltage at the first input 204 is higher than the voltage at the second input 206 by a predetermined trigger voltage. The trigger voltage can be determined from the voltage Vref and the resistances of R1, R2, R3, and R4. For example, the comparator circuit 202 can be triggered when GND has a voltage equal to GND_trig. Equation 1 gives an expression for GND_trig, where VEE2 is assumed to be 0 V: GND_trig=(1−R2(R3+R4)R4(R1+R2))Vref

[0024] Depending on the reference voltage Vref and the resistance values ​​of R1, R2, R3, and R4, the trigger voltage (i.e., GND_trig) can be designed for a specific voltage for GND relative to VEE2. In particular, the trigger voltage can be designed for either a positive or a negative voltage for GND relative to VEE2. In particular, the trigger voltage can be designed for a voltage such that the differential voltage (GND - VEE2) is less than the forward biased turn-on voltage of a diode. For example, the trigger voltage can be designed for GND - VEE2 = -0.3 V, in an example case where VEE2 is greater than GND. In other cases, the trigger voltage can be designed for a voltage such as GND - VEE2 = +0.3 V, 0 V, -0.2 V, -0.4 V, or another voltage.

[0025] Fig. 3 shows a circuit diagram of an embodiment of a protection circuit 300. The example protection circuit 300 is similar to that shown in Fig. 2 and includes a comparator circuit 202, a shutdown circuit 104, a divider network 208 and an internal reference circuit 212. The protection circuit 300 does not include a clamp circuit such as that shown in Fig. 2. In the protection circuit 300, the resistive element R4 is connected to GND via a transistor NM3, and the gate terminal of NM3 is connected to VDD. The transistor NM3 helps protect the second input 206 of the comparator circuit 202 against overcurrent and overvoltage. For example, during normal operation, where GND is greater than VEE2, NM3 is saturated and acts as a cascode transistor, limiting the current flowing through the divider network 208. In this way, the use of a transistor such as the one in Fig. 3 shown NM3 have a lower current or lower power consumption than the use of a clamp circuit such as the one in Fig. 2. Similar to the protection circuit 200, the trigger voltage may be determined by the values ​​of the reference voltage Vref and the resistive elements R1, R2, R3, and R4. In some cases, when NM3 is in a linear region (e.g., in some cases where VEE2 is relatively close to GND), NM3 acts like a resistor, and this effective resistance of NM3, in addition to the reference voltage Vref and the resistive elements R1, R2, R3, and R4, may also determine the trigger voltage.

[0026] Fig. 4 shows a circuit diagram of an embodiment of a protection circuit 400. The example protection circuit 400 is similar to that shown in Fig.2 and includes a comparator circuit 202, a shutdown circuit 104, a divider network 208, and an internal reference circuit 212. In protection circuit 400, comparator circuit 202 references the voltage at inputs 204, 206 to GND (compare protection circuit 400 with protection circuits 200 and 300, where the voltages at inputs 204, 206 were referenced to VEE2). Protection circuit 400 does not have a clamp circuit or transistor NM3, but clamp circuits or other types of voltage limiting may be present in other embodiments. In protection circuit 400, resistive element R4 is connected to VEE2, and resistive element R2 is connected to GND. This type of protection circuit configuration can also be used with a unipolar power supply.Similar to the protection circuit 200, the trip voltage may be determined by values ​​of the reference voltage Vref and the resistive elements R1, R2, R3 and R4.

[0027] Advantages of some protection circuit designs include the configurability of the protection circuit to operate with bipolar and unipolar power supplies. The differential trigger voltage between GND and VEE2 (or between VCC2 and GND) can be determined depending on the desired application. The polarity of the differential trigger voltage can also be adjusted; for example, the trigger voltage can be set so that the differential voltage (GND - VEE2) is a positive voltage, a negative voltage, or even zero. In this way, the protection circuit can allow parts of the integrated circuit to operate over a wider range of power supply differential voltages.

Claims

[1] A method of operating a gate driver circuit (100), comprising: Supplying power to the gate driver circuit (100) from a power supply having a positive power supply voltage (VCC2) and a negative power supply voltage (VEE2); Comparing the negative power supply voltage (VEE2) with a first voltage (GND) at an output terminal of a transistor (112), wherein the gate driver circuit (100) is coupled to a gate terminal of the transistor (112); Operating the gate driver circuit (100) when the negative power supply voltage (VEE2) is more negative than a trigger voltage, the trigger voltage being a predetermined voltage above the first voltage; and Deactivating at least a portion of the gate driver circuit (100) when the negative power supply is more positive than the trigger voltage. [2] The method of claim 1, wherein the trigger voltage is between about 0.1 V and about 0.5 V above the first voltage. [3] A method according to claim 1 or 2, wherein the trigger voltage is less than a forward operating voltage of a diode above the first voltage. [4] A method according to any one of the preceding claims, wherein the output terminal of the transistor (112) is an emitter terminal or a source terminal. [5] A method according to any one of the preceding claims, wherein the transistor (112) is a MOSFET. [6] A method according to any one of the preceding claims, wherein the comparing comprises: Dividing the negative power supply voltage (VEE2) with respect to a reference voltage to form a first divided voltage; Dividing the first voltage (GND) with respect to the reference voltage to form a second divided voltage; and Compare the first divided voltage with the second divided voltage. [7] A method according to claim 6, wherein: dividing the negative power supply voltage (VEE2) with respect to the reference voltage comprises using a first voltage divider circuit having a plurality of resistive elements (R1, R2); dividing the first voltage with respect to the reference voltage comprises using a second voltage divider circuit having a plurality of further resistive elements (R3, R4). [8] A method according to any one of the preceding claims, wherein comparing comprises using a comparator circuit (106; 202). [9] The method of claim 8, further comprising limiting a voltage at an input terminal of the comparator circuit (106; 202). [10] The method of claim 9, wherein limiting the voltage at the input terminal of the comparator circuit (106; 202) comprises using a clamp circuit coupled to the input terminal of the comparator circuit (106; 202). [11] Gate driver circuit (100) comprising: a first voltage reference terminal configured to be coupled to an output terminal of a transistor (112); a voltage detection circuit coupled to a power supply terminal and the first voltage reference terminal, the voltage detection circuit configured to detect a first supply voltage state, a second supply voltage state, and a third supply voltage state, wherein: in the first supply voltage state, the voltage (VEE2) at the power supply terminal is negative relative to the voltage (GND) at the first voltage reference terminal; in the second supply voltage state, the voltage at the power supply terminal (VEE2) is positive relative to the voltage (GND) at the first voltage reference terminal and the voltage (VEE2) at the power supply terminal is less than a positive trigger voltage; and in the third supply voltage state, the voltage (VEE2) at the power supply terminal is positive relative to the voltage (GND) at the first voltage reference terminal and the voltage (VEE2) at the power supply terminal is greater than the positive trigger voltage; and a shutdown circuit (104) coupled to the voltage detection circuit, wherein the shutdown circuit (104) is configured to deactivate at least a portion of the gate driver circuit (100) when the voltage detection circuit detects the third supply voltage state. [12] The circuit of claim 11, wherein the voltage detection circuit comprises a comparator (106; 202) having inputs coupled to the power supply terminal and the first voltage reference terminal. [13] A circuit according to claim 12, wherein the voltage detection circuit further comprises: a first voltage divider (R1, R2) coupled between a second voltage reference terminal (210) and the power supply terminal, wherein an output of the first voltage divider (R1, R2) is coupled to a first input of the comparator (202); and a second voltage divider (R3, R4) coupled between the second voltage reference terminal (210) and the first voltage reference terminal, wherein an output of the second voltage divider (R3, R4) is coupled to a second input of the comparator (202). [14] A circuit according to claim 13, wherein: the first voltage divider (R1, R2) comprises a first resistive element (R2) coupled between the first input of the comparator (202) and the power supply terminal, and a second resistive element (R1) coupled between the first input of the comparator (202) and the second voltage reference terminal (210); and the second voltage divider (R3, R4) comprises a third resistive element (R4) coupled between the second input of the comparator (202) and the first voltage reference terminal, and a second resistive element coupled between the second input of the comparator (202) and the second voltage reference terminal (210). [15] The circuit of claim 13 or 14, further comprising a voltage regulator (212) coupled to the second voltage reference terminal (210) and configured to regulate the voltage at the second voltage reference terminal (210). [16] The circuit of any one of claims 13 to 15, further comprising a second voltage reference supply circuit coupled to the second voltage reference terminal. [17] A circuit according to any one of claims 11 to 16, wherein the positive trigger voltage is less than a forward biasing voltage of a diode. [18] A circuit according to any one of claims 11 to 17, wherein the power supply terminal is a first power supply terminal, and wherein the voltage detection circuit is coupled to a second power supply terminal different from the first power supply terminal. [19] A circuit according to any one of claims 11 to 18, wherein the transistor (112) is an IGBT. [20] A circuit according to any one of claims 11 to 19, wherein the output terminal of the transistor (112) is an emitter terminal or a source terminal. [21] Circuit which has: a voltage monitoring circuit comprising: a comparator (202); a first voltage divider (R1, R2) coupled between a reference voltage node (210) and a first power supply terminal, wherein an output of the first voltage divider (R1, R2) is coupled to a first input of the comparator (202); and a second voltage divider (R3, R4) coupled between the reference voltage node (210) and an output terminal of a transistor (112), wherein an output of the second voltage divider (R3, R4) is coupled to a second input of the comparator (202); and a gate driver circuit coupled to the voltage monitoring circuit, wherein a part of the gate driver circuit is configured to be active when the output of the comparator (202) is in a first state, wherein the part of the gate driver circuit (100) is configured to be inactive when the output of the comparator (202) is in a second state, wherein the output of the comparator (202) is in the first state when the first power supply terminal has a voltage that is more negative than a positive trigger voltage, and wherein the output of the comparator (202) is in a second state when the first power supply terminal has a voltage greater than or equal to the positive trigger voltage. [22] The circuit of claim 21, wherein the gate driver circuit (100) is configured to be coupled to a gate terminal of the transistor (112). [23] A circuit according to claim 21 or 22, wherein the transistor (112) is an IGBT. [24] A circuit according to any one of claims 21 to 23, wherein the output terminal of the transistor (112) is an emitter terminal or a source terminal. [25] A circuit according to any one of claims 21 to 24, wherein the positive trigger voltage is between about 0.1 V and about 0.5 V more positive than the voltage at the output terminal of the transistor (112). [26] A circuit according to any one of claims 21 to 25, wherein: the first voltage divider (R1, R2) comprises a first resistor (R2) coupled between the first input of the comparator (202) and the first power supply terminal and a second resistor (R1) coupled between the first input of the comparator (202) and the reference voltage node (210); and the second voltage divider (R3, R4) has a third resistor (R4) coupled between the second input of the comparator (202) and the output terminal of the transistor (112) and a fourth resistor (R3) coupled between the second input of the comparator (202) and the reference voltage node (210). [27] The circuit of claim 26, further comprising a cascode transistor (NM3) having a load path coupled between the third resistor (R4) and the output terminal of the transistor (112). [28] A circuit according to any one of claims 21 to 27, further comprising a filter circuit coupled to the first input of the comparator. [29] The circuit of any one of claims 21 to 28, further comprising a voltage regulator (212) coupled between a second power supply terminal and the reference voltage node (210). [30] The circuit of any one of claims 21 to 29, further comprising a clamp circuit coupled between a second power supply terminal and the reference voltage node (210).

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