Semiconductor switch control device

Abstract

Semiconductor switch control device comprising: a semiconductor switching module installed between a power supply and a load, which transmits or switches a current flowing bidirectionally between the power supply and the load; a resistor that detects a voltage of the semiconductor switching module; a first voltage detector that detects a voltage applied to the resistor; and a controller configured to determine a malfunction of the semiconductor switching module based on a first detected voltage detected by the first voltage detector, wherein the semiconductor switching module includes a first semiconductor switching module, and a second semiconductor switching module connected in parallel to the first semiconductor switching module, the first semiconductor switching module comprises a first forward switch having a body diode arranged in a forward direction serving as a direction in which the current flows, and a first reversing switch arranged adjacent to the first forward switch and comprising a body diode arranged in a reverse direction opposite to the forward direction, the first forward switch and the first reverse switch each comprise corresponding source terminals connected in series and respective drain terminals, one of the drain terminals being connected to the power supply and the other of the drain terminals being connected to the load, the second semiconductor switching module comprises a second forward switch having a body diode arranged in the forward direction, and a second reversing switch arranged adjacent to the second forward switch and comprising a body diode arranged in the reverse direction, the second forward switch and the second reverse switch each comprise respective source terminals connected in series and respective drain terminals, one of the drain terminals being connected to the power supply and the other of the drain terminals being connected to the load, and the resistor has one end connected between the source terminals of the first forward switch and the first reversing switch, and the other end connected between the source terminals of the second forward switch and the second reversing switch.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)

[0001] This application claims priority to and incorporates the entire contents of Japanese Patent Application No. 2016-212143, filed in Japan on October 28, 2016. BACKGROUND OF THE INVENTION 1. Field of the Invention

[0002] The present invention relates to a semiconductor switch control device. 2. Description of the state of the art

[0003] Conventionally, electric vehicles and / or hybrid electric vehicles are equipped with a high-voltage load, such as a drive motor and a high-voltage battery for driving the high-voltage load. For safety reasons, they are equipped with a switch for transferring or interrupting a current flowing from the high-voltage battery to the high-voltage load. A mechanical relay is mainly used as a switch. In recent years, a semiconductor switch has been increasingly used as a switch. Japanese Patent Application Laid-Open No. 2007-285969 discloses a malfunction detection circuit that detects a malfunction of a semiconductor switch to improve system reliability.

[0004] US patent document US 9,479,158 B2 describes a semiconductor-based switching device for use in solar power generation and the automotive sector, for example, for electric or hybrid vehicles. The proposed solution aims to reduce circuit size.

[0005] The malfunction detection circuit tends to increase in size with an increase in the constituent elements of the circuit. SUMMARY OF THE INVENTION

[0006] The present invention has been made in view of the above, and an object of the present invention is to provide a semiconductor switch control device that can suppress an increase in size in determining a malfunction of a semiconductor switch.

[0007] To achieve the above-mentioned objective, a semiconductor switch control device according to one aspect of the present invention comprises a semiconductor switch module installed between a power supply and a load, which transmits or switches off a current flowing bidirectionally between the power supply and the load, a resistor that detects a voltage of the semiconductor switch module, a first voltage detector that detects a voltage applied to the resistor, and a controller configured to determine a malfunction of the semiconductor switch module based on a first detected voltage detected by the first voltage detector, wherein the semiconductor switch module comprises a first semiconductor switch module and a second semiconductor switch module connected in parallel to the first semiconductor switch module, the first semiconductor switch module comprising a first forward switch having a body diode,which is arranged in a forward direction, which serves as a direction in which the current flows, and comprises a first reversing switch arranged adjacent to the first forward switch and comprising a body diode arranged in a reverse direction opposite to the forward direction. The first forward switch and the first reversing switch each comprise corresponding source terminals connected in series and respective drain terminals, one of the drain terminals being connected to the power supply and the other of the drain terminals being connected to the load. The second semiconductor switching module comprises a second forward switch having a body diode arranged in the forward direction and a second reversing switch arranged adjacent to the second forward switch and comprising a body diode arranged in the reverse direction.the second forward switch and the second reversing switch each include corresponding source terminals connected in series and respective drain terminals, one of the drain terminals being connected to the power supply and the other of the drain terminals being connected to the load, and the resistor has one end connected between the source terminals of the first forward switch and the first reversing switch, and the other end connected between the source terminals of the second forward switch and the second reversing switch.

[0008] A semiconductor switch control device according to another aspect of the present invention includes a semiconductor switch module installed between a power supply and a load, which transmits or switches off a current flowing bidirectionally between the power supply and the load, a resistor that detects a voltage of the semiconductor switch module, a first voltage detector that detects a voltage applied to the resistor, and a controller configured to determine a malfunction of the semiconductor switch module based on a first detected voltage detected by the first voltage detector, wherein the semiconductor switch module includes a first semiconductor switch module and a second semiconductor switch module connected in parallel to the first semiconductor switch module, wherein the first semiconductor switch module includes a first forward switch including a body diode,which is arranged in a forward direction serving as a direction in which the current flows, and a first reversing switch arranged adjacent to the first forward switch and comprising a body diode arranged in a reverse direction opposite to the forward direction, the first forward switch and the first reversing switch each include corresponding drain terminals connected in series and respective source terminals, one of the source terminals being connected to the power supply and the other of the source terminals being connected to the load, wherein the second semiconductor switching module comprises a second forward switch having a body diode arranged in the forward direction, and a second reversing switch arranged adjacent to the second forward switch and comprising a body diode arranged in the reverse direction,the second forward switch and the second reversing switch each include corresponding drain terminals connected in series and respective source terminals, one of the source terminals being connected to the power supply and the other of the source terminals being connected to the load, and the resistor includes one end connected between the drain terminals of the first forward switch and the first reversing switch and the other end connected between the drain terminals of the second forward switch and the second reversing switch.

[0009] According to yet another aspect of the present invention, in the semiconductor switch control device, the controller may determine that the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch enter an OFF-state malfunction in which the particular switch is in an OFF state based on a shift amount between the first detected voltage and a predetermined first reference voltage when an instruction is issued to turn on each of the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch.

[0010] According to yet another aspect of the present invention, in the semiconductor switch control device, the controller may determine that the first forward switch or the second reverse switch enters the OFF-state malfunction when the shift amount between the first detected voltage and the first reference voltage is a positive voltage, and the controller may determine that the first reverse switch or the second forward switch enters the OFF-state malfunction when the shift amount between the first detected voltage and the first reference voltage is a negative voltage.

[0011] According to yet another aspect of the present invention, the semiconductor switch control device may further comprise a second voltage detector that detects a voltage applied to the load, wherein the controller determines a malfunction of the semiconductor switch module based on a second detected voltage detected by the second voltage detector.

[0012] According to yet another aspect of the present invention, in the semiconductor switch control device, the controller may specify which of the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch enters an OFF-state malfunction based on the second detected voltage detected by the second voltage detector, and command values ​​for turning on / off the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch in the OFF-state malfunction of the semiconductor switch module.

[0013] In the semiconductor switch control device, the controller preferably determines that at least one of the first reversing switch and the second reversing switch enters an ON-state failure in which the switch is in the ON state when the second detected voltage exceeds a reference voltage in the case where an instruction is issued to turn off each of the first forward switch, the first reversing switch, the second forward switch, and the second reversing switch.

[0014] In the semiconductor switch control device, preferably, the controller determines that at least one of the first forward switch and the second forward switch enters the ON-state malfunction when the second detected voltage is equal to a voltage of the power supply in the case where an instruction is issued to turn on each of the first reversing switch and the second reversing switch and an instruction is issued to turn off each of the first changeover switch and the second changeover switch.

[0015] In the semiconductor switch control device, preferably, the controller determines which of the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch enters the ON-state malfunction based on the first detected voltage detected by the first voltage detector and command values ​​for turning on / off the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch in the ON-state malfunction of the semiconductor switch module.

[0016] The above and other objects, features, advantages and technical and industrial significance of this invention will be better understood by reading the following detailed description of present and preferred embodiments of the invention in conjunction with the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram illustrating a configuration example of a semiconductor switch control device according to a first embodiment; Fig. 2 is a circuit diagram illustrating an operation example of a semiconductor switching module according to the first embodiment; Fig. 3 is a circuit diagram illustrating an example of an OFF-state malfunction of a second FET of the semiconductor switch module according to the first embodiment; Fig. 4 is a circuit diagram illustrating an example of an OFF-state malfunction of a third FET of the semiconductor switch module according to the first embodiment; Fig. 5 is a circuit diagram illustrating an example of a malfunction of the OFF state of a fourth FET of the semiconductor switch module according to the first embodiment; Fig. 6 is a circuit diagram illustrating an example of a malfunction of the OFF state of a first FET of the semiconductor switch module according to the first embodiment; Fig. 7 is a circuit diagram illustrating an example of determination of an ON-state malfunction of the semiconductor switch module according to the first embodiment; Fig. 8 is a circuit diagram illustrating an example of determination of an ON-state malfunction of the semiconductor switch module according to the first embodiment; Fig. 9 is a flowchart illustrating an operation example of the semiconductor switch control device according to the first embodiment; Fig. 10 is a flowchart illustrating an operation example (first malfunction determination mode) of the semiconductor switch control device according to the first embodiment; Fig. 11 is a flowchart illustrating an operation example (second malfunction determination mode) of the semiconductor switch control device according to the first embodiment; Fig. 12 is a flowchart illustrating an operation example (third malfunction determination mode) of the semiconductor switch control device according to the first embodiment; Fig. 13 is a block diagram illustrating a configuration example of a semiconductor switch control device according to a second embodiment; and Fig. 14 is a block diagram illustrating a configuration example of a semiconductor switch control device according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] Embodiments according to the present invention will be explained in detail below with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. The constituent elements described below include elements that would be easily conceived by those skilled in the art and substantially the same elements. The structures described below can be properly combined. Various omissions, substitutions, or changes of the structure are possible within a range that does not deviate from the gist of the present invention. First embodiment

[0018] A vehicle power supply system 100 for an electric car or a hybrid electric car or the like is equipped with a high-voltage load 2 such as an inverter that converts a direct current into an alternating current to supply electric power to a drive motor and a high-voltage battery HV that serves as a power supply to drive the high-voltage load 2 and is provided with a semiconductor switch control device 1 to control a current that flows bidirectionally between the high-voltage battery HV and the high-voltage load 2 for the purpose of safety, as shown in Fig. 1 shown, to transfer or switch off.

[0019] The semiconductor switch control device 1 includes a bidirectional shutdown circuit 10, driver units 20A to 20D, a resistor R, a first voltage detector 30, a second voltage detector 40, and a controller 50.

[0020] The bidirectional cutoff circuit 10 transfers or cuts off a bidirectional current flowing between the high-voltage battery HV and the high-voltage load 2. The bidirectional cutoff circuit 10 is arranged between a positive electrode of the high-voltage battery HV and the high-voltage load 2 in order to transfer or cut off a current flowing from the positive electrode of the high-voltage battery HV to the high-voltage source load 2. The bidirectional cutoff circuit 10 also transfers or cuts off a current flowing from the high-voltage load 2 to the positive electrode of the high-voltage battery HV during a charging path for charging the high-voltage battery HV.

[0021] The bidirectional shutdown circuit 10 includes a first bidirectional shutdown circuit 11 serving as a first semiconductor switching module, and a second bidirectional shutdown circuit 12 serving as a second semiconductor switching module. The first bidirectional shutdown circuit 11 and the second bidirectional shutdown circuit 12 are connected in parallel. As described above, the bidirectional shutdown circuit 10 in the semiconductor switch control device 1 has a redundant configuration, and therefore, it is possible to improve reliability. The first bidirectional shutdown circuit 11 includes a field-effect transistor (FET) 10A and an FET 10B. Here, the FET 10A is referred to as a first FET 10A, and the FET 10B is referred to as a second FET 10B.

[0022] Each of the first and second FETs 10A, 10B is configured, for example, by an N-channel metal-oxide-semiconductor (MOS) FET. The first FET 10A functions as a first forward switch or a first reverse switch in accordance with a direction in which the current flows. The first forward switch is a switch in which a body diode (parasitic diode) is arranged in a forward direction in which the current flows. The first reverse switch is a switch in which a body diode is arranged in a reverse direction, which serves as a direction opposite to the forward direction of the current. The first FET 10A functions as a first reverse switch when the current flows from the high-voltage battery HV to the high-voltage load 2 and functions as a first forward switch when the current flows from the high-voltage load 2 to the high-voltage battery HV.The first embodiment illustrates an example in which the current flows from the high-voltage battery HV to the high-voltage load 2, and the first FET 10A is explained as the first reversing switch in which a body diode DA is arranged in a direction reverse to the direction of the current flowing from the high-voltage battery HV to the high-voltage load 2. The body diode DA of the first FET 10A includes an anode terminal connected to the high-voltage load 2 side and a cathode terminal connected to the positive electrode of the high-voltage battery HV. The first FET 10A is driven by the driving unit 20A described later to transmit or cut off the current flowing from the high-voltage battery HV to the high-voltage load 2.

[0023] The second FET 10B is arranged adjacent to the first FET 10A and functions as a first forward switch or a first reverse switch in accordance with a direction in which the current flows. The second FET 10B functions as a first forward switch when the current flows from the high-voltage battery HV to the high-voltage load 2 and functions as a first reverse switch when the current flows from the high-voltage load 2 to the high-voltage battery HV. Since the first embodiment illustrates the example in which the current flows from the high-voltage battery HV to the high-voltage load 2, the second FET 10B will be explained as the first forward switch in which a body diode DB is arranged in a forward direction serving as the direction of the current flowing from the high-voltage battery HV to the high-voltage load 2.The body diode DB of the second FET 10B includes an anode terminal connected to the positive electrode side of the high-voltage battery HV and a cathode terminal connected to the high-voltage load 2. The second FET 10B is driven by the driver unit 20B described later. Source terminals of the second FET 10B and the first FET 10A are connected in series, a drain terminal of the first FET 10A is connected to the high-voltage battery HV, and a drain terminal of the second FET 10B is connected to the high-voltage load 2.

[0024] The second bidirectional shutdown circuit 12 includes an FET 10C and an FET 10D. Each of the FETs 10C, 10D is, for example, an N-channel MOSFET. Here, the FET 10C is referred to as a third FET 10C, and the FET 10D is referred to as a fourth FET 10D. The third FET 10C functions as a second forward switch or as a second reverse switch depending on the direction of current flow. The third FET 10C functions as a second reverse switch when current flows from the high-voltage battery HV to the high-voltage load 2, and acts as a second forward switch when current flows from the high-voltage load 2 to the high-voltage battery HV.Since the first embodiment illustrates the example in which the current flows from the high-voltage battery HV to the high-voltage load 2, the third FET 10C will be explained as the second reversing switch in which a body diode DC is arranged in a reverse direction to the direction of the current flowing from the high-voltage battery HV to the high-voltage load 2. The body diode DC of the third FET 10C includes an anode terminal connected to the high-voltage load 2 side and a cathode terminal connected to the positive electrode of the high-voltage battery HV. The third FET 10C is driven by the driving unit 20C described later to transmit or cut off the current flowing from the high-voltage battery HV to the high-voltage load 2.

[0025] The fourth FET 10D is arranged adjacent to the third FET 10C and functions as a second forward switch or a second reverse switch in accordance with the direction in which the current flows. The fourth FET 10D functions as a second forward switch when the current flows from the high-voltage battery HV to the high-voltage load 2 and functions as a second reverse switch when the current flows from the high-voltage load 2 to the high-voltage battery HV. Since the first embodiment illustrates the example in which the current flows from the high-voltage battery HV to the high-voltage load 2, the fourth FET 10D will be explained as the first forward switch in which a body diode DD is arranged in a forward direction serving as the direction of the current flowing from the high-voltage battery HV to the high-voltage load 2.The body diode DD of the fourth FET 10D includes an anode terminal connected to the positive electrode side of the high-voltage battery HV and a cathode terminal connected to the high-voltage load 2. The fourth FET 10D is driven by the driver unit 20D described later. Source terminals of the fourth FET 10D and the third FET 10C are connected in series, a drain terminal of the third FET 10C is connected to the high-voltage battery HV, and a drain terminal of the fourth FET 10D is connected to the high-voltage load 2. All of the first to fourth FETs 10A to 10D are preferably field-effect transistors of the same type to suppress heat concentration, but are not limited thereto.

[0026] The driver unit 20A is connected to a gate terminal of the first FET 10A to drive the first FET 10A based on an ON / OFF instruction from the controller 50 described later. When the controller 50 issues an ON instruction to turn on the switch of the first FET 10A, the driver unit 20A applies an ON voltage to the gate terminal of the first FET 10A to flow a current from the drain terminal to the source terminal. When the controller 50 issues an OFF instruction to turn off the switch of the first FET 10A, the driver unit 20A applies an OFF voltage to the gate terminal of the first FET 10A to cut off the current flowing from the drain terminal to the source terminal.

[0027] The driver unit 20B is connected to a gate terminal of the second FET 10B to drive the second FET 10B based on an ON / OFF instruction from the controller 50. When the controller 50 issues an ON instruction to turn on the switch of the second FET 10B, the driver unit 20B applies an ON voltage to the gate terminal of the second FET 10B to flow a current from the source terminal to the drain terminal. When the controller 50 issues an OFF instruction to turn off the switch of the second FET 10B, the driver unit 20B applies an OFF voltage to the gate terminal of the second FET 10B to cut off the current flowing from the source terminal to the drain terminal.

[0028] The driver unit 20C is connected to a gate terminal of the third FET 10C to drive the third FET 10C based on an ON / OFF instruction from the controller 50. When the controller 50 issues an ON instruction to turn on the switch of the third FET 10C, the driver unit 20C applies an ON voltage to the gate terminal of the third FET 10C to flow a current from the drain terminal to the source terminal. When the controller 50 issues an OFF instruction to turn off the switch of the third FET 10C, the driver unit 20C applies an OFF voltage to the gate terminal of the third FET 10C to cut off the current flowing from the drain terminal to the source terminal.

[0029] The driver unit 20D is connected to a gate terminal of the fourth FET 10D to drive the fourth FET 10D based on an ON / OFF instruction from the controller 50. When the controller 50 issues an ON instruction to turn on the switch of the fourth FET 10D, the driver unit 20D applies an ON voltage to the gate terminal of the fourth FET 10D to flow a current from the source terminal to the drain terminal. When the controller 50 issues an OFF instruction to turn off the switch of the fourth FET 10D, the driver unit 20D applies an OFF voltage to the gate terminal of the fourth FET 10D to cut off the current flowing from the source terminal to the drain terminal.

[0030] Resistor R detects a voltage of the semiconductor switch module. One end of resistor R is connected to a first connection point X between the source terminals of second FET 10B and first FET 10A, and the other end of resistor R is connected to a second connection point Y between the source terminals of fourth FET 10D and third FET 10C.

[0031] The first voltage detector 30 detects a voltage applied to the resistor R. The first voltage detector 30 outputs a first detected voltage Vd obtained by detecting the voltage applied to the resistor R to the controller 50.

[0032] The second voltage detector 40 detects a voltage applied to the high-voltage load 2. The second voltage detector 40 outputs a second detected voltage Vout obtained by detecting the voltage applied to the high-voltage load 2 to the controller 50.

[0033] The controller 50 controls the bidirectional shutdown circuit 10 via the driver units 20A to 20D. The controller 50 includes an electronic circuit mainly comprising a known microcomputer including a central processing unit (CPU), a read-only memory (ROM), and a random access memory (RAM) forming a storage unit, and an interface. The controller 50 issues an ON / OFF instruction to the driver units 20A to 20D to control the driver units 20A to 20D based, for example, on a semiconductor drive signal output from an external device. The controller 50 also controls the bidirectional shutdown circuit 10 based on the first detected voltage Vd detected by the first voltage detector 30. For example, the controller 50 determines a malfunction of the bidirectional shutdown circuit 10 based on the first detected voltage Vd detected by the first voltage detector 30.The controller 50 also determines a malfunction of the bidirectional shutdown circuit 10 based on the second detected voltage Vout detected by the second voltage detector 40. For example, if the controller 50 determines that the bidirectional shutdown circuit 10 is malfunctioning, the controller 50 transmits an abnormality detection signal to a power supply management device (not shown) or the like to perform fail-safe processing, such as stopping the power supplied from the high-voltage battery HV with the power supply management device or the like. The controller 50 may include a malfunction determination unit that determines a malfunction of the bidirectional shutdown circuit 10 and a drive controller that separately drives and controls the bidirectional shutdown circuit 10.

[0034] The following is an explanation of an example of a malfunction determination performed by the semiconductor switch control device 1. As shown in Fig. As shown in Figure 2, the semiconductor switch control device 1 issues an ON instruction to the first to fourth FETs 10A to 10D to turn on all of the first to fourth FETs 10A to 10D. In the semiconductor switch control device 1, when the first connection point X and the second connection point Y of the resistor R have the same potential, all of the first to fourth FETs 10A to 10D are normally turned on because the voltage applied to the resistor R is 0V. In this case, in the semiconductor switch control device, 1 / 2 of a current I flowing from the high-voltage battery HV to the high-voltage load 2 flows through the first bidirectional shutdown circuit 11, and 1 / 2 of the current I flows through the second bidirectional shutdown circuit 12.

[0035] The following is an explanation of an example of an OFF-state malfunction in which the second FET 10B is not placed in an ON state but maintains an OFF state as shown in Fig. 3. The semiconductor switch control device 1 outputs an ON command to the first to fourth FETs 10A to 10D. In the case where the first, third, and fourth FETs 10A, 10C, 10D are normally put into the ON state, the second FET 10B enters an OFF-state malfunction in which the second FET 10B does not enter the ON state but remains in the OFF state, since the first connection point X and the second connection point Y of the resistor R have different potentials, the first detected voltage Vd is applied to the resistor R. Specifically, in the semiconductor switch control device 1, a voltage drop obtained by adding the voltage drop of the resistor R to the voltage drop of the fourth FET 10D becomes smaller than the voltage drop of the body diode DB of the second FET 10B.For this reason, in the semiconductor switch control device 1, the first connection point X of the resistor R has a potential higher than that of the second connection point Y of the resistor R, and a current I'' flows from the first connection point X of the resistor R to the second connection point Y of the resistor R. In this state, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs when the first detected voltage Vd applied to the resistor R is detected. For example, when the shift amount between the first detected voltage Vd and a predetermined first reference voltage is a positive voltage, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs in the second FET 10B. The current I'' is determined as “(Ron / (Ron + R + Ron) × I”.R is a resistance, Ron is a resistance when the first to fourth FETs 10A to 10D are in the ON state, and I is a current supplied from the high voltage battery HV.

[0036] The following is an explanation of an example of an OFF-state malfunction in which the third FET 10C is not set to the ON state but maintains the OFF state as shown in Fig. 4. The semiconductor switch control device 1 outputs an ON command to the first to fourth FETs 10A to 10D. In the case where the first, second, and fourth FETs 10A, 10B, and 10D are normally set to the ON state, but the third FET 10C experiences a malfunction in the OFF state because the first connection point X and the second connection point Y of the resistor R have different potentials, the first detected voltage Vd is applied to the resistor R. Specifically, in the semiconductor switch control device 1, the first connection point X of the resistor R has a potential higher than that of the second connection point Y of the resistor R, and a current I flows through the third FET 10C from the first connection point X of the resistor R to the second connection point Y of the resistor R.In this state, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs when detecting the first detected voltage Vd applied to the resistor R. For example, when the shift amount between the first detected voltage Vd and the first reference voltage is a positive voltage, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs in the third FET 10C. As shown in FIG. Fig. 3 and Fig. 4, the semiconductor switch control device 1 is capable of determining that an OFF-state malfunction occurs in one of the second FET 10B and the third FET 10C by detecting the first detected plus voltage Vd as a positive voltage, but is unable to specify which of the second FET 10B and the third FET 10C enters the OFF-state malfunction. The semiconductor switch control device 1 specifies which of the second FET 10B and the third FET 10C enters the OFF-state malfunction using a method for determining an ON-state malfunction, which will be described later in combination.

[0037] The following is an explanation of an example of an OFF-state malfunction in which the fourth FET 10D is not set to the ON state but maintains the OFF state, as shown in Fig. 5. The semiconductor switch control device 1 outputs an ON command to the first to fourth FETs 10A to 10D. In the case where the first, second, and third FETs 10A, 10B, 10C are normally set to the ON state, but the fourth FET 10D malfunctions in the OFF state because the first connection point X and the second connection point Y of the resistor R have different potentials, the first detected voltage Vd is applied to the resistor R.In the semiconductor switch control device 1, since a voltage drop obtained by adding the voltage drop of the resistor R to the voltage drop of the second FET 10B is smaller than the voltage drop of the body diode DD of the fourth FET 10D, the second connection point Y of the resistor R has a potential higher than that of the first connection point X of the resistor R, and a current I'' flows from the second connection point Y of the resistor R to the first connection point X of the resistor R. In this state, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs when the first detected voltage Vd applied to the resistor R is detected. For example, when the shift amount between the first detected voltage Vd and the first reference voltage is a negative voltage, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs in the fourth FET 10D.

[0038] The following is an explanation of an example of an OFF-state malfunction in which the first FET 10A is not set to the ON state but maintains the OFF state as shown in Fig. 6. The semiconductor switch control device 1 outputs an ON command to the first to fourth FETs 10A to 10D. In the case where the first, second, and fourth FETs 10A, 10B, 10D are normally set to the ON state, and the first FET 10A experiences an OFF-state malfunction because the first connection point X and the second connection point Y of the resistor R have different potentials, the first detected voltage Vd is applied to the resistor R. Specifically, in the semiconductor switch control device 1, the second connection point Y of the resistor R has a potential higher than that of the first connection point X of the resistor R, and a current I'' flows from the second connection point Y of the resistor R to the first connection point X of the resistor.In this state, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs when detecting the first detected voltage Vd applied to the resistor R. For example, when the shift amount between the first detected voltage Vd and the first reference voltage is a negative voltage, the semiconductor switch control device 1 determines that an OFF-state malfunction occurs in the first FET 10A. As shown in FIG. Fig. 5 and Fig. As shown in FIG. 6, the semiconductor switch control device 1 is capable of determining that an OFF-state malfunction occurs in one of the first FET 10A and the fourth FET 10D by detecting the first detected minus voltage Vd as a negative voltage, but is unable to specify which of the first FET 10A and the fourth FET 10D enters the OFF-state malfunction. The semiconductor switch control device 1 specifies which of the first FET 10B and the fourth FET 10C enters the OFF-state malfunction using a method for determining an ON-state malfunction, which will be described later in combination.

[0039] The following is an explanation of an example for determining an ON-state malfunction in which the first to fourth FETs 10A to 10D are not set to the OFF state but maintain the ON state, using the second detected voltage Vout detected by the second voltage detector 40. As shown in Fig. 7, the semiconductor switch control device 1 outputs an OFF instruction to the first to fourth FETs 10A to 10D. When the second detected voltage Vout exceeds a reference voltage (for example, 0 V), the semiconductor switch control device 1 determines that at least one of the first FET 10A and the second FET 10B enters an ON-state malfunction in which the one FET is not set to the OFF state but maintains the ON state. The semiconductor switch control device 1 also outputs an OFF instruction to the first to fourth FETs 10A to 10D. When the second detected voltage Vout is a reference voltage (for example, 0 V), the semiconductor switch control device 1 determines that the first and second FETs 10A, 10B are normal because the first FET 10A and the second FET 10B are set to an OFF state. Fig. 7 illustrates a part related to processing to determine an ON-state malfunction, and illustration of the other parts is omitted.

[0040] As in Fig. As shown in Figure 8, the semiconductor switch control device 1 issues an ON instruction to the first FET 10A and the third FET 10C, and issues an OFF instruction to the second FET 10B and the fourth FET 10D. When the second detected voltage Vout is equal to the reference voltage (high-voltage battery voltage HV), the semiconductor switch control device 1 determines that at least one of the second FET 10B and the fourth FET 10D enters an ON-state malfunction in which the one FET is not turned off but maintains the ON state.The semiconductor switch control device 1 outputs an ON instruction to the first FET 10A and the third FET 10C and an OFF instruction to the second FET 10B and the fourth FET 10D, and determines that the second and fourth FETs 10B, 10D are normally set to the OFF state when the second detected voltage Vout is not equal to the reference voltage (such as the voltage of the high-voltage battery HV) and a voltage drop occurs in the body diodes DB and DD of the second and fourth FETs 10B, 10D. Fig. 8 illustrates a part related to processing to determine an ON-state malfunction, and illustration of the other parts is omitted.

[0041] An explanation will now be given of an operation example of the semiconductor switch control device 1 with reference to Fig. 9 to Fig. 12. The controller 50 of the semiconductor switch control device 1 sets the first to fourth FETs 10A to 10D to the OFF state (step S1). Next, the controller 50 determines whether the second detected voltage Vout is equal to 0V. If the second detected voltage Vout is equal to 0V (Yes in step S2), the controller 50 determines that no ON-state malfunction occurs in which the first and third FETs 10A, 10C are not set to the OFF state but maintain the ON state. The controller 50 sets the first and third FETs 10A, 10C to the ON state (step S3). In step S3, the first and third FETs 10A, 10C are in the ON state, and the second and fourth FETs 10B, 10D are in the OFF state.Next, in step S4, the controller 50 determines whether the second detected voltage Vout is equal to a voltage obtained by subtracting a forward voltage VF of the body diodes of the second and fourth FETs 10B, 10D from a power supply voltage E serving as the voltage of the high-voltage battery HV (determines whether "Vout = E - VF"). If "Vout = E - VF" is satisfied (Yes in step S4), the controller 50 determines that no ON-state malfunction occurs in the second FET 10B or the fourth FET 10D. Next, the controller 50 sets the second and fourth FETs 10B, 10D to the ON state (step S5). In step S5, the first to fourth FETs 10A to 10D are in the ON state. Next, the controller 50 determines whether the second detected voltage Vout is equal to the power supply voltage E (step S6).If the second detected voltage Vout is equal to the power supply voltage E (Yes in step S6), the controller 50 determines whether the first detected voltage Vd is equal to 0V (step S7). If the first detected voltage Vd is equal to 0V (Yes in step S7), the controller 50 sets the fourth FET 10D to the OFF state (step S8). In step S8, the first and third FETs 10A, 10C are in the ON state, and the fourth FET 10D is in the OFF state. Thereafter, the controller 50 determines whether the second detected voltage Vout is equal to the power supply voltage E (step S9). If the second detected voltage Vout is equal to the power supply voltage E (Yes in step S9), the controller 50 sets the fourth FET 10D to the ON state and sets the second FET 10B to the OFF state (step S10). In step S10, the first, third and fourth FETs 10A, 10C, 10D are in the ON state and the second FET 10B is in the OFF state.Next, the controller 50 determines whether the second detected voltage Vout is equal to the power supply voltage E (step S11). If the second detected voltage Vout is equal to the power supply voltage E (Yes in step S11), the controller 50 determines that all of the first to fourth FETs 10A to 10D are normal, sets the second FET 10B to the ON state (step S12), and terminates the malfunction determination processing.

[0042] In the above-described step S6, if the second detected voltage Vout is not equal to the power supply voltage E (No in step S6), the controller 50 determines that the second FET 10B and the fourth FET 10D enter an OFF-state malfunction (step S15). Since the second and fourth FETs 10B, 10D enter the OFF-state malfunction in step S15 and the forward voltage VF appears in the body diodes of the second and fourth FETs 10B, 10D, the second detected voltage Vout is not equal to the power supply voltage E. Thereafter, the controller 50 executes fail-safe processing because the second and fourth FETs 10B, 10D are not functioning (step S19). For example, the controller 50 transmits an abnormality detection signal to the power supply management device or the like to stop the power supplied from the high-voltage battery HV with the power supply management device or the like.

[0043] In the above-described step S9, if the second detected voltage Vout is not equal to the power supply voltage E (No in step S9), the controller 50 specifies that the first FET 10A and the second FET 10B enter an OFF-state malfunction (step S17). In step S17, the first and second FETs 10A, 10B enter an OFF-state malfunction, and the forward voltage VF appears in the body diodes of the second and fourth FETs 10B, 10D. For this reason, the second detected voltage Vout is not equal to the power supply voltage E.

[0044] Additionally, in the above-described step S11, if the second detected voltage Vout is not equal to the power supply voltage E (No in step S11), the controller 50 specifies that the third FET 10C and the fourth FET 10D enter an OFF-state malfunction (step S18). In step S18, the third and fourth FETs 10C, 10D enter an OFF-state malfunction, and the forward voltage VF appears in the body diodes of the second and fourth FETs 10B, 10D. For this reason, the second detected voltage Vout is not equal to the power supply voltage E. First malfunction determination mode

[0045] In the above-described step S2, if the second detected voltage Vout is not equal to 0V (No in step S2), the controller determines that the first FET 10A or the third FET 10C enters an ON-state malfunction and executes a first malfunction determination mode (step S13). The first malfunction determination mode is executed according to the Fig. 10. In step S13a, the controller 50 determines whether the second detected voltage Vout is equal to a voltage obtained by subtracting the forward voltage VF of the body diodes of the second and fourth FETs 10B, 10D from the power supply voltage E (determines whether "Vout = E - VF"). If "Vout = E - VF" is satisfied (Yes in step S13a), the controller 50 sets the second FET 10B to the ON state (step S13b). In step S13b, the first, third, and fourth FETs 10A, 10C, 10D are in the OFF state, and the second FET 10B is in the ON state. Thereafter, the controller 50 determines whether the second detected voltage Vout is equal to the power supply voltage E (step S13c). When the second detected voltage Vout is equal to the power supply voltage E (Yes in step S13c), the controller 50 estimates that the first FET 10A enters an ON-state malfunction (step S13d).If the second detected voltage Vout is not equal to the power supply voltage E (No in step S13c), the controller 50 determines whether the first detected voltage Vd is a negative voltage (step S13e). If the first detected voltage Vd is a negative voltage (Yes in step S13e), the controller 50 estimates that the third FET 10C is in an ON-state malfunction (step S13f). If the first detected voltage Vd is not a negative voltage but 0V (No in step S13e), the controller 50 specifies that the second FET 10B is in an OFF-state malfunction (step S13g). Thereafter, the controller 50 sets the second FET 10B to the OFF state and sets the fourth FET 10D to the ON state (step S13h). In step S13h, the first, second, and third FETs 10A, 10B, 10C are in the OFF state, and the fourth FET 10D is in the ON state.Next, the controller 50 determines whether the second detected voltage Vout is equal to the power supply voltage E (step S13i). If the second detected voltage Vout is equal to the power supply voltage E (Yes in step S13i), the controller 50 specifies that the third FET 10C enters an ON-state malfunction (step S13j). If the second detected voltage Vout is not equal to the power supply voltage E (No in step S13i), the controller 50 determines whether the first detected voltage Vd is a plus voltage (step S13k). If the first detected voltage Vd is a plus voltage (Yes in step S13k), the controller 50 specifies that the first FET 10A enters an ON-state malfunction (step S131).If the first detected voltage Vd is not a positive voltage (No in step S13k), the controller 50 estimates that the first and third FETs 10A, 10C are in ON-state malfunction, and the second and fourth FETs 10B, 10D are in OFF-state malfunction (step S13m). In the above-described step S13a, if "Vout = E - VF" is not satisfied (No in step S13a), the controller 50 estimates that the first and third FETs 10A, 10C are in ON-state malfunction, or that the second and fourth FETs 10B, 10D are in ON-state malfunction (step S13n). Second malfunction determination mode

[0046] In the above-described step S4, if "Vout = E - VF" is not satisfied (No in step S4), the controller 50 estimates that the first and third FETs 10A, 10C are in an OFF-state malfunction, or that the second and fourth FETs 10B, 10D are in an ON-state malfunction, and executes a second malfunction determination mode (step S14). The second malfunction determination mode is executed according to the Fig. 11. The controller 50 determines whether the second detected voltage Vout is equal to 0V (step S14a). If the second detected voltage Vout is equal to 0V (Yes in step S14a), the controller 50 specifies that the first and third FETs 10A, 10C enter an OFF-state malfunction (step S14b). If the second detected voltage Vout is not equal to 0V (No in step S14a), the controller 50 determines whether the first detected voltage Vd is a plus voltage (step S14c). If the first detected voltage Vd is a plus voltage (Yes in step S14c), the controller 50 specifies that the fourth FET 10D enters an ON-state malfunction (step S14d). If the first detected voltage Vd is not a plus voltage (No in step S14c), the controller 50 determines whether the first detected voltage Vd is a minus voltage (step S14e).If the first detected voltage Vd is a negative voltage (Yes in step S14e), the controller 50 specifies that the second FET 10B enters an ON-state malfunction (step S14f). If the first detected voltage Vd is not a negative voltage (NO in step S14e), the controller 50 specifies that the second and fourth FETs 10B, 10D enter an ON-state malfunction (step S14g). If any malfunction is specified in the first to fourth FETs 10A to 10D in the second malfunction determination mode, the controller 50 executes the processing shown in FIG. Fig. 9 described fail-safe processing (step S19). Third malfunction detection mode

[0047] In the above-described step S7, if the first detected voltage Vd is not equal to 0V (No in step S7), the controller 50 estimates that the first, second, and third FETs 10A, 10B, 10C, or the fourth FET 10D are in an OFF-state malfunction and executes a third malfunction determination mode (step S16). The third malfunction determination mode is executed according to the Fig. 12. The controller 50 determines whether the first detected voltage Vd is a plus voltage (step S16a). If the first detected voltage Vd is a plus voltage (Yes in step S16a), the controller 50 sets the fourth FET 10D to the OFF state (step S16b). In step S16b, the first to third FETs 10A to 10C are in the ON state, and the fourth FET 10D is in the OFF state. Next, in step S16c, the controller 50 determines whether the second detected voltage Vout is equal to a voltage obtained by subtracting the forward voltage VF of the body diodes of the third and fourth FETs 10B, 10D from the power supply voltage E (determines whether "Vout = E - VF" is satisfied). When “Vout = E - VF” is satisfied (Yes in step S16c), the controller 50 specifies that the second FET 10B enters an OFF-state malfunction (step S16d).If “Vout = E - VF” is not satisfied (No in step S16c), the controller 50 specifies that the fourth FET 10C enters an OFF-state malfunction (step S16e).

[0048] In step S16a described above, if the first detected voltage Vd is not a positive voltage (NO in step S16a), the controller 50 sets the second FET 10B to the OFF state (step S16f). In step S16f, the first, third, and fourth FETs 10A, 10C, 10D are in the ON state, and the second FET 10B is in the OFF state. Next, in step S16g, the controller 50 determines whether the second detected voltage Vout is equal to a voltage obtained by subtracting the forward voltage VF of the body diodes of the second and fourth FETs 10B, 10D from the power supply voltage E (determine whether "Vout = E - VF" is satisfied). If "Vout = E - VF" is satisfied (Yes in step S16g), the controller 50 specifies that the fourth FET 10D enters an OFF-state malfunction (step S16h). If "Vout = E - VF" is not satisfied (No in step S16g), the controller 50 specifies that the first FET 10A enters an OFF-state malfunction (step S16i).When any malfunction is specified in the first to fourth FETs 10A to 10D in the third malfunction determination mode, the controller 50 executes the steps shown in FIG. Fig. 9 described fail-safe processing (step S19).

[0049] As described above, the semiconductor switch control device 1 according to the first embodiment includes a bidirectional shutdown circuit 10 that is installed between the high-voltage battery HV and the high-voltage load 2 and transmits or shuts off a current bidirectionally flowing between the high-voltage battery HV and the high-voltage load 2, the resistor R for detecting a voltage of the bidirectional shutdown circuit 10, the first voltage detector 30 that detects a voltage applied to the resistor R, and the controller 50 that determines a malfunction of the bidirectional shutdown circuit 10 based on a first detected voltage Vd detected by the first voltage detector 30.The bidirectional shutdown circuit 10 includes the second FET 10B and the first FET 10A including respective source terminals connected in series, and the fourth FET 10D and the third FET 10C including corresponding source terminals connected in series. One end of the resistor R is connected between the source terminals of the second FET 10B and the first FET 10A, and the other end of the resistor R is connected between the source terminals of the fourth FET 10D and the third FET 10C. With this structure, the semiconductor switch control device 1 is capable of determining an OFF-state malfunction of one of the first to fourth FETs 10A to 10D by detecting the voltage applied to the resistor R.Accordingly, the semiconductor switch control device 1 is capable of determining the malfunction of the bidirectional shutdown circuit 10 using a resistor R, and suppresses an increase in the size of the device. The semiconductor switch control device 1 has a structure in which no resistor R is disposed in the main current path through which the current flows, and suppresses the loss due to energization. The semiconductor switch control device 1 is also capable of improving the reliability of the vehicle power supply system 100 by determining a malfunction of the first to fourth FETs 10A to 10D.

[0050] In the semiconductor switch control device 1, when an instruction to turn on all of the first to fourth FETs 10A to 10D is issued, the controller 50 determines that any one of the first to fourth FETs 10A to 10D enters an OFF-state malfunction by which the FET is in the OFF state, based on the shift amount between the first detected voltage Vd and the predetermined first reference voltage. In this way, the semiconductor switch control device 1 can determine that any one of the first to fourth FETs 10A to 10D enters an OFF-state malfunction, and the time for determining a malfunction is reduced compared to the case of separately determining a malfunction of each of the first to fourth FETs 10A to 10D.

[0051] Additionally, in the semiconductor switch control device 1, the controller 50 determines that either the second FET 10B or the third FET 10C enters an OFF-state malfunction when the shift amount between the first detected voltage Vd and the first reference voltage is a positive voltage, and determines that one of the first FET 10A and the fourth FET 10D enters an OFF-state malfunction when the shift amount between the first detected voltage Vd and the first reference voltage is a negative voltage. In this way, the semiconductor switch control device 1 is enabled to narrow down the first to fourth FETs 10A to 10D that enter an OFF-state malfunction and easily specify the first to fourth FETs 10A to 10D that enter an OFF-state malfunction.

[0052] In the semiconductor switch control device 1, the controller 50 determines a malfunction of the bidirectional shutdown circuit 10 based on the second detected voltage Vout detected by the second voltage detector 40. For example, the semiconductor switch control device 1 determines an ON-state malfunction in which any one of the first to fourth FETs 10A to 10D is in the ON state based on the second detected voltage Vout. In this way, the semiconductor switch control device 1 is able to determine an ON-state malfunction and more accurately determine a malfunction of the first to fourth FETs 10A to 10D.

[0053] In the semiconductor switch control device 1, the controller 50 specifies which of the first to fourth FETs 10A to 10D enters an OFF-state malfunction based on the second detected voltage Vout detected by the second voltage detector 40 and command values ​​for turning on / off the first to fourth FETs 10A to 10D in an OFF-state malfunction of the bidirectional shutdown circuit 10. In this way, the semiconductor switch control device 1 can specify which of the first to fourth FETs 10A to 10D enters an OFF-state malfunction and facilitate the recovery work.

[0054] The semiconductor switch control device 1 may include a plurality of bidirectional shutdown circuits 10 to make the device redundant and improve the reliability of the vehicle power supply system 100. Second embodiment

[0055] The following is an explanation of a semiconductor switch control device 1A according to a second embodiment 2. The semiconductor switch control device 1A according to the second embodiment differs from the semiconductor switch control device 1 of the first embodiment in that the drain terminals are connected in the second embodiment. In the second embodiment, constituent elements similar to those in the first embodiment are denoted by the same reference numerals, and a detailed explanation thereof will be omitted. The semiconductor switch control device 1A includes a bidirectional shutdown circuit 70 including a first bidirectional shutdown circuit 71 and a second bidirectional shutdown circuit 72. The first bidirectional shutdown circuit 71 and the second bidirectional shutdown circuit 72 are connected in parallel.The first bidirectional shutdown circuit 71 includes an FET 11A and an FET 11B, and the second bidirectional shutdown circuit 72 includes an FET 11C and an FET 11D. Here, the FET 11A is referred to as a first FET, the FET 11B is referred to as a second FET, the FET 11C is referred to as a third FET, and the FET 11D is referred to as a fourth FET.

[0056] The first FET 10A functions as a first forward switch when a current flows from the high-voltage battery HV to the high-voltage load 2, and functions as a first reverse switch when the current flows from the high-voltage load 2 to the high-voltage battery HV. A body diode Da of the first FET 11A includes an anode terminal connected to a positive electrode of the high-voltage battery HV and a cathode terminal connected to the high-voltage load 2 side.

[0057] The second FET 11B functions as a first reverse switch when a current flows from the high-voltage battery HV to the high-voltage load 2, and functions as a first forward switch when a current flows from the high-voltage load 2 to the high-voltage battery HV. A body diode Db of the second FET 11B includes an anode terminal connected to the high-voltage load 2 and a cathode terminal connected to the positive electrode side of the high-voltage battery HV. Drain terminals of the second FET 11B and the first FET 11A are connected in series, a source terminal of the first FET 11A is connected to the high-voltage battery HV, and a source terminal of the second FET 11B is connected to the high-voltage load 2.

[0058] The third FET 10A functions as a first forward switch when current flows from the high-voltage battery HV to the high-voltage load 2, and functions as a first reverse switch when current flows from the high-voltage load 2 to the high-voltage battery HV. A body diode Da of the first FET 11A includes an anode terminal connected to a positive electrode of the high-voltage battery HV and a cathode terminal connected to the high-voltage load 2 side.

[0059] The fourth FET 11D functions as a first reverse switch when current flows from the high-voltage battery HV to the high-voltage load 2, and functions as a first forward switch when current flows from the high-voltage load 2 to the high-voltage battery HV. A body diode Dd of the fourth FET 11D includes an anode terminal connected to the high-voltage load 2 and a cathode terminal connected to the positive electrode side of the high-voltage battery HV. Drain terminals of the third FET 11C and the fourth FET 11D are connected in series, a source terminal of the third FET 11C is connected to the high-voltage battery HV, and a source terminal of the fourth FET 11D is connected to the high-voltage load 2.

[0060] One end of the resistor R is connected to the first connection point X between the drain terminals of the second FET 11B and the first FET 11A, and the other end of the resistor R is connected to the second connection point Y between the drain terminals of the fourth FET 11D and the third FET 11C. The first voltage detector 30 outputs a first detected voltage Vd obtained by detecting the voltage applied to the resistor R to the controller 50.

[0061] As described above, the semiconductor switch control device 1A according to the second embodiment includes a bidirectional shutdown circuit 70 that is installed between the high-voltage battery HV and the high-voltage load 2 and transmits or shuts off a current bidirectionally flowing between the high-voltage battery HV and the high-voltage load 2, the resistor R for detecting a voltage of the bidirectional shutdown circuit 70, the first voltage detector 30 that detects a voltage applied to the resistor R, and the controller 50 that determines a malfunction of the bidirectional shutdown circuit 70 based on a first detected voltage Vd detected by the first voltage detector 30.The bidirectional shutdown circuit 70 includes the second FET 11B and the first FET 11A including their respective drains connected in series, and the fourth FET 11D and the third FET 11C including their respective drains connected in series. One end of the resistor R is connected between the drains of the second FET 11B and the first FET 11A, and the other end of the resistor R is connected between the drains of the fourth FET 11D and the third FET 11C. With this structure, the semiconductor switch control device 1A produces effects similar to those of the semiconductor switch control device 1 of the first embodiment, even with the structure in which the drains are connected in series. Third embodiment

[0062] The following is an explanation of a semiconductor switch control device 1B according to a third embodiment. The semiconductor switch control device 1B according to the third embodiment differs from the semiconductor switch control device 1 according to the first embodiment in that the semiconductor switch control device 1B includes two batteries E1 and E2. Each of the batteries E1 and E2 is, for example, a 12V battery for a vehicle. In the third embodiment, constituent elements similar to those in the first embodiment are denoted by the same reference numerals, and detailed explanations thereof will be omitted. The semiconductor switch control device 1B has a structure in which the bidirectional cutoff circuit 10 is arranged between a positive electrode of the battery E1 and a positive electrode of the battery E2.The semiconductor switch control device 1B transmits or blocks a current flowing from the battery E1 or the battery E2 to a load 4. As described above, the semiconductor switch control device 1B can be applied to the vehicle power supply system 100 having two batteries E1 and E2. A generator (ALT) 5 charges the batteries E1 and E2.

[0063] A semiconductor switch control device according to each of the present embodiments includes a semiconductor switch module installed between a power supply and a load, which transmits or cuts off a current bidirectionally flowing between the power supply and the load, a resistor for detecting a voltage of the semiconductor switch module, a first voltage detector for detecting a voltage applied to the resistor, and a controller for determining a malfunction of the semiconductor switch module based on a first detected voltage detected by the first voltage detector. The semiconductor switch module includes a first forward switch and a first reverse switch, each including source terminals connected in series, and a second forward switch and a second reverse switch, each including source terminals connected in series.The resistor has one end connected between the source terminals of the first forward switch and the first reverse switch, and the other end connected between the source terminals of the second forward switch and the second reverse switch. With this structure, the semiconductor switch control device is capable of determining a malfunction of the semiconductor switch module using a resistor and suppressing an increase in the size of the device.

[0064] Although the invention has been described with reference to specific embodiments for a complete and clear disclosure, the appended claims are not intended to be limited thereto, but are to be construed to include all modifications and alternative constructions that may occur to one skilled in the art which fall within the basic teachings presented herein.

Claims

[1] A semiconductor switch control device comprising: a semiconductor switching module installed between a power supply and a load, which transmits or switches a current flowing bidirectionally between the power supply and the load; a resistor that detects a voltage of the semiconductor switching module; a first voltage detector that detects a voltage applied to the resistor; and a controller configured to determine a malfunction of the semiconductor switching module based on a first detected voltage detected by the first voltage detector, wherein the semiconductor switching module includes a first semiconductor switching module, and a second semiconductor switching module connected in parallel to the first semiconductor switching module, the first semiconductor switching module comprises a first forward switch having a body diode arranged in a forward direction serving as a direction in which the current flows, and a first reversing switch arranged adjacent to the first forward switch and comprising a body diode arranged in a reverse direction opposite to the forward direction, the first forward switch and the first reverse switch each comprise corresponding source terminals connected in series and respective drain terminals, one of the drain terminals being connected to the power supply and the other of the drain terminals being connected to the load, the second semiconductor switching module comprises a second forward switch having a body diode arranged in the forward direction, and a second reversing switch arranged adjacent to the second forward switch and comprising a body diode arranged in the reverse direction, the second forward switch and the second reverse switch each comprise respective source terminals connected in series and respective drain terminals, one of the drain terminals being connected to the power supply and the other of the drain terminals being connected to the load, and the resistor has one end connected between the source terminals of the first forward switch and the first reversing switch, and the other end connected between the source terminals of the second forward switch and the second reversing switch. [2] A semiconductor switch control device comprising: a semiconductor switching module installed between a power supply and a load, which transmits or switches a current flowing bidirectionally between the power supply and the load; a resistor that detects a voltage of the semiconductor switching module; a first voltage detector that detects a voltage applied to the resistor; and a controller configured to determine a malfunction of the semiconductor switching module based on a first detected voltage detected by the first voltage detector, wherein the semiconductor switch module includes a first semiconductor switching module, and a second semiconductor switching module connected in parallel to the first semiconductor switching module, the first semiconductor switching module comprises a first forward switch comprising a body diode arranged in a forward direction serving as a direction in which the current flows, and a first reversing switch arranged adjacent to the first forward switch and comprising a body diode arranged in a reverse direction opposite to the forward direction, the first forward switch and the first reverse switch each comprise corresponding drain terminals connected in series and respective source terminals, one of the source terminals being connected to the power supply and the other of the source terminals being connected to the load, the second semiconductor switching module comprises a second forward switch having a body diode arranged in the forward direction, and a second reversing switch arranged adjacent to the second forward switch and comprising a body diode arranged in the reverse direction, the second forward switch and the second reverse switch each comprise corresponding drain terminals connected in series and respective source terminals, one of the source terminals being connected to the power supply and the other of the source terminals being connected to the load, and the resistor includes one end connected between the drain terminals of the first forward switch and the first reversing switch, and the other end connected between the drain terminals of the second forward switch and the second reversing switch. [3] The semiconductor switch control device according to claim 1 or 2, wherein the controller determines that the first forward switch, the first reverse switch, the second forward switch, or the second reverse switch enters an OFF-state failure in which the particular switch is in an OFF state, based on a shift amount between the first detected voltage and a predetermined first reference voltage when an instruction is issued to turn on each of the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch. [4] A semiconductor switch control device according to claim 3, wherein the controller determines that the first forward switch or the second reversing switch enters the OFF-state malfunction when the shift amount between the first detected voltage and the first reference voltage is a positive voltage, and the controller determines that the first reversing switch or the second forward switch enters the OFF-state malfunction when the shift amount between the first detected voltage and the first reference voltage is a negative voltage. [5] A semiconductor switch control device according to any one of claims 1 to 4, further comprising: a second voltage detector for detecting a voltage applied to the load, wherein the controller determines a malfunction of the semiconductor switching module based on a second detected voltage detected by the second voltage detector. [6] The semiconductor switch control device according to claim 5, wherein the controller specifies which of the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch enters an OFF-state malfunction based on the second detected voltage detected by the second voltage detector and command values ​​for turning on / off the first forward switch, the first reverse switch, the second forward switch, and the second reverse switch in the OFF-state malfunction of the semiconductor switch module.

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