Communication of combined speed and synchronization signals between vehicle control units
Patent Information
- Application Number
- DE102019002683
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2018-05-09
- Filing Date
- 2019-04-11
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2039-04-11
Smart Images

Figure 00000000_0000_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to techniques related to vehicles, and more particularly, to methods for communicating speed and synchronization signals between control units in a vehicle. The present disclosure also relates to corresponding control units, a vehicle including the control units, and a computer program. BACKGROUND
[0002] An electrical control unit (ECU) is an integrated electronic device, essentially a digital computer, that controls one or more electrical systems (or electrical subsystems) of a vehicle based, for example, on information read from sensors located at various locations and in various components of the vehicle. In more advanced vehicles, such as buses, trucks, heavy-duty trucks, work vehicles, and advanced cars, a network such as a CAN (Control Unit Network) network is used to handle communication between various ECUs in the vehicle. The ECUs connected to the CAN can handle numerous functions in the vehicle. These include functions related to gear shifting, steering, engine control, braking, air conditioning, lighting, driver comfort, alarms, and security.
[0003] Currently, a vehicle's electrical systems are generally not synchronized. Typically, each ECU has its own internal clock. Each electrical system also typically has its own sensors. For example, the engine system might have a speed sensor, and the transmission system might have a speed sensor. Alternatively, sensor data, e.g., a speed signal, is sent over a bus, such as the ECU network (CAN) bus. However, the CAN bus is a priority-based bus, and due to other traffic on the bus, it is not certain when messages will be sent. Thus, using only the CAN bus to communicate the speed signal makes the speed signal non-deterministic, and the update frequency is low, limiting the usefulness of the speed signal.
[0004] JP 2015 - 157 503 A discloses a control system that provides a synchronization signal to multiple control units of the control system. The control units can execute commands based on the synchronization signal.
[0005] From another publication (RODRIGUEZ-NAVAS, Guillermo ; PROENZA, Juliän: Clock synchronisation in CAN distributed embedded systems. In: Proceedings / 3 rd intl. workshop on real-time networks. June 29 th ,2004. 1 st edition. Aveiro : Universidade de Aveiro, 2004. pp. 35-38. - ISBN 972-789-136-5) further possibilities for synchronising signals in a CAN network are known. SUMMARY
[0006] It is one object of the disclosure to mitigate at least some of the disadvantages associated with existing solutions. It is yet another object to provide improvements to ECU-to-ECU signaling in a vehicle, at least with respect to improving the accuracy of communicating speed and synchronization signals between control units in a vehicle. It is another object to achieve this without adding a lot of additional hardware.
[0007] The solution according to the invention is achieved by a first control unit and by a second control unit for use in a vehicle having the features of patent claim 1 and patent claim 7, respectively, by a drive train having the features of patent claim 10, by a vehicle having the features of patent claim 11, by a method for use in a first control unit having the features of patent claim 12, by a method for use in a second control unit having the features of patent claim 13, by a computer program having the features of patent claim 14 and by a computer-readable data carrier having the features of patent claim 15. Advantageous further developments emerge from the subclaims.
[0008] According to a first aspect, the disclosure relates to a first control unit for use in a vehicle. The first control unit includes control circuitry, an internal clock, an input, and one or more outputs. The input is configured to receive a speed signal from a speed sensor comprising a pulse train corresponding to a speed of a rotating object in the vehicle. The one or more outputs are configured to enable transmission to a second control unit.The control circuits are configured to generate a combined synchronization and speed signal by integrating a first synchronization message into an incoming speed signal received at the input to generate a second synchronization message, the first synchronization message and the second synchronization message together indicating a timing of the internal clock, and to send the first synchronization message and the second synchronization message to the second control unit at the one or more outputs. This enables time synchronization between the first and second control units with minimal hardware changes (one additional I / O). At the same time, it is possible to communicate a speed signal from the first control unit to the second control unit. The speed signal can be used to detect, for example, driveline fluctuations, clutch slippage, etc.to detect. One of the functions alone might not justify the additional I / O. However, using a single wire for both purposes is much more justifiable.
[0009] In some embodiments, the one or more outputs comprise a single-wire output port, and the control circuitry is configured to send the combined synchronization and speed signal to the single-wire output port. This allows both the synchronization signal and the speed signal to be communicated using a single additional output (i.e., a dedicated I / O).
[0010] In some embodiments, the control circuitry is configured to interpret the received speed signal, and the control circuitry is configured to generate and / or transmit the first and second synchronization messages in response to interpreting the received speed signal. Accordingly, errors that might occur during startup are not present in the combined synchronization and speed signal.
[0011] In some embodiments, the one or more outputs comprise a communication bus interface, and the control circuitry is configured to transmit the second synchronization message on the communication bus interface. The second synchronization message transmitted on a communication bus may simplify the synchronization information needed to be transmitted in the first synchronization message. The second synchronization message may also increase the accuracy of the synchronization.
[0012] In some embodiments, the first synchronization message is a synchronization pattern, and the second synchronization message specifies a relationship between the synchronization pattern and the internal clock. This allows the timing of the internal clock to be estimated by including a second control unit.
[0013] In some embodiments, the control circuits are configured to integrate both the first synchronization message and the second synchronization message into the combined synchronization and speed signal. This allows all information needed to communicate synchronization and speed information to be sent on a single wire.
[0014] In some embodiments, the first synchronization message is an incoming synchronization pattern indicating that actual synchronization will occur within a predefined time, and the second synchronization message is a synchronization pattern indicating the timing of the internal clock. The incoming synchronization pattern mitigates signal errors on the receive side.
[0015] In some embodiments, the first control unit is a master control unit and the second control unit is a slave control unit of the first control unit.
[0016] In some embodiments, the control circuits include real-time processing hardware configured to generate the combined synchronization and speed signal. This allows the combined synchronization and speed signal to be generated with negligible delay.
[0017] According to a second aspect, the disclosure relates to a second control unit for use in a vehicle. The second control unit comprises an internal clock, an input, and control circuitry. The input is configured to receive from a first control unit a combined synchronization and speed signal comprising a pulse train having a frequency corresponding to a speed of a rotating object in the vehicle, and the control circuitry is configured to detect a first synchronization message incorporated into an incoming combined synchronization and speed signal received at the one or more inputs, to receive a second synchronization message from the first control unit, and to determine a timing of an internal clock of the first control unit based on the first synchronization message and the second synchronization message.This allows the second control unit to receive speed and synchronization information from the first control unit with minimal hardware additions.
[0018] In some embodiments, the control circuits are configured to adjust a timing of an internal clock of the second control unit based on the determined timing. This allows the subsystems to operate synchronously and avoid unnecessary delays.
[0019] In some embodiments, the one or more inputs may include a single-wire input port configured to receive the combined synchronization and speed signal from the first controller.
[0020] In some embodiments, the control circuits are configured to detect a predetermined pulse sequence in the incoming combined synchronization and speed signal.
[0021] In some embodiments, the control circuits are configured to ignore pulse trains having a frequency above a predefined threshold.
[0022] In some embodiments, the one or more inputs comprise a communication bus interface, and the control circuitry is configured to receive the second synchronization message at the communication bus interface. In some embodiments, the first synchronization message is a synchronization pattern, and the second synchronization message indicates a relationship between the synchronization pattern and the internal clock of the first control unit.
[0023] In some embodiments, the control circuits are configured to detect a second synchronization message embedded in the incoming combined synchronization and speed signal. In some embodiments, the first synchronization message is an incoming synchronization pattern indicating that actual synchronization will occur within a predefined time, and the second synchronization message is a synchronization pattern indicating the timing of the first control unit's internal clock.
[0024] According to a third aspect, the disclosure relates to a powertrain comprising the first control unit and the second control unit. This allows the engine speed, for example, to be communicated to the transmission system, allowing clutch slip to be estimated. By tracking clutch slip, the powertrain ECUs can estimate the transmitted torque during takeoff, where the slip could be recalculated as the transmitted torque. Detection of a static twisting offset could be recalculated for the currently transmitted torque using information about clutch type and clutch wear. Furthermore, microslip during driving can be used to isolate vibrations from the engine. It may then also be desirable to monitor microslip.
[0025] According to a fourth aspect, the disclosure relates to a vehicle comprising the powertrain of the third aspect.
[0026] According to a fifth aspect, the disclosure relates to a method for use in a first control unit in a vehicle to communicate synchronization and speed information to a second control unit of the vehicle. The first control unit has an internal clock. The method includes receiving, from a speed sensor, a speed signal comprising a pulse train having a frequency corresponding to a speed of a rotating object in the vehicle, and generating a combined synchronization and speed signal by integrating a first synchronization message into the received speed signal.The method further comprises generating a second synchronization message, wherein the first synchronization message and the second synchronization message together indicate a timing of the internal clock, and sending the combined synchronization and speed signal and the second synchronization message to the second control unit.
[0027] In some embodiments, the first synchronization message is a predetermined pulse sequence incorporated into the combined synchronization and speed signal.
[0028] In some embodiments, the method includes interpreting the received speed signal and generating and / or transmitting in response to the interpreting.
[0029] In some embodiments, the second synchronization message is also integrated into the combined synchronization and speed signal.
[0030] In some embodiments, the first synchronization message is an incoming synchronization pattern indicating that actual synchronization will occur within a predefined time, and the second synchronization message is an actual synchronization pattern indicating the timing of the internal clock.
[0031] In some embodiments, the second synchronization message is a message sent on a communication bus of the vehicle.
[0032] In some embodiments, the first synchronization message is a synchronization pattern, and the second synchronization message indicates a relationship between the internal clock and the synchronization pattern.
[0033] In some embodiments, transmitting includes transmitting the combined synchronization and speed signal between the powertrain ECUs.
[0034] According to a sixth aspect, the disclosure relates to a method for use in a second control unit of a vehicle to receive synchronization and speed information from a first control unit of the vehicle. The method comprises receiving from the first control unit a combined synchronization and speed signal comprising a pulse train having a frequency corresponding to a speed of a rotating object in the vehicle, and detecting a first synchronization message incorporated into the received combined synchronization and speed signal. The method further comprises receiving a second synchronization message from the first control unit and determining a timing of an internal clock of the first control unit based on the first synchronization message and the second synchronization message.
[0035] In some embodiments, the method includes adjusting a timing of an internal clock of the second control unit based on the predetermined timing.
[0036] In some embodiments, the method includes detecting a predetermined pulse sequence in the incoming combined synchronization and speed signal. In some embodiments, detecting includes ignoring pulse sequences having a frequency above a predefined threshold.
[0037] In some embodiments, receiving the second synchronization message comprises receiving the second synchronization message on a communication bus. In some embodiments, the first synchronization message is a synchronization pattern, and the second synchronization message indicates a relationship between the synchronization pattern and a timing of the internal clock of the first control unit.
[0038] In some embodiments, receiving the second synchronization message comprises detecting a synchronization pattern incorporated into the combined synchronization and speed signal. In some embodiments, the first synchronization message is an incoming synchronization message, and the second synchronization message is a synchronization pattern indicative of a timing of the internal clock of the first control unit.
[0039] According to a seventh aspect, the disclosure relates to a computer program comprising instructions which, when the program is executed by a computer, cause the computer to perform one of the methods described above and below.
[0040] According to an eighth aspect, the disclosure relates to a computer-readable medium comprising instructions that, when executed by a computer, cause the computer to perform one of the methods described above and below. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] They show: Fig. 1 a vehicle in which the proposed control units and methods can be used. Fig. 2 a drive train of the vehicle in Fig. 1. Fig. 3 a gear sensor. Fig. 4 the communication between a first and a second control unit according to a first embodiment. Fig. 5 the communication between a first and a second control unit according to a second embodiment. Fig. 6 the internal clock of the first control unit and the internal clock of the second control unit. Fig. 7 the synchronization of the internal clock of the second control unit. Fig. 8 a first control unit according to some embodiments. Fig. 9 a second control unit according to some embodiments. Fig. 10 illustrates a method performed in a first control unit according to some embodiments. Fig. 11 illustrates a method performed in a second control unit according to some embodiments. DETAILED DESCRIPTION
[0042] It is generally desirable to synchronize the internal clocks of a vehicle's subsystems to avoid unnecessary delays and to ensure that the subsystem control units operate synchronously.
[0043] Additionally, it may be necessary to communicate speed information between subsystems in a vehicle with high accuracy. One reason for communicating speed information between control units in a vehicle is to be able to detect powertrain variations, such as clutch slip. Clutch slip can, in principle, be detected by comparing the rotation of the engine shaft with the rotation of the corresponding shaft on the transmission side. However, the engine and transmission typically belong to separate electrical subsystems in the vehicle. To accurately determine clutch slip, the engine speed measurement on the engine side must be communicated to the transmission subsystem.
[0044] In general, it is desirable to limit the number of additional wires between control units. Accordingly, it might be difficult to justify an additional wire for each of these functions. Therefore, it is proposed here to design an electrical control unit (ECU) to transmit both speed and synchronization information over a single wire. This solution is useful in a system comprising at least two control units, one typically acting as the master and the others as slaves. In the proposed solution, the master ECU has a speed signal input, which is interpreted by the master ECU and transmitted as a digital pulse train with a frequency corresponding to a speed of the rotating measured object. A synchronization message is also integrated into the signal.This synchronization signal can be used to synchronize / compensate the clock of the slave ECUs.
[0045] The proposed solution requires only one additional wire (or input / output, I / O) per control unit, with the rest of the implementation handled by software. However, there are two reasons for this additional I / O between the ECUs. One is to provide a synchronization signal to align / compensate the ECUs' internal clocks, avoiding unnecessary delays and causing the ECUs to operate in synchronization. The other is to communicate accurate information about a rotating object. While either function alone might not justify the additional wire, using one wire for both purposes is a better reason.
[0046] Fig. 1 depicts a vehicle 1 in which the proposed control units and methods can be used. The vehicle 1 of Fig. 1 comprises a drive train 2. The vehicle 1 may, for example, be a work vehicle, such as a heavy truck, a bus, or other heavy vehicle; or the vehicle 1 may be a normal car.
[0047] Fig. 2 forms a drive train of the vehicle in Fig. 1 in more detail. The drive train comprises a power source, here an engine 3, an engine shaft 4, a clutch 5, a gearbox 6, a gearbox input shaft 7 and a drive shaft 8. The power generated by the engine 3 is transferred from the engine shaft 4 via the clutch 5 and the gearbox 6 to the drive shaft 8, which drives the wheels of the vehicle 1. The clutch 5 is, for example, a friction clutch comprising one or more discs with friction linings, which are pressed against a steel plate by strong springs, for example, and a pressure plate, resulting in a direct drive between the engine 3 and the gearbox 6 when the vehicle 1 is moving. However, if there is not enough friction in the clutch 5, the speed of the power source can increase without a corresponding increase in the road speed.This is generally a fault condition that can be assessed by comparing the speed of motor shaft 4 with the speed of input shaft 7. Sometimes microslip (i.e., very slight clutch slip) is deliberately introduced, for example, when attempting to mitigate driveline fluctuations. However, microslip should always be a selected operating mode, i.e., not something that happens by chance. If microslip is intentional, then clutch 5 is deliberately not fully closed.
[0048] The engine 3 and the transmission 6 are typically controlled by separate electrical subsystems, each subsystem comprising one or more ECUs, referred to herein as control units. For simplicity, this example assumes that each subsystem comprises only one ECU. More specifically, the engine 3 is controlled by a first control unit 10, and the transmission 6 is controlled by a second control unit 20. The first and second control units 10, 20 are described with reference to Fig. 8 and Fig. 9 further described.
[0049] The powertrain also includes a speed sensor 30 configured to detect engine speed. Fig. Figure 3 illustrates an embodiment in which the speed sensor 30 is a gear sensor. The gear sensor scans a gear 31 arranged on the motor shaft 4. The gear sensor can, for example, comprise two Hall-effect sensors, a rare-earth magnet, and suitable evaluation electronics. The field of the magnet is modulated by the passing target teeth. This modulation is registered by the Hall sensors, converted into a square-wave signal S by a comparison stage, and amplified in a driver stage.
[0050] The signal S generated by the speed sensor 30 has a period corresponding to one toothing of the gear 31 and, in some embodiments, also includes additional position information about where the gear 31 is in the cycle, indicated, for example, by one or more long pulses 33 caused by one or more long teeth 32 on the gear 31 positioned in predetermined positions on the gear 31. Thus, the first control unit 10 can determine the engine speed based on the generated signal and can also determine where the engine is in the cycle.
[0051] The proposed technique will now be described with reference to the first control unit 10 and a second control unit 20 of Fig. 2. However, it is understood that the solution can be used for any control units in a vehicle if it is desired to communicate speed and synchronization information. In the proposed solution, an additional wire is added between the first control unit 10 and the second control unit 20 in order to be able to forward a speed signal between the control units 10, 20. It is further proposed to integrate synchronization information into the speed signal so that synchronization between the first control unit 10 and the second control unit 20 is also enabled. The synchronization information comprises a first and a second synchronization message. There are various ways to implement the synchronization messages. Two exemplary implementations will now be described with reference to Fig. 4 and Fig. 5 described.
[0052] Fig. Figure 4 illustrates communication between a master ECU, also referred to herein as the first control unit 10, and a slave ECU, also referred to herein as the second control unit 20, according to a first embodiment. In this example, the transmission of two synchronization messages (a first and a second synchronization message) is periodically triggered by the master ECU, e.g., every 1000 ms. Thus, the slave ECU can synchronize its internal clock with the internal clock of the master ECU by observing the synchronization messages and adjusting its internal clock accordingly.
[0053] The first synchronization message M1 is an incoming synchronization pattern, and the second synchronization message M2 is an actual synchronization pattern. The incoming synchronization pattern indicates that an actual synchronization pattern will occur within a predetermined time limit. The incoming synchronization pattern is inserted into the pulse train, for example, by replacing one long pulse with a predetermined pattern, e.g., several short pulses. The purpose of the incoming synchronization pattern is to increase robustness and make errors less likely. The actual synchronization pattern is inserted by replacing one short pulse (normal toothing) with two short pulses. The actual synchronization pattern is triggered when the clock in the master ECU reaches a predefined value.For example, the predefined value is 0 when the master ECU clock loops from 0 to 2048.
[0054] Fig. Figure 5 illustrates an alternative implementation of a first synchronization message comprising a synchronization pattern triggered periodically by the master ECU, e.g., every tenth engine revolution. In this example, the slave ECU can synchronize its clock with the master ECU clock by observing the synchronization pattern and a corresponding second synchronization message sent over the CAN.
[0055] In this example, the first synchronization message M1 is a synchronization pattern, and the second synchronization message M2' is a CAN message. Thus, in this embodiment, only one synchronization pattern is sent. This pattern indicates that a synchronization event has occurred. The synchronization pattern is specified in the pulse train by replacing a long pulse with a predetermined pattern, e.g., multiple short pulses. When the synchronization event is triggered, a corresponding CAN message is also sent from the master ECU to the slave ECU. The CAN message contains information related to the synchronization pattern, e.g., the number of engine revolutions and the time elapsed since the last synchronization event.
[0056] By combining the time the synchronization pattern was received with the information in the corresponding CAN message, the slave ECU can estimate its clock error.
[0057] Fig. 6 represents the internal clock 16 of the first control unit 10 and the internal clock 26 of the second control unit 20 when they are not synchronized.
[0058] Fig. Figure 7 illustrates the synchronization of the internal clock of the second control unit. By identifying a time t (corresponding to a known predefined value, e.g., 0) of the internal clock 16 of the first control unit 10, the second control unit 20 can estimate its clock drift. The second control unit 20 can then gradually (i.e., at a maximum rate of change) adjust its own internal clock 26 to synchronize with the internal clock 16 of the first control unit 10. By doing this gradually, intermittent errors are mitigated.
[0059] An exemplary implementation of the first control unit 10 of the vehicle 1 from Fig. 1 will now be discussed with reference to Fig. 8. The first control unit 10 is configured to communicate the synchronization and speed information to a second control unit 20 of the vehicle 1. In some embodiments, the first control unit 10 is a master control unit, and the second control unit 20 is a slave control unit of the first control unit 10.
[0060] The first control unit 10 includes control circuits 11, a memory 12, an input 13, an output 14, a communication bus 15, and an internal clock 16. The first control unit 10 typically also includes a plurality of other components and I / O interfaces. For simplicity, however, only the components and I / O interfaces required to explain the proposed technique will now be described.
[0061] The internal clock 16 clocks the operation of the first control unit 10. The internal clock 16 can be used, for example, to time-stamp measurement data received at the input 13.
[0062] Input 13 is a single-wire input connection. Input 13 is configured to receive a signal from another component in the vehicle, e.g., a sensor. It is assumed that first control unit 10 and the other component are connected to a common ground. For example, input 13 is arranged to receive a speed signal comprising a pulse train corresponding to a speed of a rotating object in vehicle 1 from a speed sensor 30. The rotating object is, for example, a gear 31 attached to a shaft in vehicle 1, e.g., engine shaft 4. However, the solution would also work for measuring the rotation of other shafts and other rotating objects.
[0063] The output 14 is a single-wire output connection, i.e., it is configured to be connected to a second control unit 20. If the first control unit 10 is installed in the vehicle 10, then the output 14 is typically connected to a corresponding input 23 ( Fig. 9) of the second control unit 20 by a single wire. In other words, the output 14 is configured to enable the transmission of a signal to a second control unit 20. As previously explained, it is assumed that the first control unit 10 and the second control unit 20 share a common ground.
[0064] The communication bus interface 15 is a generic interface used to handle communication between various control units in the vehicle 1. The communication bus comprises one or more wires on which the control units in a vehicle can communicate with each other using a standard protocol. In other words, the communication bus 15 serves as both an input and an output. The commonly used ECU network (CAN) bus is an example of a robust vehicle bus standard designed to enable microcontrollers and devices to communicate with each other.
[0065] In an exemplary implementation in the vehicle 1, the first control unit 10 and the second control unit 20 communicate via the communication bus. Furthermore, the output 14 of the first control unit 10 is electrically connected to the input 23 of the second control unit 20 (e.g., via an electrical wire).
[0066] The control circuits 11 typically comprise a microprocessor. The control circuits 11 are configured to cause the first control unit 10 to control all aspects of the method ( Fig. 10) executed by the first control unit 10 described here. This is typically done by executing computer program code stored in the memory 12. The memory 12 is, for example, an EPROM or a flash memory.
[0067] When a speed signal is received at the input 13, the control circuits 11 read and modify the received speed signal. More specifically, the control circuits 11 are configured to generate a combined synchronization and speed signal by integrating a first synchronization message M1 into an incoming speed signal received at the input 13. In some embodiments, the first synchronization message M1 is positioned at a predefined position in the pulse train. For example, it is integrated into a long pulse of the speed signal. The control circuits 11 are also configured to generate a second synchronization message M2. The second synchronization message M2 includes additional synchronization information. The second synchronization message M2 is also integrated into the combined synchronization and speed signal in some embodiments. Alternatively, it is implemented differently, e.g.on a communications bus. The first synchronization message M1 and the second synchronization message M2 together specify a timing specification of the internal clock. As described in connection with . Fig. 4 and Fig. 5, this can be implemented in different ways.
[0068] In some embodiments, the control circuits 11 are configured to integrate both the first synchronization message M1 and the second synchronization message M2 into the combined synchronization and speed signal. In some embodiments, the first synchronization message M1 is an incoming synchronization pattern indicating that actual synchronization will occur within a predefined time, and the second synchronization message M2 is a synchronization pattern indicating the timing of the internal clock 16. As already briefly described, for example, in connection with Fig. 4, the first synchronization message M1 is an incoming synchronization pattern that prepares the second control unit 20 for a synchronization pattern that will appear in the near future. The second synchronization message is then the actual synchronization pattern that specifies the timing of the internal clock 16 of the first control unit 10. The actual synchronization pattern occurs at a specific time, e.g., when the internal clock 16 of the first control unit 10 is equal to 0. The incoming synchronization pattern is not dependent on the timing of the internal clock 16 of the first control unit. Thus, the incoming synchronization pattern is assigned, for example, to a long pulse (see Fig. 3) that is closest to the actual synchronization pattern. This makes the incoming synchronization pattern easier for the second control unit to detect, as it always looks like a "long" pulse. The incoming pulse makes it easier for the second control unit 20 to find the actual synchronization, which may be a shorter pulse pattern.
[0069] In some other embodiments, the first synchronization message M1 is a synchronization pattern, and the second synchronization message M2 indicates a relationship between the synchronization pattern and the internal clock 16. With other words, as already described in connection with Fig. 5, the first synchronization message M1, in some embodiments, contains a synchronization pattern that specifies the timing of the internal clock 16. The second synchronization message M2 then comprises further information required to interpret the first synchronization message M1. Examples of such information are the number of clock sequences (of the internal clock 16) that have elapsed between a specific time and the synchronization message, or the number of clock sequences that have elapsed since the last synchronization message was sent. Alternatively, the information defines the time of the internal clock of the first control unit at which the synchronization pattern was sent. With this solution, the synchronization pattern does not have to be sent at a specific time (of the internal clock 16).Thus, the synchronization pattern can always be assigned to a “long” pulse, which increases stability.
[0070] The control circuits 11 are further configured to send the first synchronization message M1 and the second synchronization message M2 to the second control unit 20 at the one or more outputs 14, 15. If both synchronization messages are pulse patterns integrated in the speed signal ( Fig. 4), this step corresponds in principle to sending the speed signal with the integrated (or inserted) pulse sequences at output 14.
[0071] However, if the second synchronization message M2 is a communication message, then the communication bus interface 15, which then serves as the output, is also used. In other words, in some embodiments, the control circuits 11 are configured to send the synchronization message M2 on the communication bus interface 15.
[0072] It may be desirable to wait to begin sending the synchronization messages until the first control unit 10 has learned what the gear looks like and how to find its position on the wheel. In other words, in some embodiments, the control circuits 11 are configured to interpret the received speed signal, and the control circuit is configured to generate and / or send the first and second synchronization messages in response to interpreting the received speed signal.
[0073] In some embodiments, the control circuits 11 include real-time processing hardware configured to generate the combined synchronization and speed signal. In other words, the proposed solution may require time processing hardware in the microprocessor to handle the signal processing without causing significant delays.
[0074] Fig. 9 forms a corresponding second control unit 20 for use in the vehicle 1 Fig. 1 according to some embodiments. The second control unit 20 is configured to receive synchronization and speed information from a first control unit 10 of the vehicle 1, e.g., the first control unit of Fig. 8. In some embodiments, the second control unit 20 is a slave control unit of the first control unit 10, which is a master control unit.
[0075] The second control unit 20 includes control circuits 21, a memory 22, an input 23, a communication bus interface 25, and an internal clock 26a. The second control unit 20 typically also includes a plurality of other components and I / O interfaces. For the sake of simplicity, however, only the components and I / O interfaces required to explain the proposed technique will now be described. In an exemplary implementation in the vehicle 1, the first control unit 10 and the second control unit 20 communicate via the CAN bus. Furthermore, the output 14 of the first control unit is electrically connected to the input 23 (e.g., by an electrical wire).
[0076] The internal clock 26 clocks the operation of the second control unit 20. The internal clock 26 can be used, for example, to time-stamp measurement data received at the input 23.
[0077] The input 23 is a single-wire connection configured to receive, for example, the signal sent at the output 14 ( Fig. 9). In other words, the input 23 is configured to receive from the first control unit 10 a combined synchronization and speed signal comprising a pulse train having a frequency corresponding to a speed of a rotating object in the vehicle 1.
[0078] The communication bus interface 25 is a generic interface used to handle communication between various control units in the vehicle 1. The communication bus comprises one or more wires, allowing the control units in a vehicle to communicate with each other using a standard protocol. In other words, the communication bus interface 25 serves as both an input and an output. An example of such an interface is the commonly used CAN bus.
[0079] The control circuits 21 typically comprise a microprocessor. The control circuits 21 are configured to cause the control circuits 21 to control all aspects of the method ( Fig. 11) executed by a second control unit 20 described below. This is typically done by executing computer program code stored in memory 22. Memory 22 is, for example, an EPROM or a flash memory.
[0080] The control circuits 21 are configured to detect a first synchronization message M1 integrated in an incoming combined synchronization and speed signal received at the input 23. For example, the control circuits 21 are configured to detect a predetermined pulse sequence in the incoming combined synchronization and speed signal.
[0081] According to some embodiments, the control circuits 21 are configured to ignore pulse sequences having a frequency above a predefined threshold. Since the first synchronization message M1 typically corresponds to a predetermined position on the gear, the second control unit knows when the synchronization event may occur, and by further limiting the maximum allowed acceleration of the gear, incorrect decoding of the signal can be avoided. More specifically, since the current speed of the rotating object is known and the maximum acceleration on the rotating object is also known, one can calculate the expected time slots and the minimum time slot of the combined synchronization and speed signal. To enable robust detection, the integrated synchronization pattern should be designed to have shorter time slots than the minimum time slots.If the combined synchronization and speed signal spans even shorter time slots, it is considered interference or noise. This allows the synchronization pattern to be monitored within an interval limited by the speed of the rotating object and the acceleration and time slots of the synchronization pattern defined by the design. This makes it possible to filter out signals that are not possible synchronization patterns.
[0082] The control circuits 21 are configured to receive a second synchronization message M2 from the first control unit 10. As previously explained, in some embodiments, the second synchronization message M2 is a pulse pattern integrated into the received speed signal ( Fig. 4).
[0083] As previously explained, in some embodiments, the second synchronization message M2 is a pulse pattern integrated in the received speed signal ( Fig. 4). In other words, in some embodiments, the control circuits 21 are configured to receive the second synchronization message M2 at the input 23. For example, the first synchronization message M1 is an incoming synchronization pattern indicating that actual synchronization occurs within a predefined time, and the second synchronization message M2 is a synchronization pattern indicating the timing of the internal clock 16 of the first control unit 10.
[0084] Alternatively, the second synchronization message M2 is another message, e.g., a message sent over the communication bus. Thus, in some embodiments, the control circuits 21 are configured to receive the second synchronization message M2 at the communication bus interface 25, which then serves as an input. For example, the first synchronization message M1 is a synchronization pattern, and the second synchronization message M2 indicates a relationship between the synchronization pattern and the internal clock 16 of the first control unit 10.
[0085] The control circuits 21 are then configured to determine a timing of an internal clock 16 of the first control unit 10 based on the first synchronization message M1 and the second synchronization message M2.
[0086] According to some embodiments, the control circuits 21 are configured to adjust a timing of the internal clock 26 of the second control unit 20 based on the determined timing. In other words, the second control unit adjusts its internal clock to align with the first control unit using these synchronization messages. This typically occurs gradually, thereby mitigating intermittent errors.
[0087] According to some embodiments, the control circuits 21 are configured to detect a second synchronization message M2 integrated in the incoming combined synchronization and speed signal.
[0088] The disclosure also relates to a corresponding method for communicating synchronization and speed information to a second control unit 20 of the vehicle 1 ( Fig. 1). The procedure will now be described with reference to the Fig. 11 and the illustrations in the other figures. The method can be implemented (at least partially) as program code, P, stored in a memory 12 in the first control unit 10. The method can be executed at any time when the vehicle 1 is operated.
[0089] The method comprises receiving S1, from a speed sensor 30, a speed signal comprising a pulse train with a frequency corresponding to a speed of a rotating object in the vehicle 1. For example, a signal representing the speed of a gear on the motor shaft 4 ( Fig. 2) is received at input 13 ( Fig. 8).
[0090] Upon receiving the signal, the first control unit analyzes the signal and then modifies the signal to also include synchronization information in the form of a first synchronization message M1. In other words, the method further comprises generating S3 a combined synchronization and speed signal by integrating a first synchronization message M1 into the received speed signal.
[0091] The first control unit also creates other information required to interpret the first synchronization message M1. Thus, the method further comprises generating S4 a second synchronization message M2, wherein the first synchronization message M1 and the second synchronization message M2 together indicate a timing specification of the internal clock generator 16.
[0092] The synchronization messages are then sent to the second control unit at least partially as part of the combined synchronization and speed signal. In other words, the method further comprises sending S5 the combined synchronization and speed signal and the second synchronization message M2 to the second control unit.
[0093] In some embodiments, the first synchronization message M1 is a predetermined pulse sequence integrated into the combined synchronization and speed signal.
[0094] In some cases, the first control unit does not begin sending the synchronization messages until the control unit has learned what the gear looks like and how to find the position on the wheel. Thus, in some embodiments, the method includes interpreting S2 the received speed signal. Then, generating S3, S4 and / or transmitting S5 occurs in response to interpreting S2.
[0095] As explained several times already, the two synchronization messages can be integrated into the combined synchronization and speed signal. In other words, in some embodiments, the second synchronization message M2 is also integrated into the combined synchronization and speed signal. In some embodiments, the first synchronization message M1 is an incoming synchronization pattern indicating that actual synchronization will occur within a predefined time, and the second synchronization message M2 is an actual synchronization pattern indicating the timing of the internal clock 16.
[0096] Alternatively, the second synchronization message may be sent by another means. For example, the second synchronization message M2' is a message sent on a communication bus of the vehicle 1. In some embodiments, the first synchronization message M1 is a synchronization pattern, and the second synchronization message M2' indicates a relationship between the internal clock and the synchronization pattern.
[0097] Fig. Figure 12 illustrates a corresponding method for use in a second control unit 20 of a vehicle 1 for receiving synchronization and speed information from a first control unit 10 of the vehicle. The method can be implemented (at least partially) as program code P stored in a memory 22 in the second control unit 20. The method can be executed at any time when the vehicle 1 is operated.
[0098] The method in the second control unit begins when a combined synchronization and speed signal comprising a pulse train with a frequency corresponding to a speed of a rotating object in the vehicle 1 is received at an input. In other words, the method comprises receiving S11, from the first control unit 10, a combined synchronization and speed signal comprising a pulse train with a frequency corresponding to a speed of a rotating object in the vehicle 1.
[0099] The second control unit then begins searching for the first synchronization message M1. The second control unit is, for example, pre-programmed with information defining a synchronization pattern to be searched for. The second control unit can also be pre-programmed with information defining where in the signal (e.g., during a long pulse) a synchronization pattern will occur. In other words, the method further comprises detecting S12 a first synchronization message M1 integrated in the received combined synchronization and speed signal. In some embodiments, detecting S12 comprises detecting a predetermined pulse train in the incoming combined synchronization and speed signal. In some embodiments, detecting S12 comprises ignoring pulse trains having a frequency above a predefined threshold.
[0100] The method further comprises receiving S13 a second synchronization message M2 from the first control unit. In some embodiments, receiving S13 the second synchronization message M2 comprises detecting a synchronization pattern incorporated into the combined synchronization and speed signal. In some embodiments, the first synchronization message M1 is an incoming synchronization message, and the second synchronization message M2 is a synchronization pattern indicating a timing of the internal clock 16 of the first control unit 10.
[0101] In some embodiments, receiving S13 the second synchronization message M2 comprises receiving the second synchronization message M2' on a communication bus. In some embodiments, the first synchronization message M1 is a synchronization pattern, and the second synchronization message M2' indicates a relationship between the synchronization pattern and a timing of the internal clock 16 of the first control unit 10.
[0102] The second control unit can now determine the timing of the internal clock of the first control unit 10 and consequently also the deviation of its own internal clock relative thereto. In other words, the method further comprises determining S14 a timing of an internal clock 16 of the first control unit 10 based on the first synchronization message M1 and the second synchronization message M2.
[0103] In some embodiments, the method includes adjusting S15 a time setting of an internal clock 26 of the second control unit 20 based on the determined time setting.
[0104] The present disclosure is not limited to the preferred embodiments described above. Various alternatives, modifications, and equivalents may be used. Therefore, the above embodiments should not be considered as limiting the scope of the disclosure, which is defined by the appended claims.
Claims
[1] First control unit (10) for use in a vehicle (1), the first control unit (10) comprising: - an internal clock generator (16), - an input (13) configured to receive from a speed sensor (30) a speed signal comprising a pulse train corresponding to a speed of a rotating object in the vehicle (1), - one or more outputs (14, 15) configured to enable transmission to a second control unit (20), - control circuits (11) configured to: • Generating a combined synchronization and speed signal by integrating a first synchronization message (M1) into an incoming speed signal received at the input (13), • generating a second synchronization message (M2), wherein the first synchronization message (M1) and the second synchronization message (M2) together specify a timing of the internal clock generator (16), and • Sending the combined synchronization and speed signal and the second synchronization message (M2) to the second control unit (20) at the one or more outputs (14, 15). [2] The first control unit (10) of claim 1, wherein the one or more outputs (14, 15) comprise a single-wire output terminal (14), and wherein the control circuits (11) are configured to send the combined synchronization and speed signal to the single-wire output terminal (14). [3] First control unit (10) according to one of the preceding claims, wherein the one or more outputs (14, 15) comprise a communication bus interface (15), and wherein the control circuits (11) are configured to send the second synchronization message (M2) on the communication bus interface (15). [4] First control unit (10) according to claim 1 or 2, wherein the control circuits (11) are configured to integrate both the first synchronization message (M1) and the second synchronization message (M2) into the combined synchronization and speed signal. [5] The first control unit (10) of claim 4, wherein the first synchronization message (M1) is an incoming synchronization pattern indicating that actual synchronization will occur within a predefined time, and wherein the second synchronization message (M2) is a synchronization pattern indicating the timing of the internal clock (16). [6] The first control unit (10) according to any one of the preceding claims, wherein the rotating object is a gear, and wherein the speed sensor (30) is a gear sensor. [7] Second control unit (20) for use in a vehicle (1), the second control unit (20) comprising: - an internal clock generator (26), - one or more inputs (23, 25) configured to receive from a first control unit (10) a combined synchronization and speed signal comprising a pulse train having a frequency corresponding to a speed of a rotating object in the vehicle (1), and - control circuits (21) configured to: • detecting a first synchronization message (M1) integrated in an incoming combined synchronization and speed signal received at the one or more inputs (23, 25), • Receiving a second synchronization message (M2) from the first control unit (10), and • Determining a timing of an internal clock (16) of the first control unit (10) based on the first synchronization message (M1) and the second synchronization message (M2). [8] The second control unit (20) according to claim 7, wherein the control circuits (21) are configured to adjust a timing of an internal clock (26) of the second control unit (20) based on the determined timing. [9] Second control unit (20) according to claim 7 or 8, wherein the control circuits (21) are configured to detect a predetermined pulse sequence in the incoming combined synchronization and speed signal. [10] Drive train (2) comprising the first control unit according to one of claims 1 to 6 and the second control unit (20) according to one of claims 7 to 9. [11] Vehicle (1) comprising the drive train (2) according to claim 10. [12] A method for use in a first control unit (10) in a vehicle (1) to communicate synchronization and speed information to a second control unit (20) of the vehicle (1), the first control unit (10) having an internal clock generator (16), the method comprising: - receiving (S1), from a speed sensor (30), a speed signal comprising a pulse train with a frequency corresponding to a speed of a rotating object in the vehicle (1), - generating (S3) a combined synchronization and speed signal by integrating a first synchronization message (M1) into the received speed signal, - generating (S4) a second synchronization message (M2), wherein the first synchronization message (M1) and the second synchronization message (M2) together specify a time specification of the internal clock generator (16), and - Sending (S5) the combined synchronization and speed signal and the second synchronization message (M2) to the second control unit (20). [13] A method for use in a second control unit (20) of a vehicle (1) to receive synchronization and speed information from a first control unit (10) of the vehicle, the method comprising: - receiving (S11), from the first control unit (10), a combined synchronization and speed signal comprising a pulse train with a frequency corresponding to a speed of a rotating object in the vehicle (1), - detecting (S12) a first synchronization message (M1) integrated in the received combined synchronization and speed signal, - receiving (S13) a second synchronization message (M2) from the first control unit, - Determining (S14) a timing specification of an internal clock generator (16) of the first control unit (10) based on the first synchronization message (M1) and the second synchronization message (M2). [14] A computer program comprising instructions which, when executed by a computer, cause the computer to carry out the method according to any one of the preceding claims 12 to 13. [15] A computer-readable medium comprising instructions which, when executed by a computer, cause the computer to carry out the method according to any one of claims 12 to 13.
Citation Information
Patent Citations
Power control system
JP2015157503A
JP002015157503A
