Multi-stage power converter with floating capacitor voltage control at low load

Abstract

Multi-stage power converter comprising: - a first switching element (21), a second switching element (22), a third switching element (23) and a fourth switching element (24); - an inductor (26), wherein a first terminal of the inductor (26) is connected to a switching terminal connecting the second switching element and the third switching element; - a floating capacitor (25), wherein a first terminal of the floating capacitor (25) is connected to a terminal connecting the first switching element and the second switching element, and wherein a second terminal of the floating capacitor (25) is connected to a terminal connecting the third switching element and the fourth switching element; - a first feedback circuit configured to generate control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-stage power converter; and - a second feedback circuit configured to generate, based on a capacitor voltage across the floating capacitor (25), temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor (25) is charged or discharged using an inductor current flowing through the inductor (26); and - the first feedback circuit is configured to switch between a first and a second switching state in low load operation; wherein - in the first switching state, the first and second switching elements are switched off and the third and fourth switching elements are switched on, and in the second switching state, the first and second switching elements are switched on and the third and fourth switching elements are switched off; and - the first feedback circuit is configured to generate two control signals for almost simultaneously switching off the first and second switching elements (22) in low-load operation; and - the second feedback circuit is configured to select one of the two control signals based on the capacitor voltage during low load operation and to delay the selected one of the two control signals by a delay interval such that the floating capacitor (25) is charged or discharged by the inductor current during the delay interval.

Description

Technical area

[0001] This document relates to multi-level power converters. Specifically, this document relates to multi-level buck converters and multi-level boost converters configured to regulate the floating capacitor voltage under light-load conditions. background

[0002] Specifications for system-level power converters have become increasingly stringent in recent years. This is especially true for power converters used in portable electronic devices. On the other hand, the operating efficiency of a power converter is critical, as it directly impacts battery life, as well as the power density and associated form factor of the portable electronic device. On the other hand, the power converter must not only provide the operating power for the device, but must also provide a regulated output to manage battery charging functions.

[0003] Multi-level power converter topologies, such as the multi-level buck converter, are a promising approach to mitigate many of the disadvantages of conventional power converter topologies. In a multi-level buck converter, for example, two series-connected high-side switches replace the single high-side switch of the conventional buck converter. Furthermore, two series-connected low-side switches replace the single low-side switch of the conventional buck converter, and a floating capacitor is connected in parallel with the series connection of the lower high-side switch and the higher low-side switch.

[0004] A key advantage of the multi-stage buck converter is that the root-mean-square voltage (RMS) across the inductor node is only 50% of the corresponding voltage of a conventional buck converter. In addition to reducing the RMS voltage across and current through the inductor, the voltages across the switched capacitors are also reduced, thus reducing switching losses. Furthermore, transistors with lower breakdown voltage ratings typically have lower drain-to-source resistances (Rds), resulting in reduced conduction losses.

[0005] However, there is a need to control the voltage of the floating capacitor. This is especially true under no-load or light-load operating conditions. For example, during light-load conditions, the power converter can be controlled such that the two high-side switches are switched simultaneously and the two low-side switches are switched simultaneously. In this example scenario, the two high-side switches (or alternatively, the two low-side switches) should ideally turn off at the same time, and the voltage across the floating capacitor should hover at, for example, half the power converter's input voltage. However, non-ideal conditions during the transitions cause one switch to turn off earlier than the other, causing the floating capacitor to either charge high or discharge to ground.The resulting charging and discharging of the floating capacitor can trigger fault conditions. Specifically, charging the floating capacitor can trigger an overvoltage (OV) alarm, while discharging the floating capacitor can trigger an undervoltage (UV) alarm. In response to the OV alarm, the floating capacitor voltage is lowered, and in response to the UV alarm, the floating capacitor voltage is increased. However, triggering these alarms and the subsequent correction of the floating capacitor voltage wastes energy and can also cause audible noise.

[0006] US 2016 / 0190921 A1 describes a device comprising a selectable voltage regulator (VR) implementing one or more of the various VR modes. The selectable mode VR includes a plurality of switches, an inductor, a flying capacitor, and an output capacitor.

[0007] This document addresses the above-mentioned technical problems and relates to novel ways of controlling and implementing multi-stage power converters. In particular, this document addresses the technical problem of providing feedback circuits to effectively regulate the voltage across the floating capacitor during low-load conditions. Summary

[0008] The present invention is defined by the appended claims. In the following, portions of the description and drawings that refer to prior embodiments and do not necessarily include all features for implementing embodiments of the claimed invention are to be understood as not representing embodiments of the invention, but rather as examples that facilitate understanding of embodiments of the invention.

[0009] According to an example not covered by the claims but useful for understanding the invention, a multi-stage power converter comprises a first switching element, a second switching element, a third switching element, a fourth switching element, an inductor, and a floating capacitor. A first terminal of the inductor may be connected to a switching terminal connecting the second switching element and the third switching element. A first terminal of the floating capacitor may be connected to a terminal connecting the first switching element and the second switching element, and a second terminal of the floating capacitor may be connected to a terminal connecting the third switching element and the fourth switching element.The multi-level power converter may further comprise a first feedback circuit configured to generate control signals for setting the switching elements in multiple switching states for regulating an output voltage or an output current of the multi-level power converter. Furthermore, the multi-level power converter may comprise a second feedback circuit configured to generate, based on a capacitor voltage across the floating capacitor, temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor is charged or discharged using an inductor current flowing through the inductor.

[0010] Each of the four switching elements can be implemented with any suitable device, such as, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), a MOS gate-controlled thyristor, or other suitable power devices. Each switching element can have a gate to which a respective drive voltage can be applied to turn the switching element on or off. More specifically, the transient control signals generated by the second feedback circuit can be applied to the gates as drive voltages.

[0011] In principle, in a given switching state, each of the four switching elements can be either off (i.e., open) or on (i.e., closed), resulting in 16 switching states that are theoretically conceivable. In practice, however, the first feedback circuit can be configured, for example, to switch between 3 or 4 different switching states during normal operation of the multi-stage power converter and, for example, between 2 different switching states during low-load operation, as described in more detail below.

[0012] The described multi-level power converter enables effective regulation of the capacitor voltage by diverting the inductor current during transient switching conditions, thereby reusing the energy typically provided to a load of the multi-level power converter. Furthermore, the provision of the second feedback circuit eliminates the need to trigger the overvoltage (OV) and undervoltage (UV) alarms and corresponding mechanisms to refresh the capacitor voltage. In particular, pull-up and pull-down mechanisms for correcting the capacitor voltage after a voltage shift has occurred are no longer required. Likewise, alternative solutions based on low dropout voltage regulators (LDO regulators) attached to the floating capacitor to regulate the capacitor voltage can be eliminated.As an additional advantage, the use of specially assigned, temporary switching states allows for a smooth integration of capacitor voltage regulation into the switching structure of the multi-stage power converter and therefore a reduction of audible noise compared to known solutions.

[0013] The second feedback circuit may be configured to generate the temporary control signals for controlling the switching elements in the temporary switching state during a time interval between a previous switching state and a subsequent switching state, wherein both the previous and subsequent switching states are selected from the plurality of switching states by the first feedback circuit. In other words, the temporary switching state is temporally embedded between the previous switching state and the subsequent switching state, and the second feedback circuit is used to actively control the transition from the previous switching state to the subsequent switching state. During this transition, the capacitor voltage may be charged or discharged by the flowing inductor current.For example, the temporary switching state of the second feedback circuit may not be any of the multiple switching states of the first feedback circuit. In other words, the temporary switching state may be different from the multiple switching states generated by the first feedback circuit. As mentioned above, the multi-stage power converter may be operated in a low-load operating state, only alternating between a first switching state and a second switching state. That is, the multiple switching states may include a first switching state and a second switching state, wherein in the first switching state, the first and second switching elements are off and the third and fourth switching elements are on, and wherein in the second switching state, the first and second switching elements are on and the third and fourth switching elements are off.The temporary switching state selected by the second feedback circuit may thus be different from the first and second switching states used in a low-load operating condition.

[0014] Furthermore, the second feedback circuit may include a delay circuit configured to receive at least one of the control signals generated by the first feedback circuit and to generate at least one of the temporary control signals by delaying the at least one control signal by a delay interval. The delay interval may, for example, be in the range of 25 to 200 ns and may, for example, be 50 ns. The second feedback circuit may be configured to determine the delay interval such that a frequency of a voltage change of the capacitor voltage lies outside an audible frequency band.

[0015] Here, the delay interval may correspond to the duration of the temporary switching state. During this temporary switching state, for example, the turning off of a particular switching element may be delayed, allowing the inductor current to flow through the particular switching element as needed during the temporary switching state to charge or discharge the floating capacitor. More specifically, the first feedback circuit may be configured to generate two control signals for nearly simultaneously turning off the first and second switching elements. The second feedback circuit may then be configured to select one of the two control signals based on the capacitor voltage and delay the selected one of the two control signals by a delay interval such that the floating capacitor is charged or discharged by the inductor current during the delay interval.

[0016] The following description describes in greater detail which control signals of the first feedback circuit must be delayed to (a) divert the inductor current to or from the floating capacitor and (b) achieve adequate capacitor voltage regulation. Although the ideas presented in this document can be applied to various types of multi-level power converters, such as multi-level buck converters, multi-level boost converters, or multi-level buck / boost converters, the following description will focus on the two specific cases of multi-level buck converters and multi-level boost converters, without losing generality.

[0017] In a multi-level buck converter, an input voltage of the multi-level buck converter may be applied to an input terminal of the first switching element, and an output terminal of the fourth switching element may be connected to ground. Furthermore, the output voltage and / or output current of the multi-level buck converter may be provided to an output terminal of the inductor.

[0018] In such a multi-level buck converter, the second feedback circuit may be configured to generate a first temporary control signal for turning off the first switching element when the capacitor voltage is below a target voltage value by delaying a first control signal generated by the first feedback circuit for turning off the first switching element. At the same time, the second feedback circuit may be configured to generate the second temporary control signal for turning off the second switching element when the capacitor voltage is below the target voltage value by forwarding a second control signal generated by the first feedback circuit for turning off the second switching element.As a result, the first temporary control signal is delayed with respect to the second temporary control signal, and during this delay, a charging path is formed by the first switching element, the floating capacitor, a body diode of the third switching element (or alternatively, by the third switching element itself if the third switching element is still switched on), and the inductor. In the described situation, the floating capacitor is charged via the charging path during the delay.

[0019] Conversely, when the capacitor voltage is greater than the target voltage value, the second feedback circuit may be configured to generate a second temporary control signal for turning off the second switching element by delaying a second control signal generated by the first feedback circuit for turning off the second switching element. At the same time, when the capacitor voltage is greater than the target voltage value, the second feedback circuit may be configured to generate the first temporary control signal for turning off the first switching element by forwarding the first control signal generated by the first feedback circuit for turning off the first switching element.As a result, the second transient control signal is delayed with respect to the first transient control signal, and during this delay, a discharge path is formed by a body diode of the fourth switching element (or alternatively, by the fourth switching element itself if the fourth switching element is still on), the floating capacitor, the second switching element, and the inductor. In the described situation, the floating capacitor is discharged via the discharge path during the delay.

[0020] In a multi-level boost converter, an input voltage is applied to an input terminal of the inductor, an output terminal of the fourth switching element is connected to ground, and the output voltage and / or output current of the multi-level boost converter are provided at an output terminal of the first switching element.

[0021] In such a multi-level boost converter, the second feedback circuit may be configured to generate a third temporary control signal for turning off the third switching element when the capacitor voltage is greater than the target voltage value by delaying a third control signal generated by the first feedback circuit for turning off the third switching element. At the same time, the second feedback circuit may be configured to generate the fourth temporary control signal for turning off the fourth switching element when the capacitor voltage is greater than a target voltage value by forwarding a fourth control signal generated by the first feedback circuit for turning off the fourth switching element.As a result, the third transient control signal is delayed with respect to the fourth transient control signal, and during this delay, a discharge path is formed by the inductor, the third switching element, the floating capacitor, and a body diode of the first switching element (or alternatively, by the first switching element itself if the first switching element is still on). In the described situation, the floating capacitor is discharged via the discharge path during the delay.

[0022] Conversely, when the capacitor voltage is below the target voltage value, the second feedback circuit can be configured to generate a fourth temporary control signal for turning off the fourth switching element by delaying a fourth control signal generated by the first feedback circuit for turning off the fourth switching element. At the same time, when the capacitor voltage is below the target voltage value, the second feedback circuit can be configured to generate the third temporary control signal for turning off the third switching element by forwarding the third control signal generated by the first feedback circuit for turning off the third switching element.As a result, the fourth temporary control signal is delayed compared to the third temporary control signal, and during this delay, a charging path is formed by the inductor, a body diode of the second switching element (or alternatively, by the second switching element itself if the second switching element is still switched on), the floating capacitor, and the fourth switching element. In the described situation, the floating capacitor is charged via the charging path during the delay.

[0023] The second feedback circuit may include the delay circuit, a comparator, and at least one multiplexer. The delay circuit may be configured to generate delayed control signals by delaying the control signals generated by the first feedback circuit. The comparator may be configured to compare the capacitor voltage with a target capacitor voltage. The at least one multiplexer may be configured to forward either a control signal generated by the first feedback circuit or a delayed control signal generated by the second feedback circuit to control the switching behavior of one of the switching elements based on a comparison result generated by the comparator.Additionally, a comparator hysteresis can be selected such that a frequency of a voltage change in the capacitor voltage lies outside an audible frequency band. Additionally or alternatively, a second comparator can be provided to form a time window for comparing the capacitor voltage with the target capacitor voltage, thereby reducing the ripple of the regulated capacitor voltage and the final audible noise.

[0024] According to a further example not covered by the claims but useful for understanding the invention, a method of operating a multi-stage power converter is shown. The multi-stage power converter may include a first switching element, a second switching element, a third switching element, a fourth switching element, an inductor, and a floating capacitor. The first terminal of the inductor may be connected to a switching terminal connecting the second switching element and the third switching element. A first terminal of the floating capacitor may be connected to a terminal connecting the first switching element and the second switching element. A second terminal of the floating capacitor may be connected to a terminal connecting the third switching element and the fourth switching element.The method may include generating control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-level power converter through a first feedback circuit. The method may further include generating temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor is charged or discharged using an inductor current flowing through the inductor, based on a capacitor voltage across the floating capacitor, through a second feedback circuit.

[0025] The second feedback circuit may generate the temporary control signals for controlling the switching elements in the temporary switching state during a time interval between a previous switching state and a subsequent switching state, wherein both the previous and subsequent switching states are selected by the first feedback circuit from the plurality of switching states. Here, the temporary switching state of the second feedback circuit may not be any of the plurality of switching states of the first feedback circuit. Furthermore, the plurality of switching states may include a first switching state and a second switching state, wherein in the first switching state, the first and second switching elements are turned off and the third and fourth switching elements are turned on, and wherein in the second switching state, the first and second switching elements are turned on and the third and fourth switching elements are turned off.

[0026] The method may include receiving at least one of the control signals generated by the first feedback circuit by the second feedback circuit. Furthermore, the method may include generating at least one of the temporary control signals by the second feedback circuit by delaying the at least one control signal by a delay interval. The delay interval may be determined by the second feedback circuit such that a frequency of a voltage change of the capacitor voltage lies outside an audible frequency band. In particular, the method may further include generating two control signals for nearly simultaneously turning off the first and second switching elements by the first feedback circuit. The method may further include selecting one of the two control signals based on the capacitor voltage by the second feedback circuit.The method may further comprise delaying the selected one of the two control signals by a delay interval through the second feedback circuit such that the floating capacitor is charged or discharged by the inductor current during the delay interval.

[0027] When the capacitor voltage is below a target voltage value, a first temporary control signal for turning off the first switching element can be generated by delaying a first control signal generated by the first feedback circuit for turning off the first switching element. Alternatively, when the capacitor voltage is greater than the target voltage value, a second temporary control signal for turning off the second switching element can be generated by delaying a second control signal generated by the first feedback circuit for turning off the second switching element.

[0028] At the same time, when the capacitor voltage is below the target voltage value, the second temporary control signal for turning off the second switching element can be generated by passing a second control signal generated by the first feedback circuit to turn off the second switching element. Alternatively, when the capacitor voltage is greater than the target voltage value, the first temporary control signal for turning off the first switching element can be generated by passing a first control signal generated by the first feedback circuit to turn off the first switching element.

[0029] If the capacitor voltage is greater than a target voltage value, a third temporary control signal for turning off the third switching element may be generated by delaying a third control signal generated by the first feedback circuit for turning off the third switching element. Alternatively, if the capacitor voltage is below the target voltage value, a fourth temporary control signal for turning off the fourth switching element may be generated by delaying a fourth control signal generated by the first feedback circuit for turning off the fourth switching element.

[0030] At the same time, when the capacitor voltage is greater than the target voltage value, the fourth temporary control signal for turning off the fourth switching element can be generated by passing a fourth control signal generated by the first feedback circuit to turn off the fourth switching element. When the capacitor voltage is below the target voltage value, the third temporary control signal for turning off the third switching element can be generated by passing the third control signal generated by the first feedback circuit to turn off the third switching element.

[0031] Alternatively or additionally, the method may comprise generating delayed control signals by delaying the control signals generated by the first feedback circuit by the delay circuit of the second feedback circuit. The method may comprise comparing the capacitor voltage with a target capacitor voltage by a comparator of the second feedback circuit. The method may comprise forwarding either a control signal generated by the first feedback circuit or a delayed control signal generated by the second feedback circuit, based on a comparison result generated by the comparator, through at least one multiplexer of the second feedback circuit to control the switching behavior of one of the switching elements.A hysteresis of the comparator may be selected such that a frequency of a voltage change of the capacitor voltage lies outside an audible frequency band.

[0032] It should be noted that the methods and systems including their preferred embodiments as outlined in this document can be used standalone or in combination with the other methods and systems disclosed in this document. Furthermore, the features outlined in the context of one system are equally applicable to a corresponding method. Furthermore, all aspects of the methods and systems outlined in this document can be combined in any desired manner. In particular, the features of the claims can be combined in any desired manner.

[0033] In this document, the term "couple", "connect", "coupled" or "connected" refers to elements being in electrical connection with one another, whether directly connected, for example, by wires, or by some other means. Short description of the characters

[0034] The invention is explained below by way of example with reference to the accompanying drawings, in which

[0033] Fig. 1 shows a buck converter; Fig. 2 shows a multi-stage buck converter; Fig. 3 shows different switching states of a multi-stage buck converter; Fig. Figure 4 shows a transient switching state of a multi-stage buck converter during which a floating capacitor is charged; Fig. Figure 5 shows another transient switching state of a multi-stage buck converter during which a floating capacitor is discharged; Fig. 6 shows an exemplary circuit for regulating a capacitor voltage of a floating capacitor of a multi-level buck converter; Fig. Figure 7 shows a transient switching state of a multi-level boost converter during which a floating capacitor is charged; Fig. Figure 8 shows another temporary switching state of a multi-level boost converter during which a floating capacitor is discharged; and Fig. 9 shows an exemplary circuit for regulating a capacitor voltage of a floating capacitor of a multi-level boost converter. Detailed description

[0035] Fig. Figure 1 shows a buck converter 11 known from the prior art. Historically, the buck converter topology has been widely used for battery-powered devices, with the input voltage source provided by a Universal Serial Bus (USB) adapter. A high-side switch 111 is connected between an inductor input node of the inductor 113 and an input voltage. A low-side switch 112 is connected between the inductor input node and ground. Finally, an output capacitor 114 is connected between an inductor output node of the inductor 113 and ground. Furthermore, diagram 12 illustrates the voltage at the inductor input node of the inductor 113 over time. During a first time interval, the high-side switch 111 is turned on, and during a second time interval, the low-side switch 112 is turned on.The two switches are turned ON in alternating cycles, and the duty cycle of each cycle provides the required output voltage regulation.

[0036] To increase the operating efficiency of the buck converter, much effort has been invested in reducing the ON-time resistance of the switches (i.e., the drain-source resistance Rds-on) to reduce losses. Unfortunately, reducing the drain-source resistance Rds-on results in a larger parasitic capacitance when the overdrive of the output field-effect transistor (FET) gate is maximized, resulting in a trade-off between conduction losses and switching losses.

[0037] Another topic regarding conventional buck converters that is discussed in Fig. 1, is that the voltage at the inductor input node of inductor 113 oscillates between the input voltage Vin (when the high-side switch is ON) and ground (when the low-side switch is ON). This results in significant switching losses of the power converter and a core loss dissipated by the inductor due to the high root-mean-square voltage, or RMS, across the inductor.

[0038] A topology that promises to mitigate many of the disadvantages of the buck converter is the multi-level buck converter 2, which is Fig. 2. The illustrated exemplary multi-level buck converter 2 includes a first switching element 21, a second switching element 22, a third switching element 23, a fourth switching element 24, an inductor 26, a floating capacitor 25, and an optional output capacitor 27. A first terminal of the inductor 26 may be connected to a switching terminal connecting the second switching element 22 and the third switching element 23. A first terminal of the floating capacitor 25 may be connected to a terminal connecting the first switching element 21 and the second switching element 22, and a second terminal of the floating capacitor 25 may be connected to a terminal connecting the third switching element 23 and the fourth switching element 24.

[0039] The voltage at the first terminal of inductor 26 can switch between V_IN and V_IN / 2 when V_IN > V_OUT > V_IN / 2, and can switch between V_IN / 2 and ground when V_IN / 2 > V_OUT > ground, where V_IN denotes the input voltage and V_OUT denotes the output voltage. Diagrams 28 and 29 show the voltage at the first terminal of inductor 26 over time for the two different duty cycles.

[0040] A key aspect of the multi-stage buck converter topology is that the RMS voltage at the first terminal of inductor 16 is 50% of the corresponding voltage of a conventional buck converter. In addition to reducing the RMS voltage and RMS current across and through the inductor, the voltage across the switching elements is also reduced, thus reducing switching losses. Furthermore, transistors with lower breakdown voltage ratings typically have lower Rds-on characteristics, thereby reducing conduction losses.

[0041] Fig. Figure 3 shows four different switching states of a multi-level buck converter. In switching state D1, the first and third switching elements are on, while the second and fourth switching elements are off. In switching state DV, the third and fourth switching elements are on, while the first and second switching elements are off. In switching state D2, the second and fourth switching elements are on, while the first and third switching elements are off. Finally, in switching state DP, the first and second switching elements are on, while the third and fourth switching elements are off. The arrow labeled Isw indicates the current flow supplied to the output of the multi-level buck converter.

[0042] At very light loads, the multi-level buck converter cannot use all four switching states, but instead switches between the two switching states DP and DV, such that the multi-level buck converter enters a state comparable to a conventional buck converter. This operating state can be referred to as low-load operation. Ideally, the floating capacitor floats during low-load operation, such that it is neither charged nor discharged. However, non-ideal conditions during the DP-DV transition cause the voltage of the floating capacitor to either charge up to the input voltage V_IN or discharge to ground. In particular, Fig. 3, the first and second switching elements (transistors A and B, respectively) must both turn off during the DP-DV transition. Ideally, both switching elements turn off at the same time. However, in reality, either transistor A or transistor B will be the first of the pair to turn off. If transistor B turns off before transistor A, the floating capacitor voltage will be charged during the DP-DV transition. As shown in Fig. 4, a charging path runs through transistor A, the floating capacitor, and the body diode of transistor C (i.e., the third switching element). Conversely, assume that transistor A turns off before transistor B does. In this case, the voltage of the floating capacitor is discharged, as shown in Fig. 5. In this scenario, the discharge path passes through the body diode of transistor D (i.e., the fourth switching element), the floating capacitor, and transistor B.

[0043] The resulting charging or discharging of the floating capacitor can trigger fault conditions. In particular, charging the floating capacitor can trigger an overvoltage (OV) alarm, while discharging can trigger an undervoltage (UV) alarm. In response to the OV alarm, the floating capacitor voltage may be lowered, while the floating capacitor voltage may be increased in response to the UV alarm. However, triggering these alarm conditions wastes power and can also cause audible noise.

[0044] Fig. Figure 6 shows an exemplary circuit for regulating a capacitor voltage of a floating capacitor of a multi-level buck converter. The illustrated exemplary circuit utilizes the same mechanism that causes the floating capacitor to float during low-load operation (see Fig. 4 and Fig. 5, i.e., the mechanism that causes unwanted charging and discharging of the floating capacitor) to actively regulate the floating capacitor voltage toward a desired level. A comparator 60 compares the floating capacitor voltage with a reference voltage to determine whether the floating capacitor voltage is greater than or less than a desired value (e.g., half the input voltage, VIN / 2). Should the floating capacitor voltage be higher than desired, the turn-off (e.g., the falling edge) for transistor B (second switching element 67) is delayed with respect to the turn-off time for transistor A (first switching element 66). Conversely, if the floating capacitor voltage is lower than desired, the turn-off time for transistor A is delayed with respect to the falling edge for transistor B.To reduce noise, the comparator may include hysteresis.

[0045] As in Fig. 6, the exemplary circuit for regulating a capacitor voltage may include a delay circuit 68 configured to receive the control signals drvA and drvB generated by a first feedback circuit (not shown). The first feedback circuit may be configured to generate the control signals drvA and drvB for setting the switching elements in multiple switching states for regulating an output voltage or an output current of the multi-level buck converter. The delay circuit 68 may then be configured to generate the temporary control signals drvA_post_dly and drvB_post_dly by delaying the control signals drvA and drvB by a predetermined or variable delay interval.For example, delay circuit 68 may be configured to delay the control signals by a variable delay interval based on a voltage difference between a target voltage value of the capacitor voltage and an actual capacitor voltage. Here, a longer delay interval may be selected for a larger voltage difference, while a shorter delay interval may be selected for a smaller voltage difference. Two multiplexers 61 and 62 are configured to forward either the original control signals drvA and drvB generated by the first feedback circuit or the temporary control signals drvA_post_dly and drvB_post_dly generated by delay circuit 68.It should be noted here that the second multiplexer 62 is coupled to the output of the comparator 60 via an inverting circuit 63, such that the multiplexer 62 always forwards an original control signal when the multiplexer 61 forwards a temporary control signal, and vice versa. Furthermore, FIG. Fig. 6 two optional control circuits 64 and 65 for controlling the first switching element 66 and the second switching element 67, respectively.

[0046] As in the Fig. As can be seen in Figure 6, for example, the comparator output may go low as soon as the voltage of the floating capacitor is sufficiently higher than the desired value (VCapref) due to the hysteresis tolerance. This low state may trigger the first multiplexer 61 to select a delayed falling edge version of the drive signal for transistor B, and also trigger the second multiplexer 62 to select the undelayed version of the drive signal for transistor A. Conversely, if the voltage of the floating capacitor is sufficiently lower than the desired value Vcapref due to the hysteresis tolerance, the comparator output signal will go low to trigger the opposite selection by the two multiplexers 61, 62. The drive signal for transistor A will thus have a delayed falling edge compared to the drive signal for transistor B.

[0047] The resulting low-load regulation of the floating capacitor voltage is advantageous in terms of (1) saving energy, 2) preventing the activation of overvoltage or undervoltage alarms for the floating capacitor voltage, and 3) keeping the floating capacitor voltage ripple out of the audible range by a suitable selection of the hysteresis tolerance and the filter frequency.

[0048] Fig. Figure 7 shows a temporary switching state of a multi-level boost converter during which a floating capacitor can be charged. In an analogous manner, Fig. 8 shows another temporary switching state of a multi-stage boost converter during which a floating capacitor is discharged. Fig. Figure 9 shows an exemplary circuit for regulating a capacitor voltage of a floating capacitor of a multi-level boost converter. A comparator 90 compares the floating capacitor voltage with a reference voltage to determine whether the floating capacitor voltage is greater than or less than a desired value. As shown in Fig. 9, the exemplary circuit for regulating a capacitor voltage may include a delay circuit 98 configured to receive the control signals drvC and drvD generated by a first feedback circuit (not shown). The first feedback circuit may be configured to generate the control signals for setting the switching elements in multiple switching states for regulating the output voltage or an output current of the multi-level boost converter. The delay circuit 98 may then be configured to generate the temporary control signals drvC_post_dly and drvD_post_dly by delaying the control signals drvC and drvD by a predetermined or variable delay interval.For example, delay circuit 98 may be configured to delay the control signals by a variable delay interval based on a voltage difference between a target value of the capacitor voltage and an actual capacitor voltage. Here, a longer delay interval may be selected for a larger voltage difference, while a shorter delay interval may be selected for a smaller voltage difference. Two multiplexers 91 and 92 are configured to forward either the original control signals generated by the first feedback circuit or the temporary control signals generated by delay circuit 98.It should be noted here that the second multiplexer 62 is coupled to the output of the comparator 90 via an inverting circuit 93, such that the multiplexer 92 always forwards an original control signal when the multiplexer 91 forwards a temporary control signal, and vice versa. Furthermore, FIG. Fig. 9 two optional control circuits 94 and 95 for controlling the third switching element 96 and the second switching element 97, respectively.

[0049] It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples and embodiments outlined herein are primarily intended to be expressly provided for explanatory purposes only to assist the reader in understanding the principles of the proposed methods and systems. Furthermore, all statements herein providing principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to include equivalents thereof.

Claims

[1] Multi-stage power converter comprising: - a first switching element (21), a second switching element (22), a third switching element (23) and a fourth switching element (24); - an inductor (26), wherein a first terminal of the inductor (26) is connected to a switching terminal connecting the second switching element and the third switching element; - a floating capacitor (25), wherein a first terminal of the floating capacitor (25) is connected to a terminal connecting the first switching element and the second switching element, and wherein a second terminal of the floating capacitor (25) is connected to a terminal connecting the third switching element and the fourth switching element; - a first feedback circuit configured to generate control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-stage power converter; and - a second feedback circuit configured to generate, based on a capacitor voltage across the floating capacitor (25), temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor (25) is charged or discharged using an inductor current flowing through the inductor (26); and - the first feedback circuit is configured to switch between a first and a second switching state in low load operation; wherein - in the first switching state, the first and second switching elements are switched off and the third and fourth switching elements are switched on, and in the second switching state, the first and second switching elements are switched on and the third and fourth switching elements are switched off; and - the first feedback circuit is configured to generate two control signals for almost simultaneously switching off the first and second switching elements (22) in low-load operation; and - the second feedback circuit is configured to select one of the two control signals based on the capacitor voltage during low load operation and to delay the selected one of the two control signals by a delay interval such that the floating capacitor (25) is charged or discharged by the inductor current during the delay interval. [2] The multi-stage power converter of claim 1, wherein the second feedback circuit is configured to generate the temporary control signals for controlling the switching elements in the temporary switching state during a time interval between a previous switching state and a subsequent switching state, wherein both the previous switching state and the subsequent switching state are selected by the first feedback circuit from the plurality of switching states. [3] A multi-stage power converter according to any one of the preceding claims, wherein the temporary switching state of the second feedback circuit is not one of the plurality of switching states of the first feedback circuit. [4] A multi-stage power converter according to any one of the preceding claims, wherein the second feedback circuit comprises a delay circuit configured to: - receiving at least one of the control signals generated by the first feedback circuit, and - generating at least one of the temporary control signals by delaying the at least one control signal by a delay interval. [5] The multi-stage power converter of claim 4, wherein the second feedback circuit is configured to determine the delay interval such that a frequency of a voltage change of the capacitor voltage is outside an audible frequency band. [6] A multi-stage power converter according to any one of the preceding claims, wherein the second feedback circuit is configured: - when the capacitor voltage is below a target voltage value, to generate a first temporary control signal for switching off the first switching element (21) by delaying a first control signal generated by the first feedback circuit for switching off the first switching element (21), or - when the capacitor voltage is greater than the target voltage value, to generate a second temporary control signal for turning off the second switching element (22) by delaying a second control signal generated by the first feedback circuit for turning off the second switching element (22). [7] A multi-stage power converter according to any one of the preceding claims, wherein the second feedback circuit is configured: - when the capacitor voltage is below a target voltage value, to generate the second temporary control signal for switching off the second switching element (22) by forwarding a second control signal generated by the first feedback circuit for switching off the second switching element (22), or - when the capacitor voltage is greater than the target voltage value, to generate the first temporary control signal for turning off the first switching element (21) by forwarding a first control signal generated by the first feedback circuit for turning off the first switching element (21). [8] A multi-stage power converter according to any one of the preceding claims, wherein the second feedback circuit is configured: - when the capacitor voltage is greater than a target voltage value, to generate a third temporary control signal for switching off the third switching element (23) by delaying a third control signal generated by the first feedback circuit for switching off the third switching element (23), or - when the capacitor voltage is below the target voltage value, to generate a fourth temporary control signal for turning off the fourth switching element (24) by delaying a fourth control signal generated by the first feedback circuit for turning off the fourth switching element (24). [9] A multi-stage power converter according to any one of the preceding claims, wherein the second feedback circuit is configured: - when the capacitor voltage is greater than a target voltage value, to generate the fourth temporary control signal for switching off the fourth switching element (24) by forwarding a fourth control signal generated by the first feedback circuit for switching off the fourth switching element (24), or - when the capacitor voltage is below the target voltage value, to generate the third temporary control signal for switching off the third switching element (23) by forwarding the third control signal generated by the first feedback circuit for switching off the third switching element (23). [10] A multi-stage power converter according to any one of the preceding claims, wherein the second feedback circuit comprises: - a delay circuit, wherein the delay circuit is configured to generate delayed control signals by delaying the control signals generated by the first feedback circuit; - a comparator configured to compare the capacitor voltage with a target capacitor voltage; and - at least one multiplexer configured to forward either a control signal generated by the first feedback circuit or a delayed control signal generated by the second feedback circuit for controlling the switching behavior of one of the switching elements on the basis of a comparison result generated by the comparator. [11] A multi-stage power converter according to claim 10, wherein a hysteresis of the comparator is selected such that a frequency of a voltage change of the capacitor voltage is outside an audible frequency band. [12] A method for operating a multi-stage power converter comprising a first switching element (21), a second switching element (22), a third switching element (23), a fourth switching element (24), an inductor (26) and a floating capacitor (25), wherein a first terminal of the inductor (26) is connected to a switching terminal connecting the second switching element and the third switching element, wherein a first terminal of the floating capacitor (25) is connected to a terminal connecting the first switching element and the second switching element, and wherein a second terminal of the floating capacitor (25) is connected to a terminal connecting the third switching element and the fourth switching element, the method comprising: - generating control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-stage power converter by means of a first feedback circuit, wherein in low load operation switching takes place between two switching states, wherein in the first switching state the first and second switching elements are switched off and the third and fourth switching elements are switched on, and wherein in the second switching state the first and second switching elements are switched on and the third and fourth switching elements are switched off; - generating temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor (25) is charged or discharged using an inductor current flowing through the inductor (26) based on a capacitor voltage across the floating capacitor (25) by a second feedback circuit; - generating two control signals in low load operation for almost simultaneously switching off the first and second switching elements (22) by the first feedback circuit; - selecting one of the two control signals based on the capacitor voltage by the second feedback circuit; and - Delaying the selected one of the two control signals by a delay interval through the second feedback circuit such that the floating capacitor (25) is charged or discharged by the inductor current during the delay interval. [13] The method of claim 12, further comprising: - generating the temporary control signals for controlling the switching elements in the temporary switching state during a time interval between a preceding switching state and a subsequent switching state by the second feedback circuit, wherein both the preceding and the subsequent switching state are selected by the first feedback circuit from the plurality of switching states. [14] A method according to any one of claims 12 or 13, wherein the temporary switching state of the second feedback circuit is not one of the plurality of switching states of the first feedback circuit. [15] A method according to any one of claims 12, further comprising: - receiving at least one of the control signals generated by the first feedback circuit by the second feedback circuit; and - generating at least one of the temporary control signals by the second feedback circuit by delaying the at least one control signal by a delay interval. [16] The method of claim 15, further comprising: - Determining the delay interval by the second feedback circuit such that a frequency of a voltage change of the capacitor voltage lies outside an audible frequency band. [17] A method according to any one of claims 12 or 16, further comprising: - when the capacitor voltage is below a target voltage value, generating a first temporary control signal for switching off the first switching element (21) by delaying a first control signal generated by the first feedback circuit for switching off the first switching element (21), or - when the capacitor voltage is greater than the target voltage value, generating a second temporary control signal for turning off the second switching element (22) by delaying a second control signal generated by the first feedback circuit for turning off the second switching element (22). [18] The method of claim 17, further comprising: - when the capacitor voltage is below the target voltage value, generating the second temporary control signal for switching off the second switching element (22) by forwarding a second control signal generated by the first feedback circuit for switching off the second switching element (22), or - when the capacitor voltage is greater than the target voltage value, generating the first temporary control signal for turning off the first switching element (21) by forwarding a first control signal generated by the first feedback circuit for turning off the first switching element (21). [19] A method according to any one of claims 12 or 18, further comprising: - when the capacitor voltage is greater than a target voltage value, generating a third temporary control signal for switching off the third switching element (23) by delaying a third control signal generated by the first feedback circuit for switching off the third switching element (23), or - when the capacitor voltage is below the target voltage value, generating a fourth temporary control signal for turning off the fourth switching element (24) by delaying a fourth control signal generated by the first feedback circuit for turning off the fourth switching element (24) for turning off the fourth switching element (24). [20] The method of claim 19, further comprising: - when the capacitor voltage is greater than the target voltage value, generating the fourth temporary control signal for switching off the fourth switching element (24) by forwarding a fourth control signal generated by the first feedback circuit for switching off the fourth switching element (24), or - when the capacitor voltage is below the target voltage value, generating the third temporary control signal for turning off the third switching element (23) by forwarding the third control signal generated by the first feedback circuit for turning off the third switching element (23). [21] A method according to any one of claims 12 or 20, further comprising: - generating delayed control signals by a delay circuit of the second feedback circuit by delaying the control signals generated by the first feedback circuit; - comparing the capacitor voltage with a target capacitor voltage by a comparator of the second feedback circuit; and - Forwarding either a control signal generated by the first feedback circuit or a delayed control signal generated by the second feedback circuit, based on a comparison result generated by the comparator, through at least one multiplexer of the second feedback circuit for controlling the switching behavior of one of the switching elements. [22] The method of claim 21, further comprising: - Selecting a hysteresis of the comparator such that a frequency of a voltage change of the capacitor voltage lies outside an audible frequency band. [23] Multi-stage power converter comprising: - a first switching element (21), a second switching element (22), a third switching element (23) and a fourth switching element (24); - an inductor (26), wherein a first terminal of the inductor (26) is connected to a switching terminal connecting the second switching element and the third switching element; - a floating capacitor (25), wherein a first terminal of the floating capacitor (25) is connected to a terminal connecting the first switching element and the second switching element, and wherein a second terminal of the floating capacitor (25) is connected to a terminal connecting the third switching element and the fourth switching element; - a first feedback circuit configured to generate control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-stage power converter; wherein - the first feedback circuit is configured to switch between a first and a second switching state in low load operation; wherein - in the first switching state, the first and second switching elements are switched off and the third and fourth switching elements are switched on, and in the second switching state, the first and second switching elements are switched on and the third and fourth are switched off; and - a second feedback circuit configured to generate, based on a capacitor voltage across the floating capacitor (25), temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor (25) is charged or discharged using an inductor current flowing through the inductor (26); wherein the second feedback circuit comprises: - a delay circuit, wherein the delay circuit is configured to generate delayed control signals during low load operation by delaying the control signals generated by the first feedback circuit; - a comparator configured to compare the capacitor voltage with a target capacitor voltage; and - at least one multiplexer configured to forward either a control signal generated by the first feedback circuit or a delayed control signal generated by the second feedback circuit for controlling the switching behavior of one of the switching elements on the basis of a comparison result generated by the comparator. [24] A method for operating a multi-stage power converter comprising a first switching element (21), a second switching element (22), a third switching element (23), a fourth switching element (24), an inductor (26) and a floating capacitor (25), wherein a first terminal of the inductor (26) is connected to a switching terminal connecting the second switching element and the third switching element, wherein a first terminal of the floating capacitor (25) is connected to a terminal connecting the first switching element and the second switching element, and wherein a second terminal of the floating capacitor (25) is connected to a terminal connecting the third switching element and the fourth switching element, the method comprising: - generating control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-stage power converter by means of a first feedback circuit, wherein in low load operation switching takes place between two switching states, wherein in the first switching state the first and second switching elements are switched off and the third and fourth switching elements are switched on, and wherein in the second switching state the first and second switching elements are switched on and the third and fourth switching elements are switched off; - generating temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor (25) is charged or discharged using an inductor current flowing through the inductor (26) based on a capacitor voltage across the floating capacitor (25) by a second feedback circuit; - generating delayed control signals in low load operation by a delay circuit of the second feedback circuit by delaying the control signals generated by the first feedback circuit; - comparing the capacitor voltage with a target capacitor voltage by a comparator of the second feedback circuit; and - Forwarding either a control signal generated by the first feedback circuit or a delayed control signal generated by the second feedback circuit, based on a comparison result generated by the comparator, through at least one multiplexer of the second feedback circuit for controlling the switching behavior of one of the switching elements. [25] Multi-stage power converter comprising: - a first switching element (21), a second switching element (22), a third switching element (23) and a fourth switching element (24); - an inductor (26), wherein a first terminal of the inductor (26) is connected to a switching terminal connecting the second switching element and the third switching element; - a floating capacitor (25), wherein a first terminal of the floating capacitor (25) is connected to a terminal connecting the first switching element and the second switching element, and wherein a second terminal of the floating capacitor (25) is connected to a terminal connecting the third switching element and the fourth switching element; - a first feedback circuit configured to generate control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-stage power converter; wherein - the first feedback circuit is configured to switch between a first and a second switching state in low load operation; wherein - in the first switching state, the first and second switching elements are switched off and the third and fourth switching elements are switched on, and in the second switching state, the first and second switching elements are switched on and the third and fourth are switched off; and - a second feedback circuit configured to generate, based on a capacitor voltage across the floating capacitor (25), temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor (25) is charged or discharged using an inductor current flowing through the inductor (26); wherein - the first feedback circuit is configured to generate two control signals for almost simultaneously switching off the third and fourth switching elements (24) in low-load operation, and - the second feedback circuit is configured to select one of the two control signals based on the capacitor voltage during low load operation and to delay the selected one of the two control signals by a delay interval such that the floating capacitor (25) is charged or discharged by the inductor current during the delay interval. [26] A method for operating a multi-stage power converter comprising a first switching element (21), a second switching element (22), a third switching element (23), a fourth switching element (24), an inductor (26) and a floating capacitor (25), wherein a first terminal of the inductor (26) is connected to a switching terminal connecting the second switching element and the third switching element, wherein a first terminal of the floating capacitor (25) is connected to a terminal connecting the first switching element and the second switching element, and wherein a second terminal of the floating capacitor (25) is connected to a terminal connecting the third switching element and the fourth switching element, the method comprising: - generating control signals for setting the switching elements in a plurality of switching states for regulating an output voltage or an output current of the multi-stage power converter by means of a first feedback circuit, wherein in low load operation switching takes place between two switching states, wherein in the first switching state the first and second switching elements are switched off and the third and fourth switching elements are switched on, and wherein in the second switching state the first and second switching elements are switched on and the third and fourth switching elements are switched off; - generating temporary control signals for setting the switching elements in a temporary switching state in which the floating capacitor (25) is charged or discharged using an inductor current flowing through the inductor (26) based on a capacitor voltage across the floating capacitor (25) by a second feedback circuit; - generating two control signals in low load operation for almost simultaneously switching off the third and fourth switching elements (24) by the first feedback circuit; - selecting one of the two control signals based on the capacitor voltage by the second feedback circuit; and - Delaying the selected one of the two control signals by a delay interval through the second feedback circuit such that the floating capacitor (25) is charged or discharged by the inductor current during the delay interval.

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