ELECTRONIC CONTROL UNIT

Abstract

An ECU (1) contains a microcomputer (3) and an ASIC (5) designed to communicate with the microcomputer via a communication bus (11). The ASIC counts the frequency with which communication data is normally received from the microcomputer to provide a count as a normal data receive count and transmits the normal data receive count to the microcomputer. The microcomputer counts the number of transmissions of communication data to the ASIC as a transmission count by a transmission counter section (23). The microcomputer then determines the presence or absence of an error in a communication by comparing the transmission count of the transmission counter section with the normal data receive count from the ASIC.

Description

Technical field

[0001] The present invention relates to an electronic control unit. State of the art

[0002] JP 2005-267580A, for example, describes a configuration of an ECU (i.e., an electronic control unit) in which a CPU and an IC (integrated circuit) or ASIC communicate with each other via a communication bus. According to JP 2005-267580A, if an abnormality is detected in the communication, the ASIC transmits abnormality information to the CPU.

[0003] US patent 2016 / 0264071A1 discloses several electronic control units in a vehicle network system that communicate with each other via a bus using the CAN protocol, using a data frame with an added message authentication code (MAC). The system detects the state of the vehicle in which the in-vehicle network system is installed, and if the detected state of the vehicle is a predetermined state, a MAC key used to generate the MAC is updated.

[0004] DE 11 2010 001 370 T5 discloses a signal transmission device for an elevator. A control panel node and an input / output node each have a safety data processing unit and a high-reliability communication unit. During transmission, the safety data processing unit generates a safety data packet containing safety data, and the high-reliability communication unit generates a communication data packet containing the safety data packet from the safety data processing unit and transmits the communication data packet a predetermined number of times.Upon receipt, the high-reliability communication unit captures and outputs a security data packet by determining one of one or more communication data packets with the same contents that it has duly received as the effective packet, and the security data processing unit analyzes a state relating to the security of a system based on the security data captured from the security data packet coming from the high-reliability communication unit.

[0005] DE 10 2004 028 739 A1 discloses an electronic control unit. A first control circuit section (master station) and a second control circuit section (substation) communicate with each other via series / parallel converters. The master station contains a regular transmission device and a transmission enable signal generation device; and the substation contains a regular reporting device, an acknowledgment response device with respect to a transmission data from the master station, and a table of unprocessed data. The table of unprocessed data avoids congestion during upstream communication from the substation to the master station, enabling regular transmission and reporting. The transmission from the substation to the master station is executed based on a transmission enable control signal generated by the master station.

[0006] DE 10 2004 012 808 A1 discloses an electronic control unit that includes a serial communication circuit capable of easily confirming the presence or absence of a communication error during a regular transmission or report between a master station and a substation. The master station and the substation communicate bidirectionally via serial / parallel converters. The master station includes a regular transmission device and an irregular transmission device. The substation includes a regular reporting device, an acknowledgment response device, and a report response device with respect to transmission data from the master station, as well as a table of unprocessed data. The acknowledgment response device and the report response device confirm whether downstream communication from the master station to the substation is normal or not.If any error exists in regular reporting data about an upstream communication, the error is confirmed by the fact that the irregular transmission device is executing a retransmission read request. Summary

[0007] As a result of detailed investigations, the inventors discovered the following. Based on JP 2005-267580A, a configuration can be provided in which the ASIC determines whether communication data received by the CPU (i.e., received data) is abnormal and transmits abnormality information to the CPU if it is determined to be abnormal. With such a configuration, the CPU can detect, based on the abnormality information from the ASIC, that an abnormality has occurred in the communication.

[0008] However, the above configuration cannot detect an abnormality or error where the IC cannot receive communication data from the CPU.

[0009] It is an object of the present invention to provide an electronic control unit comprising a first processing unit and a second processing unit that communicate with each other, wherein the first processing unit in the electronic control unit can also detect an abnormality or error in which the second processing unit cannot receive the communication data from the first processing unit. This object is achieved with an electronic control unit having the features of claim 1. The dependent claims are directed to advantageous embodiments of the invention.

[0010] To solve the above problem, according to the present invention an electronic control unit is created which includes a first processing unit and a second processing unit which communicates with the first processing unit via at least one communication path.

[0011] The second processing unit contains a counter transmission section, or counter value transmission section, designed to count at least a certain number of receptions of normal communication data from the first processing unit, provide a counter value as a normal data reception count, and transmit a counter result, containing at least the normal data reception count, back to the first processing unit. Note that "reception of normal communication data" means that the communication data has been received and that the received communication data is free of any abnormality (i.e., normal).

[0012] The first processing unit contains a counter section and a communication diagnostic section. The counter section is designed to count the number of transmissions, which is the frequency with which the first processing unit transmits communication data to the second processing unit to provide a transmission count. The communication diagnostic section is designed to determine the presence or absence of a communication error by comparing the transmission count with the normal data reception count transmitted by the second processing unit.

[0013] According to such a configuration, a difference between (i) the transmission count of the first processing unit and (ii) the normal data receive count from the second processing unit to the first processing unit occurs not only in response to an abnormality in the communication data received by the second processing unit (i.e., receive data), but also in response to the second processing unit's inability to receive the communication data. Therefore, the communication diagnostic section in the first processing unit can determine that a communication error has occurred. The first processing unit can thus also detect an error indicating that the second processing unit cannot receive the communication data from the first processing unit. Brief description of the drawings

[0014] The above and further problems, features and advantages of the present invention will become clear with reference to the following detailed description and the accompanying drawings. These show: Fig. 1 a block diagram showing a configuration of an ECU according to a first embodiment; Fig. 2 a flowchart showing a processing operation performed by an IC according to the first embodiment; Fig. 3 a flowchart showing processing performed by a microcomputer according to the first embodiment; Fig. 4 a flowchart showing a processing operation performed by an IC according to a second embodiment; Fig. 5 a flowchart showing processing performed by a microcomputer according to the second embodiment; Fig. 6 a block diagram showing a configuration of an ECU according to a third embodiment; Fig. 7 a flowchart showing a processing operation performed by an IC according to a fourth embodiment; Fig. 8 a flowchart showing processing performed by an IC according to a fifth embodiment; and Fig. 9 a flowchart showing processing performed by a microcomputer according to the fifth embodiment. Detailed description

[0015] In the following, embodiments of the present invention are described with reference to the drawings. 1. First embodiment1-1. Configuration

[0016] As it is in Fig. As shown in Figure 1, an ECU 1 according to a first embodiment comprises a microcomputer 3 and an ASIC 5 (hereinafter referred to as IC 5). Here, ASIC is an abbreviation for "application-specific integrated circuit".

[0017] ECU 1 controls, for example, a power source of a vehicle. The power source, as a control target, can be an internal combustion engine or an electric motor. Within ECU 1, the microcomputer 3 and the IC 5 are interconnected via a communication bus 11, forming a communication path.

[0018] Microcomputer 3 performs processing to control the control target. IC 5 is operated based on communication data from microcomputer 3. For example, IC 5 controls an actuator to control a control target or reads a signal value from a sensor used to control the control target at a time interval set by communication data from microcomputer 3. The signal value read by IC 5 is sent to microcomputer 3 and used to control the control target. IC 5 can also, for example, monitor the operation of microcomputer 3. In this case, if an abnormality of microcomputer 3 is detected, the handling parameters can be adjusted or set based on data from microcomputer 3.

[0019] Communication bus 11, for example, is a communication bus according to SPI. Here, SPI is an abbreviation for "Serial Peripheral Interface". In this case, communication bus 11 can include a line for a chip selection signal indicating that microcomputer 3 has selected a communication partner (i.e., IC 5), a line for outputting a communication clock for synchronous communication from microcomputer 3 to IC 5, a line for data transmission from microcomputer 3 to IC 5, and a line for data transmission from IC 5 to microcomputer 3. Communication bus 11 does not have to be a communication bus according to SPI.

[0020] The microcomputer 3 includes a communication interface 21 for communication with the IC 5 via the communication bus 11, a transmission counter section 23, and a communication diagnostic section 25. The transmission counter section 23 counts the number of transmissions (i.e., the transmission frequency) of communication data from the microcomputer 3 to the IC 5 via the communication bus 11, where the number of transmissions is equivalent to a transmission count value. The communication diagnostic section 25 determines the presence or absence of a communication error based on the number of transmissions counted by the transmission counter section 23 and the information transmitted from the IC 5 to the microcomputer 3.

[0021] The IC 5 also includes a communication interface 31 for communication with the microcomputer 3 via the communication bus 11, a data abnormality detection section 33, and a normality counter 35. The data abnormality detection section 33 determines whether an abnormality is present in the communication data (i.e., the received data) received by the microcomputer 3 via the communication bus 11. In other words, the data abnormality detection section 33 determines the presence or absence of an abnormality in the communication data received by the microcomputer 3 via the communication bus 11. The normality counter 35 is a counter for counting the number of receptions (i.e.,(the frequency of receptions) of the normal communication data as a normal data reception count, where the number of receptions of the normal communication data is the frequency with which the communication data is normally received by the microcomputer 3, or the number with which the data abnormality determination section 33 determines that the received data is normal. The normality counter 35, for example, is an 8-bit counter, but can also be a counter with a different number of bits.

[0022] Although not shown, the microcomputer 3 contains a CPU and semiconductor memory (hereinafter referred to as memory), such as a ROM or RAM. The functions of the transmission counter section 23 and the communication diagnostic section 25 in the microcomputer 3 are realized by the CPU executing the program stored in the memory. In this example, the memory corresponds to a non-volatile storage medium in which the program is stored. When the program is executed, the procedure corresponding to the program is carried out. Furthermore, the microcomputer 3 can be a package or can be designed such that the CPU, memory, etc., are separate packages. If the CPU, memory, and the like are in separate packages or enclosures, the communication interface 21 can be located in Fig. 1. For example, it may be contained in the CPU. Furthermore, the microcomputer 3 or the CPU can be referred to as an MPU (i.e., a microprocessing unit). Some or all of the functions of the microcomputer 3 can also be implemented using one or more hardware circuits. For example, if the functions of the microcomputer 3 are implemented by an electronic circuit, which is a hardware circuit, the electronic circuit can be a digital circuit, an analog circuit, or a combination of these. 1-2. Processing carried out by the IC

[0023] The following describes the processing carried out by IC 5 with reference to the flowchart of the Fig. 2 described. For example, when operating energy is supplied to ECU 1, IC 5 initiates the process in Fig. 2 through.

[0024] As it is in Fig. As shown in Figure 2, IC 5 in S110 waits for communication data to be sent by microcomputer 3 via communication bus 11. When it detects that the communication data has been sent, IC 5 receives it. Note that one unit of communication data has a specific number of bits (for example, 8 bits).

[0025] Subsequently, IC 5 in S120, through data abnormality detection section 33, determines whether the data received from microcomputer 3 is abnormal. For example, the presence or absence of an abnormality in the received data can be determined by performing a parity check. For instance, on communication bus 11, the number of communication clock cycles in a communication period during which the chip selection signal has an active level (e.g., a low level) is recorded. It can then be determined whether the recorded number of communication clock cycles is a normal value to ascertain the presence or absence of an abnormality in the received data. If the number of communication clock cycles is not a normal value, it is estimated or assumed that the number of bits in the received data is not a normal value.

[0026] Subsequently, IC 5 in S130 determines, with reference to the determination result in S120, whether the received data is normal or not. If the received data is normal, i.e., if the communication data from microcomputer 3 is received normally, the normality counter 35 in the subsequent S140 is incremented. That is, the value of the normality counter 35 (hereinafter referred to as the normal data reception counter value) is increased by one.

[0027] In the subsequent S150, IC 5 transmits the normal data reception count to microcomputer 3 as a count result. Although in this example the normal data reception count is the count result itself, the count result transmitted from IC 5 to microcomputer 3 can contain information other than the normal data reception count. Furthermore, for example, the transmission of the count result to microcomputer 3 can occur during a period when microcomputer 3 is not transmitting any data.

[0028] As shown in S160, IC 5 returns to S110 if it is not in the reset state. If IC 5 is in the reset state, the process continues. Fig. 2. The process ends, and operation is stopped. If IC 5 in S130 determines that the received data is not normal (i.e., abnormal), IC 5 returns to S110. 1-3. Processing performed by the microcomputer

[0029] The following describes the processing performed by microcomputer 3 with reference to the flowchart of the Fig. 3 described. The microcomputer 3 serves through the processing in S210 and S220 in Fig. 3 as a communication diagnostic section 25.

[0030] For example, microcomputer 3 carries out the process in Fig. 3 at predetermined times or each time the count result is received from IC 5. As described in Fig. As shown in Figure 3, the microcomputer 3 in S210 compares the transmission count, which is the number of transmissions counted by the transmission counter section 23, with the normal data receive count received by IC 5. In S210, for example, the difference between the transmission count and the normal data receive count is calculated. The calculated difference can be, for example, an absolute value of the difference or a value obtained by subtracting the normal data receive count from the transmission count.

[0031] Then, in the subsequent S220, microcomputer 3 determines the presence or absence of a communication error based on the comparison result in S210. For example, if the difference as a comparison result calculated in S210 is equal to or greater than a predetermined value, it can be determined that a communication error exists. The predetermined value can be 1, 2, or more.

[0032] If microcomputer 3 determines in S220 that a communication error has occurred, it proceeds to S230 and calculates the error frequency. In S230, for example, the ratio of the value obtained by subtracting the normal data receive count from the transmit count to the transmit count (i.e., (transmit count - normal data receive count) / (transmit count)) can be calculated as the error frequency. Microcomputer 3 then terminates the process in S230. Fig. 3.

[0033] If microcomputer 3 in the S220 above determines that there is no communication error, the process of Fig. 3 ends as it is. 1-4. Effects

[0034] According to the first embodiment described in detail above, the following effects can be achieved.

[0035] (1a) The microcomputer 3 determines the presence or absence of a communication error by comparing the transmission count with the normal data reception count from the IC 5. Therefore, a difference between the transmission count and the normal data reception count occurs not only when there is an abnormality in the data received by the IC 5, but also when the IC 5 is unable to receive the communication data. The microcomputer 3 can thus determine that a communication error has occurred. Therefore, the microcomputer 3 can also detect an error indicating that the IC 5 is unable to receive the communication data from the microcomputer 3.

[0036] (1b) The microcomputer 3 can be installed in S230 of the Fig. Microcomputer 3 calculates the frequency of a communication error based on the transmission count and the normal data reception count from IC 5. Therefore, microcomputer 3 can modify the operating behavior of a control object according to the communication error frequency. For example, microcomputer 3 can operate in normal mode when the communication error frequency is equal to or less than a predetermined threshold. Conversely, microcomputer 3 can perform an action to stop IC 5 from operating if the communication error frequency exceeds this threshold. Instead of stopping IC 5, a hardware circuit or other component can be used to continue controlling the control object.

[0037] In the first embodiment, the microcomputer 3 corresponds to a first processing unit, and the IC 5 corresponds to a second processing unit. In the microcomputer 3, the transmission counter section 23 corresponds to a counter section. S210 and S220 in Fig. 3 corresponds to processing as communication diagnostic section 25. Furthermore, IC 5 serves through processing in S140 and S150 in Fig. 2 as a counter transmission section. That is, S140 and S150 correspond to processing as a counter transmission section. 2. Second embodiment 2-1. Main differences from the first embodiment

[0038] Since the basic configuration of the second embodiment is similar to that of the first embodiment, the main difference will be described. Note that the same reference numerals as in the first embodiment denote the same configuration, and therefore reference is made to the preceding description.

[0039] In the ECU 1 of the second embodiment, the IC 5 carries out the process in Fig. 4 instead of the process in Fig. 2. Then the microcomputer 3 carries out the process in Fig. 5 at predetermined time intervals, for example, instead of the process of Fig. 3 through. 2-2. Processing carried out by the IC

[0040] In the process of Fig. 4 is S170 between S140 and S150 of the process of Fig. 2 added. The processing is different than in S170. Fig. 4 is the same as in Fig. 2, and therefore their description will not be repeated.

[0041] As it is in Fig. As shown in Figure 4, IC 5 in S170 subsequently determines at S140 whether a counter request has been received from microcomputer 3. The counter request from microcomputer 3 is a request signal to request the counter result from IC 5 and corresponds to a request to read the counter result from IC 5. The counter result request can be transmitted from microcomputer 3 to IC 5 via communication bus 11, but can also be transmitted via a signal line that is separate from communication bus 11.

[0042] If IC 5 in S170 determines that the counter result request has been received, the process proceeds to S150. In S150, IC 5 transmits the counter result (i.e., the normal data received counter value) to microcomputer 3. If IC 5 in S170 determines that the counter result request has not been received, the process returns to S110. 2-3. Processing performed by the microcomputer

[0043] In the process of Fig. 5 is S205 before S210 in the process of Fig. 3 added. The different processing than in S205 in Fig. 5 is the same as the processing in Fig. 3, and therefore their description will not be repeated.

[0044] As it is in Fig. As shown in Figure 5, microcomputer 3 transmits the aforementioned counter result request to IC 5 in S205. Since the normal data reception counter value is sent from IC 5 to microcomputer 3 as a counter result, microcomputer 3 receives the normal data reception counter value from IC 5. In the subsequent S210, the transmission counter value is compared with the normal data reception counter value from IC 5, as described above. 2-4. Effects

[0045] According to the second embodiment described in detail above, the following effects are also achieved. The IC 5, which serves as a counter transmission unit, transmits the counter result to the microcomputer 3 in response to a request from the microcomputer 3 (i.e., a counter result request). Therefore, the IC 5 does not need to transmit the counter result with every communication with the microcomputer 3; thus, the processing load and communication time between the IC 5 and the microcomputer 3 can be reduced. 3. Third embodiment 3-1. Main differences from the first embodiment

[0046] Since the basic configuration of the third embodiment is similar to that of the first embodiment, mainly the key differences will be described. Note that the same reference numerals as in the first embodiment denote the same configuration, and thus reference is made to the preceding description.

[0047] As it is in Fig. As shown in Figure 6, in the third embodiment of the ECU 1, the microcomputer 3 and the IC 5 are connected not only via the communication bus 11, but also via two other communication buses 12 and 13. The communication buses 11 to 13 correspond to three communication paths between the microcomputer 3 and the IC 5.

[0048] The IC 5 also contains a communication interface 41 for communication with the microcomputer 3 via communication bus 12 and a communication interface 51 for communication with the microcomputer 3 via communication bus 13. Conversely, communication for the respective communication buses 11 to 13 is carried out in the microcomputer 3 via communication interface 21. The frequencies of the communication clocks (i.e., clock frequencies) of the communication buses 11 to 13 differ from one another.

[0049] Furthermore, the IC 5 includes, as components for communication via the communication bus 12, a data abnormality determination section 43, which plays the same role as the data abnormality determination section 33, and a normality counter 45, which plays the same role as the normality counter 35.

[0050] Furthermore, the IC 5 includes, as components for communication via the communication bus 13, a data abnormality detection section 53, which plays the same role as the data abnormality detection section 33, and an abnormality flag register 55. The role of the abnormality flag register 55 will be described later.

[0051] The IC 5 performs the same processing as the processing in Fig. 2 also with regard to communication via communication bus 12. That is, IC 5 serves as a counter transmission section for communication buses 11 and 12 respectively from communication buses 11 to 13. For this reason, in the third embodiment, it can be said that the counter transmission section is operated for both communication buses 11 and 12.

[0052] Furthermore, the transmission counter section 23 in the microcomputer 3, which corresponds to the counter section, counts the number of transmissions over the communication bus 12 separately from the number of transmissions over the communication bus 11. The microcomputer 3 also serves as the communication diagnostic section 25 by carrying out the same process as the process in Fig. 3 with regard to communication via the communication bus 12. Therefore, in the third embodiment, it can be said that the transmission counter section 23 and the communication diagnostic section 25 are operated in the microcomputer 3 for the two communication buses 11 and 12.

[0053] In the third embodiment, each of the communication buses 11 and 12 from the communication buses 11, 12 and 13 serves as described in the first embodiment. That is, the IC 5 transmits a normal data receive count to the microcomputer 3 via the respective communication buses 11 and 12, and the microcomputer 3 determines the presence or absence of a communication error by comparing the transmission count with the normal data receive count received via the respective communication buses 11 and 12.

[0054] In contrast, communication bus 13 is used differently in IC 5. Specifically, in IC 5, in response to a determination by data abnormality detection section 53 that an abnormality exists in the data received via communication bus 13, an abnormality flag is set in the abnormality flag register 55 as a historical record indicating the occurrence of the abnormality. This set abnormality flag is then transmitted, for example, at the time of the next communication with microcomputer 3 or in response to a request from microcomputer 3 via communication bus 13. Therefore, when microcomputer 3 receives the abnormality flag from IC 5, it determines that an error or abnormality has occurred in the communication via communication bus 13.However, according to the technique that uses this abnormality flag, the microcomputer 3 cannot detect that the IC 5 cannot receive the communication data being transmitted via the communication bus 13.

[0055] In the third embodiment, the data transmitted via communication buses 11 and 12 are more important than the data transmitted via communication bus 13. Therefore, to enable the microcomputer 3 to accurately detect communication errors with respect to the high-priority data, the communication errors in the communication data via communication buses 11 and 12 can be detected using the same technique as in the first embodiment.

[0056] For example, communication bus 12, like communication bus 11, can be an SPI communication bus. Furthermore, communication bus 13 can be a communication bus with MSC (i.e., microsecond channel). In the communication bus with MSC, a single line is used for both (i) the chip selection signal line and (ii) the line for transmitting data from IC 5 to microcomputer 3; in contrast, differential signal transmission lines are used for both (i) the communication clock line and (ii) the line for transmitting data from microcomputer 3 to IC 5. Additionally, all communication buses 11 through 13 can be communication buses of the same system. 3-2. Effects

[0057] The third embodiment described above creates a configuration that uses a normal data reception count value for some communication buses 11 and 12 (for example, those transmitting high-priority data) from communication buses 11 to 13 to detect the presence or absence of a communication error. The processing load of the microcomputer 3 can thus be efficiently reduced.

[0058] In the third embodiment, the technique of the second embodiment can be used to determine the presence or absence of a communication error via communication buses 11 and 12. It is further assumed that the number of communication buses is equal to or greater than N (where N is a natural number). Under such an assumption, a configuration can be provided such that the determination of the presence or absence of a communication error is performed using a standard data reception count for a predetermined number of communication buses, less than N. However, the third embodiment does not prevent or prohibit the determination of the presence or absence of a communication error from being performed using a standard data reception count for all communication buses. 4. Fourth embodiment 4-1. Main differences from the second embodiment

[0059] Since the basic configuration of the fourth embodiment is similar to that of the second embodiment, mainly the key differences are described. Note that the same reference numerals as in the second embodiment denote the same configuration, and thus reference is made to the preceding description.

[0060] In the ECU 1 of the fourth embodiment, the IC 5 carries out the process in Fig. 7 instead of the process in Fig. 4. The transmission counter section 23 in the microcomputer 3 counts the number of transmissions of communication data for a write access to IC 5 among the communication data to IC 5. Hereinafter, the communication data for a write access to IC 5 is referred to as write access data.

[0061] The write access data from microcomputer 3 to IC 5 can contain data for setting (i.e., writing) the time interval for controlling the actuator and the time interval for reading the signal value from the sensor in IC 5. Such data is communication data that specifies the operating content of IC 5, and its influence on the control operation of ECU 1 is assumed to be greater than that on the data for read access. 4-2. Processing carried out by the IC

[0062] In the process of Fig. 7 is S180 between S130 and S140 of the process of Fig. 4 added. Since the processing is different than in S180 in Fig. 7 the same as the processing in Fig. If the number is 4, its description will not be repeated.

[0063] If S130 determines that the received data is normal, IC 5 in S180 determines whether the received data is write access data, as described in Fig. Figure 7 is shown. If the received data is write access data, IC 5 moves to S140 and increments the normality counter 35. If, on the other hand, the received data is not write access data, the process returns to S110.

[0064] Therefore, IC 5 counts the frequency with which the data access data is correctly received among the communication data from microcomputer 3 in order to provide the count value as a normal data reception count value, and transmits the normal data reception count value to microcomputer 3 as the count result. That is, in IC 5, the counter transmission section, which is defined by S140 and S150 in Fig. 7 is implemented with regard to the write access data from the microcomputer 3. In addition, the transmission counter section 23 in the microcomputer 3, which corresponds to the counter section, and the communication diagnostic section 25, which is processed in Fig. 5 is implemented with regard to write access data. 4-3. Effects

[0065] According to the fourth embodiment described in detail above, the following effects are also achieved. In the fourth embodiment, the monitoring objective of the presence or absence of a communication error is limited to the write access data, which is assumed to have a relatively high impact on the operation of the ECU 1. This reduces the processing load between the microcomputer 3 and the IC 5.

[0066] The technique of the fourth embodiment can also be used for the first and third embodiments. 5. Fifth embodiment 5-1. Main differences from the second embodiment

[0067] Since the basic configuration of the fifth embodiment is similar to that of the second embodiment, mainly the key differences are described. Note that the same reference numerals as in the second embodiment denote the same configuration, and thus reference is made to the preceding description.

[0068] In the fifth embodiment of ECU 1, IC 5 contains an abnormality counter. The abnormality counter is a counter for counting the frequency with which the data abnormality determination section 33 determines that the received data is abnormal, i.e., the frequency with which the received data is abnormal (hereinafter also referred to as the number of receptions of abnormal communication data (i.e., the frequency of receptions of abnormal communication data)). Furthermore, IC 5 performs the process in Fig. 8 instead of the process in Fig. 4 through.

[0069] Microcomputer 3 also carries out the process in Fig. 9 out. The process in Fig. For example, command 9 can be executed before or after S230 if the following occurs in S220: Fig. 5 determines that there is an error in communication. 5-2. Processing carried out by the IC

[0070] In the process of Fig. 8 is S190 to the process in Fig. 4 added. Furthermore, the content as a count result, which is transmitted from S150 to microcomputer 3, is larger. The processing differs from that in S150 and S190. Fig. 8 is the same as the processing in Fig. 4, and therefore their description is omitted.

[0071] If IC 5 determines in S130 that the received data is not normal (i.e., abnormal), IC 5 proceeds to S190 without returning to S110, as described in Fig. Figure 8 is shown. In S190, IC 5 increments the aforementioned abnormality counter. That is, the value of the abnormality counter (hereinafter referred to as an abnormal data reception count) is increased by one. Then IC 5 advances to S170.

[0072] When IC 5 in S170 determines that the counter result request has been received, IC 5 moves to S150 and transmits both the normal data reception count and the abnormal data reception count as counter results to microcomputer 3. Therefore, microcomputer 3 can detect both the number of normal communication data receptions and the number of abnormal communication data receptions in IC 5 based on the normal data reception count and the abnormal data reception count from IC 5. 5-3. Processing performed by the microcomputer

[0073] In the process of Fig. 9 The microcomputer 3 calculates the number of errors (i.e., the frequency of errors) in the communications by subtracting the normal data receive count (i.e., the number of normal communication data received) from the transmission count (i.e., the number of transmissions) counted in S310 by the transmission counter section 23.

[0074] The number of communication errors is considered to be the sum of (i) the number of abnormal communication data receptions in IC 5 and (ii) the number of errors in the reception of communication data by IC 5 (hereinafter referred to as the number of non-receptions of communication data (i.e., the frequency of non-reception of communication data)). Subsequently, microcomputer 3 in S320 calculates the number of non-receptions, also referred to as the non-reception count, by subtracting the abnormal data reception count (i.e., the number of abnormal communication data receptions) received by IC 5 from the number of communication errors calculated in S310. The process of Fig. 9 will then end. 5-4. Effects

[0075] According to the fifth embodiment described above, the microcomputer 3 can also detect the number of non-receptions in the IC 5.

[0076] For this reason, microcomputer 3 can change its operating mode with respect to controlling a control object according to the detected number of non-receipts. For example, if the number of non-receipts is equal to or less than a predetermined threshold, microcomputer 3 operates in normal mode. Conversely, if the number of non-receipts exceeds the threshold, microcomputer 3 stops the operation of IC 5 or uses another hardware circuit or component to continue controlling the control object.

[0077] In the fifth embodiment, S140, S150 and S190 correspond to in Fig. 8 of the processing as a counter transmission unit. Furthermore, S310 and S320 correspond to the Fig. 9 of the processing as a calculation unit. Furthermore, the technique of the fifth embodiment can be used for the first, third or fourth embodiment. 6. Other embodiments

[0078] Although the embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications for implementing the present invention are possible.

[0079] The communication partner of microcomputer 3 is not limited to IC 5, but can be another microcomputer or similar device. Similarly, the communication partner of IC 5 is not limited to microcomputer 3, but can be another IC or similar device. In a situation where the data abnormality detection section 33 in IC 5 determines that the received data exhibits an abnormality, the following configuration can be provided, as long as abnormality history information (for example, an abnormality flag) indicating the occurrence of an abnormality is stored.

[0080] If microcomputer 3 in the S220 described above determines that a communication error has occurred, microcomputer 3 performs a read access to request abnormality history information from IC 5. In response to the read access, IC 5 transmits the abnormality history information to microcomputer 3.

[0081] If, according to such a configuration, the abnormality history information is sent by IC 5 in response to the read access, the microcomputer 3 can determine that at least the received data exhibits an abnormality. If the abnormality history information is not sent by IC 5, the microcomputer 3 can determine that an abnormality of non-reception of the communication data occurred in IC 5.

[0082] In IC 5, the data abnormality determination section 33 can also determine which type of abnormality, from among several types of abnormalities, occurred in the received data. The abnormality history information is stored such that it has different values ​​for each detected type of abnormality. In this case, when the abnormality history information is sent by IC 5 in response to the read access, the microcomputer 3 can determine the type of abnormality present in the received data based on the value of the abnormality history information. The types of abnormalities can include, for example, a parity error and a communication clock error (i.e., a bit error).

Claims

[1] Electronic control unit comprising: a first processing unit (3); a second processing unit (5) designed to communicate with the first processing unit via at least one communication path (11, 12, 13), wherein which has the second processing unit: a meter transmission section (S140, S150, S190) that is designed to to count at least a number of normal communication data receptions from the first processing unit in order to provide a count value as a normal data reception count value, and to transmit a count result, containing at least the normal data reception count value, to the first processing unit; and the first processing unit has: a counting section (23) designed to count a number of transmissions, which is a frequency with which the first processing unit transmits communication data to the second processing unit to provide a count value as a transmission count value, and a communication diagnostic section (25, S210, S220) designed to determine the presence or absence of an error in a communication by comparing the transmit count with the normal data receive count transmitted by the second processing unit. [2] Electronic control unit according to claim 1, wherein the counter transmission section is designed to transmit the counting result to the first processing unit in response to a request from the first processing unit. [3] Electronic control unit according to claim 1 or 2, wherein which consists of at least one communication path consisting of several communication paths (11, 12, 13); and The counter transmission section, the counter section and the communication diagnostic section are designed to be operated for one or more communication paths other than at least one of the communication paths. [4] Electronic control unit according to one of claims 1 to 3, wherein the counter transmission section, the counting section and the communication diagnostic section are designed to be operated for communication data for write access from the first processing unit to the second processing unit. [5] Electronic control unit according to any one of claims 1 to 4, wherein the meter transmission section is also designed to to count a number of receptions of abnormal communication data from the first processing unit in order to provide a count value as an abnormal data reception count value, and to transmit the count result, the abnormal data reception count value, and the normal data reception count value to the first processing unit; and the first processing unit also includes a computation section (S310, S320) designed to calculate a number of non-receipts of communication data from the first processing unit by the second processing unit based on (i) the transmission count and (ii) the normal data reception count and the abnormal data reception count from the second processing unit, The number of non-receipts of communication data from the first processing unit by the second processing unit is a number of errors by the second processing unit when receiving communication data from the first processing unit.

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