Semiconductor module

Abstract

Semiconductor module (1, 201), comprising: - a semiconductor chip (30) having a first electrode (31), a second electrode (32) and a control electrode (33) for receiving a control signal that controls a current flowing between the first electrode (31) and the second electrode (32); - a housing (10) having a top surface (14), a back surface (16) which is a surface opposite the top surface (14), and a plurality of side surfaces (12) provided between the top surface (14) and the back surface (16), the housing (10) containing the semiconductor chip (30); - a first terminal (24) provided on the housing (10) and electrically connected to the first electrode (31); - a second terminal (22, 222) provided on the housing (10) and electrically connected to the second electrode (32); and - a control terminal (20, 220) electrically connected to the control electrode (33) and provided on all of the plurality of lateral surfaces (12) of the housing (10) so as to surround the housing (10).

Description

Background of the inventionArea

[0001] The present disclosure relates to a semiconductor module and a semiconductor device. background

[0002] JP 2007-281443 A discloses a power semiconductor device having a structure including a first electrode terminal and a second electrode terminal on the upper and lower surfaces and a control electrode terminal protruding from a side surface between the first electrode terminal and the second electrode terminal.

[0003] In JP 2007-281443 A, only the control electrode terminal protrudes from a portion of the peripheral portion of the power semiconductor device. The directions in which signal wires can be drawn are thus limited. Therefore, depending on the driver arrangement, it may be necessary to draw the signal wires extensively around the periphery to operate the power module.

[0004] DE 10 2018 217 831 A1 relates to a semiconductor device comprising a printed circuit board; a first semiconductor module comprising a first package body and a first heat radiation surface on one surface of the first package body, wherein another surface of the first package body, which is opposite to the first heat radiation surface, faces a surface of the printed circuit board; and a first heat radiator on the first heat radiation surface; a second semiconductor module comprising a second package body and a second heat radiation surface on one surface of the second package body, wherein another surface of the second package body, which is opposite to the second heat radiation surface, faces another surface of the printed circuit board; and a second heat radiator provided on the second heat radiation surface. The first and second semiconductor modules are arranged so as to overlap each other in plan view.The second semiconductor module is connected in parallel to the first semiconductor module.

[0005] JP 2007-110870 A discloses a power converter whose size can be made compact even when using multiple semiconductor modules connected in parallel in a power converter requiring high power. In the power converter, each phase in a power converter circuit is formed by electrically connecting the semiconductor modules. The semiconductor modules have main terminals, with the main terminals of the same polarity of the semiconductor module and the semiconductor module being connected to each other by direct contact, eliminating the need for a bus bar for connecting the main terminals. This enables a compact size of the power converter.

[0006] JP H02-063 150 A discloses a package for a semiconductor device in conjunction with simplified production of a printed wiring pattern by a method in which at least one of the first-type electrical terminals in a row of electrical terminals arranged in two rows is bent upward, at least one of the second-type electrical terminals in the other row is bent downward, and these terminals are connected to each other at their bent parts. The package consists of a package main body and an electrical terminal row extending on both sides of the main body. A part of the electrical terminals in an electrical terminal row of the package is stretched sideways with respect to the package main body and bent upward at its tip part.A portion of the electrical terminals in the other electrical terminal row extends sideways from the package main body and is bent downward at its tip. It is shaped to connect to a bent portion at the tip of one electrical terminal. Therefore, when such packages are arranged in parallel and placed on a printed circuit board, their electrical terminals can be coupled and electrically connected to each other. Summary

[0007] The present disclosure has been made to solve the above-mentioned problem and has an object to obtain a semiconductor module and a semiconductor device in which the signal wire can be simplified.

[0008] The object underlying the invention is achieved in a semiconductor module according to the invention with the features of claim 1. Advantageous further developments are the subject of the dependent claims.

[0009] The features and advantages of the present disclosure can be summarized as follows.

[0010] According to one aspect of the present invention, a semiconductor module includes a semiconductor chip having a first electrode, a second electrode, and a control electrode for receiving a control signal that controls a current flowing between the first electrode and the second electrode, a housing having an upper surface, a rear surface that is a surface opposite to the upper surface, and a plurality of side surfaces provided between the upper surface and the rear surface, the housing containing the semiconductor chip, a first terminal provided on the housing and electrically connected to the first electrode, a second terminal provided on the housing and electrically connected to the second electrode, and a control terminal,which is electrically connected to the control electrode and is provided on all of the plurality of lateral surfaces of the housing so as to surround the housing.,

[0011] According to one aspect of explaining the technical background of the present invention, a semiconductor device includes a first semiconductor module and a second semiconductor module, wherein the first semiconductor module includes a first semiconductor chip having a first electrode, a second electrode, and a first control electrode for receiving a control signal that controls a current flowing between the first electrode and the second electrode, a first case having an upper surface, a back surface that is a surface opposite to the upper surface, and a side surface provided between the upper surface and the back surface, the first case containing the first semiconductor chip, a first terminal provided on the first case and electrically connected to the first electrode, a second terminal,which is provided on the first housing and electrically connected to the second electrode; and a first control terminal electrically connected to the first control electrode and provided on the side surface of the first housing, wherein the second semiconductor module comprises a second semiconductor chip having a third electrode, a fourth electrode, and a second control electrode for receiving a control signal that controls a current flowing between the third electrode and the fourth electrode, a second housing having an upper surface, a rear surface that is a surface opposite to the upper surface, and a side surface provided between the upper surface and the rear surface, wherein the second housing contains the second semiconductor chip, a third terminal,which is provided on the second housing and electrically connected to the third electrode, a fourth terminal provided on the second housing and electrically connected to the fourth electrode; and a second control terminal electrically connected to the second control electrode and provided on the side surface of the second housing, and wherein the first control terminal and the second control terminal are in contact with each other.

[0012] Other and further objects, features and advantages of the disclosure will appear more fully from the following description. Short description of the drawings Fig. 1 is a front view of a semiconductor module according to a first embodiment. Fig. 2 is a cross-sectional view of the semiconductor module according to the first embodiment. Fig. 3 is a plan view of the semiconductor module according to the first embodiment. Fig. 4 is a plan view of a semiconductor device according to the first embodiment. Fig. 5 is a front view of a semiconductor module according to a comparative example of the first embodiment. Fig. 6 is a plan view of a semiconductor device according to a comparative example of the first embodiment. Fig. 7 is a front view of the semiconductor device according to a comparative example of the first embodiment. Fig. 8 is a front view of a semiconductor device according to a second embodiment. Fig. 9 is a perspective view of the semiconductor device according to the second embodiment. Fig. 10 is a plan view of the semiconductor device according to the second embodiment. Fig. 11 is a plan view of a semiconductor device according to a comparative example of the second embodiment. Description of embodiments

[0013] Semiconductor modules and semiconductor devices according to embodiments of the present disclosure will be described with reference to the accompanying drawings. Components that are identical or corresponding to each other are denoted by the same reference numerals, and repeated descriptions thereof will be omitted in some cases. First embodiment

[0014] Fig. 1 is a front view of a semiconductor module 1 according to a first embodiment. The semiconductor module 1 is, for example, a power module. The semiconductor module 1 includes a housing 10. The housing 10 is provided with first terminals 24, second terminals 22, and control terminals 20. The first terminals 24 are provided on a top surface 14 of the housing 10. The second terminals 22 and the control terminals 20 are provided on side surfaces 12 of the housing 10.

[0015] Fig. Fig. 2 is a cross-sectional view of the semiconductor module according to the first embodiment. It should be noted that in Fig. 2 some parts of the Fig. 1 are omitted. The housing 10 includes a box 11 and a base plate 15. The housing 10 includes the top surface 14 and a rear surface 16, which is a surface opposite the top surface 14. The housing 10 further includes a plurality of side surfaces 12 provided between the top surface 14 and the rear surface 16. The top surface 14 and the side surfaces 12 are part of the box 11. Furthermore, the rear surface 16 is part of the base plate 15.

[0016] A circuit structure 42 is provided on the base plate 15. A semiconductor chip 30 is provided on the circuit structure 42. The semiconductor chip 30 is contained within the housing 10.

[0017] The semiconductor chip 30 has a first electrode 31, a second electrode 32, and a control electrode 33. The control electrode 33 receives a control signal that controls a current flowing between the first electrode 31 and the second electrode 32. The semiconductor chip 30 is, for example, an IGBT (Insulated Gate Bipolar Transistor). If the semiconductor chip 30 is an IGBT, the first electrode 31 is a collector electrode, the second electrode 32 is an emitter electrode, and the control electrode 33 is a gate electrode.

[0018] A first terminal 24 is provided on the circuit pattern 42 and exposed on the upper surface of the housing 10. The first terminal 24 is electrically connected to the first electrode 31 of the semiconductor chip 30 via the circuit pattern 42. The first terminal 24 is, for example, the main electrode terminal of the semiconductor module 1. If the semiconductor chip 30 is an IGBT, the first terminal 24 is a collector terminal.

[0019] A second terminal 22 protrudes from the side surfaces 12 of the housing 10. The portion of the second terminal 22 located on the inside of the housing 10 is connected to the second electrode 32 by a wire 46. The second terminal 22 is thus electrically connected to the second electrode 32. The second terminal 22 is an output terminal, which is to be connected to, for example, a ground terminal or a load. If the semiconductor chip 30 is an IGBT, the second terminal 22 is an emitter terminal.

[0020] A control terminal 20 protrudes from the side surfaces 12 of the housing 10. The portion of the control terminal 20 located on the inside of the housing 10 is connected to the control electrode 33 by a wire 44. Thus, the control terminal 20 is electrically connected to the control electrode 33. The control terminal 20 inputs a control signal for operating the semiconductor module 1. If the semiconductor chip 30 is an IGBT, the control terminal 20 is a gate terminal.

[0021] In Fig. 2, one each of a first terminal 24, a second terminal 22, and a control terminal 20 is provided on the housing 10. Furthermore, the housing 10 contains a semiconductor chip 30. However, this is not a limitation, and a plurality of first terminals 24, second terminals 22, and control terminals 20 may be provided on the housing 10. Furthermore, the housing 10 may contain a plurality of semiconductor chips 30.

[0022] Fig. Fig. 3 is a plan view of the semiconductor module 1 according to the first embodiment. It should be noted that in Fig. 3, the first terminal 24 is omitted. The control terminal 20 is in the form of a flat plate. The control terminal 20 is provided on all side surfaces 12 of the housing 10 so as to surround the housing 10. The housing 10 according to the present embodiment has a rectangular shape in plan view. The control terminal 20 is formed from one end to the other of each of the four side surfaces 12 of the housing 10. The control terminal 20 is shaped in an annular or flange-like manner.

[0023] As in Fig. 1 and Fig. 2, the second terminal 22 is provided below the control terminal 20. The second terminal 22 is in the shape of a flat plate. The second terminal 22 is provided on all of the plurality of side surfaces 12 of the housing 10 so as to surround the housing 10. The second terminal 22 has a shape similar to the control terminal 20, and when viewed in plan view, they overlap each other.

[0024] As in Fig. 2, the control terminal 20 and the second terminal 22 protrude into the interior of the housing 10 at a portion of the side surfaces 12 of the housing 10. However, this is not a limitation, and the portion of the control terminal 20 protruding into the interior of the housing 10 may be provided to surround the semiconductor chip 30. This allows for an increased degree of freedom of the wires connecting the semiconductor chip 30 and the control terminal 20. Likewise, the portion of the second terminal 22 protruding into the interior of the housing 10 may be provided to surround the semiconductor chip 30.

[0025] Fig. Fig. 4 is a plan view of a semiconductor device 2 according to the first embodiment. For convenience, Fig. 4, the position of a busbar 50 above the semiconductor modules 1 is shown in dashed lines. The semiconductor device 2 comprises a plurality of semiconductor modules 1 and the busbar 50. In the semiconductor device 2, the busbar 50, which is electrically connected to the first terminals 24, is provided above the housing 10.

[0026] In each semiconductor module 1, the control terminal 20 is electrically connected to signal wires 54. The control terminal 20 and the signal wires 54 are connected by solder or clips, etc. The signal wires 54 receive a control signal from an external driver. The control electrode 33 receives the control signal via the signal wires 54 and the control terminal 20. This control signal controls the current flowing between the first electrode 31 and the second electrode 32. Furthermore, the second terminal 22 is electrically connected to wires 56. The second terminal 22 and the wires 56 are connected by solder or clips, etc. The signal wires 54 and the wires 56 are drawn in a lateral direction from the semiconductor module 1.

[0027] Fig. 5 is a front view of a semiconductor module 101 according to a comparative example of the first embodiment. In the semiconductor module 101, the first terminal 24, a second terminal 122, and a control terminal 120 protrude from the upper surface of the housing 10. Fig. 6 is a plan view of a semiconductor device 102 according to a comparative example of the first embodiment. Fig. Fig. 7 is a front view of the semiconductor device 102 according to a comparative example of the first embodiment. The semiconductor device 102 includes a plurality of semiconductor modules 101 and a bus bar 150. For convenience, Fig. 6 the position of the busbar 150 above the semiconductor modules 101 is shown in dashed lines.

[0028] When the control terminal 120 faces upward as in the semiconductor module 101, the signal wires 54 are connected from above the semiconductor module 101. Therefore, to connect the control terminal 120 to an external driver, it is necessary to form an opening 152 in the bus bar 150. Accordingly, the bus bar 150 must be machined, resulting in an increased manufacturing cost of the semiconductor device 102.

[0029] In contrast, in the present embodiment, the control terminal 20 is arranged at the periphery of the semiconductor module 1. Therefore, the signal wires 54 can be drawn in a lateral direction from the semiconductor module 1. Accordingly, even if the semiconductor modules 1 are covered by the bus bar 50, there is no need to form an opening in the bus bar 50, making it possible to manufacture the semiconductor device 2 at low cost.

[0030] Another conceivable comparative example of the present embodiment is one in which the control terminal 120 is provided on only a portion of the plurality of side surfaces of the housing 110. In this case, the direction in which the signal wires 54 can be drawn is limited, and it may be necessary to machine the bus bar 150 to connect the control terminal 120 to the driver. Furthermore, it may be necessary to draw the signal wires 54 extensively all around.

[0031] In contrast, according to the present embodiment, the control terminal 20 is provided on all side surfaces 12 so as to surround the case 10. Therefore, the signal wires 54 can be drawn from any location of the peripheral portion of the semiconductor module 1. In other words, it is possible to draw the signal wires 54 in all directions in plan view from the semiconductor module 1. Accordingly, there is no need to process the bus bar 50. In addition, it is possible to avoid the signal wires 54 from being drawn all around to a great extent and to simplify the signal wires 54. This makes it possible to prevent incorrect wiring. Further, by simplifying the signal wires 54, the semiconductor device 2 can be miniaturized.

[0032] Likewise, since the second terminal 22 is arranged at the periphery of the semiconductor module 1, the wires 56 can be drawn in a lateral direction from the semiconductor module 1. Furthermore, since the second terminal 22 is provided to surround the case 10, the wires 56 can be drawn from any location in the peripheral portion of the semiconductor module 1. Accordingly, it is possible to avoid excessive circumferential drawing of the wires 56 and to simplify the wires 56.

[0033] As a variation of the present embodiment, the control terminals 20 and the second terminals 22 may have different configurations. For example, the second terminals 22 need only be provided on at least one of the plurality of lateral surfaces 12 of the housing 10. Alternatively, the second terminals 22 may be provided on the top surface 14 of the housing 10. Furthermore, the semiconductor device 2 may include one or more semiconductor modules 1.

[0034] The semiconductor chip 30 may further be made of a wide-bandgap semiconductor. Wide-bandgap semiconductors include, for example, silicon carbide, a gallium nitride-based material, or diamond. This makes it possible to miniaturize the semiconductor module 1 and, accordingly, further miniaturize the semiconductor device 2.

[0035] These modifications can be suitably applied to a semiconductor module and a semiconductor device according to the following embodiments. However, for the semiconductor module and the semiconductor device according to the following embodiments, differences from the first embodiment will be mainly explained because they have many similarities with the first embodiment. Second embodiment

[0036] Fig. 8 is a front view of a semiconductor device 202 according to a second embodiment. The semiconductor device 202 includes a plurality of semiconductor modules 201. The semiconductor module 201 differs from the semiconductor module 1 according to the first embodiment in the structure of the control terminals 220 and the second terminals 222. The other structures are the same as in the first embodiment. A bus bar 50 is provided above the plurality of semiconductor modules 201. The first terminals 24 of the plurality of semiconductor modules 201 are thus electrically connected to the bus bar 50.

[0037] The semiconductor modules 201 include a first semiconductor module 201a and a second semiconductor module 201b, which are adjacent to each other. The first semiconductor module 201a and the second semiconductor module 201b have the same structure. The control terminal 220 of the first semiconductor module 201a and the control terminal 220 of the second semiconductor module 201b are in contact with each other. Furthermore, the second terminal 222 of the first semiconductor module 201a and the second terminal 222 of the second semiconductor module 201b are in contact with each other.

[0038] Fig. 9 is a perspective view of the semiconductor device 202 according to the second embodiment. Each control terminal 220 has a hook portion 226 on one side of the housing 10. Furthermore, an opening 227 is formed in each control terminal 220 on the other side of the housing 10. The hook portion 226 of the first semiconductor module 201a is inserted into the opening 227 of the second semiconductor module 201b. The control terminal 220 of the first semiconductor module 201a and the control terminal 220 of the second semiconductor module 201b thus fit together.

[0039] In the same way, the second terminal 222 of the first semiconductor module 201a and the second terminal 222 of the second semiconductor module 201b also fit together.

[0040] The structure of the control terminal 220 is not limited to the Fig. 9. The control terminal 220 only needs to mate or contact one other adjacent control terminal 220. Likewise, the second terminal 222 only needs to mate or contact one other adjacent second terminal 222.

[0041] Fig. 10 is a plan view of the semiconductor device 202 according to the second embodiment. For convenience, Fig. 10, the position of the busbar 50 above the semiconductor modules 201 is shown in dashed lines. In the semiconductor device 202, the signal wires 54 are drawn from only one of the control terminal 220 of the first semiconductor module 201a and the control terminal 220 of the second semiconductor module 201b, which are in contact with each other. Likewise, the wires 56 are drawn from only one of the second terminal 222 of the first semiconductor module 201a and the second terminal 222 of the second semiconductor module 201b, which are in contact with each other.

[0042] Fig. 11 is a plan view of a semiconductor device 302 according to a comparative example of the second embodiment. For convenience, Fig. 11, the position of the busbar 50 above the semiconductor modules 1 is shown in dashed lines. In the semiconductor device 302, signal wires 54 and wires 56 are drawn from each of the plurality of semiconductor modules 1.

[0043] In contrast, in the present embodiment, the control terminal 220 of the first semiconductor module 201a and the control terminal 220 of the second semiconductor module 201b are in contact and electrically connected to each other. Therefore, when a plurality of semiconductor modules 201 are connected in parallel, there is no need to provide signal wires 54 for each semiconductor module 201. Therefore, the signal wires 54 can be simplified. Likewise, the second terminal 222 of the first semiconductor module 201a and the second terminal 222 of the second semiconductor module 201b are also in contact and electrically connected to each other. Therefore, there is no need to provide wires 56 for each semiconductor module 201, and the wires 56 can thus be simplified.

[0044] In the present embodiment, the simplification of the signal wires 54 and the wires 56 enables miniaturization of the semiconductor device 202. In addition, by allowing the first semiconductor module 201a and the second semiconductor module 201b to be in contact with each other, it is possible to further miniaturize the semiconductor device 202.

[0045] In addition, the control terminal 220 mates with another control terminal 220 on its long side. This ensures a large contact area between the control terminals 220. Likewise, the second terminal 222 mates with another second terminal 222 on its long side, ensuring a large contact area between the second terminals 222.

[0046] In Fig.10, the control terminals 220 of two semiconductor modules 1 are in contact with each other. However, this is not a limitation, and the control terminals 220 of three or more semiconductor modules 201 may also be in contact with each other.

[0047] Furthermore, like the control terminal 20 according to the first embodiment, the control terminal 220 is provided on the entire peripheral portion of the housing 10. However, this is not a limitation, and the control terminal 220 may be provided on a portion of the plurality of side surfaces 12 as long as it can contact another control terminal 220. For example, the control terminal 220 may be provided only on the long side of the housing 10.

[0048] Furthermore, in at least one of the first semiconductor module 201a and the second semiconductor module 201b, the semiconductor chip 30 may be formed from a wide bandgap semiconductor. This can improve the heat resistance of the semiconductor chip 30, allowing the first semiconductor module 201a and the second semiconductor module 201b to be positioned closer to each other.

[0049] However, the technical features explained in each embodiment can be combined appropriately for use.

[0050] In the semiconductor module according to the present disclosure, the control terminal is provided so as to surround the package. Accordingly, it is possible to avoid the signal wire from being drawn around to a great extent and to simplify the signal wire.

[0051] In the semiconductor device according to the present disclosure, the first control terminal and the second control terminal are in contact with each other. Therefore, there is no need to provide a signal wire to each semiconductor module, making it possible to simplify the signal wire.

Claims

[1] Semiconductor module (1, 201), comprising: - a semiconductor chip (30) having a first electrode (31), a second electrode (32) and a control electrode (33) for receiving a control signal that controls a current flowing between the first electrode (31) and the second electrode (32); - a housing (10) having a top surface (14), a back surface (16) which is a surface opposite the top surface (14), and a plurality of side surfaces (12) provided between the top surface (14) and the back surface (16), the housing (10) containing the semiconductor chip (30); - a first terminal (24) provided on the housing (10) and electrically connected to the first electrode (31); - a second terminal (22, 222) provided on the housing (10) and electrically connected to the second electrode (32); and - a control terminal (20, 220) electrically connected to the control electrode (33) and provided on all of the plurality of lateral surfaces (12) of the housing (10) so as to surround the housing (10). [2] The semiconductor module (1, 201) according to claim 1, wherein the control terminal (20, 220) is annular. [3] The semiconductor module (1, 201) according to claim 1 or 2, wherein the second terminal (22, 222) is provided on at least one of the plurality of lateral surfaces (12) of the housing (10). [4] The semiconductor module (1, 201) according to claim 3, wherein the second terminal (22, 222) is provided on all of the plurality of side surfaces (12) of the case (10) so as to surround the case (10). [5] The semiconductor module (1, 201) according to claim 3 or 4, wherein the control terminal (20, 220) and the second terminal (22, 222) overlap in plan view. [6] Semiconductor module (1, 201) according to one of claims 1 to 5, wherein the first terminal (24) is provided on the upper surface (14) of the housing (10). [7] Semiconductor module (1, 201) according to claim 6, wherein a busbar (50) is provided above the housing (10) and is electrically connected to the first terminal (24). [8] Semiconductor module (1, 201) according to one of claims 1 to 7, wherein the semiconductor chip (30) is made of a wide band gap semiconductor. [9] The semiconductor module (1, 201) according to claim 8, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.

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