MODULAR WLCSP DIE DAISY CHAIN ​​DESIGN FOR MULTI-DIEY SIZES

Abstract

Method for manufacturing a WLCSP die-daisy-chain test instrument comprising the following: Design of a die-daisy-chain test instrument with daisy-chain linked metal pads (12) on a substrate wafer (10); and Repeat the following steps for each required die / package size: Creating a WLCSP on the die daisy-chain test instrument with pairs of solder balls (24) electrically connected to each other by the daisy-chain linked metal pads (12) located beneath the solder balls; subsequent singulation (55) of the wafer (10) into dies of the required die / package size and shape, as required for testing; subsequent mounting (26) of the individual dies onto a test printed circuit board (PCB) (30); and Subsequent electrical connection of the daisy-chain linked solder ball pairs to form a daisy chain on the test PCB.

Description

(1) Technical area

[0001] This disclosure concerns daisy-chain designs and reliability testing at the board level, and in particular modular die daisy-chain designs for multiple die sizes. (2) Background

[0002] Daisy-chain designs are used in semiconductor packaging to test the reliability of connections subjected to thermal and mechanical stresses, simulating the actual environmental conditions the product will encounter during its lifetime. The daisy-chain design consists of paired connections, allowing for the detection of faults or failures in individual connections, where an electrical change in resistance across the connection indicates a fault.

[0003] Daisy-chain packages are surface-mounted (SMT) on a test printed circuit board (PCB) for testing. The test PCB with the daisy-chain package is then subjected to thermal and mechanical stress tests, while the connection pattern is monitored for electrical changes in resistance at the connections.

[0004] Current WLCSP (wafer-level chip-scale package) daisy-chain designs require a new wafer fab mask design and tooling for every die / package size change. Developing and evaluating board-level reliability (BLR) for new WLCSP die sizes can be slow. This is concerning given the current trend toward increasing the size and form factors of WLCSPs. Current WLCSP daisy-chain designs require a completely new WLCSP package assembly tooling set for each new die / package size. This is both costly and time-consuming. An additional limitation of current practice is that most current WLCSP daisy-chain designs do not allow for testing of wafer fab structures below the solder ball area.

[0005] US 8 633 601 B2, US 7 982 475 B2, US 6 564 986 B1, US 8 928 344 B2, and US 2008 / 0061812 A1 reveal various daisy-chain test instruments.

[0006] US 10 048 306 B1 concerns integrated circuits and, in particular, the testing of integrated circuit packages.

[0007] US 2019 / 0326254 A1 concerns wafer packaging technologies and, in particular, improved wafer-level packaging at chip scale. SUMMARY

[0008] The main objective of this disclosure is to provide a modular die daisy chain design for all sizes of WLCSP (wafer level chip scale package) board-level reliability testing.

[0009] Another objective of the present disclosure is to provide a modular die daisy chain design for WLCSP (wafer level chip scale package) board-level reliability testing, in which different die / package sizes can be separated from the same mask designs without additional tooling.

[0010] Another goal is to provide a modular die daisy chain design for WLCSP (wafer level chip scale package) board-level reliability testing, enabling testing of wafer fab structures below the solder ball area.

[0011] In accordance with the objectives of this disclosure, a method for fabricating a WLCSP (wafer-level chip-scale package) die daisy-chain design test instrument is achieved. A die daisy-chain design test instrument is designed comprising: daisy-chained metal pads on a substrate wafer; and, for each required die / package size, repeating the steps of fabricating a WLCSP on the die daisy-chain test instrument with pairs of solder balls electrically connected to each other by the daisy-chained metal pads located beneath the solder balls. The wafer is singulated into dies of the required die / package size and shape, as necessary for testing. The singulated dies are then mounted onto a test printed circuit board (PCB). Daisy-chained solder ball pairs are then electrically connected to form a "daisy chain" on the test PCB.

[0012] Also in accordance with the objectives of the present disclosure, a method for designing a WLCSP (wafer level chip scale package) die daisy-chain test instrument is achieved. The method comprises designing a daisy-chain test instrument having metal pads on a substrate wafer and fabricating a plurality of the die daisy-chain test instruments, comprising the steps of: fabricating metal pads on the substrate wafer, covering the metal pads with a passivation layer, and providing initial openings to the metal pads through the passivation layer, wherein the metal pads are configured to connect a plurality of pairs of overlying solder balls together in a daisy chain.For each required die / package size, repeat the steps: design a WLCSP (wafer level chip scale package) using only one mask, subsequently fabricate the WLCSP on one of the die daisy-chain test instruments, and subsequently singulate substrate wafers into dies of a size and shape required to test the WLCSP without redesigning the die daisy-chain test instrument.

[0013] Also in accordance with the objectives of this disclosure, a method for testing WLCSP (wafer-level chip scale package) board-level reliability is achieved. A WLCSP (wafer-level chip scale package) die daisy-chain test instrument is provided, comprising a modular die daisy-chain test instrument with metal pads on a substrate wafer, pairs of solder balls electrically connected to each other by underlying metal pads, and the substrate wafer being singulated into dies of any multitude of sizes and shapes as required for BLR testing, without requiring redesign of the die daisy-chain test instrument for any of the multitude of sizes and shapes. The singulated dies are mounted onto a test printed circuit board (PCB), with the solder ball pairs electrically connected in a daisy chain on the test PCB.The electrical connection is tested at a large number of test points on the individual dies, and the resistance of the daisy chain is tested at the start and end points of the chain. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings, which form an essential part of this description, show: Fig. Figure 1 is a flowchart of the procedure of the present disclosure. Fig. Figures 2 to 4 are cross-sectional representations of steps in a preferred embodiment of the method of the present disclosure. Fig. Figure 5 is a cross-sectional representation of an example of a WLCSP die daisy chain pattern in a preferred embodiment of the present disclosure. Fig. Figure 6 is a top view of a design of a single unit in a preferred embodiment of the present disclosure. Fig. 7 is a top view of an array of the design of the individual unit of Fig. 6 in a preferred embodiment of the present disclosure. Fig. Figure 8 is a top view of a daisy-chain design in a preferred embodiment of the present disclosure. Fig. Figure 9 is a top view of a die / PCB daisy chain pattern in a preferred embodiment of the present disclosure. Fig. Figure 10 is a top view of a PCB pattern example in a preferred embodiment of the present disclosure. DETAILED DESCRIPTION

[0015] This disclosure describes a modular die daisy chain design for WLCSP (wafer-level chip-scale package) board-level reliability testing. The modular die daisy chain (DC) design and the routing direction of all connections allow the use of a single die DC design for multiple die / package sizes and either rectangular or square shapes.

[0016] Fig. Figure 1 shows the process of the modular WLCSP die daisy chain design of the present disclosure. First, step 100 describes the wafer fab die daisy chain design. Next, step 102 describes the fabrication of the wafer fab mask. Then, step 104 describes the wafer fab processing. Fig. Figure 2 shows a wafer 10 where wafer fab processing is complete. Aluminum pads 12 were formed on the wafer surface and passivated with the passivation layer 14. Openings 15 were etched through the passivation layer to the aluminum pads 12. The daisy-chain design in wafer fab is the Al-Pad-12 connection between each pair of solder balls.

[0017] The method described in this disclosure saves tooling costs at the wafer fab, as only one bump mask tool is required per ball spacing. The spacing between the solder balls allows for the singulation of different die sizes. This means that some of the scribing lines can be used for singulation, while others cannot, depending on the die size being tested. Scribing lines can vary in size and can be placed at different locations, but are limited by the minimum ball spacing.

[0018] In step 106 the WLCSP mask is designed, the WLCSP mask is manufactured in step 108 and the WLCSP is processed in step 110. Fig. Figure 3 shows a completed WLCSP assembly. This includes a first polymer layer 16 on the passivation layer 14, a redistribution layer (RDL) 18 that contacts the aluminum pad 12 through openings in the passivation layer and first polymer layers, a second polymer layer 20, an under-bump metallization layer 22, and solder balls 24. The polymer1 / polymer2 masks must be modified for each die / package size to be tested to prevent polymer material from entering the scribe channels. Only minimal material should be present in the scribe line area to facilitate singulation and reduce the risk of die / package edge chipping. The wafer is then singulated into separate dies. Fig. Figure 4 shows an example of a WLCSP cross-section that is 55 for a given die size. Fig. Figure 4 shows a standard four-layer WLCSP type; however, it may be possible to reduce the number of layers for a more cost-effective WLCSP package type by reducing the layer structure while applying the modular design configuration of the present disclosure.

[0019] The method of this disclosure saves tooling costs when building an RDL, UBM, and ball placement template design. It also saves tooling time for obtaining a daisy-chain die design, as wafers can be held in the assembly and prepared to the required die / package size. The key feature of the method of this disclosure is that the dies are separated to the desired size and shape (rectangle, square, or other shape) and then mounted onto the printed circuit board for board-level reliability (BLR) testing.

[0020] The printed circuit board (PCB) is fabricated in step 114 and assembled in step 116, with the WLCSP being mounted onto the PCB using surface mount technology (SMT). Board-level reliability (BLR) testing is developed in step 118. The BLR test consists of thermal and mechanical tests. The BLR test PCB must be modified for each die / package size to be tested.

[0021] Steps 100, 102, and 104 described above only need to be performed once. The finished die / package can be separated into a large number of samples to provide fixtures for testing a variety of WLCSP package sizes.

[0022] The structure (overlaps) of the daisy-chain design can be generalized, but the connection between them cannot. That is, the structures beneath the spheres can differ, but the connection from sphere to sphere is fixed. Fig. Figure 5 shows the connection 26 between the spheres 24 and the PCB 30.

[0023] Table 1 shows example requested die / package sizes to be tested in the first column and actual die / package sizes intended for testing in the second column. The actual die / package size is selected to be as close as possible to the requested die / package size to be tested. The sizes are not exactly as requested due to the fixed solder ball spacing in the WLCSP. Table 1 Angeforderte, zu testende Die-Größe Tatsächliche Die-Größe ~9×9mm 9,1x9,1mm -10x10mm 9,8x9,8mm -12x12mm 11,9x11,9mm -15x15mm 14,7x14,7mm -9x4mm 9,1x4,2mm -10x5mm 10,5x4,9mm -12x6mm 11,9x6,3mm

[0024] The method described in this disclosure provides a die daisy-chain design that can be arranged and cut into multiple die / package sizes. This modular design means that no additional tooling is required to provide a test instrument for a WLCSP of a different size. All solder balls must be checked for connectivity for each WLCSP size; that is, whether they are connected in the chain and whether they have resistance continuity.

[0025] A modular design of a single unit consists of: 1) the wafer fab metal 12 and the wafer fab passivation 14 and 2) typical WLCSP design structures under the sphere area 24 including the redistribution layer 18 and metallurgy 22 under the bumps, such as the four-layer WLSCP, in Fig. 3 shown.

[0026] Fig. Figure 6 shows a design of a single unit 100, which shows the aluminum pad 12 that connects each pair of solder balls 24. The RDL layer 18 and the UBM layer 22 are in Fig. 6 shown. The solder balls not shown connect to each circular UBM contact 22.

[0027] Fig. 7 shows a part of an array of the in Fig. 6 designs of the individual unit shown. Fig. Figure 8 shows an array of units 100, 101, built to match the requested die sizes. The first four actual die sizes in Table 1 are in Fig. 8 shown.

[0028] Fig. Figure 9 shows the die / PCB daisy chain connection pattern. The die daisy chain and PCB chains alternate to verify full connectivity. An aluminum pad routing 12 is shown between solder balls in each unit cell in the horizontal direction. A PCB routing is shown in both the horizontal direction 121 and the vertical direction 123.

[0029] The method described in this disclosure allows the single-die DC design to be used for multiple die sizes. This is because singulation can occur at different points between the solder ball pairs, depending on the desired die / package size. The horizontal and vertical connections are only made when the singulated units are mounted on the PCB. Fig. Figure 9 also shows the saw lines 125 for different die sizes.

[0030] Fig.Figure 10 shows a top view of a PCB sample example for a specific die size. The WLCSP was mounted on the printed circuit board 30, and vertical connections 123 and horizontal connections 121 were made between the solder ball pairs. Test points 130 are used to verify electrical connections. Since the daisy chain has connections in series between different pins, one can be flexible and assign any test point to trace the continuity and resistance of the connection structure on the PCB or in a vertical or horizontal connection. The chain resistance is measured at the beginning 132 and at the end 134 of the chain.

[0031] The method of this disclosure enables an early evaluation of process assembly behavior, board-level reliability, and design considerations applicable to the present device. It facilitates future development ideas regarding component size, material sets, and process parameters between first-level WLCSP and SMT build-up between WLCSP and PCB. No equipment investment is required for the method of this disclosure; existing equipment and process methods are utilized. The universal flexibility of the modular die daisy-chain design allows for the handling of various die sizes in the WLCSP, whether rectangular, square, or otherwise, by evaluating board-level reliability in a single layout and tapeout approach, rather than requiring different or multiple RDL layouts.

Claims

[1] Method for manufacturing a WLCSP die-daisy-chain test instrument comprising: Design of a die-daisy-chain test instrument with daisy-chain linked metal pads (12) on a substrate wafer (10); and Repeat the following steps for each required die / package size: Creating a WLCSP on the die daisy-chain test instrument with pairs of solder balls (24) electrically connected to each other by the daisy-chain linked metal pads (12) located beneath the solder balls; subsequent singulation (55) of the wafer (10) into dies of the required die / package size and shape, as required for testing; subsequent mounting (26) of the individual dies onto a test printed circuit board (PCB) (30); and Subsequent electrical connection of the daisy-chain linked solder ball pairs to form a daisy chain on the test PCB. [2] The method according to claim 1, further comprising: Formation of initial openings to the metal pads on the wafer through an overlying passivation layer; Covering the passivation layer with a first polymer layer; Forming a redistribution metal layer that contacts the metal pads through secondary openings in the first polymer layer and lies beneath the primary openings; Covering the redistribution metal layer with a second polymer layer and forming third openings in the second polymer layer to the redistribution metal layer; Forming an under-sphere metallization that contacts the redistribution metal layer in the third openings; and Placing solder balls on the under-ball metallization. [3] Method according to claim 1 or 2, wherein the metal pads comprise aluminium. [4] Method according to any one of claims 1 to 3, wherein the plurality of shapes are rectangular and square. [5] Method for designing a WLCSP die-daisy-chain test instrument that includes the following: Design of a die daisy chain test instrument with metal pads (12) on a substrate wafer (10); Manufacturing a variety of die-daisy-chain test instruments, which involves the following steps: Fabrication of metal pads (12) on the substrate wafer (10); Covering the metal pads (12) with a passivation layer (14); and Providing initial openings (15) to the metal pads (12) through the passivation layer (15), wherein the metal pads are configured to electrically connect a plurality of pairs of overlying solder balls (24) in a daisy chain, and Repeat the following steps for each required die / package size: i) Designing a WLCSP using only one mask, ii) subsequent production of the WLCSP on one of the die-daisy-chain test instruments and iii) subsequent singulation (55) of the substrate wafer into dies of a size and shape as required for testing the WLCSP without redesigning the die daisy chain test instrument. [6] Method according to claim 5, wherein the fabrication of the WLCSP comprises forming at least one redistribution metal layer contacting each of the metal pads through the first openings and through second openings in a first polymer layer above the passivation layer, and solder balls contacting each of the redistribution metal layers. [7] Method according to claim 6, further comprising under-bump metallization under each of the solder balls through third openings in a second polymer layer to the redistribution metal layers above the first polymer layer. [8] Method according to any one of claims 5 to 7, further comprising: Mounting the individual dies on a test printed circuit board (PCB); and Electrically connecting the pairs of solder balls in a daisy chain on the test PCB. [9] Method according to any one of claims 5 to 8, wherein the metal pads comprise aluminium. [10] Method according to any one of claims 5 to 9, wherein the plurality of shapes are rectangular and square. [11] Method for testing board-level reliability (BLR) which includes the following: Providing a WLCSP die-daisy-chain test instrument that includes the following: a modular design die daisy chain test instrument with metal pads (12) on a substrate wafer (10), Pairs of solder balls (24) electrically connected to each other by the underlying metal pads (12), wherein the substrate wafer is separated into dies of any variety of sizes and shapes (55) as required for BLR testing, without redesigning the die daisy-chain test instrument for any of the variety of sizes and shapes; and the isolated dies mounted (26) on a test printed circuit board (PCB) (30), wherein the pairs of solder balls (24) are electrically connected in a daisy chain on the test PCB; Testing an electrical connection at a multitude of test points on the isolated dies; and Testing the resistance of the daisy chain at the start and end points of the daisy chain. [12] The method according to claim 11, further comprising: a redistribution metal layer that contacts the metal pads through first openings in a first polymer layer; and Under-sphere metallization, which contacts the redistribution metal layer through second openings in a second polymer layer above the first polymer layer, with the solder balls contacting the under-sphere metallization. [13] Method according to claim 11 or 12, wherein the metal pads comprise aluminium.

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