ON-CHIP HEATING DEVICE WITH A HEATING ELEMENT THAT GENERATES DIFFERENT AMOUNTS OF HEAT LOCALLY, AND METHOD

Abstract

Comprehensive structure: a heating element (325, 425, 525, 625) with a first end (326, 426, 526, 626) and a second end (327, 427, 527, 627) and, between the first end (326, 426, 526, 626) and the second end (327, 427, 527, 627), different sections with different cross-sectional areas; a first terminal (311, 411, 511, 611) at the first end (326, 426, 526, 626) configured to receive a first voltage; and a second terminal (312, 412, 512, 612) at the second end (327, 427, 527, 627) which is configured to receive a second voltage that is different from the first voltage in order to cause current to flow through the heating element (325, 425, 525, 625), wherein the different sections of the heating element (325, 425, 525, 625) are designed to be aligned with different devices or with different regions of a single device, and wherein the different sections of the heating element (325, 425, 525, 625) are configured to increase temperatures of the different devices or temperatures of the different regions of the single device by different amounts due to the current flow through the different cross-sectional areas.

Description

BACKGROUNDField of the invention

[0001] The present invention relates to on-chip heaters and the chip structures incorporating them, and more particularly to embodiments of an on-chip heater configured to generate different amounts of heat locally (i.e., generate different amounts of heat at different locations), embodiments of a chip structure incorporating such a heater, and associated method embodiments. Description of the state of the art

[0002] On-chip heaters are often used to achieve desired temperature profiles in other on-chip components. For example, in optoelectronic on-chip circuits, some photonic devices (including, but not limited to, optical resonators and phase shifters) require thermal tuning. For example, an optical resonator can be thermally tuned using a heater to avoid temperature-dependent resonant wavelength variations and thus frequency response variations. An optical phase shifter can be thermally tuned using a heater to ensure that a desired phase shift is achieved. However, as chip sizes continue to scale and device density continues to increase, it has become increasingly difficult to provide adequate heaters for such thermal tuning.

[0003] JP 2002-141163 A discloses a ceramic heater comprising a substrate, a heating resistor with electrodes embedded in the substrate, and a heat transfer plate with high thermal conductivity arranged on the substrate surface to achieve uniform heat transfer to a device in contact with the heater. The heating resistor can be spiral-shaped, with the spiral spacing and spiral width being able to vary between a central region and the lateral regions of the heater in order to compensate for temperature variations across the heater surface. BRIEF SUMMARY

[0004] Disclosed are structures according to independent claims 1 and 8. In particular, embodiments of a chip structure are disclosed that includes a heater configured to generate different amounts of heat locally (i.e., generate different amounts of heat at different locations). In particular, the heater includes a heating element having a first end and a second end and, between the first end and the second end, different portions with different cross-sectional areas. The heater may further include a first terminal at the first end of the heating element configured to receive a first voltage and a second terminal at the second end of the heating element configured to receive a second voltage different from the first voltage such that current flows through the heating element from end to end.Current flowing through the heating element causes the heating element to generate heat. However, due to the different cross-sectional areas of the different sections, the current densities through those different sections are different, and thus the different sections of the heating element generate different amounts of heat per unit length.

[0005] Such a heater, and in particular its heating element, may be designed and placed on-chip to facilitate local thermal tuning of adjacent areas of the chip (e.g., different regions of a single device or different devices) without requiring multiple different heaters within a relatively small chip area. In particular, in some embodiments, the chip structure may further comprise a device requiring thermal tuning. The heater may be adjacent to the device. In this case, the different portions of the heating element may be aligned with different regions of the device.Due to the placement of the heating element relative to the device, and in particular due to the alignment of the different portions of the heating element with the different regions of the device, different amounts of heat can be applied to the different regions of the device, thereby increasing the temperatures of those different regions by different amounts. In other embodiments, the chip structure may include multiple devices requiring thermal matching, and the heater may be adjacent to two or more of those devices. In this case, the different portions of the heating element may be aligned with different devices.Due to placement of the heating element relative to the device, and in particular due to alignment of the different portions of the heating element with the different devices, different amounts of heat can be applied to the different devices, thereby increasing the temperatures of the different devices by different amounts.

[0006] Also disclosed herein are method embodiments related to the structures described above. The method embodiments include providing a chip structure including a heater configured to generate different amounts of heat locally (i.e., generate different amounts of heat at different locations). In particular, as discussed above, the heater includes a heating element having a first end and a second end and, between the first end and the second end, different portions having different cross-sectional areas. The heater further includes a first terminal at the first end of the heating element and a second terminal at the second end of the heating element. The method embodiments further include generating heat using the heater.Generating heat using the heating device includes applying a first voltage to the first terminal and a second voltage, different from the first voltage, to the second terminal to cause current to flow through the heating element from end to end. Current flowing through the heating element causes the heating element to generate heat. However, due to the different cross-sectional areas of the different sections, the current densities through those different sections are different, and thus the different sections of the heating element generate different amounts of heat per unit length. The different amounts of heat thus generated raise the temperatures of different devices or different regions of a single device by different amounts.The method embodiments may comprise designing such a heater (and in particular the heating element thereof) and fabricating it on a chip to enable local thermal tuning of adjacent areas of the chip (e.g., different regions of a single device or different . devices) without requiring multiple different heating devices within a relatively small chip area. BRIEF DESCRIPTION OF THE MULTIPLE VIEWS OF THE DRAWINGS

[0007] The present invention will be better understood from the following detailed description with reference to the drawings, which are not necessarily drawn to scale and in which: Fig. 1 and Fig. 2 are perspective drawings illustrating conventional on-chip heaters; Fig. 3A and Fig. 3B are perspective drawings each illustrating alternative structures of a heater according to embodiments disclosed herein, the heater having a substantially linear heater element; Fig. 4A and Fig. 4B are perspective drawings each illustrating alternative structures of a heater according to embodiments disclosed herein, the heater including a substantially annular on-chip heating element; Fig. 5 is a plan view drawing illustrating a structure of a heater according to embodiments disclosed herein, the heater having a coiled or serpentine on-chip heating element; Fig. 6 is a perspective drawing illustrating a structure of a heating device according to embodiments disclosed herein, the heating device having a substantially L-shaped heating element; Fig. 7 and Fig. 8 are perspective drawings illustrating exemplary chip structures according to embodiments disclosed herein, wherein an on-chip heater is configured for local thermal tuning of different regions of an on-chip device; Fig. 9 is a perspective drawing illustrating an exemplary chip structure according to embodiments disclosed herein, wherein an on-chip heater is configured for local thermal tuning of different on-chip devices; and Fig. 10 is a flowchart illustrating disclosed method embodiments. DETAILED DESCRIPTION

[0008] As mentioned above, on-chip heaters are often used to achieve desired temperature profiles in other on-chip components. For example, in on-chip optoelectronic circuits, some photonic devices (including, but not limited to, resonators and phase shifters) require thermal tuning. Fig. 1 and Fig. 2 are perspective drawings illustrating conventional on-chip heaters 110, 210. Each heater 110, 210 includes a heating element 125, 225. As illustrated, the heating elements 125 and 225 may vary in shape. For example, the heating element 125 of Fig. 1 is a substantially linear heating element, whereas the heating element 225 of Fig. 2 is a substantially annular heating element. Regardless of the general shape, the heating element 125, 225 is an elongated structure having a first end 126, 226 and a second end 127, 227. The cross-sectional area of ​​the heating element 125, 225 is substantially the same over its entire length. That is, the cross-sectional area (α M ) at any point MM along the length of the heating element 125, 225 is substantially the same and equal to the height (h M ) of the heating element 125, 225 times the width (w M) of the heating element. The heating device 110, 210 may further include a first terminal 111, 211 at the first end 126, 226 of the heating element 125, 225 and a second terminal 112, 212 at the second end 127, 227 of the heating element 125, 225. Different voltages applied to the terminals result in a current flow through the heating element, and a current flow through the heating element 125, 225 causes the heating element 125, 225 to generate the same amount of heat per unit length over its entire length.

[0009] Unfortunately, as chip size continues to scale and device density continues to increase, it has become increasingly difficult to provide adequate heaters for thermal tuning. In particular, thermal tuning typically involves the use of a heater to raise the temperature of a device or devices to some predetermined temperature. For example, the goal of thermal tuning of an optical resonator may be to raise the temperature of a toroidal waveguide to some predetermined temperature to achieve a desired frequency response. In this case, a heater having a toroidal heating element, such as the one shown in Fig. 2, with the annular heating element 225, aligned above and in close proximity to the annular waveguide. A predetermined voltage difference is applied between terminals 211-212 such that a predetermined amount of electrical current flows through the heating element 225 and thus such that a predetermined amount of heat per unit length is generated across the full length of the heating element. Given the placement of the heating element relative to the waveguide, the heat generated by the heating element is applied to the waveguide and the temperature of the waveguide is raised uniformly (i.e., raised by the same amount across the waveguide). However, with increases in device density, local temperature variations may exist within the waveguide prior to thermal tuning (e.g.,(Due to placement adjacent to other on-chip devices, such as other ring-shaped waveguides within the optical resonator.) With the heater element 225, such temperature variations would still be present after thermal tuning. That is, given these local temperature variations, increasing the temperature across the waveguide by the same amount does not achieve a uniform temperature distribution across the waveguide.

[0010] In view of the foregoing, embodiments of a chip structure including a heater are disclosed herein. The heater includes a heating element having a first end and a second end, and, between the first end and the second end, different sections having different cross-sectional areas. The heater further includes a first terminal at the first end of the heating element and a second terminal at the second end of the heating element. Different voltages applied to the terminals result in a current flow through the heating element. Current flowing through the heating element causes the heating element to generate heat. However, due to the different cross-sectional areas of the different sections, the current densities through those different sections are different, and thus, the different sections of the heating element generate different amounts of heat per unit length.The heater, and in particular its heating element, may be designed and placed on-chip to facilitate local thermal tuning of adjacent areas of the chip (e.g., different regions of a single device or different devices) without requiring multiple different heaters within a relatively small chip area. Related method embodiments are also disclosed.

[0011] In particular, embodiments of a chip structure are disclosed herein that include a heater configured to generate different amounts of heat locally (i.e., generate different amounts of heat at different locations). This heater may include a heating element. In particular, the heating element may be a resistor made of any suitable conductive material through which electrical current can flow and be converted into heat energy. For example, the heating element could be a resistor made of a metal or metal alloy. For example, the heating element could be a patterned metal or metal alloy wire in one of the back-end-of-line (BEOL) metal levels. Alternatively, the heating element could be a resistor made of a doped semiconductor material.For example, the heating element could be a structured and doped form of polysilicon or silicon. Fig. 3A-6 are illustrations of exemplary on-chip heaters that may be incorporated into the disclosed chip structure. In particular, Fig. 3A and Fig. 3B are perspective drawings each illustrating alternative structures of a heater 310 having a substantially linear heater element 325. Fig. 4A and Fig. 4B are perspective drawings each illustrating alternative structures of a heater 410 having a substantially annular on-chip heating element 425. Fig. 5 is a plan view drawing illustrating a structure of a heater 510 having a coiled or serpentine on-chip heating element 525. Fig. 6 is a perspective drawing illustrating a structure of a heater 610 having a substantially L-shaped heating element 625.

[0012] In all such heating devices, the heating element 325, 425, 525, 625 may be an elongated structure having a first end 326, 426, 526, 626 and a second end 327, 427, 527, 627. Furthermore, between the first end 326, 426, 526, 626 and the second end 327, 427, 527, 627, the heating element 325, 425, 525, 625 may have two or more different sections with two or more different cross-sectional areas. For example, as in Fig. 3A-6, each heating element 325, 425, 525, 625 includes at least one first section 3011, 4011, 5011, 6011 and at least one second section 3012, 4012, 5012, 6012 serially between the first end and the second end. At a point RR in each first section, the first section may have a first cross-sectional area (a R ) equal to the height R (h R ) of the first section times the width R (w R ) of the first section at point RR. Furthermore, at a point SS in the second section, the second section may have a second cross-sectional area (a S ) which is larger than the first cross-sectional area (a R ) and is equal to the height S (h S ) of the second section times the width (w S ) of the second section at the point SS.

[0013] It should be noted that depending on the specific application and the need to generate more than two different amounts of heat locally, the heating element may have additional sections with different cross-sectional areas as a R and a S , as described above. For example, the heating element could further comprise at least a third section also serially between the first end and the second end (e.g., see the third section 3013 of the heating element 325 of the Fig. 3B or the third section 4013 of the heating element 425 of the heating device 310 shown in Fig. 4B). At a point TT in the third section, the third section may have a third cross-sectional area (a T ) which is larger than the first cross-sectional area (a R ) which is smaller than the second cross-sectional area (a S ) and is equal to the height T (hT ) of the third section times the width T (w T ) of the third section at the point TT.

[0014] Optionally, the cross-sectional areas of the heating element may taper at points in any transition region of the heating element between a larger portion of the heating element and an adjacent smaller portion of the heating element (e.g., between a second portion and an adjacent first portion, etc.). See tapered regions 305 in Fig. 3A-3B, tapered regions 405 in Fig. 4A-4B, and tapered region 505 in Fig. 5. Alternatively, the heating element can be structured in such a way that there is no transition region between larger and smaller sections.

[0015] The heating device 310, 410, 510, 610 may further comprise a first terminal 311, 411, 511, 611 at the first end 326, 426, 526, 626 of the heating element 325, 425, 525, 625. In particular, the first terminal 311, 411, 511, 611 may be, for example, a contact or a conductive via that lands at the first end 326, 426, 526, 626 of the heating element 325, 425, 525, 625 and is further electrically connected to a first voltage source (not shown). Thus, the first terminal 311, 411, 511, 611 may be configured to receive a first voltage from the first voltage source and apply the first voltage to the first end 326, 426, 526, 626 of the heating element 325, 425, 525, 625.

[0016] The heating device 310, 410, 510, 610 may further comprise a second terminal 312, 412, 512, 612 at the second end 327, 427, 527, 627 of the heating element 325, 425, 525, 625. In particular, the second terminal 312, 412, 512, 612 may be, for example, a contact or a conductive via that lands at the second end 327, 427, 527, 627 of the heating element 325, 425, 525, 625 and is further electrically connected to a second voltage source (not shown). Thus, the second terminal 312, 412, 512, 612 may be configured to receive a second voltage from the second voltage source and apply the second voltage to the second end 327, 427, 527, 627 of the heating element 325, 425, 525, 625.

[0017] The first and second voltage sources may be configured to allow different voltages to be applied to the different ends of the heating element 325, 425, 525, 625 such that current flows through the heating element 325, 425, 525, 625 from end to end. Those skilled in the art will recognize that the direction and amount of current flow (e.g., from the first end to the second end or from the second end to the first end) depend on the voltage difference. In either case, current flowing through the heating element 325, 425, 525, 625 causes the heating element to generate heat. However, due to the different cross-sectional areas of the different sections, the current densities through those different sections are different, and thus the different sections of the heating element generate different amounts of heat per unit length.In particular, the current densities through sections with larger cross-sectional areas are lower than the current densities through sections with smaller cross-sectional areas. As a result, sections with larger cross-sectional areas generate less heat per unit length than sections with smaller cross-sectional areas.

[0018] Since in the exemplary heating elements 325, 425, 525, 625 the first cross-sectional area (a R ) assigned to each first section 3011, 4011, 5011, 6011 is smaller than the second cross-sectional area (a S) associated with each second section 3012, 4012, 5012, 6012, a first current density through each first section 3011, 4011, 5011, 6011 is greater than a second current density through each second section 3012, 4012, 5012, 6012. As a result, each first section 3011, 4011, 5011, 6011 generates a first amount of heat per unit length and each second section 3012, 4012, 5012, 6012 generates a second amount of heat per unit length that is less than the first amount. In the exemplary heating elements that include a third section corresponding to a third cross-sectional area (a T ) which is assigned between the cross-sectional areas a R and a S is (e.g. see the third section 3013 of Fig. 3B or third section 4013 of Fig. 4B), the third current density through the third section is less than the first current density through each first section and greater than the second current density through each second section. As a result, each third section generates a third amount of heat per unit length that is between the first and second amounts.

[0019] It should be noted that the heater structures described in detail above and shown in Fig. 3A-3B, 4A-4B, 5 and 6 are provided to illustrate key features of the present invention (e.g., a heater having a heating element having different sections with different cross-sectional areas for locally generating different amounts of heat) and to demonstrate that such a heating element could have any of a variety of different shapes to provide different current paths. That is, the shape of the heating element defines the path of the current as it flows between the terminals. For example, in the heating element 325 of the heater 310 of Fig. 3A or Fig. 3B, the current path between terminals 311 and 312 is a straight line (ie, substantially linear). In the heating element 425 of the heating device 410 of Fig. 4A or Fig. 4B, the current path between terminals 411 and 412 approximates a circle or ring. In the heating element 525 of the heating device 510 of Fig. 5, the current path between terminals 511 and 512 is tortuous. It should be understood that the heating element could have any other shape (e.g., a spiral shape, a U-shape, etc.) to define any other current path (e.g., a spiral current path, a U-shaped current path, etc.).

[0020] The heating device described above, and in particular the heating element thereof, can be designed and placed on a chip (on-chip) to facilitate local thermal tuning of adjacent regions of the chip (e.g., local thermal tuning of different regions of a single device on the chip or, alternatively, local thermal tuning of multiple devices) without requiring multiple different heating devices within a relatively small chip area. The device or devices could be any type of on-chip device in which a performance characteristic is enhanced or adjusted by thermal tuning. The device or devices could be photonic devices (e.g., waveguides, couplers, resonators, modulators, filters, etc.), optoelectronic devices (e.g., photodiodes, phototransistors, light-emitting diodes, etc.).) or electronic device(s) (e.g., diodes, transistors, etc.). Such devices are well known in the art, and thus the details of them are omitted from this specification to allow the reader to focus on the salient aspects of the disclosed embodiments. The device or devices may be active or passive devices. If multiple devices are to be heated by the same heating device, the devices could be any combination of photonic, optoelectronic, electronic, active, or passive devices. The device or devices may be semiconductor devices comprising any of silicon (Si), germanium (Ge), galium (Ga), arsenic (As), nitrogen (N), or an alloy thereof, or any other suitable material employed for use in semiconductor devices.The design of the heating element is dictated by the specific chip design and, in particular, by the shape, placement, and thermal tuning requirements of the device or devices to be heated by the heater. Additionally, the heater is placed adjacent so that different portions of the heater can apply different amounts of heat to different regions of the device or to different devices. For illustrative purposes, the heater is shown in the figures as aligned with and placed above the device(s) to be thermally tuned. It should be understood, however, that the figures are not intended to be limiting and that, alternatively, the heater could be placed to the side (i.e., at the same level) or below the device(s) to be thermally tuned.For example, the heating element could be a resistor embedded in the substrate beneath the device(s) to be thermally tuned, could be a resistor on the same device layer as the device(s) to be tuned, or could be a resistor in a metal layer around the device(s) to be tuned.

[0021] Fig. 7 and Fig. 8 are perspective drawings illustrating exemplary chip structures 700 and 800, respectively, each including a device 701, 801 requiring thermal tuning and a heater having a heating element adjacent to the device (e.g., above the device) configured to facilitate local thermal tuning of different regions of the device 701, 801.

[0022] In particular, Fig. 7 illustrates a chip structure 700 comprising a substrate 799 and, on the substrate 799, various manufacturing levels including, but not limited to, a front-end-of-line (FEOL) device level, a middle-of-line (MOL) contact level, and back-end-of-line (BEOL) metal levels. The transparent levels 721 and 722 represent two different manufacturing levels. These two different manufacturing levels could be, for example, a device level 721 comprising one or more devices (as discussed in more detail below), and a metal level 722 that is some distance above the device level 721 and that comprises a heater (as discussed in more detail below). It should be noted that, in order to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, all other manufacturing levels (e.g.,any levels above, below, or between levels 721-722) have been omitted from the drawings.

[0023] The chip structure 700 may further include two or more devices, including a device 701 and an additional device 702, in the device level 721. The device 701 may be a substantially linear optical waveguide or any other linear device that requires thermal tuning to achieve a predetermined temperature and uniform temperature distribution (e.g., the same predetermined temperature across the length of the device 701). The device 701 may further include two regions: a first region 7101 and a second region 7102. The additional device 702 (e.g., another optical waveguide or any other heat generating device) may be in close proximity (e.g.,be positioned within a certain distance (d)) from the second region 7102 of the device 701 such that a first pre-thermal tuning temperature of the first region 7101 of the device 701 is less than a second pre-thermal tuning temperature of the second region 7102. That is, due to the placement of the additional device 702 relative to the second region 7102 of the device 701, temperature variations are present across the first and second regions of the device 701 prior to any thermal tuning. It should be noted that in order to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, additional features of the device level 721 have been omitted from the drawings.For example, these additional device-level features may include, but are not limited to, other devices, cladding material layer(s) (e.g., covering any waveguides), sidewall spacers, one or more layers of dielectric material (e.g., covering all devices), etc.

[0024] The chip structure 700 may further comprise a heater in the metal level 722. For example, the chip structure 700 may comprise an instance of the heater 310 described in detail above and in Fig. 3A. In this chip structure 700, the heating element 325 of the heater 310 and the device 701 may have approximately equal lengths, and the heater 310 may be placed such that the heating element 325 is aligned with the device 701. In addition, the heating element 325 may include different sections with different cross-sectional areas, and the different sections may be aligned with different regions of the device 701 having different temperature profiles. That is, the heating element 325 may include, adjacent to the first region 7101 of the device 701, a first section 3011 with a first cross-sectional area (a R ) and, adjacent to the second region 7102 of the device 701, which runs hotter, a second section 3012 having a second cross-sectional area (a S ) which is larger than the first cross-sectional area (a R). In this case, the different sections 3011 and 3012 of the heating element 325 may be configured such that the resulting different amounts of heat generated by the different sections of the heating element 325 and applied to the different regions 7102-7102 of the device 701 are sufficient to achieve the predetermined temperature and a uniform temperature distribution (e.g., the same predetermined temperature across the length of the device 701). It should be noted that, in order to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, additional features of the metal level 722 have been omitted from the drawings.For example, in metal level 722, heating element 325 may be formed within a trench patterned into one or more layers of interlayer dielectric (ILD) material, and may be further covered by one or more layers of ILD material. In any case, chip structure 700 may be configured such that the material(s) and spacing between the heating element and the device ensure that the device is thermally coupled to, but electrically isolated from, the heating element.

[0025] Similarly, Fig. 8 illustrates a chip structure 800 comprising a substrate 899 and, on the substrate 899, various manufacturing levels including, but not limited to, a front-end-of-line (FEOL) device level, a middle-of-line (MOL) contact level, and back-end-of-line (BEOL) metal levels. The transparent levels 821 and 822 represent two different manufacturing levels. These two different manufacturing levels could be, for example, a device level 821 comprising one or more devices (as discussed in more detail below), and a metal level 822 that is some distance above the device level 821 and that comprises a heater (as discussed in more detail below). It should be noted that, in order to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, all other manufacturing levels (e.g.,any levels above, below, or between levels 821-822) have been omitted from the drawings.

[0026] The chip structure 800 may include an optical resonator 880 in the device level 821. The optical resonator 880 may include two or more annular waveguides (e.g., see first, second, and third annular waveguides 801(1)-801(3)) and a linear waveguide 802 adjacent to the annular waveguides 801(1)-801(3). Each annular waveguide 801(1)-801(3) requires thermal tuning to some predetermined temperature and a uniform temperature distribution (e.g., the same predetermined temperature along the length of the annular waveguide). In this example, each annular waveguide 801(1)-801(3) has different regions with different pre-thermal tuning temperature variations due to close proximity (e.g., within a certain distance (d)) to the other annular waveguides.It should be noted that, to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, additional device-level features 821 have been omitted from the drawings. For example, these additional device-level features may include, but are not limited to, other devices, cladding material layer(s) (e.g., covering the waveguides), sidewall spacers, one or more layers of dielectric material (e.g., covering all devices), etc.

[0027] The chip structure 800 may further comprise, in the metal level 822, two or more heaters for the two or more ring-shaped waveguides. For example, the chip structure 800 may comprise multiple instances of the heater 410 arranged in Fig. 4A or Fig. 4B and described above (e.g., see first, second, and third heaters 410(1)-410(3)). In this chip structure 800, each heater 410(1)-410(3) may be placed such that a heating element 425 is aligned with a corresponding annular waveguide 801(1)-801(3). The heating element 425 may include different sections with different cross-sectional areas, and the different sections may be adjacent to different regions of the annular waveguide therebelow that have different temperature profiles. That is, in the first heater 410(1), the heating element 425 may include, adjacent to a first region of the first annular waveguide 801(1), a first section 4011 with a first cross-sectional area (a R) and, adjacent to a second region of the first annular waveguide 801(1), which runs hotter due to close proximity to the second annular waveguide 801(2), a second section 4012 having a second cross-sectional area (a S ) which is larger than the first cross-sectional area (a R ). In the second heating device 410(2), the heating element 425, adjacent to first regions of the second annular waveguide 801(2), may have first sections 4011 having a first cross-sectional area (a R ) and, adjacent to second regions of the second annular waveguide 801(2) which run hotter due to close proximity to the first and third annular waveguides 801(1) and 801(3), second sections 4012 having a second cross-sectional area (a S ) which is larger than the first cross-sectional area (a R). In the third heating device 410(3), the heating element 425, adjacent to a first region of the third annular waveguide 801(3), may have a first section 4011 having a first cross-sectional area (a R ) and, adjacent to a second region of the third annular waveguide 801(3), which runs hotter due to close proximity to the second annular waveguide 801(2), a second section 4012 having a second cross-sectional area (a S ) which is larger than the first cross-sectional area (a R). In each heater 410(1)-410(3), due to a placement of the heating element relative to the annular waveguide below, and in particular due to an alignment of the different portions of the heating element with the different regions of the waveguide below, different amounts of heat may be applied to the different regions of the waveguide below, thereby raising the temperatures of those regions by different amounts. Thus, in each of the heaters 410(1)-410(3), the different portions 4011 and 4012 of the heating element 425 may be configured such that the resulting different amounts of heat generated by the different portions of the heating element 425 and applied to the different regions of the annular waveguide below are sufficient to maintain the predetermined temperature and a uniform temperature distribution (e.g.It should be noted that, to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, additional features of metal level 822 have been omitted from the drawings. For example, in metal level 822, the heating elements 425 of heaters 410(1)-410(3) may be formed within respective trenches patterned into one or more layers of interlayer dielectric (ILD) material and may be further covered by one or more layers of ILD material.In any case, the chip structure 800 may be configured such that the materials and spacing between the annular waveguide(s) and the heating element(s) ensure that each annular waveguide is thermally coupled to, but electrically isolated from, a heating element.

[0028] Fig. 9 is a perspective drawing illustrating an exemplary chip structure 900 including a plurality of devices requiring thermal tuning and a heater having a heating element adjacent to the devices (e.g., above the devices) configured to facilitate local thermal tuning. In particular, the chip structure 900 may include a substrate 999 and, on the substrate 999, various manufacturing levels including, but not limited to, a front-end-of-line (FEOL) device level, a middle-of-line (MOL) contact level, and back-end-of-line (BEOL) metal levels. The transparent levels 921 and 922 represent two different manufacturing levels.These two different manufacturing levels could, for example, be a device level 921, which includes one or more devices (as discussed in more detail below), and a metal level 922, which is some distance above the device level 921 and which includes a heater (as discussed in more detail below). It should be noted that, in order to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, all other manufacturing levels (e.g., any levels above, below, or between levels 921-922) have been omitted from the drawings.

[0029] The chip structure 900 may include, within the device level 921, two or more devices comprising a first device 901 and a second device 902 adjacent to the first device 901. It should be noted that, to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, additional features of the device level 921 have been omitted from the drawings. For example, these additional device-level features may include, but are not limited to, other devices, cladding material layer(s) (e.g., covering any waveguides), sidewall spacers, one or more layers of dielectric material (e.g., covering all devices), etc.

[0030] The chip structure 900 may further comprise a heater within the metal level 922. For example, the chip structure 900 may comprise an instance of the heater 310 described in detail above and in Fig. 3A. In this chip structure 900, the heating element 325 of the heater 310 may be placed such that the heating element 325 extends over both the first device 901 and the second device 902. In addition, the heating element 325 may include different sections with different cross-sectional areas, and the different sections may be aligned with the different devices 901 and 902. That is, the heating element 325 may include, adjacent to the first device 901, a first section 3011 with a first cross-sectional area (a R ) and, adjacent to the second device 902, a second portion 3012 having a second cross-sectional area (a S) which is larger than the first cross-sectional area (a R). Due to placement of the heating element relative to the different devices 901-902, and in particular due to alignment of the different portions of the heating element with the different devices, different amounts of heat may be applied to the different devices, thereby raising the temperatures of the different devices 901-902 by different amounts. In this case, the different portions 3011 and 3012 of the heating element 325 may be configured such that thermal tuning results in the same or different predetermined temperature profiles in the different devices 901-902.It should be noted that, in order to allow the reader to focus on the salient aspects of the disclosed embodiments, particularly related to device and heater alignment, additional features of metal level 922 have been omitted from the drawings. For example, in metal level 922, heating element 325 may be formed within a trench patterned into one or more layers of interlayer dielectric (ILD) material and may be further covered by one or more layers of ILD material. In any case, chip structure 900 may be configured such that the material(s) and spacing between the heating element and the devices ensure that the devices are thermally coupled to, but electrically isolated from, the heating element.

[0031] Once again, it should be understood that the figures are not intended to be limiting. While Fig. 7-9 illustrate heater(s) in a metal level aligned above device(s) in a device level. Alternatively, the heater could be placed to the side (i.e., at the same level) or below the device(s) to be thermally tuned. For example, the heating element could be a resistor embedded in the substrate below the device(s) to be thermally tuned, could be a resistor on the same device layer as the device(s) to be tuned, or could be a resistor in a metal layer around the device(s) to be tuned.In any event, those skilled in the art will recognize that such a chip structure may further include a temperature control system having on-chip temperature sensor(s), voltage sources, and a controller in communication with the on-chip temperature sensors and voltage sources. In such a system, the actual temperatures at locations requiring thermal tuning may be sampled periodically or continuously by the sensor(s), and based on the actual temperature(s), the controller may cause the voltage sources to selectively adjust the voltage difference between the first and second terminals of the heater, and thereby the current flow and the amount of heat generated by the different portions of the heating element, to maintain a specific temperature profile in the device(s) undergoing thermal tuning using the heater.

[0032] Referring to the flowchart of Fig. 10, method embodiments related to the structures described above are also disclosed herein. The method embodiments may include performing thermal modeling for a device requiring thermal tuning (or alternatively, for multiple devices requiring thermal tuning) (see process step 1002). The device or devices could be any type of on-chip device in which a performance characteristic is enhanced or adjusted by thermal tuning. The device or devices could be photonic device(s) (e.g., waveguides, couplers, resonators, modulators, filters, etc.), optoelectronic device(s) (e.g., photodiodes, phototransistors, light-emitting diodes, etc.), or electronic device(s) (e.g., diodes, transistors, etc.). The device or devices may be active or passive device(s).The device or devices may be semiconductor devices comprising any of silicon (Si), germanium (Ge), galium (Ga), arsenic (As), nitrogen (N), or an alloy thereof, or any other suitable material employed for use in semiconductor devices. Such devices are well known in the art, and thus, the details of them are omitted from this specification to allow the reader to focus on the salient aspects of the disclosed embodiments. In any event, such thermal modeling may be performed to, for example, predict the operating temperature of each device and to predict any in-device temperature variations that will be present (e.g., due to close proximity to other on-chip devices).Thermal modeling techniques are well known in the art, and thus discussion of these techniques is omitted from this specification to allow the reader to focus on the disclosed embodiments.

[0033] The method may further comprise, based on the results of the thermal modeling, designing an on-chip heater to perform local thermal tuning of adjacent areas of the chip (see process step 1004). For example, the on-chip heater could be designed to perform local thermal tuning of different regions of a single device (or alternatively, to perform local thermal tuning of different devices). In particular, the on-chip heater may be designed, as discussed in detail above with respect to the chip structure embodiments, to include a heating element (e.g., a resistor) configured to generate different amounts of heat locally (i.e., generate different amounts of heat at different locations). That is, as described above and in Fig.3A-3B, 4, 5, or 6, such a heater may include a heating element having a first end and a second end and, between the first end and the second end, different sections having different cross-sectional areas such that current densities through the different sections are different and thus such that the heat generated by the different sections per unit length is different. The heater may further include a first terminal at the first end of the heating element and a second terminal at the second end of the heating element. The design of the heating element is dictated by the specific chip design and, in particular, by the shape, placement, and thermal matching requirements of the device or devices to be heated by the heater.

[0034] The method may further comprise fabricating a chip comprising the heater and, adjacent to the heater, the device to be thermally tuned using the heater (or alternatively, the devices to be thermally tuned using the heater) (see process step 1006). In particular, at process step 1006, during fabrication of the chip, the heater may be fabricated such that the different portions of the heating element with the different cross-sectional areas are adjacent to different regions of the device that require different amounts of heat during thermal tuning (or alternatively, such that the different portions of the heating element with the different cross-sectional areas are adjacent to different devices that require different amounts of heat during thermal tuning).For illustrative purposes, the heater is shown in the figures as being aligned with and placed above the device(s) to be thermally tuned. However, it should be understood that the figures are not intended to be limiting, and that alternatively, the heater could be placed to the side (i.e., at the same level) or below the device(s) to be thermally tuned. For example, the heating element could be a resistor embedded in the substrate beneath the device(s) to be thermally tuned, could be a resistor formed in the same device layer as the device(s) to be tuned, or could be a resistor formed in a metal layer around the device(s) to be tuned.

[0035] Method embodiments may further include performing local thermal tuning of the different portions of the device (or alternatively, the different devices) using the heater (see process step 1008). In particular, process step 1008 may include applying a first voltage to the first terminal and a second voltage, different from the first voltage, to the second terminal to cause current to flow through the heating element. Current flowing through the heating element causes the heating element to generate heat. However, due to the different cross-sectional areas of the different portions of the heating element, the current densities through those different portions are different, and thus the different portions of the heating element generate different amounts of heat per unit length.The generation of heat using the heating device can be performed such that the different amounts of heat generated by the different sections per unit length raise the temperatures of the different regions of the device (or alternatively, the different devices) by a different amount. Raising the temperatures of the different regions of the device (or alternatively, the different devices) by different amounts can be performed, for example, to achieve a substantially uniform temperature distribution across the different regions of the device (or alternatively, across the different devices).Alternatively, raising the temperatures of the different regions of the device (or alternatively, the different devices) by different amounts could be performed to achieve different temperature profiles across the different regions of the device (or alternatively, across the different devices).

[0036] The process(es) described above are used in the fabrication of integrated circuit chips. The resulting integrated circuit chips may be distributed by the manufacturer in raw wafer form (i.e., a single wafer containing multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case, the chip is mounted in a single-chip assembly (such as a plastic carrier with leads attached to a motherboard or other higher-level carrier) or in a multi-chip assembly (such as a ceramic carrier containing one or both surface interconnects or buried interconnects). In either case, the chip is then integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of either (a) an intermediate product, such as a motherboard, or (b) a final product.The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products that include a display, a keyboard or other input device, and a central processor.

[0037] It should be understood that the terminology used herein is for the purpose of describing the disclosed structures and methods and is not intended to be limiting. For example, the singular forms "a," "an," "another," and "the," as used herein, are intended to include the plural forms as well, unless the context clearly indicates otherwise. Additionally, the terms "comprises," "comprising," "includes," and / or "including," as used herein, specify the presence of stated features, integers, steps, acts, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, acts, elements, components, and / or groups thereof.In addition, as used herein, terms such as "right," "left," "vertical," "horizontal," "top," "bottom," "upper," "lower," "beneath," "below," "underneath," "over," "overlying," "parallel," "perpendicular," etc., are intended to describe relative locations as oriented and illustrated in the drawings (unless otherwise noted), and terms such as "touching," "in direct contact," "contiguous," "directly adjacent," "immediately adjacent," etc., are intended to indicate that at least one element physically contacts another element (without other elements separating the described elements). The term "lateral" is used herein to describe the relative locations of elements, and specifically to indicate that an element is positioned to the side of another element as opposed to above or below the other element, as those elements are oriented and illustrated in the drawings.For example, an element positioned laterally adjacent to another element is adjacent to the other element; an element positioned laterally immediately adjacent to another element is directly adjacent to the other element; and an element laterally surrounding another element is adjacent to and encompassing the outer sidewalls of the other element. The corresponding structures, materials, actions, and equivalents of all means or step-plus-function elements in the claims below are intended to include any structure, material, or action for performing the function in combination with other claimed elements, as specifically claimed.

Claims

[1] Structure comprising: a heating element (325, 425, 525, 625) having a first end (326, 426, 526, 626) and a second end (327, 427, 527, 627) and, between the first end (326, 426, 526, 626) and the second end (327, 427, 527, 627), different sections with different cross-sectional areas; a first terminal (311, 411, 511, 611) at the first end (326, 426, 526, 626) configured to receive a first voltage; and a second terminal (312, 412, 512, 612) at the second end (327, 427, 527, 627) configured to receive a second voltage different from the first voltage to cause current to flow through the heating element (325, 425, 525, 625), wherein the different sections of the heating element (325, 425, 525, 625) are designed to be aligned with different devices or with different regions of a single device, and wherein the different sections of the heating element (325, 425, 525, 625) are configured to increase temperatures of the different devices or temperatures of the different regions of the single device by different amounts due to the current flow through the different cross-sectional areas. [2] Structure according to claim 1, wherein the different sections comprise at least: a first section having a first cross-sectional area; and a second section having a second cross-sectional area that is larger than the first cross-sectional area, such that a first current density through the first section is greater than a second current density through the second section, and wherein, due to the first current density being greater than the second current density, the first section generates a first amount of heat per unit length and the second section generates a second amount of heat per unit length that is less than the first amount of heat per unit length. [3] The structure of claim 1 or 2, wherein the heating element (325, 425, 525, 625) comprises a metal, a metal alloy, or a doped semiconductor. [4] The structure of any one of claims 1 to 3, wherein the heating element (325, 425, 525, 625) provides a linear current path between the first terminal (311, 411, 511, 611) and the second terminal (312, 412, 512, 612). [5] The structure of any one of claims 1 to 3, wherein the heating element (325, 425, 525, 625) provides a non-linear current path between the first terminal (311, 411, 511, 611) and the second terminal (312, 412, 512, 612). [6] The structure of any one of claims 1 to 5, further comprising a plurality of devices (701, 801, 901) comprising any of semiconductor devices, photonic devices, optoelectronic devices, and electronic devices, wherein the heating element (325, 425, 525, 625) is adjacent to at least one of the devices (701, 801, 901), and wherein the different portions of the heating element (325, 425, 525, 625) are configured to raise temperatures of different devices (701, 801, 901) or different regions of a single device (701, 801, 901) by different amounts. [7] The structure of claim 6, wherein the different portions are configured such that raising the temperatures by the different amounts results in a substantially uniform temperature distribution across the different devices (701, 801, 901) or the different regions of a single device (701, 801, 901). [8] Structure comprising: a device (701, 801, 901); and a heating device adjacent to the device (701, 801, 901) and comprising: a heating element (325, 425, 525, 625) comprising: a first end (326, 426, 526, 626) and a second end (327, 427, 527, 627) and, between the first end (326, 426, 526, 626) and the second end (327, 427, 527, 627), different sections having different cross-sectional areas aligned with different regions of the device (701, 801, 901); a first terminal (311, 411, 511, 611) at the first end (326, 426, 526, 626) configured to receive a first voltage; and a second terminal (312, 412, 512, 612) at the second end (327, 427, 527, 627) configured to receive a second voltage different from the first voltage such that current flows through the heating element (325, 425, 525, 625), wherein the different sections comprise at least a first section having a first cross-sectional area and a second section having a second cross-sectional area that is larger than the first cross-sectional area, such that a first current density through the first section is greater than a second current density through the second section, and wherein, due to the first current density being greater than the second current density, the first portion is configured to generate a first amount of heat per unit length to raise a temperature of a first device region by a first amount, and the second portion is configured to generate a second amount of heat per unit length that is less than the first amount of heat per unit length to raise a temperature of a second device region by a second amount to achieve a substantially uniform temperature distribution across the device regions. [9] The structure of claim 8, wherein the heating element (325, 425, 525, 625) comprises a metal, a metal alloy, or a doped semiconductor. [10] The structure of claim 8 or 9, wherein the device (701, 801, 901) comprises a photonic device, an optoelectronic device, or an electronic device. [11] The structure of any one of claims 8 to 10, wherein the device (701, 801, 901) comprises a semiconductor device. [12] The structure of claim 8, wherein the device (701, 801, 901) comprises a waveguide and the structure further comprises an additional waveguide positioned laterally adjacent to the waveguide, wherein the waveguide comprises a first region having a first pre-thermal tuning temperature aligned below the first section and a second region having a second pre-thermal tuning temperature aligned below the second section, wherein the additional waveguide is closer to the second region than to the first region and, as a result, the second pre-thermal tuning temperature of the second region is greater than the first pre-thermal tuning temperature of the first region, and wherein the first portion and the second portion of the heating element (325, 425, 525, 625) are configured to raise temperatures of the first region and the second region by different amounts to achieve a substantially uniform temperature distribution across the first region and the second region of the waveguide. [13] The structure of claim 12, wherein the waveguide and the additional waveguide comprise annular waveguides, and wherein the structure further comprises an additional heating element (325, 425, 525, 625) adjacent to the additional waveguide. [14] The structure of claim 13, further comprising an optical resonator (880) comprising the annular waveguides (801(1)-801(3)) and a linear waveguide (802) positioned laterally adjacent to the annular waveguides. [15] Procedure comprising: Providing a chip structure comprising a heating device comprising: a heating element (325, 425, 525, 625) having a first end (326, 426, 526, 626) and a second end (327, 427, 527, 627) and, between the first end (326, 426, 526, 626) and the second end (327, 427, 527, 627), different sections with different cross-sectional areas; a first terminal (311, 411, 511, 611) at the first end (326, 426, 526, 626); and a second terminal (312, 412, 512, 612) at the second end (327, 427, 527, 627); and Generating heat using the heating device, wherein generating the heat comprises: applying a first voltage to the first terminal (311, 411, 511, 611) and a second voltage, different from the first voltage, to the second terminal (312, 412, 512, 612) to cause current to flow through the heating element (325, 425, 525, 625), wherein, due to the different cross-sectional areas, when the current flows through the different sections of the heating element (325, 425, 525, 625), different amounts of heat per unit length are generated locally by the different sections, and wherein generating the heat is performed such that the different amounts of heat generated by the different sections per unit length affect temperatures of different devices (701, 801, 901) or different regions of a single device (701, 801, 901) by different amounts. [16] Method according to claim 15, wherein the different sections comprise at least: a first section having a first cross-sectional area; and a second section having a second cross-sectional area that is larger than the first cross-sectional area, such that a first current density through the first section is greater than a second current density through the second section, and wherein, due to the first current density being greater than the second current density, the first section generates a first amount of heat per unit length and the second section generates a second amount of heat per unit length that is less than the first amount of heat per unit length. [17] The method of claim 16, wherein raising the temperatures by the different amounts results in a substantially uniform temperature distribution across the different devices (701, 801, 901) or the different regions of a single device (701, 801, 901).

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