Photoresist and processes

Abstract

Procedure, comprehensive: Spin-drying of a first hard mask layer (110) over a target layer (102), wherein the first hard mask layer (110) comprises photoacid generators or photobase generators (134); Deposition of a photoresist layer (112) over the first hard mask layer (110) using chemical vapor deposition or atomic layer deposition, wherein the photoresist layer (112) is deposited using one or more organometallic precursors; Heating the photoresist layer (112) to induce cross-linking between one or more organometallic precursors; Exposure of the photoresist layer (112) with structured energy (130), wherein the exposure of the photoresist layer (112) with the structured energy further exposes the first hard mask layer (110) with the structured energy, wherein the exposure of the first hard mask layer (110) with the structured energy (130) generates acids or bases (134) in the first hard mask layer (110), wherein the acids or bases (134) are transferred to the photoresist layer (112); Heating the photoresist layer (112) to cause decrosslinking in the photoresist layer (112), thereby forming a decrosslinked section (112d) of the photoresist layer (112), and wherein the acids or bases (134) react with the photoresist layer (112) during decrosslinking of the photoresist layer (112); and Removal of the decrosslinked section (112d) of the photoresist layer (112), wherein one or more organometallic precursors comprise a first precursor comprising M(CH2COOX)4, M(CH2COOR)4 or M(N=C=O)4 and a second precursor comprising M(CH=CH2)4 or M(CH(CH3)X)4, wherein M is a metal, X is a halogen and R is an alkyl group.

Description

BACKGROUND

[0001] Semiconductor devices are used in a wide variety of electronic applications, such as personal computers, mobile phones, digital cameras, and other electronic devices. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductor layers of material over a semiconductor substrate, and structuring the various material layers using lithography to form circuit components and elements.

[0002] The semiconductor industry continues to improve the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) by continuously reducing the minimum feature size, which makes it possible to integrate more components into a given area.

[0003] US Patent 2021 / 0364924A1 discloses a method for fabricating a semiconductor device in which a photoresist layer over a substrate is exposed to actinic radiation and a developer composition is applied to the exposed photoresist layer to form a latent pattern in the photoresist layer. US Patent 5,688,634A discloses a method for fabricating masks in which a combination of a matrix polymer and a modifier polymer is formed as a resist layer on a substrate, and the resist layer is pattern-exposed to radiation to form a latent image in the resist layer. US Patent 2020 / 0073238A1 discloses a photoresist composition comprising a polymer resin, a photoactive compound, a metal-organic compound, a strengthening additive, and a first solvent.US Patent 2021 / 0 271 166 A1 discloses a method for fabricating a semiconductor device, wherein a photoresist underlayer is formed over a semiconductor substrate, and a photoresist layer is formed over the photoresist underlayer, and wherein the photoresist layer is selectively exposed to actinic radiation and developed to form a pattern in the photoresist layer. US Patent 2017 / 0 271 150 A1 discloses a material composition for forming a resist layer, wherein the resist layer comprises a multimetallic complex including an extreme ultraviolet absorption element and a bridging element. US Patent 2021 / 0 198 468 A1 discloses a method for forming a photoresist layer over a substrate, wherein the photoresist layer is selectively exposed to radiation and subsequently developed. The photoresist has a composition comprising a photoactive compound, a crosslinker, and a copolymer. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Aspects of the present disclosure will be understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with common industry practice, various features are not drawn to scale. In fact, the dimensions of the various features may have been enlarged or reduced arbitrarily for the clarity of the discussion. The Fig. 1 to Fig. Figure 9 illustrates cross-sectional views of intermediate stages in the manufacture of a semiconductor device according to some embodiments. DETAILED DESCRIPTION

[0005] The following disclosure provides many different embodiments or examples for implementing various features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. For example, the formation of a first feature above or on top of a second feature in the following description may include embodiments in which the first and second features are in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, so that the first and second features may not be in direct contact. Additionally, the present disclosure may repeat reference numerals and / or letters in the various examples.This repetition serves the purpose of simplicity and clarity and does not in itself prescribe any relationship between the various embodiments and / or configurations discussed.

[0006] Furthermore, spatially relative terms, such as "located below," "under," "lower," "above," "upper," and the like, can be used here to simply describe the relationship of an element or structure to one or more other elements or structures depicted in the figures. These spatially relative terms are intended to encompass various orientations of the device in use or operation, in addition to the orientation shown in the figures. The device may be oriented differently (rotated by 90 degrees or in a different orientation), and the spatially relative descriptors used herein may be interpreted accordingly.

[0007] Various embodiments provide improved photoresists, methods for forming them, and methods for structuring target layers using the photoresists. The photoresists can be molecular organometallic photoresists, which can be positive toner materials. The improved photoresists can be deposited by chemical vapor deposition (CVD), atomic layer deposition (ALD), or similar processes. Deposition of the photoresists by CVD or ALD allows for deposition without the use of toxic organic solvents, making it a more environmentally friendly process. CVD and ALD are material-efficient processes, reducing waste and costs.Deposition of photoresists via CVD or ALD results in photoresists being deposited with a uniform density and controllable film thickness, which increases lithographic performance and structure transfer, reduces fixture defects, and improves fixture performance. Molecular organometallic photoresists exhibit good absorption of energy, such as light. This reduces the dose required to pattern the photoresists, lowers costs, and increases throughput. Molecular organometallic photoresists also exhibit good etch resistance to other semiconductor materials. This improves the patterning of underlying layers, reduces fixture defects, and enhances fixture performance.

[0008] The Fig. 1 to Fig. Figure 9 illustrates cross-sectional views of intermediate stages in the formation of features in a target layer 102 of a semiconductor device 101 according to some embodiments. The target layer 102 is a layer in which a plurality of structures are to be formed. In some embodiments, the semiconductor device 101 can be processed as part of a larger wafer. In such embodiments, after various features of the semiconductor device 101 have been formed (e.g., active devices, interconnect structures, and the like), a singulation process can be applied to scribe regions of the wafer to separate individual semiconductor dies from the wafer (also referred to as singulation).

[0009] Fig. Figure 1 illustrates a multilayer film stack 120 formed over a semiconductor substrate 100. The multilayer film stack 120 can comprise the target layer 102, a first dielectric layer 104, a first hard mask layer 106, and a second dielectric layer 108. The first dielectric layer 104, the first hard mask layer 106, and the second dielectric layer 108 can be optional layers and can be omitted in some embodiments. The first dielectric layer 104, the first hard mask layer 106, and the second dielectric layer 108 can be stacked in any desired order, can be duplicated according to some embodiments, or can be otherwise repeated.

[0010] The semiconductor substrate 100 can be formed from a semiconductor material, such as silicon, doped or undoped, or from an active layer of a semiconductor-on-insulator (SOI) substrate. The semiconductor substrate 100 can also comprise other semiconductor materials, such as germanium; a compound semiconductor comprising silicon carbide, gallium arsenic, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; an alloy semiconductor comprising SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP; combinations thereof; or the like. Other substrates, such as multilayer or gradient substrates, can also be used. Devices, such as transistors, diodes, capacitors, resistors, and the like, can be formed in and / or on an active surface of the semiconductor substrate 100. In some embodiments, the target layer 102 can be a semiconductor substrate.For example, in some embodiments, the target layer 102 can be a semiconductor substrate used to form fin field-effect transistors (FinFETs), nanostructured field-effect transistors (NanoFETs), or the like. In such embodiments, the semiconductor substrate 100 can be omitted.

[0011] The target layer 102 can be a layer in which a structure is to be formed. In some embodiments, the target layer 102 can be a conductive layer, a dielectric layer, a semiconductor layer, or the like. In embodiments where the target layer 102 is a conductive layer, the target layer can be a metal layer, a polysilicon layer, or the like. The target layer 102 can be deposited by physical vapor deposition (PVD), chemical vapor deposition (CVD) (e.g., ceiling deposition or the like), or the like. The conductive layer can be structured according to the processes described below to form metal gates (e.g., in a cut-metal-gate process), conductive traces, conductive vias, dummy gates (e.g., for replacement gates in FinFETs, nanoFETs, or the like), or the like.

[0012] In embodiments where the target layer 102 is a dielectric layer, the target layer 102 can be a dielectric intermediate metal layer, a dielectric intermediate layer, a passivation layer, or the like. The target layer 102 can be a material with a low dielectric constant (e.g., a low-k material). For example, the target layer 102 can have a dielectric constant lower than 3.8, lower than 3.0, or lower than 2.5. The target layer 102 can be a material with a high dielectric constant, such as a dielectric constant higher than 3.8. The target layer 102 can be deposited by CVD, atomic layer deposition (ALD), or the like. One or more openings (such as openings 114, which are referred to below in relation to Fig. 6 can be structured in target layer 102 according to the processes described below, and conductive traces, conductive vias or the like can be formed in the openings in target layer 102.

[0013] In embodiments where the target layer 102 is a semiconductor material, the target layer 102 can be formed from silicon, silicon germanium, or the like. In some embodiments, the target layer 102 can be formed from a crystalline semiconductor material, such as crystalline silicon, crystalline silicon carbide, crystalline silicon germanium, a crystalline III-V compound, or the like. In some embodiments, openings (such as openings 114, which are described below in relation to Fig. (Discussed in Section 6) in target layer 102 can be structured according to the processes described below, and shallow trench insulation (STI) regions can be formed in the openings in target layer 102. Semiconductor fins can protrude between adjacent STI regions, and source / drain regions can be formed in the semiconductor fins. The semiconductor fins can include material from target layer 102 that remains after the openings have been formed in target layer 102. Gate dielectric layers and gate electrodes can be formed via channel regions in the semiconductor fins, thereby forming semiconductor devices such as FinFETs, nanoFETs, or the like.

[0014] Although Fig. Figure 1 illustrates the target layer 102 as being in physical contact with the semiconductor substrate 100. Any number of intermediate layers can be arranged between the target layer 102 and the semiconductor substrate 100. Such intermediate layers can include a dielectric intermediate layer (ILD layer), which may comprise a low-k dielectric and may include contact plugs formed therein; other dielectric intermediate layers (IMD layers) with conductive conductors and / or vias formed therein; one or more intermediate layers (e.g., etch stop layers, adhesion layers, or the like); combinations thereof; or the like. In some embodiments, an etch stop layer can be arranged directly beneath the target layer 102. The etch stop layer can act as a stop for an etching process subsequently performed on the target layer 102 (e.g.,the etching process, which is referred to below in relation to . Fig. (described in section 6). The materials and processes used to form the etch stop layer may depend on the material of the target layer 102. In some embodiments, the etch stop layer may be formed from silicon nitride, SiON, SiCON, SiC, SiOC, SiCxNy, SiOx, other dielectrics, combinations thereof, or the like. The etch stop layer may be deposited by CVD, ALD, plasma-enhanced chemical vapor deposition (PECVD), low-pressure CVD (LPCVD), PVD, or the like.

[0015] The first dielectric layer 104 is formed over the target layer 102. The first dielectric layer 104 can be an antireflective coating (ARC) that can aid in the exposure and focusing of overlying photoresist layers (discussed below) during the fabrication of the overlying photoresist layers. In some embodiments, the first dielectric layer 104 can be formed from SiON₂, silicon carbide, materials doped with oxygen (O) and / or nitrogen (N), or the like. In some embodiments, the first dielectric layer 104 is essentially nitrogen-free and can be formed from an oxide. In such embodiments, the first dielectric layer 104 can also be referred to as a nitrogen-free ARC (NFARC). A material composition of the first dielectric layer 104 can be selected in some embodiments to prevent reflection.The first dielectric layer 104 can be deposited by PECVD, high-density plasma (HDP) deposition or the like.

[0016] The first hard mask layer 106 is formed over the first dielectric layer 104. The first hard mask layer 106 can be formed from a material comprising a metal (e.g., titanium nitride, titanium, tantalum nitride, tantalum, a metal-doped carbide (e.g., tungsten carbide), or the like); a metalloid (e.g., silicon nitride, boron nitride, silicon carbide, or the like); an oxide (e.g., silicon dioxide (SiO2), an oxide formed from tetraethyl orthosilicate (TEOS), or the like); silicon; or the like. In some embodiments, a material composition of the first hard mask layer 106 can be determined to provide high etch selectivity with an underlying layer, for example, with respect to the first dielectric layer 104 and / or the target layer 102. The first hard mask layer 106 can be deposited by CVD, PVD, ALD, or the like.In subsequent processing steps, a structure is formed on the first hard mask layer 106 using an embodiment structuring process. The first hard mask layer 106 is then used as an etching mask for etching the target layer 102, whereby the structure of the first hard mask layer 106 is transferred to the target layer 102.

[0017] The second dielectric layer 108 is formed over the first hard mask layer 106. The second dielectric layer 108 can be formed from a silicon oxide material. For example, the second dielectric layer 108 can be an oxide formed from boron phosphosilicate tetraethyl orthosilicate (BPTEOS), undoped TEOS, or the like. The second dielectric layer 108 can be deposited by CVD, ALD, PEALD, spin coating, or the like. Other processes and materials can be used. In some embodiments, the second dielectric layer 108 also functions as an antireflective coating. The first hard mask layer 106 and the second dielectric layer 108 can have different material compositions, so that the first hard mask layer 106 and the second dielectric layer 108 can each be selectively etched. Fig. Figure 1 illustrates the second dielectric layer 108 as being arranged above the first hard mask layer 106; in some embodiments, the second dielectric layer 108 can be arranged below the first hard mask layer 106.

[0018] In Fig. 2 A second hard mask layer 110 is formed over the multilayer film stack 120. The second hard mask layer 110 can be deposited by spin coating or the like and subsequently baked. In some embodiments, the second hard mask layer 110 can comprise a spin-on carbon material (SOC material), a bottom antireflective coating material (BARC material), or the like. The second hard mask layer 110 can comprise organic polymers with a high carbon content (e.g., the second hard mask layer 110 can have a carbon content of about 20 wt.% to about 90 wt.%). The second hard mask layer 110 can be used to control the selectivity of a multilayer photoresist structure (such as the multilayer photoresist structure 122, which is described below with respect to Fig. 3 discussed) to increase the etch selectivity of the second hard mask layer 110 over the underlying layers of the multilayer film stack 120. The inclusion of high-carbon organic polymers in the second hard mask layer 110 can increase the etch selectivity of the second hard mask layer 110 over the underlying layers of the multilayer film stack 120. The second hard mask layer 110 can also include photoactive compounds (PACs), such as photoacid generators (PAGs), photobase generators (PBGs), and the like. In some embodiments, the PAGs can include iodonium salts (such as tert-butylphenyliodonium perfluorooctanesulfonate (TBI-PFOS) or the like), sulfonium salts (such as triphenylsulfonium perfluorobutanesulfonate (TPS-PFBS), triphenylsulfonium trifluorosulfonate (TPS-TF), or the like), combinations thereof, or the like.The photoactive compounds can be incorporated into the second hard mask layer 110 to prevent decrosslinking of a subsequently deposited photoresist layer (such as the photoresist layer 112, which is referred to below in relation to . Fig. 3 discussed) to assist during exposure of the photoresist layer with a structured energy source. In some embodiments, a solvent used in the deposition of the second hard mask layer 110 may be an organic solvent, such as propylene glycol methyl ether acetate (PGMEA) or the like.

[0019] In Fig. 3. A photoresist layer 112 is formed over the second hard mask layer 110. The combination of the photoresist layer 112 and the second hard mask layer 110 can be referred to as a multilayer photoresist structure 122. In some embodiments, the photoresist layer 112 can be formed from an organometallic compound. The photoresist layer 112 can be deposited by CVD, ALD, spin coating, or the like. In embodiments where the photoresist layer 112 is deposited by CVD or ALD, the deposition can be carried out at a temperature of about 100 °C to about 500 °C, at a pressure of about 0.7 Pascals (5 mTorr) to about 1.3 Pascals (10 Torr), with a plasma power of less than about 1,000 W. The second photoresist layer 112 can be deposited from organometallic precursors that can be supplied in the gas phase. The organometallic precursors can be processed at a flow rate of approximately 100 sccm to approximately 2.000 sccm are added. In some embodiments, the organometallic precursors have the following general formulas: M(CH2COOX)4, M(CH2COOR)4, M(CH=CH2)4, M(CH(CH3)X)4, or M(N=C=O)4. M represents a metal, which may include tin (Sn), bismuth (Bi), antimony (Sb), indium (In), tellurium (Te), or the like. X represents a halogen, such as chlorine (Cl), bromine (Br), iodine (I), or the like. R represents an alkyl group, which may be linear or branched and may have from 1 to 5 carbon atoms. Accordingly, the organometallic precursors may have the following structures:

[0020] In each of the structures above, only one functional group is fully illustrated. Each structure may have four of the illustrated functional groups, with the other three functional groups represented by the symbol . The other functional groups represented by the symbol are the same as the illustrated functional group in each of the structures above and throughout this application. In further embodiments, the organometallic precursors may have the general formula MxAaBb, where M is one of the metals described above, A and B are any two of the ligands described above (e.g., CH2COOX, CH2COOR, CH=CH2, CH(CH3)X, or N=C=O), x is in the range of 1 to 2, a and b are each greater than or equal to 1, and the sum of a and b is less than or equal to 6.

[0021] The organometallic precursors can react with a co-reactant before polymerization to form the photoresist layer 112. In some embodiments, the co-reactant can be water vapor (H₂O), ammonia (NH₃), or the like. For example, the organometallic precursors can react with the co-reactant according to the following reactions:

[0022] In each of the structures above, only one functional group is illustrated as reacting with each of the co-reactants. However, any number of functional groups can react with the co-reactants.

[0023] The organometallic precursors are deposited on the second hard mask layer 110 and then subjected to post-deposition baking to induce cross-linking between the organometallic precursors and form the photoresist layer 112. Post-deposition baking can be performed at a temperature of approximately 70 °C to approximately 150 °C, at a pressure of approximately 13 Pascals (100 Torr) to approximately 1 atm (101 Pascals or 760 Torr), and for a duration of approximately 20 seconds to approximately 10 minutes. The organometallic precursors can exhibit at least two of the structures described above. For example, the organometallic precursors can be M(CH₂COOH)₄ and M(CH(CH₃)OH)₄; M(CH₂COOH)₄ and M(CH(CH₃)NH₂)₄; M(N=C=O)₄ and M(CH(CH₃)OH)₄; or exhibit M(N=C=O)4 and M(CH(CH3)NH2)4.The organometallic precursors could be crosslinked to form M(CH₂COOH)₃(CH₂COOCHCH₃)M(CH(CH₃)OH)₃, M(CH₂COOH)₃(CH₂C=ONHCHCH₃)M(CH(CH₃)NH₂)₃, or M(N=C=O)₃(NHCOOCHCH₃)M(CH(CH₃)OH)₃. The organometallic precursors can be crosslinked according to the following reactions:

[0024] In each of the structures above, only one functional group of each organometallic precursor is illustrated as reacting with a functional group of another organometallic precursor to form a cross-linked photoresist molecule. However, any number of functional groups from the organometallic precursors can be cross-linked to form the cross-linked photoresist molecules.

[0025] Deposition of the photoresist layer 112 using CVD, ALD, or the like results in a controllable film thickness. For example, the photoresist layer 112 can be deposited with a thickness ranging from approximately 4 nm to approximately 400 nm. The photoresist layer 112 can be deposited with high film uniformity, including a uniform film density, over a large area. Forming the photoresist layer 112 from the described organometallic materials allows it to be used to structure smaller features, such as features with critical dimensions of less than approximately 5 nm. Consequently, the photoresist layer 112 can be used to form smaller devices with improved performance and reduced device defects.CVD and ALD are more efficient and environmentally friendly than other processes used to deposit photoresists, reducing costs, waste and the use of harmful solvents.

[0026] In some embodiments, the photoresist layer 112 can be deposited with a gradient film density. The photoresist layer 112 can have an average film density in the range of approximately 2.0 g / cm³. 3 up to about 3.5 g / cm³ 3The ratio of the density of the photoresist layer 112 at an interface between the second hard mask layer 110 and the photoresist layer 112 to the density of the photoresist layer 112 at an upper surface of the photoresist layer 112 relative to the second hard mask layer 110 can be in the range of approximately 0.5 to approximately 2.0. Forming the photoresist layer 112 with a gradient film density can help to reduce defect problems, such as scum and bridging, and to improve etching performance, such as reducing line width roughness (LWR) and line edge roughness (LER).

[0027] In Fig. 4. The photoresist layer 112 and the underlying second hard mask layer 110 are exposed to structured energy 130, and a post-exposure bake (PEB) is performed to cause decrosslinking in the photoresist layer 112, thereby forming decrosslinked sections 112d. The photoresist layer 112 and the underlying second hard mask layer 110 are connected to the structured energy 130 by a reticle 132. In some embodiments, the structured energy 130 can be structured light, such as ultraviolet (UV) light, extreme ultraviolet (EUV) light, or the like. Exposure of the photoactive compounds present in the second hard mask layer 110 (e.g., the photoacid generators and the photobase generators) with the structured energy 130 causes acids and bases 134 to be generated in the second hard mask layer 110.The acids / bases 134 are then transferred to the photoresist layer 112. The acids / bases 134 can act as catalysts to cause decrosslinking in sections of the photoresist layer 112 that are exposed to the structured energy 130. In some embodiments, the acids / bases 134 can act as catalysts to induce decrosslinking in areas of the photoresist layer 112 that are exposed to the structured energy 130. + - and OH - exhibit -ions.

[0028] Baking after exposure is then carried out on the second hard mask layer 110 and the photoresist layer 112, causing decrosslinking in the sections of the photoresist layer 112 exposed with the structured energy 130 and forming the decrosslinked sections 112d. The acids / bases 134 transferred to the photoresist layer 112 catalyze the decrosslinking in the exposed sections of the photoresist layer 112. The decrosslinking in the photoresist layer 112 can proceed according to the following reaction:

[0029] The structures above illustrate only one crosslinking of the crosslinked photoresist molecule as reacting with acids / bases 134 and becoming uncrosslinked. However, any number of the crosslinked groups can be uncrosslinked from the crosslinked photoresist molecule. Baking after exposure can be carried out at temperatures above approximately 350 °C under ambient conditions.

[0030] In Fig. 5. The uncrosslinked sections 112d of the photoresist layer 112 are removed, forming openings 114 in the photoresist layer 112. In the illustrated embodiment, the photoresist layer 112 is a positive-tone photoresist, so that the uncrosslinked sections 112d exposed to the structured energy 130 are removed. The uncrosslinked sections 112d can be removed by exposing them to a developer. The materials described above for the photoresist layer 112 exhibit good absorption of the structured energy 130, such as EUV light, and good etch selectivity between the unexposed sections of the photoresist layer 112 and the uncrosslinked sections 112d.This improves the exposure and development of the photoresist layer 112, resulting in the formation of structures with smaller critical dimensions, improving device performance, and reducing device defects. Furthermore, the photoresist layer 112 is a positive-tone metal-organic photoresist formed by a highly efficient deposition process, which has the potential to be used in many high-performance structuring processes.

[0031] In Fig. 6. The openings 114 are extended through the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, the first dielectric layer 104, and the target layer 102. The second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, the first dielectric layer 104, and the target layer 102 can be patterned using the photoresist layer 112 as a mask in one or more etching processes. The etching processes can be anisotropic such that the openings 114 extending through the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, the first dielectric layer 104, and the target layer 102 have substantially the same sizes and shapes as the openings 114 extending through the photoresist layer 112. The etching processes can include wet etching processes, dry etching processes, a combination thereof, or the like.The etching processes can include processes such as reactive ion etching (RIE), neutral beam etching (NBE), or the like. Other etching techniques may be used in some embodiments.

[0032] Each of the photoresist layer 112, the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, and the first dielectric layer 104 is illustrated as being present above the target layer 102 after the openings 114 have been extended through the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, the first dielectric layer 104, and the target layer 102. However, one or more of the photoresist layer 112, the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, and the first dielectric layer 104 may be consumed and / or removed when the openings 114 are extended through the underlying layers.

[0033] In Fig. 7. The photoresist layer 112, the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, and the first dielectric layer 104 are removed. The photoresist layer 112, the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, and the first dielectric layer 104 can be removed after the openings 114 have been expanded through the target layer 102. The photoresist layer 112, the second hard mask layer 110, the second dielectric layer 108, the first hard mask layer 106, and the first dielectric layer 104 can be removed by dry etching processes, wet etching processes, plasma ashing, chemical-mechanical planarization (CMP) processes, combinations or multiples thereof, or the like.

[0034] Forming the photoresist layer 112 using the methods and materials described above offers several advantages. For example, forming the photoresist layer 112 by CVD, ALD, or similar processes results in a controllable film thickness, high film uniformity (including uniform film density), and large-area deposition. The photoresist layer 112 can be deposited without toxic solvents, leading to a more environmentally friendly process and high material efficiency. The photoresist layer 112 can be an organometallic material exhibiting good structured energy absorption and good etch resistance. This allows the photoresist layer 112 to be used for etching with reduced critical dimensions.The methods and materials described above can be used to improve device performance, reduce device dimensions, and reduce device defects.

[0035] Fig. Figure 8 illustrates an embodiment in which a third hard mask layer 116 is formed over the photoresist layer 112 before the photoresist layer 112 is exposed with the structured energy 130. The third hard mask layer 116 can be deposited over the photoresist layer 112 after the photoresist layer 112 has been subjected to post-deposition baking. The third hard mask layer 116 can be formed from materials and by processes that are the same as or similar to the second hard mask layer 110. For example, the third hard mask layer 116 can be deposited by spin coating or the like and then baked. In some embodiments, the third hard mask layer 116 can comprise a spin-coated carbon (SOC) material, a bottom antireflective coating (BARC) material, or the like. The third hard mask layer 116 can comprise organic polymers with a high carbon content (e.g.,The third hard mask layer 116 can have a carbon content of approximately 20 wt% to approximately 80 wt%. The third hard mask layer 116 can be used to provide additional photoactive compounds to aid in the decrosslinking of the photoresist layer 112. Accordingly, the third hard mask layer 116 can contain photoactive compounds such as photoacid generators, photobase generators, and the like.

[0036] Furthermore, in Fig. 8. The third hard mask layer 116, the photoresist layer 112, and the second hard mask layer 110 are exposed with structured energy 130. Post-exposure baking (PEB) is performed to cause decrosslinking in the photoresist layer 112, thereby forming decrosslinked sections 112d. The exposure with structured energy 130 and the post-exposure baking can be similar to or the same as those described above with respect to Fig. 4 were described, with the exception that acids / bases 134a are generated in the second hard mask layer 110 and acids / bases 134b are generated in the third hard mask layer 116. Both the acids / bases 134a and the acids / bases 134b can be transferred to the photoresist layer 112 and can facilitate decrosslinking in the photoresist layer 112 during baking after exposure, as described above in relation to Fig. As described in section 4, the inclusion of photoactive compounds in both the second hard mask layer 110 and the third hard mask layer 116, located on opposite sides of the photoresist layer 112, helps to ensure adequate decrosslinking in the photoresist layer 112. This improves the etch selectivity between the decrosslinked sections 112d and the remainder of the photoresist layer 112 that was not exposed to the structured energy 130. This improves etching performance, reduces defects (such as scum and bridging), reduces linewidth roughness and line edge roughness, and allows smaller critical dimensions to be achieved with the photoresist layer 112.

[0037] In Fig. 9. The third hard mask layer 116 is removed. The third hard mask layer 116 can be removed by dry etching, wet etching, a CMP, combinations thereof, or the like. After the third hard mask layer 116 has been removed, the de-crosslinked sections 112d of the photoresist layer 112 can be removed, and the steps of Fig. 6 and Fig. 7 can be carried out as described above.

[0038] Various embodiments can achieve several advantages. For example, forming the photoresist layer 112 by CVD, ALD, or the like results in a photoresist layer 112 with a controllable film thickness, high film uniformity (including uniform film density), and large-area deposition. The photoresist layer 112 can be deposited without toxic solvents, leading to a more environmentally friendly process and high material efficiency. The photoresist layer 112 can be an organometallic material exhibiting good structured energy absorption and good etch resistance. This allows the photoresist layer 112 to be used for etching with reduced critical dimensions. The methods and materials described above can be used to improve device performance, reduce device dimensions, and minimize device defects.Forming the third hard mask layer 116 over the photoresist layer 112 can further improve the etching performance of the photoresist layer 112, resulting in reduced fixture defects, lower achievable critical dimensions and improved fixture performance.

[0039] According to one embodiment, a method comprises spin-depositing a first hard mask layer over a target layer; depositing a photoresist layer over the first hard mask layer using chemical vapor deposition or atomic layer deposition, wherein the photoresist layer is deposited using one or more organometallic precursors; heating the photoresist layer to induce crosslinking between the one or more organometallic precursors; exposing the photoresist layer with structured energy; heating the photoresist layer to induce uncrosslinking in the photoresist layer, thereby forming an uncrosslinked section of the photoresist layer; and removing the uncrosslinked section of the photoresist layer. In one embodiment, the first hard mask layer comprises photoactive compounds.In one embodiment, the exposure of the photoresist layer with the structured energy further exposes the first hard mask layer with the structured energy, thereby generating acids or bases in the first hard mask layer, wherein the acids or bases are transferred to the photoresist layer and react with the photoresist layer during decrossing of the photoresist layer. In another embodiment, the method further comprises spin-depositing a second hard mask layer over the photoresist layer, wherein the second hard mask layer includes additional photoactive compounds.In one embodiment, the one or more organometallic precursors comprise a first precursor comprising M(CH₂COOX)₄ or M(CH₂COOR)₄, and a second precursor comprising M(CH=CH₂)₄ or M(CH(CH₃)X)₄, where M is a metal, X is a halogen, and R is an alkyl group. In another embodiment, the one or more organometallic precursors comprise a first precursor comprising M(N=C=O)₄, and a second precursor comprising M(CH=CH₂)₄ or M(CH(CH₃)X)₄, where M is a metal, X is a halogen, and R is an alkyl group. In one embodiment, heating the photoresist layer to induce decrosslinking in the photoresist layer releases carbon dioxide.

[0040] According to another embodiment, a process comprises reacting a first precursor with a first reactant to form a first compound, wherein the first precursor comprises M(CH₂COOX)₄ or M(CH₂COOR)₄, where M is a metal, X is a halogen, and R is an alkyl group; reacting a second precursor with the first reactant to form a second compound, wherein the second precursor comprises M(CH=CH₂)₄ or M(CH(CH₃)X)₄; and crosslinking the first compound with the second compound to form a crosslinked compound. In one embodiment, the first reactant comprises water. In another embodiment, the first reactant comprises ammonia. In another embodiment, the crosslinking of the first compound with the second compound forms a positive-tone photoresist.In one embodiment, the method further comprises depositing the first precursor and the second precursor over a target layer by chemical vapor deposition or atomic layer deposition; and performing a post-deposition baking action on the first and second compounds to effect crosslinking of the first and second compounds. In another embodiment, the method further comprises exposing the crosslinked compound with structured energy; and performing a post-exposure baking action on the crosslinked compound to effect uncrosslinking in the crosslinked compound. In one embodiment, the first and second precursors are deposited at a flow rate of 100 sccm to 2.000 sccm are supplied and the first precursor and the second precursor are deposited at a temperature of 100 °C to 500 °C, a pressure in the range of 0.7 Pascal (5 mTorr) to 1.3 Pascal (10 Torr) and with an applied plasma power of less than 1,000 W.

[0041] According to yet another embodiment, a method comprises forming a first hard mask layer over a target layer; and forming a crosslinked photoresist over the first hard mask layer, comprising forming the crosslinked photoresist, crosslinking a first organometallic compound with a second organometallic compound, wherein the first organometallic compound comprises M(CH₂COOH)₄ or M(N=C=O)₄, and the second organometallic compound comprises M(CH(CH₃)OH)₄ or M(CH(CH₃)NH₂)₄, where M is a metal, X is a halogen, and R is an alkyl group. In one embodiment, the method further comprises forming a second hard mask layer over the crosslinked photoresist. In one embodiment, the first hard mask layer and the second hard mask layer comprise photoacid generators and photobase generators, respectively.In one embodiment, the method further comprises exposing the crosslinked photoresist with structured energy and baking after exposure to form uncrosslinked sections from the crosslinked photoresist. In another embodiment, the method further comprises exposing the crosslinked photoresist and the uncrosslinked sections to a developer solution to remove the uncrosslinked sections. In one embodiment, the metal comprises tin, bismuth, antimony, indium, or tellurium.

Claims

[1] Procedure, encompassing: Spin-drying of a first hard mask layer (110) over a target layer (102), wherein the first hard mask layer (110) comprises photoacid generators or photobase generators (134); Deposition of a photoresist layer (112) over the first hard mask layer (110) using chemical vapor deposition or atomic layer deposition, wherein the photoresist layer (112) is deposited using one or more organometallic precursors; Heating the photoresist layer (112) to induce cross-linking between one or more organometallic precursors; Exposure of the photoresist layer (112) with structured energy (130), wherein the exposure of the photoresist layer (112) with the structured energy further exposes the first hard mask layer (110) with the structured energy, wherein the exposure of the first hard mask layer (110) with the structured energy (130) generates acids or bases (134) in the first hard mask layer (110), wherein the acids or bases (134) are transferred to the photoresist layer (112); Heating the photoresist layer (112) to cause decrosslinking in the photoresist layer (112), thereby forming a decrosslinked section (112d) of the photoresist layer (112), and wherein the acids or bases (134) react with the photoresist layer (112) during decrosslinking of the photoresist layer (112); and Removal of the decrosslinked section (112d) of the photoresist layer (112), wherein one or more organometallic precursors comprise a first precursor comprising M(CH2COOX)4, M(CH2COOR)4 or M(N=C=O)4 and a second precursor comprising M(CH=CH2)4 or M(CH(CH3)X)4, wherein M is a metal, X is a halogen and R is an alkyl group. [2] Method according to claim 1, wherein the acids or bases (134) H + - and OH - exhibit -ions. [3] Method according to claim 1, wherein the photoacid generators comprise iodonium salts or sulfonium salts. [4] Method according to claim 1, further comprising spin-applying a second hard mask layer (116) over the photoresist layer (112), wherein the second hard mask layer (116) comprises additional photoactive compounds. [5] Method according to any of the preceding claims, wherein heating the photoresist layer (112) to cause decrosslinking in the photoresist layer (112) releases carbon dioxide. [6] Procedure, comprehensive: Reacting a first precursor with a first reactant to form a first compound, wherein the first precursor comprises M(CH2COOX)4 or M(CH2COOR)4, where M is a metal, X is a halogen and R is an alkyl group; Reacting a second precursor with the first reactant to form a second compound, wherein the second precursor comprises M(CH=CH2)4 or M(CH(CH3)X)4; and Connecting the first connection with the second connection to form a networked connection. [7] Method according to claim 6, wherein the first reactant comprises water. [8] Method according to claim 6 or 7, wherein the first reactant comprises ammonia. [9] Method according to any one of claims 6 to 8, wherein the crosslinking of the first compound with the second compound forms a positive-tone photoresist (112). [10] Method according to any one of claims 6 to 9, further comprising: Deposition of the first precursor and the second precursor over a target layer (102) by chemical vapor deposition or atomic layer deposition; and Performing a baking process after deposition at the first and second junctions to effect crosslinking of the first junction with the second junction. [11] The method of claim 10, further comprising: Exposure of the networked connection with structured energy (130); and Performing a baking process after exposure of the networked connection to cause unnetworking in the networked connection. [12] Method according to claim 10 or 11, wherein the first precursor and the second precursor are supplied at a flow rate of 100 sccm to 2,000 sccm and wherein the first precursor and the second precursor are deposited at a temperature of 100 °C to 500 °C, a pressure in the range of 0.7 Pascal to 1.3 Pascal and with an applied plasma power of less than 1,000 W. [13] Procedures, including: Forming a first hard mask layer (110) over a target layer (102); and Forming a cross-linked photoresist (112) over the first hard mask layer (110), wherein the formation of the cross-linked photoresist (112) comprises cross-linking a first organometallic compound with a second organometallic compound, wherein the first organometallic compound comprises M(CH2COOH)4 or M(N=C=O)4, and wherein the second organometallic compound comprises M(CH(CH3)OH)4 or M(CH(CH3)NH2)4, where M is a metal, X is a halogen, and R is an alkyl group. [14] Method according to claim 13, further comprising forming a second hard mask layer (116) over the crosslinked photoresist (112). [15] Method according to claim 14, wherein the first hard mask layer (110) and the second hard mask layer (116) comprise photoacid generators and photobase generators (134). [16] Method according to any one of claims 13 to 15, further comprising exposing the crosslinked photoresist (112) with structured energy (130) and baking after exposure to form uncrosslinked sections (112d) from the crosslinked photoresist (112). [17] Method according to claim 16, further comprising exposing the crosslinked photoresist (112) and the uncrosslinked sections (112d) to a developer solution in order to remove the uncrosslinked sections (112d). [18] Method according to any one of claims 13 to 17, wherein the metal comprises tin, bismuth, antimony, indium or tellurium.

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