Thin-film transistor, method for manufacturing the same and display device comprising it

Abstract

Thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) which has: an active layer (ACT); a gate electrode (150) that overlaps at least partially with the active layer (ACT); and a source electrode (160) and a drain electrode (170) spaced apart from each other and each connected to the active layer (ACT); wherein the active layer (ACT) has a first active layer (130), and the first active layer (130) has: a channel section (130n) that overlaps with the gate electrode (150); a first connecting section (CON1) which is connected to a first side of the channel section (130n); and a second connecting section (CON2) which is connected to a second side of the channel section (130n), wherein the channel section (130n) has a crystalline structure, wherein the first connecting section (CON1) has a first amorphous section (130a) which is in contact with the channel section (130n), and wherein the second connecting section (CON2) has a second amorphous section (130b) which is in contact with the channel section (130n), wherein the active layer (ACT) further comprises an active barrier layer (140) which overlaps with and is in contact with the first active layer (130), the active barrier layer (140) comprises: a channel section (140n) that overlaps with the gate electrode (150), a first amorphous section (140a) connected to a first side of the channel section (140n) of the active barrier layer (140); and a second amorphous section (140b) connected to a second side of the channel section (140n) of the active barrier layer (140); wherein the channel section (140n) of the active barrier layer (140) has a crystalline structure, wherein the first amorphous section (140a) and the second amorphous section (140b) of the active barrier layer (140) each have an amorphous structure, and where the charge carrier density of the channel section (140n) of the active barrier layer (140) is lower than the charge carrier density of the channel section (130n) of the first active layer (130), and the active barrier layer (140) further comprises: a first active barrier layer (141) that is in contact with the first active layer (130); and a second active barrier layer (142) which is in contact with the first active layer (130), wherein the first active barrier layer (141) and the second active barrier layer (142) are arranged on opposite sides of the first active layer (130).

Description

BACKGROUND OF THE INVENTION

[0001] The present disclosure relates to a thin-film transistor, a method for manufacturing the thin-film transistor and a display device comprising the thin-film transistor. DISCUSSION OF RELATED TECHNOLOGY

[0002] Since a thin-film transistor can be manufactured on a glass substrate or a plastic substrate, the thin-film transistor has been widely used as a switching element or driver element of a display device, such as a liquid crystal display device or an organic light-emitting device.

[0003] The thin-film transistor can be categorized based on the material from which the active layer is formed as an amorphous silicon thin-film transistor, in which amorphous silicon is used as the active layer, a polycrystalline silicon thin-film transistor, in which polycrystalline silicon is used as the active layer, and an oxide semiconductor thin-film transistor, in which an oxide semiconductor is used as the active layer.

[0004] Since amorphous silicon can be deposited quickly to form an active layer, amorphous silicon thin-film transistors (a-Si TFTs) have the advantage of short manufacturing times and low production costs. Conversely, amorphous silicon thin-film transistors have the disadvantage that their low mobility, poor current control, and threshold voltage fluctuations limit their use in active-matrix organic light-emitting devices (AMOLEDs).

[0005] Polycrystalline silicon thin-film transistors (poly-Si TFTs) are manufactured by crystallizing amorphous silicon after amorphous silicon has been deposited. Polycrystalline silicon thin-film transistors offer the advantages of high electron mobility, excellent stability, low thickness, high resolution, and high power efficiency. These polycrystalline silicon thin-film transistors are available in low-temperature polysilicon (LTPS) or polysilicon thin-film transistors. Because the manufacturing process for a polycrystalline silicon thin-film transistor requires a process in which amorphous silicon is crystallized, the manufacturing costs increase due to the greater number of processes involved, and the crystallization is carried out at a high process temperature.

[0006] An oxide semiconductor thin-film transistor (TFT), exhibiting high mobility and a large resistance change depending on the oxygen content, offers the advantage that the desired properties can be easily achieved. Furthermore, since the oxide forming the active layer can be grown at a relatively low temperature during the manufacturing process, the production costs of the oxide semiconductor thin-film transistor are reduced. Given the properties of oxide, such as the transparency of an oxide semiconductor, it is advantageous to create a transparent display.

[0007] To maximize the advantages of oxide semiconductor thin-film transistors, recent studies have focused on improving their stability and electrical properties compared to oxide thin-film transistors of related technologies. However, the fabrication of oxide thin-film transistors can involve complex manufacturing steps and increased costs, and damage to the active layer of the thin-film transistor can occur, potentially impacting the device's lifespan.

[0008] US 2013 / 0228775A1 describes a semiconductor device comprising at least one oxide semiconductor layer, a gate insulating layer in contact with the oxide semiconductor layer, and a gate electrode overlapping the oxide semiconductor layer, wherein the gate insulating layer is located between the oxide semiconductor layer and the gate electrode, and wherein the oxide semiconductor layer has a spin density of less than 9.3 × 10⁻⁶ 16 Spins / cm3 and a charge carrier density of less than 1×10 15 / cm 3 exhibits, wherein the spin density is calculated from a peak of a signal detected at a g-value (g) of approximately 1.93 by electron spin resonance spectroscopy, wherein the oxide semiconductor layer is formed by a sputtering process while the substrate side is biased and the self-biasing is controlled, and is subsequently subjected to heat treatment.

[0009] US 2013 / 0221345A1 describes a transistor comprising an oxide semiconductor layer, a source region, a drain region, and a channeling region over an insulating surface; a gate insulating layer over the oxide semiconductor layer; a gate electrode overlapping the channeling region over the gate insulating layer; a source electrode in contact with the source region; and a drain electrode in contact with the drain region, wherein the source region and the drain region have a section with a higher oxygen concentration than the channeling region.

[0010] US 2013 / 0264563A1 describes a semiconductor device comprising a transistor having an oxide semiconductor layer and a protective layer over the transistor, wherein an oxide insulating layer containing oxygen in an amount exceeding the stoichiometric composition is formed as the protective layer under the following conditions: a substrate placed in a treatment chamber evacuated to a vacuum level is maintained at a temperature greater than or equal to 180°C and less than or equal to 260°C; a source gas is introduced into the treatment chamber such that the pressure in the treatment chamber is set to greater than or equal to 100 Pa and less than or equal to 250 Pa; and a radio frequency power of greater than or equal to 0.17 W / cm² is applied to an electrode provided in the treatment chamber. 2 and less than or equal to 0.5 W / cm² 2 is supplied.

[0011] US 2018 / 0175077A1 describes a thin-film transistor substrate comprising a light-shielding layer, a buffer layer for covering the light-shielding layer, and a drive transistor fabricated on the buffer layer, overlapping the light-shielding layer, and provided for supplying a drive current to an organic light-emitting device. OVERVIEW OF THE REVELATION

[0012] The present disclosure was realized in consideration of the above problems, and it is an objective of the present disclosure to provide a thin-film transistor having an active layer that has both a crystalline section and an amorphous section.

[0013] One objective of the present disclosure is to provide a thin-film transistor having an amorphous section in which a section of a crystalline oxide semiconductor layer is amorphized by doping with a dopant.

[0014] Another objective of the present disclosure is to provide a method for manufacturing a thin-film transistor that has both a crystalline section and an amorphous section.

[0015] Another objective of the present disclosure is to provide a display device that exhibits excellent reliability by using the thin-film transistor as described above.

[0016] In addition to the objectives of the present disclosure mentioned above, further objectives and features of the present disclosure will be clearly understood by experts from the following description of the present disclosure.

[0017] Various aspects of the present disclosure provide a thin-film transistor according to claim 1, a method for fabricating a thin-film transistor according to claim 24, and a thin-film transistor according to claim 30. Further embodiments are described in the dependent claims. According to one aspect of the present disclosure, the above and other objectives can be achieved by providing a thin-film transistor comprising: an active layer, a gate electrode that at least partially overlaps the active layer, and a source electrode and a drain electrode that are spaced apart from each other and each connected to the active layer, wherein the active layer comprises a first active layer, the first active layer comprising: a channel section that overlaps the gate electrode, a first connection section that is connected to one side of the channel section,and a second connecting section that is connected to the other side of the channel section, wherein the channel section has a crystalline structure, the first connecting section has a first amorphous section that is in contact with the channel section, and the second connecting section has a second amorphous section that is in contact with the channel section. The active layer further comprises an active barrier layer that overlaps the first active layer and is in contact with the first active layer, wherein the active barrier layer comprises: a channel section that overlaps the gate electrode, a first amorphous section that is connected to one side of the channel section of the active barrier layer, and a second amorphous section that is connected to the other side of the channel section of the active barrier layer.wherein the channel section of the active barrier layer has a crystalline structure and both the first amorphous section and the second amorphous section of the active barrier layer have an amorphous structure. The channel section of the active barrier layer has a charge carrier density that is lower than the charge carrier density of the channel section of the first active layer. The active barrier layer comprises: a first active barrier layer in contact with the first active layer, and a second active barrier layer in contact with the first active layer, the second active barrier layer being arranged opposite the first active barrier layer.

[0018] The channel section of the first active layer can have at least one crystal structure selected from a cubic crystal structure, a bixbyite crystal structure, a cubic bixbyite crystal structure, a spinel crystal structure, a hexagonal crystal structure, and a wurtzite crystal structure.

[0019] The channel section of the first active layer may exhibit a cubic bixbyite crystal structure.

[0020] The channel section of the first active layer may have at least one (211) crystal plane, one (222) crystal plane and one (400) crystal plane.

[0021] The channel section of the first active layer may exhibit peaks in X-ray diffraction analysis (XRD) with respect to a (211) crystal plane, a (222) crystal plane and a (400) crystal plane.

[0022] The channel section of the first active layer can have a crystal plane that has an inclination angle of 30° to 60° with respect to a horizontal plane.

[0023] The first active layer can comprise an oxide semiconductor material and a crystallization control element distributed within the oxide semiconductor material.

[0024] The crystallization control element may comprise at least one of: beryllium (Be), boron (B), carbon (C), aluminum (Al), silicon (Si), iron (Fe), calcium (Ca), tin (Sn), titanium (Ti), tantalum (Ta), vanadium (V), yttrium (Y), zirconium (Zr), hafnium (Hf), lanthanum (La) and germanium (Ge).

[0025] The crystallization control element can be aluminum (Al).

[0026] The crystallization control element can have a content of 0.1 to 10 atomic percent (at%), based on the total number of atoms in the first active layer excluding oxygen.

[0027] The crystallization control element can have a content of 0.5 to 6 atomic percent (at%), based on the total number of atoms in the first active layer excluding oxygen.

[0028] The oxide semiconductor material may comprise at least one of: an IZO (InZnO)-based oxide semiconductor material, an IGO (InGaO)-based oxide semiconductor material, an IGZO (InGaZnO)-based oxide semiconductor material, an ITO (InSnO)-based oxide semiconductor material, an IGZTO (InGaZnSnO)-based oxide semiconductor material, an ITZO (InSnZnO)-based oxide semiconductor material, a ZnO-based oxide semiconductor material, and an FIZO (FeInZnO)-based oxide semiconductor material.

[0029] The first amorphous section and the second amorphous section may contain a dopant doped by ion injection.

[0030] The dopant may contain at least one of boron (B), phosphorus (P), fluorine (F) and hydrogen (H).

[0031] The first compound section of the first active layer may further include a first crystalline section in contact with the first amorphous section, and the second compound section of the first active layer may further include a second crystalline section in contact with the second amorphous section.

[0032] The first amorphous section can be located between the channel section and the first crystalline section, the second amorphous section can be located between the channel section and the second crystalline section, and the first crystalline section and the second crystalline section can have the same crystal structure as the channel section.

[0033] The first compound section may further include a third amorphous section that is in contact with the first crystalline section, and the first crystalline section may be arranged between the first amorphous section and the third amorphous section.

[0034] The second compound section may further include a fourth amorphous section that is in contact with the second crystalline section, and the second crystalline section may be arranged between the second amorphous section and the fourth amorphous section.

[0035] The source electrode can be located on the same layer as the gate electrode and connected to the first interconnect section, and the source electrode can overlap the first crystalline section but cannot overlap the first amorphous section of the first active layer.

[0036] The drain electrode can be placed on the same layer as the gate electrode and connected to the second junction section, and the drain electrode can overlap the second crystalline section but cannot overlap the second amorphous section of the first active layer.

[0037] The thin-film transistor can further have a first conductive pattern on the first crystalline section and a second conductive pattern on the second crystalline section, wherein the first conductive pattern cannot overlap with the first amorphous section and the second conductive pattern cannot overlap with the second amorphous section.

[0038] The active layer can further comprise an amorphous active layer that overlaps and is in contact with the first active layer, wherein the amorphous active layer comprises: a channel section that overlaps with the gate electrode, a first connection section that is connected to one side of the channel section of the amorphous active layer, and a second connection section that is connected to the other side of the channel section of the amorphous active layer, and wherein the channel section, the first connection section, and the second connection section of the amorphous active layer can each have an amorphous structure.

[0039] The channel section of the amorphous active layer can have a charge carrier density that is lower than a charge carrier density of the channel section of the first active layer.

[0040] The amorphous active layer can have a thickness of 1 to 5 nm.

[0041] The first active layer can be located between the amorphous active layer and the gate electrode.

[0042] The amorphous active layer can be positioned between the first active layer and the gate electrode.

[0043] The amorphous active layer can include: a first amorphous active layer in contact with the first active layer, and a second amorphous active layer in contact with the first active layer, which is arranged opposite the first amorphous active layer.

[0044] The active barrier layer can have a thickness of 5 to 30 nm.

[0045] The first active layer can be located between the active barrier layer and the gate electrode.

[0046] The active barrier layer can be positioned between the first active layer and the gate electrode.

[0047] The active barrier layer may further comprise a first crystalline section that is in contact with the first amorphous section, and the first amorphous section may be arranged between the channel section and the first crystalline section of the active barrier layer.

[0048] The active barrier layer may further comprise a second crystalline section that is in contact with the second amorphous section of the active barrier layer, and the second amorphous section of the active barrier layer may be arranged between the channel section and the second crystalline section of the active barrier layer.

[0049] The active barrier layer may further comprise a third amorphous section that is in contact with the first crystalline section of the active barrier layer, and the first crystalline section of the active barrier layer may be arranged between the first amorphous section and the third amorphous section of the active barrier layer.

[0050] The active barrier layer may further comprise a fourth amorphous section that is in contact with the second crystalline section of the active barrier layer, and the second crystalline section of the active barrier layer may be arranged between the second amorphous section and the fourth amorphous section of the active barrier layer.

[0051] The active layer also has an active barrier layer, which is arranged opposite the amorphous active layer in such a way that it overlaps and is in contact with the first active layer.

[0052] Another embodiment of the present disclosure provides a thin-film transistor substrate comprising: a base substrate, a light barrier layer on the base substrate, the thin-film transistor described above, wherein the thin-film transistor is arranged on the light barrier layer, and a capacitor connected to the light barrier layer, wherein the capacitor has a first capacitor electrode and a second capacitor electrode, the first capacitor electrode being formed integrally with the light barrier layer, and the second capacitor electrode being arranged on the same layer as the active layer.

[0053] The second capacitor electrode may have a layer that has an amorphous structure.

[0054] The second capacitor electrode may have a layer that has a crystalline structure.

[0055] The second capacitor electrode may also have a conductive pattern arranged on the layer with the crystalline structure.

[0056] The capacitor may further have a third capacitor electrode on top of a second capacitor electrode, and the third capacitor electrode may be located on the same layer as the source electrode and the drain electrode.

[0057] The capacitor may furthermore have a third capacitor electrode on top of the second capacitor electrode, and the third capacitor electrode may be located on the same layer as the gate electrode.

[0058] Another embodiment of the present disclosure provides a display device comprising the thin-film transistor.

[0059] According to another aspect of the present disclosure, the above and other objectives can be achieved by providing a method for fabricating the thin-film transistor described above, which comprises: forming an active layer on a substrate, forming a gate insulating layer on the active layer, forming a gate electrode on the gate insulating layer, and selectively doping the active layer with a dopant, wherein the formation of the active layer comprises: forming a first oxide semiconductor material layer using a crystalline oxide semiconductor material, forming an active pattern by structuring the first oxide semiconductor material layer, and forming a first active layer having a crystalline active pattern by heat-treating the active pattern, and wherein a doped region in the active layer has an amorphous structure.

[0060] The first oxide semiconductor material layer can include an oxide semiconductor material and a crystallization control element.

[0061] The crystallization control element may comprise at least one of: beryllium (Be), boron (B), carbon (C), aluminum (Al), silicon (Si), iron (Fe), calcium (Ca), titanium (Ti), tantalum (Ta), vanadium (V), yttrium (Y), zirconium (Zr), hafnium (Hf), lanthanum (La) and germanium (Ge).

[0062] The formation of the active layer can further involve the formation of an amorphous oxide semiconductor material layer using an amorphous oxide semiconductor material.

[0063] The formation of the active layer can further involve the formation of a barrier oxide semiconductor material layer using a crystalline oxide semiconductor material. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] The above and other objectives, features and other advantages of the present disclosure will be more clearly understood from the following detailed description in conjunction with the accompanying drawings, in which: Fig. 1. A cross-sectional view of a thin-film transistor according to a comparative example is shown. Fig. 2 a schematic representation of a cubic bixbyite crystal structure according to an embodiment of the present disclosure is, Fig. 3 a graphical representation of an X-ray diffraction (XRD) analysis of a channel section of a first active layer according to an embodiment of the present disclosure, Fig. 4 a transmission electron microscope (TEM) photograph of a channel section of a first active layer according to an embodiment of the present disclosure is, Fig. 5 is a cross-sectional view of a thin-film transistor according to another comparison example, Fig. 6 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 7 is a cross-sectional view of a thin-film transistor according to another comparison example, Fig. 8 is a cross-sectional view of a thin-film transistor according to another comparison example, Fig. 9 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 10. A cross-sectional view of a thin-film transistor according to another comparative example is shown. Fig. 11 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 12 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 13 a cross-sectional view of a thin-film transistor according to another embodiment of the present disclosure is, Fig. 14 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 15 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 16 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 17 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 18 is a cross-sectional view of a thin-film transistor according to another comparative example, Fig. 19 a cross-sectional view of a thin-film transistor substrate according to another comparative example is, Fig. 20 is a cross-sectional view of a thin-film transistor substrate according to another comparative example, Fig. 21 is a cross-sectional view of a thin-film transistor substrate according to another comparative example, Fig. 22 is a cross-sectional view of a thin-film transistor substrate according to another comparative example, Fig. 23 a cross-sectional view of a thin-film transistor substrate according to another comparative example is, Fig. 24 a schematic view of a display device according to another embodiment of the present disclosure, Fig. 25 a circuit diagram of any pixel from Fig. 24 according to an embodiment of the present disclosure, Fig. 26 a top view of a pixel from Fig. 25 according to an embodiment of the present disclosure, Fig. 27 a cross-sectional view along line II' of Fig. 26 according to an embodiment of the present disclosure, Fig. 28 a circuit diagram of any pixel of a display device according to another embodiment of the present disclosure is, Fig. 29 a circuit diagram of any pixel of a display device according to another embodiment of the present disclosure is and Fig. 30 is a circuit diagram of any pixel of a display device according to another embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EXECUTION FORMS

[0065] The advantages and features of the present disclosure and its implementation methods are illustrated by the following embodiments, which are described with reference to the accompanying drawings. However, the present disclosure can be embodied in various forms and should not be understood as being limited to the embodiments set forth herein. Rather, these embodiments are provided to ensure that this disclosure is thorough and complete and fully conveys the scope of the present disclosure to the person skilled in the art.

[0066] A shape, size, ratio, angle, and number shown in the drawings to describe embodiments of this disclosure are merely examples, and therefore this disclosure is not limited to the details shown. The same reference numerals refer to the same elements throughout the entire description. In the following description, if it is determined that a detailed description of the relevant known function or configuration would unnecessarily obscure the important point of this disclosure, the detailed description will be omitted.

[0067] In a situation where the terms “exhibit”, “have”, and “contain” described in the present disclosure are used, a further part may be added unless “only” is used. The singular form may also include the plural form unless otherwise indicated.

[0068] When interpreting an element, it is assumed that the element has an error area, even if it is not explicitly described.

[0069] When describing a positional relationship, e.g., when the positional relationship is described as "on", "above", "below" and "next to", one or more sections may be placed between two other sections unless "immediately" or "directly" is used.

[0070] Spatially relative terms such as "under," "below," "below," "above," and "above" may be used here to simply describe the relationship of one or more elements to another element or elements, as shown in the drawings. It is understood that these terms are intended to encompass various orientations of the device in addition to the orientation shown in the drawings. For example, if the device shown in the drawing is inverted, the device described as "under" or "below" another device may also be positioned "above" another device. Therefore, an exemplary term "under" or "below" may include both "under" and "above" orientations. Likewise, an exemplary term "above" or "on" may include both "above" and "under" orientations.

[0071] When describing a temporal relationship, e.g., when the temporal sequence is described with "after", "subsequently", "afterwards" and "before", a non-continuous situation may exist unless "straight ahead" or "directly" is used.

[0072] It goes without saying that, although the terms "first," "second," etc., may be used here to describe different elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element could be called a second element, and similarly, a second element could be called a first element, without departing from the scope of the present revelation.

[0073] It should be understood that the term "at least one" includes all combinations relating to any element. For example, "at least one of a first element, a second element, and a third element" can include all combinations of two or more elements selected from the first, second, and third elements, as well as each element of the first, second, and third elements.

[0074] Features of different embodiments of the present disclosure can be partially or completely linked or combined with one another and can interact and be technically controlled in various ways, as a person skilled in the art can reasonably understand. The embodiments of the present disclosure can be carried out independently of one another or in a dependent relationship with one another.

[0075] When adding reference numerals to the components of each drawing that describes embodiments of the present disclosure, the same components may have the same sign as can be shown in the other drawings.

[0076] In the embodiments of the present disclosure, for the sake of simplicity, a distinction is made between a source electrode and a drain electrode, and the source electrode and the drain electrode can be interchangeable. The source electrode can be the drain electrode and vice versa. Furthermore, the source electrode of any embodiment can be a drain electrode in another embodiment, and the drain electrode of any embodiment can be a source electrode in another embodiment.

[0077] In some embodiments of the present disclosure, for the sake of simplicity, a source region is distinguished from a source electrode and a drain region from a drain electrode, but the embodiments of the present disclosure are not limited thereto. The source region can be the source electrode, and the drain region can be the drain electrode. Furthermore, the source region can be the drain electrode and the drain region can be the source electrode.

[0078] Fig. Figure 1 is a cross-sectional view of a thin-film transistor 100 according to a comparative example.

[0079] The thin-film transistor 100 according to the comparative example of the present disclosure comprises: an active layer ACT on the substrate 110, a gate electrode 150 which overlaps at least partially with the active layer ACT, and a source electrode 160 and a drain electrode 170 which are separate from each other and each connected to the active layer. The active layer ACT has a channel section CN, a first connection section CON1 which is connected to one side of the channel section CN, and a second connection section CON2 which is connected to the other side of the channel section CN. The channel section CN overlaps with the gate electrode 150.

[0080] The thin-film transistor 100 can be arranged on the substrate 110. As long as a layer or element carries the thin-film transistor 100, it can be referred to as the substrate 110 without restriction.

[0081] Glass or plastic can be used as substrate 110. Transparent plastics with flexible properties, such as polyimide, can be used. If polyimide is used as substrate 110, heat-resistant polyimide can be used, as it can withstand high temperatures, given that a high-temperature deposition process is carried out on the substrate 110.

[0082] The light barrier layer 111 can be arranged on the substrate 110. The light barrier layer 111 overlaps with the channel section CN. The light barrier layer 111 blocks externally incident light to protect the channel section CN.

[0083] The light-blocking layer 111 can be made of a material that has light-blocking properties. The light-blocking layer 111 can contain at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); titanium (Ti); and iron (Fe). The light-blocking layer 111 can be electrically conductive.

[0084] The light barrier layer 111 can be electrically connected to the source electrode 160 or the drain electrode 170. The light barrier layer 111 can also be omitted.

[0085] A buffer layer 112 is arranged on the light barrier layer 111. The buffer layer 112 can be formed from an insulating material. For example, the buffer layer 112 can comprise at least one of several different insulating materials, such as silicon oxide, silicon nitride, and metal-based oxide. The buffer layer 112 can have a single-layer or a multi-layer structure.

[0086] The buffer layer 112 can protect the active layer ACT by blocking air and moisture. Furthermore, the buffer layer 112 can make the surface of the upper part of the substrate 110, on which the light-blocking layer 111 is located, uniform or planar.

[0087] The active layer ACT is located on the buffer layer 112.

[0088] The active layer (ACT) can be made of a semiconductor material. For example, the active layer (ACT) can consist of an oxide semiconductor layer.

[0089] As in Fig. As shown in Figure 1, the active layer ACT has a first active layer 130. Fig. Figure 1 shows a structure in which the active layer ACT is formed by the first active layer 130. The first active layer 130 is an oxide semiconductor layer.

[0090] The first active layer 130 can have an oxide semiconductor material and a crystallization control element distributed in the oxide semiconductor material.

[0091] The first active layer 130 can comprise a crystalline oxide semiconductor material. The oxide semiconductor material contained in the first active layer 130 can, for example, comprise at least one of the following: an IZO (InZnO)-based oxide semiconductor material, an IGO (InGaO)-based oxide semiconductor material, an IGZO (InGaZnO)-based oxide semiconductor material, an ITO (InSnO)-based oxide semiconductor material, an IGZTO (InGaZnSnO)-based oxide semiconductor material, an ITZO (InSnZnO)-based oxide semiconductor material, a ZnO-based oxide semiconductor material, and a FIZO (FeInZnO)-based oxide semiconductor material. The first active layer 130 can also be made of other oxide semiconductor materials with crystallinity and high mobility.

[0092] For example, an indium-based oxide semiconductor material with an indium (In) content of 50% or more, based on the number of atoms, can be used as the oxide semiconductor material for forming the first active layer 130. For instance, the first active layer 130 can comprise at least one of the following: an IZO (InZnO)-based oxide semiconductor material, an IGO (InGaO)-based oxide semiconductor material, an IGZO (InGaZnO)-based oxide semiconductor material, and an ITO (InSnO)-based oxide semiconductor material, each with an indium (In) content of 50% or more, based on the total number of metal elements.

[0093] More precisely, the following oxide semiconductor materials can be used to form the first active layer 130: an IZO (InZnO)-based oxide semiconductor material having an indium (In:Zn) to zinc (Zn) ratio of 5:5, 6:4, 7:3, 8:2, or 9:1; an IGO (InGaO)-based oxide semiconductor material with an indium (In) to gallium (Ga) ratio of 7:3, 8:2, or 9:1; an IGZO (InGaZnO)-based oxide semiconductor material where the indium (In) to zinc (Zn) + gallium (Ga) ratio [In:(Zn + Ga)] is 5:5, 6:4, 7:3, or 8:2; and an ITO (InSnO)-based oxide semiconductor material having a The ratio of indium (In) to tin (Sn) (In:Sn) is 5:5, 6:4, 7:3, 8:2 or 9:1.

[0094] Since the first active layer 130 has a high concentration of indium (In), the channel section CN can exhibit high mobility, and the thin-film transistor 100 can have excellent electrical properties. For example, the first active layer 130 can have a mobility of 40 cm. 2 exhibit / V·s or more.

[0095] Indium (In) is present in a high concentration in the first active layer 130, but since the first active layer 130 has both crystalline and amorphous sections, the thin-film transistor 100 can exhibit excellent driver stability and reliability.

[0096] The first active layer 130 can have a crystallization control element distributed in an oxide semiconductor material.

[0097] The crystallization control element may comprise at least one of: beryllium (Be), boron (B), carbon (C), aluminum (Al), silicon (Si), iron (Fe), calcium (Ca), tin (Sn), titanium (Ti), tantalum (Ta), vanadium (V), yttrium (Y), zirconium (Zr), hafnium (Hf), lanthanum (La) and germanium (Ge).

[0098] The crystallization control element is an element that exhibits a strong bonding force with oxygen and can delay the crystallization rate of the first active layer 130. The first active layer 130 can be formed by deposition and structuring, and the crystallization control element prevents the crystallization of the first active layer 130 during the deposition process, thereby preventing the structuring of the first active layer 130.

[0099] In contrast, the crystallization control element does not prevent the crystallization of the first active layer 130 by heat treatment. Consequently, the first active layer 130 can be crystallized in a heat treatment process after structuring to form the first active layer 130.

[0100] Aluminum (Al) can be used as a crystallization control element. If the first active layer 130 contains a small amount of aluminum (Al), crystallization of the first active layer 130 during the deposition process can be prevented, and the first active layer 130 can be crystallized by the heat treatment process.

[0101] The crystallization control element can have a concentration of 0.1 to 10 atomic percent (at%) relative to the total atoms of the first active layer 130, excluding oxygen. If the concentration of the crystallization control element is less than 0.1 atomic percent (at%) relative to the total number of atoms of the first active layer 130, excluding oxygen, its effect in preventing crystallization during the deposition process may be insufficient, and crystallization may occur during deposition. Consequently, difficulties in structuring may arise after the deposition of the oxide semiconductor material to form the first active layer 130. In other words, if crystallization occurs during the deposition process, selectively structuring sections of the first active layer 130 in a subsequent structuring step may be difficult or costly.

[0102] In contrast, it may happen that the first active layer 130 does not crystallize or that the crystallization rate decreases due to excessive crystallization control elements if the content of the crystallization control element exceeds 10 atomic percent (at%) in relation to the total number of atoms of the first active layer 130 excluding oxygen.

[0103] Specifically, the crystallization control element can have a content of 0.5 to 6 atom% (at%) in relation to the total number of atoms of the first active layer without oxygen.

[0104] The active layer ACT of the thin-film transistor 100 has a channel section CN, a first connection section CON1 and a second connection section CON2. With reference to Fig. 1. An active layer ACT can be formed from the first active layer 130.

[0105] The first active layer 130 can be made of a crystalline oxide semiconductor material. A specific section of the first active layer 130 can be made selectively conductive, and the selectively conductive section can exhibit excellent electrical conductivity to serve as a connection section. Furthermore, the selectively conductive section can have an amorphous structure.

[0106] Selective conductivity (e.g., selective generation of conductivity) refers to improving the conductivity of a selected region of the first active layer 130 or providing conductivity to the selected region. Selective conductivity can be achieved by doping with a dopant in a selected region. Furthermore, the first and second amorphous regions 130a and 130b can be formed by dopant doping, dopant injection, or injection of dopant ions.

[0107] Doping can be achieved by injection of dopant ions. The first amorphous section 130a and the second amorphous section 130b can contain a dopant doped by ion implantation.

[0108] The dopant may contain at least one compound consisting of boron (B), phosphorus (P), fluorine (F) and hydrogen (H).

[0109] The first active layer 130 is formed by a crystalline oxide semiconductor material, and selected sections of the first active layer 130 are doped by dopant injection or ion injection, so that the first amorphous section 130a and the second amorphous section 130b can be formed. Ion injection means the injection or implantation of dopant ions.

[0110] The first amorphous section 130a and the second amorphous section 130b, formed by doping with dopants, are conductive sections (e.g., made conductive sections) and can exhibit excellent electrical conductivity. Consequently, the first amorphous section 130a can be a first compound section CON1, and the second amorphous section 130b can be a second compound section CON2.

[0111] In this configuration, as it is in Fig. As shown in Figure 1, the first active layer 130 can have a channel section 130n, a first connection section CON1 and a second connection section CON2.

[0112] The channel section 130n of the first active layer 130 is a region that overlaps with the gate electrode 150. The first connection section CON1 is connected to one side of the channel section 130n, and the second connection section CON2 is connected to the other side of the channel section 130n. Furthermore, the first connection section CON1 of the first active layer 130 can include the first amorphous section 130a, and the second connection section CON2 can include the second amorphous section 130b.

[0113] Each of the first amorphous section 130a and the second amorphous section 130b can be a section containing more dopants than the channel section 130n. For example, the first amorphous section 130a and the second amorphous section 130b can be more conductive or have a lower resistance than the channel section 130n.

[0114] A section of the first active layer 130 that is not doped with dopants and is not made conductive can be the channel section 130n.

[0115] As in Fig. As shown in Figure 1, doping can be carried out using the gate electrode 150 as a mask, so that a section of the first active layer 130, which overlaps the gate electrode 150, does not need to be doped to become a channel section 130n.

[0116] Doping with a dopant can make the boundary of the 130n channel section more clearly or better defined. Furthermore, doping can improve the electrical connection properties between the source electrode 160 and the 130n channel section, and between the drain electrode 170 and the 130n channel section.

[0117] Since the active layer ACT is formed by the first active layer 130, the channel section 130n of the first active layer 130 becomes the channel section CN of the active layer ACT, the first amorphous section 130a of the first active layer 130 becomes the first connecting section CON1 of the active layer ACT, and the second amorphous section 130b of the first active layer 130 becomes the second connecting section CON2 of the active layer ACT.

[0118] By selective conductivity (e.g. selective production of conductivity) of the first active layer 130, the channel section 130n, the first connecting section and the second connecting section can be distinguished from each other.

[0119] The channel section 130n of the first active layer 130 overlaps with the gate electrode 150. The channel section 130n is a non-conductive section, or the channel section 130n may be less conductive than the first amorphous section 130a and the second amorphous section 130b.

[0120] The first active layer 130 can be formed from a crystalline oxide semiconductor material, and the non-conductive channel section 130n (e.g. the non-conductive channel section 130n) can have a crystalline structure.

[0121] The 130n channel section, which has a crystalline structure, exhibits excellent physical and chemical stability. Consequently, damage to the 130n channel section or changes in its physical properties during the manufacturing and use of the 100-thin-film transistor can be prevented. Therefore, the 100-thin-film transistor exhibits excellent driver stability and its lifespan can be extended.

[0122] The channel section 130n of the first active layer 130 can have at least one structure consisting of: a cubic crystal structure, a bixbyite crystal structure, a cubic bixbyite crystal structure, a spinel crystal structure, a hexagonal crystal structure and a wurtzite crystal structure.

[0123] In particular, channel section 130n of the first active layer 130 may, for example, exhibit a cubic bixbyite crystal structure.

[0124] Fig. Figure 2 is a schematic representation of a cubic bixbyite crystal structure.

[0125] Referring to Fig. 2 is an oxygen atom O arranged within an octahedron formed by a metal atom M contained in the first active layer 130, and a metal atom M is arranged within a tetrahedron formed by the oxygen atom O to form a cubic bixbyite crystal structure.

[0126] According to one embodiment of this disclosure, a cubic bixbyite crystal structure can be formed by metal atoms and oxygen atoms present in the first active layer 130, and the crystallization control element can be distributed in a low concentration within the cubic bixbyite crystal structure. Therefore, the channel section 130n of the first active layer 130 can have a crystallization control element distributed within the cubic bixbyite crystal structure, and the cubic bixbyite crystal structure is formed by metal atoms and oxygen atoms.

[0127] According to one embodiment of the present disclosure, the channel section 130n of the first active layer 130 can have a crystal plane. The channel section 130n of the first active layer 130 can have at least one of the following planes: a (211) crystal plane, a (222) crystal plane, and a (400) crystal plane. For example, the channel section 130n of the first active layer 130 can have a (222) crystal plane.

[0128] Fig. Figure 3 is a graphical representation of the X-ray diffraction analysis (XRD) of channel section 130n of the first active layer 130.

[0129] According to one embodiment of the present disclosure, if X-ray diffraction analysis (XRD) is performed in a diffraction angle (2θ) range of 10° to 50°, an XRD graphical representation can be obtained which has peaks that correspond to the crystal planes. In the Fig. In the graphic representation of the X-ray diffraction analysis (XRD) shown in Figure 3, peaks can be seen that correspond to the (211) crystal plane, the (222) crystal plane, and the (400) crystal plane. Accordingly, the channel segment 130n of the first active layer 130 can exhibit a (211) crystal plane, a (222) crystal plane, and a (400) crystal plane.

[0130] Furthermore, the peak of the (222) crystal plane is the largest in the graphical representation of the X-ray diffraction analysis (XRD) for channel segment 130n of the first active layer 130, as in Fig. Figure 3 shows that the (222) crystal plane is mainly formed in channel section 130n of the first active layer 130. For example, the number of sections within channel section 130n exhibiting the (222) crystal plane may be greater than the number of sections within channel section 130n exhibiting the (400) crystal plane, and the number of sections within channel section 130n exhibiting the (400) crystal plane may be greater than the number of sections within channel section 130n exhibiting the (221) crystal plane.

[0131] Fig. Figure 4 is a transmission electron microscope (TEM) image of channel section 130n of the first active layer 130.

[0132] In Fig. Figure 4 shows that the channel section 130n of the first active layer 130 has a crystal plane with an inclination angle of 30° to 60° to the horizontal surface (e.g., 45°). According to one embodiment of the present disclosure, the horizontal plane is a plane parallel to the upper surface of the channel section 130n of the first active layer 130. According to another embodiment of the present disclosure, the horizontal plane can run parallel to the lower surface of the gate electrode 150. Fig. 4 indicates the direction of the tilt as "DC".

[0133] Referring to Fig. A gate insulating layer 151 is arranged on the first active layer 130, which is the active layer ACT of the thin-film transistor 100. The gate insulating layer 151 can comprise at least one of the following: silicon oxide, silicon nitride, and a metal-based oxide. The gate insulating layer 151 can have a single-layer or multi-layer structure. The gate insulating layer 151 protects the channel section CN.

[0134] As in Fig. As shown in Figure 1, the gate insulating layer 151 can be formed integrally / in one piece on the substrate 110. For example, the gate insulating layer 151 can cover the entire channel section CN, the first connection section CON1 and the second connection section CON2, with the exception of the contact area (e.g., where the contact holes are located).

[0135] However, one embodiment of the present disclosure is not limited thereto, and the gate insulating layer 151 may be structured. For example, the gate insulating layer 151 may be structured in a shape corresponding to the gate electrode 150. For example, the length of the gate insulating layer 151 may be equal to the length of the gate electrode 150.

[0136] The gate electrode 150 is located on the gate insulating layer 151. The gate electrode 150 overlaps with the channel section 130n of the first active layer 130, which is the channel section CN of the thin-film transistor 100.

[0137] The gate electrode 150 can comprise at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). Each of the gate electrodes 150 can have a multilayer structure comprising at least two conductive layers with different physical properties.

[0138] In Fig. An intermediate insulating layer 152 is arranged on the gate insulating layer 151 and the gate electrode 150. The intermediate insulating layer 152 is an insulating layer made of an insulator. The intermediate insulating layer 152 can be made of an organic material, an inorganic material, or a laminate consisting of a layer of organic material and a layer of inorganic material. The source electrode 160 and the drain electrode 170 can be arranged on the intermediate insulating layer 152.

[0139] The source electrode 160 and the drain electrode 170 can each comprise at least one of the following: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys. The source electrode 160 and the drain electrode 170 can each be formed from a single layer of a metal or metal alloy or from two or more layers.

[0140] According to one embodiment of the present disclosure, the source electrode 160 can be connected to the first connection section CON1. ​​In particular, the source electrode 160 can be electrically connected to the first amorphous section 130a of the first active layer 130 through a contact hole. Consequently, the source electrode 160 can be connected to the active layer ACT to transmit an electrical signal to the channel section CN.

[0141] The drain electrode 170 can be positioned at a distance from the source electrode 160 and connected to the second connection section CON2. In particular, the drain electrode 170 can be electrically connected to the second amorphous section 130b of the first active layer 130 via a contact hole. Consequently, the drain electrode 170 can be connected to the active layer ACT to transmit an electrical signal to the channel section CN.

[0142] In the thin-film transistor 100 according to Fig. 1. The first amorphous section 130a, which is in contact with the channel section 130n of the first active layer 130, can be the first connection section CON1. ​​Furthermore, the second amorphous section 130b, which is in contact with the channel section 130n of the first active layer 130, can be the second connection section CON2.

[0143] According to one embodiment of the present disclosure, the first connection section CON1 of the active layer ACT can be a source region, and the second connection section CON2 can be a drain region. According to one embodiment of the present disclosure, the first connection section CON1 can serve as the source electrode, and the second connection section CON2 can serve as the drain electrode. The first connection section CON1 and the second connection section CON2 can be interchangeable.

[0144] Fig. Figure 5 is a cross-sectional view of a thin-film transistor 200 according to another comparative example.

[0145] Referring to Fig. Figure 5 shows an active layer ACT of the thin-film transistor 200, and according to another comparative example, a first active layer 130. The first active layer 130 becomes the active layer ACT of the thin-film transistor 200.

[0146] The first interconnection section CON1 of the first active layer 130 can further comprise a first crystalline section 130c in contact with the first amorphous section 130a. Furthermore, the second interconnection section CON2 of the first active layer 130 can comprise a second crystalline section 130d in contact with the second amorphous section 130b. The first amorphous section 130a can be located between the channel section 130n and the first crystalline section 130c. The second amorphous section 130b can be located between the channel section 130n and the second crystalline section 130d.

[0147] The first crystalline section 130c and the second crystalline section 130d are sections that are not doped during the doping process of the first active layer 130. More precisely, the dopant is blocked by the source electrode 160 and the drain electrode 170 during the doping process of the first active layer 130, allowing the undoped section to become the first crystalline section 130c and the second crystalline section 130d. The first crystalline section 130c and the second crystalline section 130d can have the same crystal structure as the channel section 130n. For example, the source electrode 160, the drain electrode 170, and the gate electrode 150 can be used as a mask during the doping process.

[0148] The first crystalline section 130c can overlap with the source electrode 160, and the second crystalline section 130d can overlap with the drain electrode 170. The first crystalline section 130c can overlap with the drain electrode 170, and the second crystalline section 130d can overlap with the source electrode 160.

[0149] In Fig. 5. The first crystalline section 130c overlaps with the source electrode 160. When forming a contact hole connecting the source electrode 160 and the first connecting section CON1, the first crystalline section 130c can be conductive (e.g., made conductive). Therefore, since the electrical contact between the source electrode 160 and the first crystalline section 130c is established smoothly / without problems, the electrical contact between the source electrode 160 and the first connecting section CON1 can be established smoothly / without problems.

[0150] Referring to Fig. 5. The second crystalline section 130d overlaps with the drain electrode 170. When forming a contact hole connecting the drain electrode 170 and the second connecting section CON2, the second crystalline section 130d can be conductive (e.g., made conductive). Therefore, since the electrical contact between the drain electrode 170 and the second crystalline section 130d is established smoothly / without problems, the electrical contact between the drain electrode 170 and the second connecting section CON2 can be established smoothly / without problems.

[0151] The first compound section CON1 can further comprise a third amorphous section 130e, which is in contact with the first crystalline section 130c. As in Fig. As shown in Figure 1, the first crystalline section 130c can be arranged between the first amorphous section 130a and the third amorphous section 130e.

[0152] As in Fig. As shown in Figure 5, the third amorphous section 130e does not overlap with the gate electrode 150, the source electrode 160 and the drain electrode 170.

[0153] The second compound section CON2 can further comprise a fourth amorphous section 130f, which is in contact with the second crystalline section 130d. The second crystalline section 130d can be arranged between the second amorphous section 130b and the fourth amorphous section 130f.

[0154] Referring to Fig. 5 the fourth amorphous section 130f does not overlap with the gate electrode 150, the source electrode 160 and the drain electrode 170.

[0155] Referring to Fig. 5. The first compound section CON1 can have a first amorphous section 130a, a first crystalline section 130c, and a third amorphous section 130e. The second compound section CON2 can have a second amorphous section 130b, a second crystalline section 130d, and a fourth amorphous section 130f.

[0156] Referring to Fig. In Figure 5, the source electrode 160 and the drain electrode 170 are arranged on the gate insulating layer 151. The source electrode 160 and the drain electrode 170 can be arranged on the same layer as the gate electrode 150. The source electrode 160 and the drain electrode 170 can be made of the same material as the gate electrode 150 and by the same process.

[0157] Referring to Fig. 5. The source electrode 160 overlaps with the first crystalline section 130c and not with the first amorphous section 130a. Furthermore, the source electrode 160 does not overlap with the third amorphous section 130e. The first active layer 130 becomes the first crystalline section 130c, where dopant doping by the source electrode 160 is blocked during the doping process.

[0158] Referring to Fig. 5. The drain electrode 170 overlaps the second crystalline section 130d and does not overlap with the second amorphous section 130b. Furthermore, the drain electrode 170 does not overlap with the fourth amorphous section 130f. The area where dopant doping is blocked by the drain electrode 170 during the doping process becomes the second crystalline section 130d from the first active layer 130.

[0159] Fig. Figure 6 is a cross-sectional view of a 300 mm thin-film transistor according to another comparison example. Compared to the 200 mm thin-film transistor from Fig. 5 indicates the first active layer 130 in the thin-film transistor 300 of Fig. 6. A multilayer structure. Consequently, the active layer ACT can have a multilayer structure (e.g., a bilayer structure).

[0160] As in Fig. As shown in Figure 6, the first active layer 130 has a first oxide semiconductor layer 131 and a second oxide semiconductor layer 132 on the first oxide semiconductor layer 131. The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 can have the same semiconductor material or different semiconductor materials.

[0161] The first oxide semiconductor layer 131 supports the second oxide semiconductor layer 132. Accordingly, the first oxide semiconductor layer 131 is also referred to as the support layer. The main channel section can be formed on the second oxide semiconductor layer 132. Therefore, the second oxide semiconductor layer 132 can be referred to as the "channel layer". A main channel section can be formed on the first oxide semiconductor layer 131.

[0162] Both the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 can exhibit crystallinity. The active layer ACT, or the first active layer 130, has a structure consisting of two layers and is also referred to as a two-layer structure or double-layer structure.

[0163] Fig. Figure 7 is a cross-sectional view of a 400 mm thin-film transistor according to another comparison example. The 400 mm thin-film transistor from Fig. 7 exhibits a first conductive pattern 165 on the first crystalline section 130c and a second conductive pattern 175 on the second crystalline section 130d.

[0164] The first conductive pattern 165 and the second conductive pattern 175 can, for example, contain metal. More specifically, the first conductive pattern 165 and the second conductive pattern 175 can each contain aluminum (Al), titanium (Ti), molybdenum (Mo), calcium (Ca), barium (Ba), copper (Cu), etc. The first conductive pattern 165 and the second conductive pattern 175 can exhibit reducing properties. For example, each of the first conductive pattern 165 and the second conductive pattern 175 can be a metal pattern made of a metal such as aluminum (Al), titanium (Ti), molybdenum (Mo), calcium (Ca), barium (Ba), copper (Cu), or an alloy thereof. Both the first conductive pattern 165 and the second conductive pattern 175 can be made of transparent conductive oxide (TCO). The transparent conductive oxide (TCO) can, for example,at least one of the following must be present: an IZO (InZnO)-based conductive material, an ITO (InSnO)-based conductive material, and an Fe-IZO (FeInZnO)-based conductive material. The transparent conductive oxide (TCO) can have a higher charge carrier density than the oxide semiconductor material and can, for example, have a charge carrier density of 1 × 10⁻⁶. 20 / cm 3 or higher.

[0165] The first conductive pattern 165 does not overlap with the first amorphous section 130a.

[0166] The first conductive pattern 165 can be arranged on the first crystalline section 130c in contact with it. During the doping process for the first active layer 130, the first conductive pattern 165 can block the dopant, preventing the first crystalline section 130c from amorphizing and allowing its crystallinity to be maintained. For example, if the first conductive pattern 165 is a metal pattern, it can effectively block the dopant, preventing the first crystalline section 130c from amorphizing and allowing it to retain its crystallinity. However, if the first conductive pattern 165 is formed from transparent conductive oxide (TCO), the dopant can pass through the first conductive pattern 165, and as a result, the first crystalline section 130c may become partially or completely amorphous.In this case, a structure can be obtained in which the first conductive pattern 165 overlaps an amorphous section of the first active layer 130.

[0167] The second conductive pattern 175 does not overlap with the second amorphous section 130b.

[0168] The second conductive pattern 175 can be arranged on the second crystalline section 130d in contact with it. During the doping process for the first active layer 130, the second conductive pattern 175 can block the dopant, preventing the second crystalline section 130d from amorphizing and preserving its crystallinity. For example, if the second conductive pattern 175 is a metal pattern, it can effectively block the dopant, preventing the second crystalline section 130d from amorphizing and preserving its crystallinity. However, if the second conductive pattern 175 is composed of transparent conductive oxide (TCO), the dopant can pass through it, and as a result, the second crystalline section 130d may become partially or completely amorphous.In this case, a structure can be obtained in which the second conductive pattern 175 overlaps an amorphous section of the first active layer 130.

[0169] The first conductive pattern 165 can be in contact with the source electrode 160, and the second conductive pattern 175 can be in contact with the drain electrode 170.

[0170] From the first active layer 130, the first crystalline section 130c, which is spaced apart from the channel section 130n and is in contact with the first conductive pattern 165, and the second crystalline section 130d, which is spaced apart from the channel section 130n and is in contact with the second conductive pattern 175, can each be reduced to have excellent electrical conductivity.

[0171] In particular, when a section of the first active layer 130, which is in contact with the first conductive pattern 165 and the second conductive pattern 175, is reduced, oxygen defects occur in the contact section, thereby improving the electrical conductivity and producing the same effect as in the creation of conductivity. As a result, a smooth electrical connection can be established between the source electrode 160 and the channel section 130n, as well as between the drain electrode 170 and the channel section 130n. Furthermore, the first conductive pattern 165 can have the same length as the first crystalline section 130c, and the second conductive pattern 175 can have the same length as the second crystalline section 130d.Furthermore, the first amorphous section 130a and the second amorphous section 130b can each be shorter than the first conductive pattern 165, the second conductive pattern 175, the first crystalline section 130c, the second conductive pattern 175, and the channel section 130n. Also, both the first conductive pattern 165 and the second conductive pattern 175 can be thinner than the first active layer 130.

[0172] Fig. Figure 8 is a cross-sectional view of a thin-film transistor 500 according to another comparison example.

[0173] As in Fig. As shown in Figure 8, the active layer ACT can comprise a first active layer 130 and an amorphous active layer 120. The amorphous active layer 120 can overlap the first active layer 130 to make contact with it. The amorphous active layer 120 has an amorphous structure. The amorphous active layer 120 and the first active layer 130 can have a vertically stacked structure. The amorphous active layer 120 can also be thinner than the first active layer 130.

[0174] Referring to Fig. 8 The amorphous active layer 120 can have: a channel section 120n that overlaps with the gate electrode 150, a first connection section 120a that is connected to one side of the channel section 120n, and a second connection section 120b that is connected to the other side of the channel section 120n. The channel section 120n, the first connection section 120a, and the second connection section 120b of the amorphous active layer 120 can have an amorphous structure.

[0175] Channel section CN of the active layer ACT can be formed by channel section 130n of the first active layer 130 and channel section 120n of the amorphous active layer 120. Channel section 130n of the first active layer 130 can also have the same length as channel section 120n of the amorphous active layer 120.

[0176] The first connection section CON1 of the active layer ACT can be formed by the first amorphous section 130a of the first active layer 130 and the first connection section 120a of the amorphous active layer 120. Furthermore, the second amorphous section 130b of the first active layer 130 and the second connection section 120b of the amorphous active layer 120 can form the second connection section CON2 of the active layer ACT.

[0177] The channel section 120n of the amorphous active layer 120 can have a charge carrier density that is lower than the charge carrier density of the channel section 130n of the first active layer 130. Instead of having a low charge carrier density, the amorphous active layer 120 can be made of an oxide semiconductor material that exhibits excellent stability and excellent structuring properties.

[0178] Instead of exhibiting a low charge carrier density, the amorphous active layer 120, with its excellent stability and structuring properties, can serve as a barrier layer to block hydrogen diffusion and exhibits excellent process properties to secure process spans.

[0179] Furthermore, the amorphous active layer 120 can serve as a nucleation layer for the stable crystallization of the first active layer 130. As a result, the channel section 130n of the first active layer 130 can exhibit uniform crystallinity and maintain high mobility properties, and the thin-film transistor 500 can exhibit excellent reliability and high mobility properties.

[0180] The amorphous active layer 120 can have a thickness of 1 nm to 5 nm (e.g. 3 nm).

[0181] If the thickness of the amorphous active layer 120 is less than 1 nm, the hydrogen barrier properties of the amorphous active layer 120 may be degraded, the process properties may be degraded, and the amorphous active layer 120 may not function as a nucleation layer, resulting in the first active layer 130 not crystallizing stably.

[0182] In contrast, if the thickness of the amorphous active layer 120 exceeds 5 nm, irregular crystals can form within the layer, leading to surface irregularities and a deterioration of its planarization properties. Consequently, it may not function adequately as a nucleation layer for stable crystallization of the first active layer 130. For example, a thickness of 1 nm to 5 nm (e.g., 3 nm) for the amorphous active layer 120 can effectively compensate for these issues.

[0183] The amorphous active layer 120 can have a thickness of 1.5 nm to 3.5 nm (e.g. 2.5 nm) to have excellent hydrogen barrier properties and excellent process properties and to serve as an excellent nucleation layer.

[0184] As in Fig. As shown in Figure 8, the first active layer 130 can be arranged between the amorphous active layer 120 and the gate electrode 150. In particular, the amorphous active layer 120 can be arranged below the first active layer 130. A space between the first active layer 130 and the substrate 110 is referred to as a lower section of the first active layer 130.

[0185] Fig. Figure 9 is a cross-sectional view of a 600-series thin-film transistor according to another comparative example. Referring to Fig. 9. The amorphous active layer 120 can be arranged such that it is in contact with the gate insulating layer 151. The amorphous active layer 120 can be arranged between the first active layer 130 and the gate insulating layer 151 and serve as an interface layer that improves the physical or chemical surface properties between the first active layer 130 and the gate insulating layer 151.

[0186] In the thin-film transistor 600 according to Fig. 9. The amorphous active layer 120 can be arranged between the first active layer 130 and the gate electrode 150. In particular, the amorphous active layer 120 can be arranged on top of the first active layer 130. The direction opposite the substrate 110 is referred to as the upper section of the first active layer 130. The channel section 130n of the first active layer 130 has a crystalline structure. In contrast, the gate insulating layer 151 can generally have an amorphous structure. If the channel section 130n of the first active layer 130, which has a crystalline structure, is in direct contact with the amorphous active layer 120, which has an amorphous structure, the channel section 130n of the first active layer 130 and the amorphous active layer 120 may not exhibit excellent adhesion or bond strength, and problems such as…Charge carrier traps can occur at the interface due to increased perturbations. The amorphous active layer 120 is located between the gate insulating layer 151 and the first active layer 130 and is in contact with both. Since the amorphous active layer 120 has an amorphous structure similar to that of the gate insulating layer 151, it can exhibit excellent compatibility with the gate insulating layer 151. Furthermore, since the amorphous active layer 120 is formed from an oxide semiconductor material, it can also exhibit excellent compatibility with the first active layer 130, which is also formed from an oxide semiconductor material.Since the amorphous active layer 120, which exhibits excellent compatibility with the gate insulating layer 151 and the first active layer 130, is positioned between the gate insulating layer 151 and the first active layer 130, it can improve the interface properties between these layers. Furthermore, its placement between the gate insulating layer 151 and the first active layer 130 reduces bonding disturbances at the interface between the two layers, thereby suppressing the influence of hydrogen and reducing the irregularity of the devices.Since the disruption of the bond at the interface is reduced, defects in the device are also reduced, which can improve the reliability of the device (thin-film transistor).

[0187] Fig. Figure 10 is a cross-sectional view of a thin-film transistor 700 according to another comparison example.

[0188] Referring to Fig. 10. An amorphous active layer 120 can be arranged above and below the first active layer 130. In particular, the amorphous active layer 120 comprises the first amorphous active layer 121, which is in contact with the first active layer 130, and a second amorphous active layer 122, which is opposite the first amorphous active layer 121 and in contact with the first active layer 130. The active layer ACT can, for example, have a three-layer structure, with the first active layer 130 positioned between the first amorphous active layer 121 and the second amorphous active layer 122. Both the first amorphous active layer 121 and the second amorphous active layer 122 can also be thinner than the first active layer 130.

[0189] The first amorphous active layer 121, which is located below the first active layer 130, can be referred to as the lower amorphous active layer, and the second amorphous active layer 122, which is located above the first active layer 130, can be referred to as the upper amorphous active layer.

[0190] The first amorphous active layer 121 can have a channel section 121n, a first connection section 121a, and a second connection section 121b. The channel section 121n, the first connection section 121a, and the second connection section 121b of the first amorphous active layer 121 can all have an amorphous structure.

[0191] The second amorphous active layer 122 can have a channel section 122n, a first connection section 122a, and a second connection section 122b. The channel section 122n, the first connection section 122a, and the second connection section 122b of the second amorphous active layer 122 can all have an amorphous structure.

[0192] The channel section CN of the active layer ACT can be formed by channel section 130n of the first active layer 130, channel section 121n of the first amorphous active layer 121, and channel section 122n of the second amorphous active layer 122. The channel section CN of the active layer ACT can, for example, have a three-layer structure.

[0193] The first connecting section CON1 of the active layer ACT can be formed by the first amorphous section 130a of the first active layer 130, the first connecting section 121a of the first amorphous active layer 121 and the first connecting section 122a of the second amorphous active layer 122.

[0194] Furthermore, the second connecting section CON2 of the active layer ACT can be formed by the second amorphous section 130b of the first active layer 130, the second connecting section 121b of the first amorphous active layer 121 and the second connecting section 122b of the second amorphous active layer 122.

[0195] Fig. Figure 11 is a cross-sectional view of a thin-film transistor 800 according to another comparison example.

[0196] The active layer ACT of the thin-film transistor 800 comprises a first active layer 130 and an active barrier layer 140. The active barrier layer 140 can overlap with the first active layer 130 to make contact with it. The active barrier layer 140 and the first active layer 130 can be stacked vertically on top of each other. The length of the active barrier layer 140 can also be equal to the length of the first active layer 130, but embodiments are not limited to this.

[0197] The active barrier layer 140 can comprise: a channel section 140n that overlaps with the gate electrode 150, a first amorphous section 140a that is connected to one side of the channel section 140n, and a second amorphous section 140b that is connected to the other side of the channel section 140n. The active barrier layer 140 can also be thinner than the first active layer 130.

[0198] Channel section 140n of the active barrier layer 140 has a crystalline structure. The first amorphous section 140a and the second amorphous section 140b of the active barrier layer 140 may have an amorphous structure.

[0199] The channel section CN of the active layer ACT can be formed by the channel section 130n of the first active layer 130 and the channel section 140n of the active barrier layer 140.

[0200] The first connecting section CON1 of the active layer ACT can be formed by the first amorphous section 130a of the first active layer 130 and the first amorphous section 140a of the active barrier layer 140. Furthermore, the second connecting section CON2 of the active layer ACT can be formed by the second amorphous section 130b of the first active layer 130 and the second amorphous section 140b of the active barrier layer 140.

[0201] Channel section 140n of the active barrier layer 140 can have a charge carrier density that is lower than the charge carrier density of channel section 130n of the first active layer 130. The active barrier layer 140 can be made of an oxide semiconductor material that exhibits excellent stability instead of having a low charge carrier density.

[0202] More specifically, the active barrier layer 140 can be made of an oxide semiconductor material exhibiting excellent stability and crystallinity. According to another embodiment of the present disclosure, the active barrier layer 140 can be made of a gallium (Ga)-based oxide semiconductor material. If the active barrier layer 140 comprises gallium (Ga) and indium (In), the gallium (Ga) content (at%) can be greater than the indium (In) content (at%), based on the number of atoms.

[0203] According to another embodiment of this disclosure, the active barrier layer 140 can be formed from a crystalline oxide semiconductor material, and the first amorphous section 140a and the second amorphous section 140b can be formed by dopant doping, in which dopant ions are injected into a specific region. The first amorphous section 140a and the second amorphous section 140b of the active barrier layer 140 can contain a dopant doped by ion implantation or ion injection. The dopant can comprise at least one dopant consisting of: boron (B), phosphorus (P), fluorine (F), and hydrogen (H).

[0204] Referring to Fig. 11. Doping can be performed using the gate electrode 150 as a mask, so that a section of the active barrier layer 140 overlapping the gate electrode 150 remains undoped to become a channel segment 140n. The boundary of the channel segment 130n can be clearly defined by doping with a dopant. Furthermore, the channel segment 140n can have the same length as the gate electrode 150 and the channel segment 130n.

[0205] The active barrier layer 140, with its excellent stability and crystallinity, can serve as a barrier layer to block hydrogen diffusion and as a nucleation layer to stably crystallize the first active layer 130 (e.g., the active barrier layer 140 can provide the dual function of blocking hydrogen and nucleating crystallization). As a result, the channel section 130n of the first active layer 130 can exhibit uniform crystallinity and maintain high-mobility characteristics, and the thin-film transistor 800 can exhibit excellent reliability and high-mobility properties.

[0206] According to another embodiment of the present disclosure, the active barrier layer 140 can have a thickness of 5 to 30 nm (e.g. 17.5 nm).

[0207] If the thickness of the active barrier layer 140 is less than 5 nm, the hydrogen blocking properties of the active barrier layer 140 may be impaired, and the active barrier layer 140 may not function fully as a nucleation layer.

[0208] In contrast, if the thickness of the active barrier layer 140 is more than 30 nm, the thickness of the active layer ACT may be thicker than necessary, which may deteriorate the process properties or the structuring properties of the active layer ACT and may be detrimental in terms of device thinning and device weight increase.

[0209] According to another embodiment of this disclosure, the active barrier layer 140 can have a thickness of 5nm to 30nm, in particular 5nm to 25nm, and 10nm to 15nm (e.g. 12.5nm) to effectively balance the above considerations in order to ensure excellent hydrogen blocking properties and crystallinity.

[0210] Referring to Fig. 11. The first active layer 130 can be arranged between the active barrier layer 140 and the gate electrode 150. In particular, the active barrier layer 140 can be arranged below the first active layer 130. A space between the first active layer 130 and the substrate 110 is referred to as a lower section of the first active layer 130.

[0211] Fig. Figure 12 is a cross-sectional view of a thin-film transistor 900 according to another comparison example.

[0212] In the thin-film transistor 900 according to Fig. 12. The active barrier layer 140 can be arranged between the first active layer 130 and the gate electrode 150. In particular, the active barrier layer 140 can be arranged on top of the first active layer 130. The direction opposite the substrate 110 is referred to as the upper section of the first active layer 130.

[0213] Fig. Figure 13 is a cross-sectional view of a thin-film transistor 1000 according to another embodiment of the present disclosure.

[0214] Referring to Fig. 13 An active barrier layer 140 is arranged above and below the first active layer 130. In particular, the active barrier layer 140 has: a first active barrier layer 141, which is in contact with the first active layer 130, and a second active barrier layer 142, which is in contact with the first active layer 130, which is opposite the first active barrier layer 141 (e.g. a three-layer structure).

[0215] The first active barrier layer 141, which is located below the first active layer 130, can be referred to as the lower active barrier layer, and the second active barrier layer 142, which is located above the first active layer 130, can be referred to as the upper active barrier layer.

[0216] The first active barrier layer 141 has a channel section 141n, a first amorphous section 141a, and a second amorphous section 141b. The channel section 141n of the first active barrier layer 141 has a crystalline structure, and the first amorphous section 141a and the second amorphous section 141b have an amorphous structure.

[0217] The second active barrier layer 142 can have a channel section 142n, a first amorphous section 142a, and a second amorphous section 142b. The channel section 142n of the second active barrier layer 142 can have a crystalline structure, and the first amorphous section 142a and the second amorphous section 142b can have an amorphous structure.

[0218] The channel section CN of the active layer ACT can be formed by the channel section 130n of the first active layer 130, the channel section 141n of the first active barrier layer 141 and the channel section 142n of the second active barrier layer 142.

[0219] The first amorphous section 130a of the first active layer 130, the first amorphous section 141a of the first active barrier layer 141, and the first amorphous section 142a of the second active barrier layer 142 can form the first connecting section CON1 of the active layer ACT.

[0220] Furthermore, the second amorphous section 130b of the first active layer 130, the second amorphous section 141b of the first active barrier layer 141, and the second amorphous section 142b of the second active barrier layer 142 can form the second connecting section CON2 of the active layer ACT. Also, both the first active barrier layer 141 and the second active barrier layer 142 can be thinner than the first active layer 130. Furthermore, each of the first active barrier layer 141, the second active barrier layer 142, and the first active layer 130 can have different thicknesses.

[0221] Fig. Figure 14 is a cross-sectional view of a thin-film transistor 1100 according to another comparative example.

[0222] Referring to Fig. 14 The active layer ACT of the thin-film transistor 1100 can have a first active layer 130, an amorphous active layer 120, and an active barrier layer 140. The amorphous active layer 120 and the active barrier layer 140 can be arranged such that they are aligned around the first active layer 130 and contact the first active layer 130.

[0223] Fig. Figure 14 shows an example structure in which an amorphous active layer 120 is arranged below the first active layer 130 and an active barrier layer 140 is arranged above the first active layer 130. In particular, the amorphous active layer 120 can be arranged between the substrate 110 and the first active layer 130, and the first active layer 130 can be arranged between the amorphous active layer 120 and the active barrier layer 140.

[0224] The channel section CN of the active layer ACT can be formed by the channel section 130n of the first active layer 130, the channel section 120n of the amorphous active layer 120 and the channel section 140n of the active barrier layer 140.

[0225] The first connecting section CON1 of the active layer ACT can be formed by the first amorphous section 130a of the first active layer 130, the first connecting section 120a of the amorphous active layer 120 and the first amorphous section 140a of the active barrier layer 140.

[0226] Furthermore, the second connecting section CON2 of the active layer ACT can be formed by the second amorphous section 130b of the first active layer 130, the second connecting section 120b of the amorphous active layer 120, and the second amorphous section 140b of the active barrier layer 140. Additionally, the active barrier layer 140, the first active layer 130, and the amorphous active layer 120 can each have different thicknesses.

[0227] Fig. Figure 15 is a cross-sectional view of a thin-film transistor 1200 according to another comparison example.

[0228] Fig. Figure 15 discloses an exemplary structure in which an amorphous active layer 120 is arranged above the first active layer 130 and an active barrier layer 140 is arranged below the first active layer 130. In particular, an active barrier layer 140 can be arranged between the substrate 110 and the first active layer 130, and a first active layer 130 can be arranged between the amorphous active layer 120 and the active barrier layer 140.

[0229] Fig. Figure 16 is a cross-sectional view of a thin-film transistor 1300 according to another comparative example.

[0230] The 1300 thin-film transistor from Fig. 16 exhibits a structure in which an amorphous active layer 120 is located beneath the first active layer 130 of the in Fig. The 5 thin-film transistors 200 are arranged.

[0231] With reference to Fig. 16 the channel section CN of the active layer ACT can be formed by the channel section 130n of the first active layer 130 and the channel section 120n of the amorphous active layer 120.

[0232] The first connecting section CON1 of the active layer ACT can be formed by the first amorphous section 130a, the first crystalline section 130c and the third amorphous section 130e of the first active layer 130 and the first connecting section 120a of the amorphous active layer 120.

[0233] Furthermore, the second compound section CON2 of the active layer ACT can be formed by the second amorphous section 130b, the second crystalline section 130d and the fourth amorphous section 130f of the first active layer 130 and the second compound section 120b of the amorphous active layer 120.

[0234] Fig. Figure 16 discloses a thin-film transistor 1300 having a structure in which an amorphous active layer 120 is arranged below the first active layer 130. An amorphous active layer 120 can be arranged above the first active layer 130, or an amorphous active layer 120 can be arranged on both the upper and lower surfaces of the first active layer 130 (e.g., a three-layer structure).

[0235] Fig. Figure 17 is a cross-sectional view of a thin-film transistor 1400 according to another comparative example.

[0236] The 1400 thin-film transistor from Fig. 17 exhibits a structure in which an active barrier layer 140 is located beneath the first active layer 130 of the in Fig. The 5 thin-film transistors 200 are arranged.

[0237] With reference to Fig. 17. The active barrier layer 140 can further comprise a first crystalline section 140c which is in contact with the first amorphous section 140a. The first amorphous section 140a of the active barrier layer 140 can be arranged between the channel section 140n and the first crystalline section 140c.

[0238] Furthermore, the active barrier layer 140 can have a second crystalline section 140d that is in contact with the second amorphous section 140b. The second amorphous section 140b of the active barrier layer 140 can be located between the channel section 140n and the second crystalline section 140d.

[0239] According to another embodiment of this disclosure, the first crystalline section 140c and the second crystalline section 140d of the active barrier layer 140 can have the same crystal structure as the channel section 140n.

[0240] The first crystalline section 140c of the active barrier layer 140 can overlap with the source electrode 160, and the second crystalline section 140d can overlap with the drain electrode 170. However, embodiments of this disclosure are not limited thereto, and the first crystalline section 140c can overlap with the drain electrode 170, and the second crystalline section 140d can overlap with the source electrode 160. The active barrier layer 140 can further comprise a third amorphous section 140e that is in contact with the first crystalline section 140c. The first crystalline section 140c can be arranged between the first amorphous section 140a and the third amorphous section 140e. The third amorphous section 140e of the active barrier layer 140 does not overlap with the gate electrode 150, the source electrode 160 and the drain electrode 170.

[0241] Furthermore, the active barrier layer 140 can also have a fourth amorphous section 140f that is in contact with the second crystalline section 140d. The second crystalline section 140d of the active barrier layer 140 can be located between the second amorphous section 140b and the fourth amorphous section 140f. The fourth amorphous section 140f of the active barrier layer 140 does not overlap with the gate electrode 150, the source electrode 160, and the drain electrode 170.

[0242] Referring to Fig. 17 the first connecting section CON1 can have: a first amorphous section 130a, a first crystalline section 130c and a third amorphous section 130e of the first active layer 130 as well as a first amorphous section 140a, a first crystalline section 140c and a third amorphous section 140e of the active barrier layer 140.

[0243] The second connection section CON2 can include a second amorphous section 130b, a second crystalline section 130d and a fourth amorphous section 130f of the first active layer 130, as well as a second amorphous section 140b, a second crystalline section 140d and a fourth amorphous section 140f of the active barrier layer 140.

[0244] Fig. Figure 18 is a cross-sectional view of a thin-film transistor 1500 according to another comparative example.

[0245] Referring to Fig. 18 is a gate insulating layer 151 structured. For example, the gate insulating layer 151 can be structured in a shape that corresponds to the gate electrode 150. The gate insulating layer 151 can, for example, have a length that is equal to or approximately equal to the length of the gate electrode 150. The light barrier layer can also have a length that is greater than the length of the first active layer 130.

[0246] Fig. Figure 19 is a cross-sectional view of a thin-film transistor substrate 1600 according to another comparative example.

[0247] The thin-film transistor according to Fig. 19 can be connected to a capacitor (Cap). As in Fig. Figure 19 shows a configuration comprising a substrate (base substrate) 110, a thin-film transistor and a capacitor Cap, also referred to as a “thin-film transistor substrate”.

[0248] The thin-film transistor substrate 1600 can further comprise a light barrier layer 111, which is connected either to the source electrode 160 or the drain electrode 170, and a capacitor Cap, which is connected to the light barrier layer 111.

[0249] Fig. Figure 19 discloses a structure in which the light barrier layer 111 is connected to the source electrode 160. The light barrier layer 111 can be connected to the drain electrode 170.

[0250] The capacitor Cap has a first capacitor electrode CE1 and a second capacitor electrode CE2. The first capacitor electrode CE1 can be connected to the light barrier layer 111. As shown in Fig. As shown in Figure 19, a section of the light barrier layer 111 can be a first capacitor electrode CE1. The first capacitor electrode CE1 can be formed integrally with the light barrier layer 111.

[0251] Since the first capacitor electrode CE1 is connected to the light barrier layer 111, the same voltage can be applied to the first capacitor electrode CE1 as to the source electrode 160.

[0252] The second capacitor electrode CE2 can be arranged on the same layer as the first active layer 130, which forms the active layer ACT, and can be made of the same material. Furthermore, the second capacitor electrode CE2 has an amorphous structure and can have the same composition as the first amorphous section 130a of the first active layer 130. The light barrier layer 111 can also have a length that is longer than the sum of the lengths of the first active layer 130 and the second capacitor electrode CE2.

[0253] The second capacitor electrode CE2 can be structured together with the first active layer 130 and then doped with a dopant.

[0254] Fig. Figure 20 is a cross-sectional view of a thin-film transistor substrate 1700 according to another comparative example.

[0255] In Fig. 20 is a thin-film transistor connected to a capacitor Cap.

[0256] The capacitor Cap in Fig. 20 has a first capacitor electrode CE1, a second capacitor electrode CE2, and a third capacitor electrode CE3. The first capacitor electrode CE1 can be connected to the light barrier layer 111. As in Fig. As shown in Figure 20, a section of the light barrier layer 111 can be a first capacitor electrode CE1. The first capacitor electrode CE1 can be formed integrally with the light barrier layer 111.

[0257] Since the light barrier layer 111 is connected to the source electrode 160, the same voltage applied to the source electrode 160 can be applied to the first capacitor electrode CE1.

[0258] Referring to Fig. The second capacitor electrode CE2 is arranged on the same layer as the first active layer 130, which forms the active layer ACT, and can be made of the same material and using the same process. The second capacitor electrode CE2 can be doped during a selective doping process for the first active layer 130. As a result, the second capacitor electrode CE2 can have an amorphous structure or be a layer with an amorphous structure.

[0259] The capacitor Cap of Fig. Device 20 features a third capacitor electrode CE3 adjacent to the second capacitor electrode CE2. The third capacitor electrode CE3 can be located on the same layer as the source electrode 160 and the drain electrode 170 and can be made of the same material as the source electrode 160 and the drain electrode 170 and produced by the same processing step. For example, a third capacitor electrode CE3 can be formed simultaneously with the formation of the source electrode 160 and the drain electrode 170.

[0260] The first capacitor, Cap1, can be formed by overlapping the first capacitor electrode, CE1, with the second capacitor electrode, CE2. Furthermore, the second capacitor, Cap2, can be formed by overlapping the second capacitor electrode, CE2, with the third capacitor electrode, CE3.

[0261] The capacitor Cap has a first capacitor Cap1 and a second capacitor Cap2.

[0262] Fig. Figure 21 is a cross-sectional view of a thin-film transistor substrate 1800 according to another comparative example.

[0263] The thin-film transistor substrate 1800 from Fig. 21 shows, in comparison to the thin-film transistor substrate 1700, Fig. 20 furthermore an amorphous active layer 120. The thin-film transistor substrate 1800 of Fig. The 21-piece thin-film transistor has essentially the same configuration as the 500-piece thin-film transistor. Fig. 8, except that the source electrode 160 is connected to the light barrier layer 111.

[0264] The active layer ACT of the thin-film transistor substrate 1800, which is in Fig. As shown in Figure 21, a first active layer 130 and an amorphous active layer 120 can be present. The amorphous active layer 120 and the first active layer 130 can have a vertically stacked structure.

[0265] With reference to Fig. 21 The second capacitor electrode CE2 can have a first layer 124 made of an amorphous oxide semiconductor material and a second layer 134 made of the same oxide semiconductor material as the first active layer 130. The first layer 124 of the second capacitor electrode CE2 and the amorphous active layer 120 can be made of the same oxide semiconductor material.

[0266] Fig. Figure 21 shows the configuration in which the amorphous active layer 120 is arranged below the first active layer 130. The active barrier layer 140 can also be applied instead of the amorphous active layer 120. Furthermore, the amorphous active layer 120 or the active barrier layer 140 can be arranged either above or below the first active layer 130.

[0267] Fig. Figure 22 is a cross-sectional view of a thin-film transistor substrate 1900 according to another comparative example.

[0268] The thin-film transistor substrate 1900 from Fig. 22 features a thin-film transistor and a capacitor. The thin-film transistor substrate is 1900. Fig. The 22 contained thin-film transistor has essentially the same configuration as the thin-film transistor 400 from Fig. 7, except that the source electrode 160 is connected to the light barrier layer 111.

[0269] The capacitor Cap has a first capacitor electrode CE1 and a second capacitor electrode CE2. The first capacitor electrode CE1 can be connected to the light barrier layer 111. As shown in Fig. As shown in Figure 22, a section of the light barrier layer 111 can be a first capacitor electrode CE1. The first capacitor electrode CE1 can be formed integrally with the light barrier layer 111.

[0270] Since the light barrier layer 111 is connected to the source electrode 160, the same voltage applied to the source electrode 160 can also be applied to the first capacitor electrode CE1.

[0271] As in Fig. As shown in Figure 22, the second capacitor electrode CE2 can have a first layer 135 and a second layer 176. The first layer 135 is protected by a second layer 176, which is made of the same material as the conductive patterns 165 and 175. Consequently, the first layer 135 can have a crystalline structure. The second layer 176 can be described as a conductive pattern. For example, the second layer 176 can have a higher conductivity than the first layer 135. The second layer 176 can also be thinner than the first layer 135. For example, the second layer 176 can be thicker than the first layer 135, or the second layer 176 and the first layer 135 can have the same thickness.

[0272] In particular, the first layer 135 of the in Fig. The second capacitor electrode CE2 shown in Figure 22 is arranged on the same layer as the first active layer 130. The first layer 135 of the second capacitor electrode CE2 has a crystalline structure or is a layer with a crystalline structure and can have the same composition as the channel section 130n and the first crystalline section 130c of the first active layer 130.

[0273] The second layer 176 of the second capacitor electrode CE2 can be arranged on the same layer as the first conductive pattern 165 and the second conductive pattern 175. The second layer 176 of the second capacitor electrode CE2 can be formed from the same material as the first conductive pattern 165 and the second conductive pattern 175. During the structuring process of the first conductive pattern 165 and the second conductive pattern 175, the second layer 176 of the second capacitor electrode CE2 can be structured together.

[0274] Fig. Figure 23 is a cross-sectional view of a thin-film transistor substrate 2000 according to another comparative example.

[0275] Compared to the thin-film transistor substrate 1900 from Fig. 22 shows the thin-film transistor substrate 2000 of Fig. 23 furthermore an amorphous active layer 120. The thin-film transistor substrate 2000 of Fig. The thin-film transistor contained in part 23 is essentially the same as the thin-film transistor 400 from Fig. 7, except that it has an amorphous active layer 120 and that the source electrode 160 is connected to the light barrier layer 111.

[0276] The active layer ACT of the in Fig. The 23 thin-film transistor substrates 2000 shown can have a first active layer 130 and an amorphous active layer 120. The amorphous active layer 120 and the first active layer 130 can have a vertically stacked structure.

[0277] With reference to Fig. 23 The second capacitor electrode CE2 can have a first layer 125 made of an amorphous oxide semiconductor material, a second layer 135 made of the same oxide semiconductor material as the first active layer 130, and a third layer 177 made of the same material as the conductive patterns 165, 175 (e.g., a three-layer structure). The third layer 177 can be referred to as a conductive pattern.

[0278] Fig. Figure 23 shows the configuration in which the amorphous active layer 120 is arranged below the first active layer 130. The active barrier layer 140 can also be applied instead of the amorphous active layer 120. Furthermore, either the amorphous active layer 120 or the active barrier layer 140 can be arranged above the first active layer 130.

[0279] The following describes a method for manufacturing a thin-film transistor according to a comparative example.

[0280] To produce a thin-film transistor, an active layer ACT is formed on the substrate 110.

[0281] More precisely, with reference to Fig. 1, a light barrier layer 111 is formed on the substrate 110, a buffer layer 112 is formed on the light barrier layer 111, and an active layer ACT is formed on the buffer layer 112.

[0282] The active layer ACT can have a first active layer 130. In addition to the first active layer 130, the active layer ACT can also have at least one of the amorphous active layer 120 and one of the active barrier layer 140.

[0283] Active layer formation (ACT) can include: forming the first oxide semiconductor material layer using a crystalline oxide semiconductor material, structuring the first oxide semiconductor material layer to form an active pattern, and forming a first active layer exhibiting a crystalline active pattern by heat-treating the active pattern.

[0284] The first oxide semiconductor material layer can comprise an oxide semiconductor material and a crystallization control element. The crystallization control element can comprise at least one of the following: beryllium (Be), boron (B), carbon (C), aluminum (Al), silicon (Si), iron (Fe), calcium (Ca), titanium (Ti), tantalum (Ta), vanadium (V), yttrium (Y), zirconium (Zr), hafnium (Hf), lanthanum (La), and germanium (G). The crystallization control element can, in particular, comprise aluminum (Al).

[0285] Furthermore, the formation of the active layer ACT can also involve the formation of an amorphous oxide semiconductor material layer using an amorphous oxide semiconductor material.

[0286] Furthermore, the formation of the active layer ACT can also involve the formation of a barrier oxide semiconductor material layer using a crystalline oxide semiconductor material.

[0287] Next, a gate insulating layer 151 is formed on the active layer ACT. Contact holes can be formed in the gate insulating layer 151.

[0288] Subsequently, the gate electrode 150 is formed on the gate insulating layer 151. The gate electrode 150 overlaps at least partially with the active layer ACT. In particular, the gate electrode 150 is formed such that it overlaps with the channel section CN.

[0289] When forming the gate electrode 150, the source electrode 160 and the drain electrode 170 can be formed together with the gate electrode 150.

[0290] The active layer ACT is then selectively doped with a dopant.

[0291] During doping, the gate electrode 150 can serve as a mask to block the dopant. Furthermore, if the source electrode 160 and the drain electrode 170 are formed together with the gate electrode 150 during its formation, the source electrode 160 and the drain electrode 170 can also serve as masks to block the dopant.

[0292] A region of the doped active layer ACT may exhibit an amorphous structure. A region of the active layer ACT that is not doped due to dopant blocking may exhibit a crystalline structure.

[0293] The dopant may contain at least one of the elements boron (B), phosphorus (P), fluorine (F) and hydrogen (H).

[0294] Furthermore, the first conductive pattern 165 and the second conductive pattern 175 can be formed on the active layer ACT. The first conductive pattern 165 and the second conductive pattern 175 are formed such that they do not overlap with the gate electrode 150.

[0295] When the active layer ACT is doped with a dopant, the first conductive pattern 165 and the second conductive pattern 175 can act as a mask to block the dopant. As a result, the active layer ACT beneath the first conductive pattern 165 and the second conductive pattern 175 cannot be doped and exhibits a crystalline structure.

[0296] The following section describes in detail a display device that incorporates at least one of the thin-film transistors described above.

[0297] Fig. Figure 24 is a schematic representation of a display device 2100 according to another embodiment of the present disclosure.

[0298] A display device 2100 according to another embodiment of this disclosure may comprise a display panel 210, a gate driver 220, a data driver 230 and a control unit or control device 240.

[0299] Gate lines GL and data lines DL are arranged on the display panel 210, and pixels P are located at the intersections of the gate lines GL and data lines DL. An image is displayed by controlling pixel P.

[0300] The control unit 240 controls the gate driver 220 and the data driver 230.

[0301] The control unit 240 outputs a gate control signal GCS for controlling the gate driver 220 and a data control signal DCS for controlling the data driver 230, using a synchronization signal and a clock signal supplied by an external system. The control unit 240 also samples the image data input from the external system, realigns the sampled data, and delivers the realigned RGB digital image data to the data driver 230.

[0302] The gate control signal GCS includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (GOE), a start signal (Vst), and a gate clock (GCLK). Control signals for controlling a shift register can also be included in the gate control signal GCS.

[0303] The DCS data control signal includes a source start pulse (SSP), a source shift clock signal (SSC), a source output enable signal (SOE), and a polarity control signal (POL).

[0304] The data driver 230 supplies a data voltage to the data lines DL of the display panel 210. Specifically, the data driver 230 converts the RGB image data input by the control unit 240 into an analog data voltage and supplies a data voltage from one horizontal line to the data lines DL.

[0305] The gate driver 220 sequentially supplies the gate pulses (GP) to the gate lines GL for a frame. A frame here refers to a period in which an image is displayed on a display panel. In addition, the gate driver 220 supplies the gate line GL with a gate-off signal (Goff), which can switch off the switching element for the remainder of the period if the gate pulse (GP) is not supplied during a frame. Hereinafter, the gate pulse (GP) and the gate-off signal (Goff) are collectively referred to as the scan signal SS (see Fig. 25).

[0306] According to one embodiment of the present disclosure, the gate driver 220 can be mounted on the substrate 110. Therefore, the structure in which the gate driver 220 is mounted directly on the substrate 110 is referred to as a gate-in-panel (GIP) structure.

[0307] Fig. 25 is a circuit diagram of a pixel P from Fig. 24, Fig. 26 is a top view of pixel P from Fig. 25, and Fig. 27 is a cross-sectional view along II' of Fig. 26 according to one embodiment of the present disclosure.

[0308] The circuit diagram of Fig. 25 is an equivalent circuit diagram of a pixel P of a display device 2100 which has an organic light-emitting diode (OLED) as a display element 710.

[0309] The pixel P has a display element 710 and a pixel control unit or pixel driver circuit PDC that controls the display element 710.

[0310] The first thin-film transistor TR1 is connected to the gate line GL and the data line DL and is switched on or off by the scan signal SS, which is supplied through the gate line GL.

[0311] The data line DL provides a data voltage Vdata to the pixel driver circuit PDC, and the first thin-film transistor TR1 controls the application of the data voltage Vdata.

[0312] A driver power line PL provides a driver voltage Vdd for the display element 710, and the second thin-film transistor TR2 controls the application of the driver voltage Vdd. The driver voltage Vdd is a pixel driver voltage for driving the organic light-emitting diode (OLED), which is the display element 710.

[0313] When the first thin-film transistor TR1 is switched on by the scan signal SS applied by the gate driver 220 via the gate line GL, the data voltage Vdata supplied via the data line DL is applied to a gate electrode of the second thin-film transistor TR2, which is connected to the indicator element 710. The data voltage Vdata is charged into a first capacitor C1, which is formed between the gate electrode and a source electrode of the second thin-film transistor TR2. The first capacitor C1 is a storage capacitor (Cst).

[0314] The amount of current supplied to the organic light-emitting diode (OLED), which is the display element 710, by the second thin-film transistor TR2 is controlled in accordance with the data voltage Vdata, thereby controlling grayscale values ​​of the light emitted by the display element 710.

[0315] With reference to Fig. 26 and Fig. 27 the first thin-film transistor TR1 and the second thin-film transistor TR2 are arranged on the substrate 110.

[0316] Substrate 110 can be made of glass or plastic. Plastic with flexible properties, such as polyimide (PI), can be used as substrate 110.

[0317] A light-blocking layer 111 is arranged on the substrate 110. The light-blocking layer 111 can have light-shielding properties. The light-blocking layer 111 can protect the active layer A2 by blocking externally incident light.

[0318] A buffer layer 112 is arranged on the light barrier layer 111. The buffer layer 112 is made of an insulating material and protects the active layers A1 and A2 from external moisture or oxygen. A section of the light barrier layer 111 can be a first capacitor electrode CE1.

[0319] The active layer A1 of the first thin-film transistor TR1 and the active layer A2 of the second thin-film transistor TR2 are arranged on the buffer layer 112.

[0320] The active layers A1 and A2 can, for example, consist of an oxide semiconductor material. The active layers A1 and A2 can be formed from an oxide semiconductor layer made of an oxide semiconductor material. The active layers A1 and A2 can have a crystalline section and an amorphous section. The channel sections of the active layers A1 and A2 can have a crystalline structure.

[0321] In particular, the active layers A1 and A2 can comprise a first active layer 130 and an amorphous active layer 120. However, one embodiment of the present disclosure is not limited thereto, and the active layers A1 and A2 can comprise an active barrier layer 140.

[0322] With reference to Fig. 26 and Fig. 27. A section of the active layer A1 of the first thin-film transistor TR1 can be made conductive to form a second capacitor electrode CE2. For example, the drain region of the first thin-film transistor TR1 can extend to form the second capacitor electrode CE2.

[0323] The drain region of the first thin-film transistor TR1 can serve as drain electrode D1.

[0324] A gate insulating layer 151 is arranged on the active layers A1 and A2. The gate insulating layer 151 has insulating properties and separates the active layers A1 and A2 from the gate electrodes G1 and G2. The gate insulating layer 151 can cover the entire upper surfaces of the active layers A1 and A2.

[0325] A gate electrode G1 of the first thin-film transistor TR1 and a gate electrode G2 of the second thin-film transistor TR2 are arranged on the gate insulating layer 151.

[0326] The gate electrode G1 of the first thin-film transistor TR1 overlaps at least a section of the active layer A1 of the first thin-film transistor TR1. The gate electrode G2 of the second thin-film transistor TR2 overlaps with at least a section of the active layer A2 of the second thin-film transistor TR2.

[0327] Referring to Fig. 26 and Fig. In diagram 27, the source electrodes S1 and S2 and the drain electrode D2 are arranged on the same layer as the gate electrodes G1 and G2. For simplicity, the source electrodes S1 and S2 and the drain electrodes D1 and D2 are distinguished, and the source electrodes S1 and S2 and the drain electrodes D1 and D2 can be interchanged.

[0328] The source electrode S1 of the first thin-film transistor TR1 is connected to the active layer A1 of the first thin-film transistor TR1 via the first contact hole H1.

[0329] The source electrode S2 of the second thin-film transistor TR2 is connected to the light barrier layer 111 via the third contact hole H3 and to the active layer A2 of the second thin-film transistor TR2 via the fourth contact hole H4. The drain electrode D2 of the second thin-film transistor TR2 is connected to the active layer A2 of the second thin-film transistor TR2 via the fifth contact hole H5.

[0330] According to Fig. In figure 26, the gate electrode G2 of the second thin-film transistor TR2 is connected to the second capacitor electrode CE2 via the eighth contact hole H8. Consequently, the gate electrode G2 of the second thin-film transistor TR2 can be connected to the first thin-film transistor TR1.

[0331] An intermediate insulating layer 152 is arranged on the gate electrodes G1 and G2, the source electrodes S1 and S2 and the drain electrode D2.

[0332] The data line DL and the driver power line PL are arranged on the intermediate layer insulating layer 152.

[0333] The data line DL is in contact with the source electrode S1 of the first thin-film transistor TR1 via the second contact hole H2. According to another embodiment of the present disclosure, a section of the data line DL can be designated as the source electrode S1.

[0334] The driver power line PL is in contact with the drain electrode D2 of the second thin-film transistor TR2 through the seventh contact hole H7. According to another embodiment of the present disclosure, a section of the driver power line PL can be designated as drain electrode D2.

[0335] According to the Fig. 26 and Fig. 27 A third capacitor electrode CE3 is arranged on the intermediate layer - insulating layer 152. The third capacitor electrode CE3 is in contact with the source electrode S2 of the second thin-film transistor TR2 via the sixth contact hole H6.

[0336] The second partial capacitor C12 and the first partial capacitor C11 form the first capacitor C1.

[0337] The first partial capacitor C11 can be formed by overlapping the first capacitor electrode CE1 with the second capacitor electrode CE2. The second partial capacitor C12 can be formed by overlapping the second capacitor electrode CE2 with the third capacitor electrode CE3.

[0338] The first capacitor C1 is formed by the first partial capacitor C11 and the second partial capacitor C12.

[0339] The planarization layer 180 is located on the data line DL, the driver power line PL, and the third capacitor electrode CE3. The planarization layer 180 flattens the top surface of the first thin-film transistor TR1 and the second thin-film transistor TR2 to provide a uniform surface and protects the first thin-film transistor TR1 and the second thin-film transistor TR2.

[0340] The first electrode 711 of the indicator element 710 is located on the planarization layer 180. The first electrode 711 of the indicator element 710 is in contact with the third capacitor electrode CE3 via a ninth contact hole H9 formed in the planarization layer 180. This allows the first electrode 711 to be connected to the second source electrode S2 of the second thin-film transistor TR2.

[0341] A bank layer 750 is arranged at one edge of the first electrode 711. The bank layer 750 defines a light emission area of ​​the indicator element 710.

[0342] An organic emission layer 712 is arranged on the first electrode 711, and a second electrode 713 is arranged on the organic emission layer 712. This completes the indicator element 710. The in Fig. The display element 710 shown in Figure 27 is an organic light-emitting diode (OLED). Accordingly, the display device 2100 according to one embodiment of the present disclosure is an organic light-emitting display device. Furthermore, the first thin-film transistor TR1 can be arranged along a first side of the display element 710, and the second thin-film transistor TR2 can be arranged along a second side of the display element 710, which is orthogonal to the first side.

[0343] Fig. 28 is a circuit diagram of a pixel P of a display device 2200 according to another embodiment of the present disclosure.

[0344] Fig. Figure 28 is an equivalent circuit diagram of a pixel P of an organic light-emitting display device.

[0345] The pixel P of the in Fig. The display device 2200 shown in Figure 28 comprises an organic light-emitting diode (OLED), which is a display element 710, and a pixel driver circuit PDC for controlling the display element 710. The display element 710 is connected to the pixel driver circuit PDC.

[0346] In the pixel P, signal lines DL, GL, PL, RL and SCL are arranged for supplying signals to the pixel driver circuit PDC.

[0347] The data voltage Vdata is supplied to the data line DL, the scan signal SS is supplied to the gate line GL, the driver voltage Vdd for controlling the pixel is supplied to the driver power line PL, a reference voltage Vref is supplied to a reference line RL and a capture control signal SCS is supplied to a capture control line SCL.

[0348] With reference to Fig. 28 It is assumed that a gate line of an nth pixel P is “GLn”, that a gate line of an (n-1)th pixel P adjacent to the nth pixel P is “GLn-1”, and that the gate line “GL / n-1” of the (n-1)th pixel P serves as the acquisition control line SCL of the nth pixel P.

[0349] The pixel driver circuit PDC, for example, has: a first thin-film transistor TR1 (switching transistor) connected to the gate line GL and the data line DL, a second thin-film transistor TR2 (driver transistor) for controlling the magnitude of a current output to the display element 710 according to the data voltage Vdata transmitted by the first thin-film transistor TR1, and a third thin-film transistor TR3 (reference transistor) for detecting characteristics of the second thin-film transistor TR2.

[0350] A first capacitor C1 is arranged between a gate electrode of the second thin-film transistor TR2 and the indicator element 710. The first capacitor C1 is referred to as a storage capacitor (Cst).

[0351] The first thin-film transistor TR1 is switched on by the scan signal SS, which is supplied to the gate line GL, in order to transmit the data voltage Vdata, which is supplied to the data line DL, to the gate electrode G2 of the second thin-film transistor TR2.

[0352] The third thin-film transistor TR3 is connected to a first node n1 between the second thin-film transistor TR2 and the indicator element 710 and the reference line RL and is thus switched on or off by the detection control signal SCS and detects properties of the second thin-film transistor TR2, which is a driver transistor, during a detection period.

[0353] A second node n2, connected to the gate electrode of the second thin-film transistor TR2, is connected to the first thin-film transistor TR1. The first capacitor C1 is formed between the second node n2 and the first node n1.

[0354] When the first thin-film transistor TR1 is switched on, the data voltage Vdata, supplied via the data line DL, is applied to the gate electrode of the second thin-film transistor TR2. The data voltage Vdata is then charged into the first capacitor C1, which is formed between the gate electrode G2 and the source electrode S2 of the second thin-film transistor TR2.

[0355] When the second thin-film transistor TR2 is switched on, current is supplied to the display element 710 through the second thin-film transistor TR2 according to the driver voltage Vdd to drive the pixel, causing light to be emitted from the display element 710.

[0356] Fig. Figure 29 is a circuit view showing an arbitrary pixel P of a display device 2300 according to another embodiment of the present disclosure.

[0357] The pixel P of the in Fig. The display device 2300 shown in Figure 29 comprises an organic light-emitting diode (OLED), which represents a display element 710, and a pixel driver circuit PDC for controlling the display element 710. The display element 710 is connected to the pixel driver circuit PDC.

[0358] The pixel driver circuit PDC features thin-film transistors TR1, TR2, TR3 and TR4.

[0359] In the pixel P, signal lines DL, EL, GL, PL, SCL and RL are arranged to supply a control signal to the pixel driver circuit PDC.

[0360] Compared to the Pixel P from Fig. 28 indicates the pixel P of Fig. 29. Furthermore, an emission control line EL is provided. An emission control signal EM is fed to the emission control line EL.

[0361] Furthermore, the pixel driver circuit PDC features Fig. 29 compared to the pixel driver circuit PDC of Fig. 28 a fourth thin-film transistor TR4, which is an emission control transistor for controlling a light emission time of the indicator element 710 by the second thin-film transistor TR2.

[0362] With reference to Fig. 29 It is assumed that a gate line of an nth pixel P is “GLn”, a gate line of an (n-1)th pixel P adjacent to the nth pixel P is “GLn-1”, and the gate line “GLn-1” of the (n-1)th pixel P serves as the acquisition control line SCL of the nth pixel P.

[0363] A first capacitor C1 is arranged between the gate electrode of the second thin-film transistor TR2 and the indicator element 710. A second capacitor C2 is arranged between one of the terminals of the fourth thin-film transistor TR4, to which a driver thin-film transistor voltage Vdd is supplied, and an electrode of the indicator element 710.

[0364] The first thin-film transistor TR1 is switched on by the scan signal SS, which is supplied to the gate line GL, in order to transmit the data voltage Vdata, which is supplied to the data line DL, to the gate electrode of the second thin-film transistor TR2.

[0365] The third thin-film transistor TR3 is connected to the reference line RL and is thus switched on or off by the detection control signal SCS and detects characteristics of the second thin-film transistor TR2, which is a driver transistor, during a detection period.

[0366] The fourth thin-film transistor, TR4, either transmits the driver voltage Vdd to the second thin-film transistor, TR2, according to the emission control signal EM, or it shields the driver voltage Vdd. When the fourth thin-film transistor is switched on, current is supplied to the second thin-film transistor, TR2, causing light to be emitted from the indicator element 710.

[0367] The pixel driver circuit PDC according to another embodiment of the present disclosure can be configured in various structures in addition to the structure described above. For example, the pixel driver circuit PDC can include five or more thin-film transistors.

[0368] Fig. Figure 30 is a circuit diagram showing a pixel P of a display device 2400 according to another embodiment of the present disclosure. The display device 2400 of Fig. 30 is a liquid crystal display device.

[0369] The pixel P of the in Fig. The display device 2400 shown in Figure 30 has a pixel driver circuit PDC and a liquid crystal capacitor Clc connected to the pixel driver circuit PDC. The liquid crystal capacitor Clc corresponds to a display element.

[0370] The pixel driver circuit PDC features a thin-film transistor TR connected to the gate line GL and the data line DL, and a storage capacitor Cst connected between the thin-film transistor TR and a common electrode 372. The liquid crystal capacitor Clc is connected in parallel with the storage capacitor Cst between the thin-film transistor TR and the common electrode 372.

[0371] The liquid crystal capacitor Clc charges a differential voltage between a data signal, supplied to a pixel electrode 371 via the thin-film transistor TR, and a common voltage Vcom, supplied to the common electrode 372. It controls the amount of light transmitted by driving liquid crystals according to the charged voltage. The storage capacitor Cst maintains a stable voltage stored in the liquid crystal capacitor Clc.

[0372] According to the present disclosure, the following advantageous effects can be achieved.

[0373] According to one embodiment of the present disclosure, the active layer has both a crystalline and an amorphous section, enabling the thin-film transistor to exhibit excellent reliability and excellent electrical properties. The display device according to one embodiment of the present disclosure, which incorporates such a thin-film transistor, can exhibit excellent display performance, extended lifetime, and excellent reliability.

[0374] According to one embodiment of this disclosure, a thin-film transistor having an active layer having both a crystalline section and an amorphous section can be easily manufactured by using at least one gate electrode, one source electrode, one drain electrode and a conductive pattern as a mask during a doping process, which reduces the manufacturing time and cost and improves the production yield.

Claims

[1] Thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) which has: an active layer (ACT); a gate electrode (150) that overlaps at least partially with the active layer (ACT); and a source electrode (160) and a drain electrode (170) spaced apart from each other and each connected to the active layer (ACT); wherein the active layer (ACT) has a first active layer (130), and the first active layer (130) has: a channel section (130n) that overlaps with the gate electrode (150); a first connecting section (CON1) which is connected to a first side of the channel section (130n); and a second connecting section (CON2) which is connected to a second side of the channel section (130n), wherein the channel section (130n) has a crystalline structure, wherein the first connecting section (CON1) has a first amorphous section (130a) which is in contact with the channel section (130n), and wherein the second connecting section (CON2) has a second amorphous section (130b) which is in contact with the channel section (130n), wherein the active layer (ACT) further comprises an active barrier layer (140) which overlaps with and is in contact with the first active layer (130), the active barrier layer (140) comprises: a channel section (140n) that overlaps with the gate electrode (150), a first amorphous section (140a) connected to a first side of the channel section (140n) of the active barrier layer (140); and a second amorphous section (140b) connected to a second side of the channel section (140n) of the active barrier layer (140); wherein the channel section (140n) of the active barrier layer (140) has a crystalline structure, wherein the first amorphous section (140a) and the second amorphous section (140b) of the active barrier layer (140) each have an amorphous structure, and where the charge carrier density of the channel section (140n) of the active barrier layer (140) is lower than the charge carrier density of the channel section (130n) of the first active layer (130), and the active barrier layer (140) further comprises: a first active barrier layer (141) that is in contact with the first active layer (130); and a second active barrier layer (142) which is in contact with the first active layer (130), wherein the first active barrier layer (141) and the second active barrier layer (142) are arranged on opposite sides of the first active layer (130). [2] Thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to claim 1, wherein the first active layer (130) comprises: an oxide semiconductor material and a crystallization control element that is distributed in the oxide semiconductor material, and wherein the crystallization control element comprises at least one of beryllium, boron, carbon, aluminum, silicon, iron, calcium, tin, titanium, tantalum, vanadium, yttrium, zirconium, hafnium, lanthanum and germanium. [3] Thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to claim 2, wherein the crystallization control element has a content of 0.1 to 10 atomic percent, based on a total number of atoms in the first active layer (130), excluding oxygen. [4] Thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to claim 2 or 3, wherein the oxide semiconductor material comprises at least one of: an IZO-(InZnO)-based oxide semiconductor material, an IGO-(InGaO)-based oxide semiconductor material, an IGZO-(InGaZnO)-based oxide semiconductor material, an ITO-(InSnO)-based oxide semiconductor material, an IGZTO-(InGaZnSnO)-based oxide semiconductor material, an ITZO-(InSnZnO)-based oxide semiconductor material, or a ZnO-based oxide semiconductor material and a FIZO (FelnZnO)-based oxide semiconductor material. [5] Thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to any one of claims 1 to 4, wherein the channel section (130n) of the first active layer (130) has at least one crystal structure selected from a cubic crystal structure, a bixbyite crystal structure, a cubic bixbyite crystal structure, a spinel crystal structure, a hexagonal crystal structure and a wurtzite crystal structure. [6] Thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to any one of claims 1 to 5, wherein the channel section (130n) of the first active layer (130) has a crystal plane having an inclination angle of 30° to 60° with respect to a horizontal plane. [7] Thin-film transistor (200, 300, 400, 1300, 1400) according to any one of claims 1 to 6, wherein the first interconnection section (CON1) of the first active layer (130) further comprises a first crystalline section (130c) in contact with the first amorphous section (130a), and wherein the second interconnection section (CON2) of the first active layer (130) further comprises a second crystalline section (130d) in contact with the second amorphous section (130b). [8] Thin-film transistor (200, 300, 400, 1300, 1400) according to claim 7, wherein the first amorphous section (130a) is arranged between the channel section (130n) and the first crystalline section (130c), wherein the second amorphous section (130b) is arranged between the channel section (130n) and the second crystalline section (130d) and wherein the first crystalline section (130c) and the second crystalline section (130d) have the same crystal structure as the channel section (130n). [9] Thin-film transistor (200, 300, 1300, 1400) according to claim 7 or 8, wherein the first interconnect section (CON1) further comprises a third amorphous section (130e) which is in contact with the first crystalline section (130c), wherein the first crystalline section (130c) is arranged between the first amorphous section (130a) and the third amorphous section (130e), wherein the second compound section (CON2) further comprises a fourth amorphous section (130f) which is in contact with the second crystalline section (130d), and wherein the second crystalline section (130d) is arranged between the second amorphous section (130b) and the fourth amorphous section (130f). [10] Thin-film transistor (200, 300, 400, 1300, 1400) according to any one of claims 7 to 9, wherein the source electrode (160) is arranged on the same layer as the gate electrode (150) and the source electrode (160) is connected to the first interconnect section (CON1), wherein the source electrode (160) overlaps with the first crystalline section (130c) and the source electrode (160) does not overlap with the first amorphous section (130a), wherein the drain electrode (170) is arranged on the same layer as the gate electrode (150) and the drain electrode (170) is connected to the second connection section (CON2), and wherein the drain electrode (170) overlaps with the second crystalline section (130d) and the drain electrode (170) does not overlap with the second amorphous section (130b). [11] Thin-film transistor (400) according to any one of claims 7 to 10, further comprising: a first conductive pattern (165) arranged on the first crystalline section (130c); and a second conductive pattern (175) arranged on the second crystalline section (130d), where the first conductive pattern (165) does not overlap with the first amorphous section (130a) and the second conductive pattern (175) does not overlap with the second amorphous section (130b). [12] Thin-film transistor (800, 900, 1000, 1100, 1200, 1400) according to any one of claims 1 to 11, wherein the active barrier layer (140) has a thickness of 5 nm to 30 nm. [13] Thin-film transistor (1400) according to one of claims 1 to 12, wherein the active barrier layer (140) further comprises a first crystalline section (140c) which is in contact with the first amorphous section (140a) of the active barrier layer (140), wherein the first amorphous section (140a) of the active barrier layer (140) is arranged between the channel section (140n) of the active barrier layer (140) and the first crystalline section (140c) of the active barrier layer (140), wherein the active barrier layer (140) further comprises a second crystalline section (140d) which is in contact with the second amorphous section (140b) of the active barrier layer (140), and wherein the second amorphous section (140b) of the active barrier layer (140) is arranged between the channel section (140n) of the active barrier layer (140) and the second crystalline section (140d) of the active barrier layer (140). [14] Thin-film transistor substrate (1600, 1700, 1800, 1900, 2000) which has: a basic substrate (110); a light barrier layer (111) on the base substrate (110); the thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to one of claims 1 to 13, which is arranged on the light barrier layer (111); and a capacitor (Cap) connected to the light barrier layer (111), wherein the capacitor (Cap) has a first capacitor electrode (CE1) and a second capacitor electrode (CE2), wherein the first capacitor electrode (CE1) is formed integrally with the light barrier layer (111) and wherein the second capacitor electrode (CD2) is arranged on the same layer as the first active layer (130). [15] Thin-film transistor substrate (1600, 1700, 1800, 1900, 2000) according to claim 14, wherein the second capacitor electrode (CE2) has a layer having an amorphous structure or a crystalline structure. [16] Display device (2100, 2200, 2300, 2400) comprising a display panel (210) and the thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to any one of claims 1 to 13. [17] Method for manufacturing a thin-film transistor (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500) according to any one of claims 1 to 13, wherein the method comprises: Formation of an active layer (ACT) on a substrate (110); Forming a gate insulating layer (151) on the active layer (ACT); Forming a gate electrode (150) on the gate insulating layer (151) and selective doping of the active layer (ACT) with a dopant, wherein the formation of the active layer (ACT) exhibits: Forming a first oxide semiconductor material layer using a crystalline oxide semiconductor material, Forming an active pattern by structuring the first oxide semiconductor material layer and Forming a first active layer (130) exhibiting a crystalline active pattern by heat-treating the active pattern, and wherein a doped region in the active layer (ACT) has an amorphous structure. [18] Method according to claim 17, wherein the formation of the active layer (ACT) comprises: Formation of a first amorphous oxide semiconductor section and a second amorphous oxide semiconductor section on opposite sides of the crystalline active pattern; Forming a first conductive pattern (165) arranged on the first amorphous oxide semiconductor section; and Forming a second conductive pattern (175) that is arranged on the second amorphous oxide semiconductor section, wherein the first conductive pattern (165) and the second conductive pattern (175) have a transparent conductive oxide. [19] Method according to claim 18, wherein the formation of the active layer (ACT) further comprises: Passing a dopant through the first and second conductive pattern (165, 175) to form the first and second amorphous oxide semiconductor section. [20] Method according to any one of claims 17 to 19, wherein the first oxide semiconductor material layer comprises an oxide semiconductor material and a crystallization control element. [21] Method according to claim 20, wherein the formation of the active layer (ACT) further comprises: forming an amorphous oxide semiconductor material layer using an amorphous oxide semiconductor material. [22] Method according to claim 20 or 21, wherein the formation of the active layer (ACT) further comprises: forming the active barrier layer (140) using a crystalline oxide semiconductor material.

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