Method for manufacturing a magnetic sensor

Abstract

A method for manufacturing a magnetic sensor (1400), comprising the following steps: Creating (101) at least one recess (401) in a surface (203) of a front side (204) of a substrate (201), Depositing (103) an electrically conductive seed material on the surface (203) of the substrate (201) and on surfaces including a bottom (403) of the at least one recess (401) in order to form an electrically conductive seed layer (501) extending continuously from an edge region (705) of the substrate (201) into the recess (401), which can be electrically contacted in the edge region (705) of the substrate (201), Depositing (105) an electrically insulating, in particular dielectric, material onto the electrically conductive seed layer (501) to form an electrically insulating, in particular dielectric, layer (601) on the electrically conductive seed layer (501), Removing (107) the electrically insulating layer (601) at the respective bottom (403) of the at least one depression (401) and, in particular at least locally, in the edge region (705) of the substrate (201), so that the electrically conductive seed layer (501) at the respective bottom (403) of the at least one depression (401) and in the edge region (705) of the substrate (201) is uncovered by the electrically insulating layer (601), Carrying out (109) an electroplating process in order to grow a magnetic material on a surface of the electrically conductive seed layer (501) facing away from the respective bottom (403) of the at least one depression (401) in order to form at least one magnetic flux conducting element (901), Forming (111) at least one magnetic sensing element (1405, 1407, 1409) connected to the substrate (201) in such a way that it is arranged higher than the at least one magnetic flux conducting element (901) consisting of galvanically grown magnetic material with respect to the front side (204) of the substrate (201).

Description

[0001] The invention relates to a method for producing a magnetic sensor and a magnetic sensor. State of the art

[0002] In the manufacture of magnetic sensors, it is often necessary to create devices that specifically guide, concentrate, or shield an external magnetic field to be measured in order to achieve a specific sensing range, sensitivity, or direction. Such a magnetic flux guide element can, for example, consist of a layer of soft magnetic material a few micrometers thick.

[0003] The sensing element can, for example, be manufactured on silicon wafers using a semiconductor-compatible process. The flux conduction, shielding, or concentration effect of a magnetic flux conducting element on the magnetic flux at the sensing element is greater the smaller the vertical distance between the sensing element and the shielding element. The sensing element(s) can be arranged laterally inside and / or outside the area of ​​the magnetic flux conducting element. To minimize the vertical distance, the magnetic flux conducting element can be manufactured directly on the wafer as part of the wafer process before the actual sensing element is manufactured. For example, such a magnetic flux conducting element can be grown onto the wafer using a selective electroplating process. The surface on which no material is to grow must be protected by an electrically non-conductive material.If this material consists of a photoresist, for example, it must be removed after the shielding element has been created for reasons of thermal stability. In this case, a topographical step several micrometers high typically occurs between the magnetic flux guide elements and the area outside the magnetic flux guide elements, which can severely complicate further processing in typical semiconductor processes.

[0004] Alternatively, if a dielectric material is used to cover the areas where soft magnetic material is not to be grown, both the deposition and etching of such an electrically non-conductive material pose a significant challenge, as it tends to induce stress on the wafer after deposition. This stress can lead to wafer warping, especially when the electrically non-conductive material is applied to a single surface of a wafer in a thickness of a few micrometers. This can make further processing impossible or even lead to wafer breakage. This is particularly relevant when processing 300 mm wafers.Although the resulting wafer warping can be influenced to some extent by the process control during the application of the electrically non-conductive material, it is very challenging or even impossible with a greater thickness of several micrometers of the dielectric layer (electrically non-conductive layer).

[0005] A further problem arises during further processing of these wafers, since subsequent temperature steps change the layer stress of the layer system again and can lead to further problems such as wafer bending, delamination or stress cracks in the electrically non-conductive material and / or in a layer system located below or above it.

[0006] A further problem arises if the wafer contains at least one protection diode or other electronic circuitry prior to processing, which must be electrically connected in a subsequent manufacturing process. This electrical connection must, for example, be routed through the dielectric layer and also through an electrically conductive seed layer without short-circuiting them. Due to the thickness of the dielectric layer, manufacturing such an electrical connection for a protection diode is very complex and requires a large amount of chip area. Disclosure of the invention

[0007] The object underlying the invention is to provide a concept which overcomes the disadvantages mentioned above.

[0008] This object is achieved by means of the respective subject matter of the independent claims. Advantageous embodiments of the invention are the subject matter of the respective dependent subclaims.

[0009] According to a first aspect, a method for manufacturing a magnetic sensor is provided, comprising the following steps: Creating at least one recess in a surface of a front side of a substrate, Depositing an electrically conductive seed material on the surface of the substrate and on surfaces including a bottom of the at least one recess, in order to form an electrically conductive seed layer extending continuously from an edge region of the substrate into the recess, which can be electrically contacted in the edge region of the substrate, Depositing an electrically insulating, in particular dielectric, material, in particular directly, onto the electrically conductive seed layer in order to form an electrically insulating, in particular dielectric, layer, in particular directly, on the electrically conductive seed layer, Removing the electrically insulating layer at the respective bottom of the at least one depression and in the edge region of the substrate, so that the electrically conductive seed layer at the respective bottom of the at least one depression and in the edge region of the substrate is uncovered by the electrically insulating layer, Carrying out a galvanic process to grow a magnetic material on a surface of the electrically conductive seed layer facing away from the respective bottom of the at least one depression in order to form at least one magnetic flux conducting element, Forming at least one magnetic sensing element connected to the substrate in such a way that it is arranged higher than the at least one magnetic flux conducting element consisting of galvanically grown magnetic material with respect to the front side of the substrate.

[0010] According to a second aspect, a magnetic sensor is provided, comprising: a substrate, wherein at least one recess is formed in a surface of a front side of the substrate, wherein an electrically conductive seed layer extending continuously from an edge region of the substrate into the depression is formed on the surface of the substrate and on surfaces including a bottom of the at least one depression, wherein, in particular directly, an electrically insulating, in particular dielectric, layer is formed on the surface of the electrically conductive seed layer, wherein the electrically conductive seed layer is uncovered by the electrically insulating layer at the respective bottom of the at least one depression and in the edge region of the substrate, wherein at least one magnetic flux conducting element made of a galvanically grown magnetic material is formed on the electrically conductive seed layer at the respective bottom of the at least one depression, wherein at least one magnetic sensing element connected to the substrate is formed such that it is arranged higher with respect to the front side of the substrate than the at least one magnetic flux conducting element consisting of galvanically grown, magnetic material.

[0011] The invention is based on and includes the finding that the above object is achieved by producing or forming at least one depression in the surface of a front side of a substrate, wherein a magnetic material is grown on the bottom of the at least one depression during an electroplating process, so that as an end result of the electroplating process at least one element that at least partially influences a magnetic field, the magnetic flux conducting element, is formed. Thus, such an element is located within the at least one depression and not, as in the prior art, directly on the front side of the substrate. Thus, the disadvantages described above can be advantageously and efficiently avoided.

[0012] The electrically conductive seed layer covers the surfaces including the bottom of the respective at least one recess and runs continuously from the recess to the edge region of the substrate.

[0013] The electroplating process is carried out, for example, in such a way that the electrically conductive seed layer is electrically contacted at the edge region of the substrate. Also located in the edge region of the substrate, but within the edge region that is electrically contacted (contact zone), is an area that is completely covered with the electrically non-conductive material (sealing zone). Furthermore, the electroplating process particularly includes the use of an electroplating bath that is in contact with the substrate surface but is separated from the contact zone of the substrate at the outer substrate edge by the sealing zone.

[0014] The contact zone, i.e., the electrically conductive seed layer at the edge of the substrate, forms an electrode, and the electroplating bath and / or another electrode in the electroplating bath forms a counter electrode. An electrical path, i.e., an electrical connection, exists from the contact zone at the substrate edge, across the electrically conductive seed layer on the substrate surface and on the sides and bottom of the recess, into the electroplating bath, and optionally to another electrode.

[0015] When an electrical voltage is applied to the electrode and counter electrode, an electric current flows between the electrode and counter electrode, so that the magnetic material grows galvanically on the electrically conductive seed layer at the bottom of the depression.

[0016] By providing the electrically conductive seed layer and the electrically insulating cover thereof in suitable regions of the wafer, the technical advantage is achieved in particular that, during the electroplating process, the magnetic material grows only on the bottom of the respective at least one depression, but not on surfaces of the respective at least one depression and / or on the surface of the substrate.

[0017] The edge area (contact zone), for example, extends from a minimum of 1.5 mm to a maximum of 3.0 mm from the edge of the substrate. In this edge area, the electrically insulating layer is at least partially removed. Since this area is separated from the electroplating bath by the sealing zone, and therefore is not in mechanical contact with the bath, no magnetic material grows there.

[0018] This results in the technical advantage, for example, that the edge region can be used efficiently to electrically connect or contact the electrically conductive seed layer in the region of the bottom of at least one depression.

[0019] The electrically conductive seed layer in the bottom region of at least one recess, which is electrically contacted via the edge region, represents one electrode during the electroplating process, while the electroplating bath and / or another electrode in the electroplating bath represent a counterelectrode. Deposition occurs only on those surfaces where an electrical current can flow between the electrode and counterelectrode and which are in mechanical contact with the electroplating bath. During the electroplating process, the edge region of the substrate is mechanically and electrically separated from the electroplating bath by a seal.

[0020] In one embodiment of the method, it is provided that the removal of the electrically insulating layer comprises carrying out a photolithographic process, according to which an at least local removal of the electrically insulating, in particular dielectric, layer to be removed from the electrically conductive seed layer is carried out by means of an etching process.

[0021] This provides the technical advantage, for example, that removal can be carried out efficiently.

[0022] An etching process includes, for example, isotropic and / or anisotropic etching or etching behavior.

[0023] A photolithographic process, for example, involves applying a photolithographic material, such as a negative or positive resist, to the surface of the substrate. The applied resist is removed by exposure and development in the areas where the electrically insulating, particularly dielectric, layer is to be removed. This means that the areas from which the electrically insulating, particularly dielectric, layer is to be removed are not covered by a lithographic material, i.e., are free of such a lithographic material.

[0024] To reinforce the electrically insulating material on the sidewalls of the at least one recess, one embodiment of the method may, for example, provide for a spacer process to be performed prior to the deposition of the electrically insulating material. For this purpose, electrically insulating, in particular dielectric, material can be deposited on the surfaces, including the sidewalls, of the at least one recess in an isotropic (conformal) deposition process and then anisotropically etched back in a subsequent step. This leaves the electrically insulating material in place, particularly on the sidewalls of the at least one recess, so that they are effectively protected during the electroplating process.

[0025] In one embodiment of the method, after the electroplating process, a chemical-mechanical polishing process is performed on the surface of the substrate to form a smooth, flat surface. This can be done, for example, either directly after the electroplating process or, for example, after applying an additional electrically insulating, in particular dielectric, layer. The chemical-mechanical polishing process aims, in particular, to produce a surface that is as smooth and flat as possible.The polishing process can, for example, stop within the uppermost electrically insulating, in particular dielectric, layer, after removal of the electrically conductive seed layer from the surface of the substrate outside the at least one recess, after removal of the uppermost magnetic layer of the magnetic flux conducting element, or at any other height that leaves at least a part of the at least one recess in which the galvanically grown magnetic material is located.

[0026] This provides, for example, the technical advantage that a flat, smooth surface of the substrate can be formed efficiently. This advantageously allows subsequent manufacturing processes for the magnetic sensing element to be carried out efficiently, and a small lateral distance between the magnetic flux conducting element and the sensing element can be achieved. In general, this can provide the technical advantage that the substrate can be efficiently further processed. In particular, a low surface topography and a low surface roughness are advantageous for the production of the at least one magnetic sensing element.

[0027] In one embodiment of the method, it is provided that the seed material comprises one or more of the following materials: Ta, TaN, Cu, CuN, Ti, TiN, Cr and NiFe.

[0028] This provides the technical advantage, for example, that particularly suitable germination materials can be used.

[0029] In one embodiment of the method, it is provided that the electrically conductive seed material is deposited such that a layer thickness of the electrically conductive seed layer on the bottom of the recess is in the open or semi-open or closed interval of 20 nm to 300 nm or more.

[0030] This results in the technical advantage, for example, that a particularly suitable layer thickness can be provided which has a sufficiently low electrical resistance so that the electrogalvanic deposition process, i.e. the electroplating process, can proceed or be carried out with good homogeneity.

[0031] In one embodiment of the method, it is provided that the dielectric material may comprise one or more of the following materials: SiO2, SiOx, Si3N4, SiON and Al2O3 and may optionally consist of several successively applied layers and / or layer sequences.

[0032] This results in the technical advantage, for example, that particularly suitable dielectric materials can be used.

[0033] A germ layer can also be called a “seed layer” in English.

[0034] A galvanic process includes, for example, electroplating.

[0035] For example, the recess has a depth which lies in an open or semi-open or closed interval of 0.1 µm to 20 µm.

[0036] The magnetic sensing element is, in particular, an in-plane or out-of-plane sensitive magnetic sensing element. An in-plane magnetic sensing element is one that is sensitive to magnetic fields parallel to the substrate surface. An out-of-plane magnetic sensing element is one that is sensitive to magnetic fields perpendicular to the substrate surface.

[0037] The substrate is, for example, a wafer, such as a Si wafer (silicon wafer), or a SiO2 wafer (silicon dioxide wafer), or a SOI wafer (silicon-on-insulator wafer). The substrate is, for example, a semiconductor substrate.

[0038] The photolithographic material comprises, for example, a photoresist, in particular a negative resist or a positive resist.

[0039] The term “photoresist” can also be used for the term “photoresist”.

[0040] Statements made in connection with the method apply analogously to the magnetic sensor, and vice versa. This means that technical functionalities and technical features of the magnetic sensor according to the second aspect result analogously from corresponding technical functionalities and technical features of the method according to the first aspect, and vice versa.

[0041] The magnetic sensor according to the second aspect is or was manufactured, for example, by means of the method according to the first aspect.

[0042] Arranging within the meaning of the description includes or is, for example, a deposition, in particular a conformal deposition or a non-conformal deposition. The term "deposition" includes, in particular, a conformal deposition or a non-conformal deposition.

[0043] The magnetic sensing element is based, for example, on the AMR effect (“anisotropic magnetoresistance effect”) and / or on the GMR effect (“giant magnetoresistance” effect or “giant magnetoresistance effect”) and / or on the TMR effect (“tunnel magnetoresistance” effect or “magnetic tunnel resistance effect”) or Hall effect.

[0044] The phrase “at least one” means “one or more”.

[0045] When the singular is used for the magnetic sensing element, the plural should always be included, and vice versa. The same applies to the magnetic flux conducting element. Here, too, several such elements can be formed, for example. The same applies to the recess. Here, too, several such recesses can be formed, for example. Statements made in connection with one recess apply analogously to multiple recesses, and vice versa.

[0046] For example, several depressions have a common, continuous germ layer as described.

[0047] The magnetic material is or includes, for example, NiFe (81:19).

[0048] Influencing within the meaning of the description includes, for example, a (re)direction and a resulting strengthening or weakening of the magnetic field at the sensing element or the change of the directional components of the magnetic field at the sensing element.

[0049] The magnetic flux guiding element is in particular designed to influence a magnetic field, i.e. in particular to (re)direct and / or to amplify or attenuate the magnetic field impinging on the sensing element.

[0050] A recess, as defined in this description, is defined by a base and, for example, a single, optionally curved, side wall or several adjacent, for example curved, side walls. It should be noted here that the term "inner wall" can also be used in general for the term "side wall."

[0051] A side wall of the depression can, for example, run perpendicular to the floor. A side wall of the depression can, for example, run at an angle. The depression can, for example, have inclined side walls or inner walls. In cross-section, a funnel shape is thus formed. The depression has, for example, a funnel shape. In other words, the depression is, for example, a funnel-shaped depression. The base area of ​​the funnel can take on various geometric shapes, for example, but not limited to a rectangle, a plate that is large compared to the sensing elements, a rectangle with a long and short edge (i.e., more like a bar), an n-gon (n>2), any figure made up of curved lines, or any combination of these elements, depending on the desired deflection effect. Immediately adjacent side walls can, for example, be arranged at any angle to one another.

[0052] The recess is designed, for example, in such a way that it has (slightly) inclined side walls. For example, the angle between the bottom and one or all of the side walls of the recess can be between 90° and 110°, so that the bottom area of ​​the recess is smaller than the opening of the recess at the substrate surface, for example at the wafer surface, and the bottom of the recess lies within the region of the opening at the substrate surface. This has the advantage that, despite alignment inaccuracies, the edges of the photoresist regions can be formed preferentially on the inclined side walls of the recess and not within the bottom area or outside the recess. This means that, despite alignment inaccuracies, at least part of the side walls (in particular the upper part) is protected in any case and, secondly, no feet made of dielectric material are created at the bottom of the recess, which will be described in more detail below.This can, for example, also be combined with a spacer process, as described above, in which, in addition to (before or after) the described steps, a deposition and structuring of an additional dielectric material is performed. A combination of conformal deposition and anisotropic etching of the additional dielectric material can create an additional layer of dielectric material, particularly on the sidewalls of the recess. This has the advantage of a self-aligning process and thus a reduction in the number of feet at the bottom of the recess in combination with sufficient dielectric material on the sidewalls.

[0053] For example, the edge length of the base of the recess can be a few µm up to a few 100 µm.

[0054] In one embodiment of the method, it is provided that the electrically conductive seed layer is structured in such a way that at least one electrically conductive, in particular conductor-like, structure formed from the seed material is formed starting from the edge region of the substrate into the region of the at least one recess.

[0055] The electrically conductive seed material can therefore optionally also be structured. An electrical connection of the electrically conductive seed material in the region of the recess can thus advantageously be brought about via this electrically conductive structure made of electrically conductive seed material. Furthermore, the structuring can advantageously efficiently influence an electrical current flow to the at least one recess across the structure width and / or structure thickness. The structure comprises or is, for example, one or more conductor tracks. A structure width is or includes, for example, a conductor track width. A structure thickness is or includes, for example, a conductor track thickness. The structure width and / or the structure thickness of one or more conductor tracks can vary along their course or can be designed differently.

[0056] A diameter of the substrate can be, for example, 150 mm, 200 mm or 300 mm.

[0057] The invention is explained in more detail below using preferred embodiments. These show: Fig. 1 is a flowchart of a method for manufacturing a magnetic sensor, Fig. 2 to 13 each show a wafer in a cross-sectional view at different times in a method for producing a magnetic sensor, Fig. 14 a magnetic sensor in a cross-sectional view, Fig. 15 shows a wafer in a cross-sectional view at a time in a method for manufacturing a magnetic sensor and Fig. 16 a wafer in a plan view.

[0058] In the following, the same reference symbols may be used for the same features.

[0059] Fig. 1 shows a flowchart of a method for manufacturing a magnetic sensor, comprising the following steps: Creating 101 at least one recess in a surface of a front side of a substrate, Depositing 103 an electrically conductive seed material on the surface of the substrate and on surfaces including the side walls and a bottom of the at least one recess, in order to form an electrically conductive seed layer extending continuously from an edge region of the substrate into the recess, which can be electrically contacted in the edge region of the substrate (and which can optionally be structured such that at least one electrically conductive, conductor-like structure formed from the seed material is formed from the edge region of the substrate into the region of the at least one recess, wherein optionally a structuring of this electrically conductive layer is provided, so that, however, continuous electrical contact is still ensured,) Depositing 105 an electrically insulating, in particular dielectric, material directly onto the electrically conductive seed layer in order to form an electrically insulating, in particular dielectric, layer directly on the electrically conductive seed layer, Removing 107 the electrically insulating layer at the respective bottom of the at least one depression and in the edge region of the substrate, so that the electrically conductive seed layer at the respective bottom of the at least one depression and in the edge region of the substrate is uncovered by the electrically insulating layer, Carrying out 109 an electroplating process to grow a magnetic material on a surface of the electrically conductive seed layer facing away from the respective bottom of the at least one depression in order to form at least one magnetic flux conducting element, Forming 111 at least one magnetic sensing element connected to the substrate in such a way that it is arranged higher than the at least one magnetic flux conducting element consisting of galvanically grown magnetic material with respect to the front side of the substrate.

[0060] The fact that the magnetic sensing element is arranged higher than the at least one magnetic flux conducting element consisting of galvanically grown magnetic material with respect to the front side of the substrate means in particular that, viewed laterally, the magnetic sensing element is arranged inside and / or outside the region of the magnetic flux conducting element.

[0061] Fig. 2 shows a wafer 201 as an example of a substrate in the sense of the description in a cross-sectional view.

[0062] A dielectric layer 205 has already been applied to a surface 203 of a front side 204 of the wafer 201. This can also be a dielectric layer system, such as a combination of SiN and SiO2. Opposite the front side 204 of the wafer 201, the wafer 201 has a back side 206. The wafer 201 further comprises a first protection diode 207 and a second protection diode 209, which are located below the surface 203 of the wafer 201. It should be noted at this point that the two protection diodes 207, 209 are optional. In an embodiment not shown, other electronic circuits are provided instead of or in addition to the protection diodes 207, 209. In an embodiment not shown, no or a different number of such protection diodes 207, 209, or other electronic circuits are provided.

[0063] Fig. 3 shows wafer 201, onto which a photoresist 301 has been applied. Photoresist 301 is an example of a photolithographic material as described. The photoresist has been patterned using an exposure and development process, resulting in an area on surface 203 of wafer 201 that is free of photoresist 301. This area is designated by reference numeral 303. In this area 303, a recess is etched into surface 203 of wafer 201, as shown and described below.

[0064] The photoresist 301 is exposed and developed so that in a subsequent etching process, which is Fig. 4, first the dielectric material 205 is etched (removed) in the areas not covered with photoresist and then a recess 401 is etched into the surface 203 of the wafer 201. Fig. 4 shows the wafer 201 with the photoresist 301 already removed.

[0065] The recess 401 is defined by a bottom 403 and a single, optionally curved sidewall or multiple adjacent sidewalls. It is noted here that the term "sidewall" may also be used generally as the term "inner wall." In the cross-sectional view, two reference numerals are used for two sidewalls: a first sidewall 405 and a second sidewall 407. It is noted that the first and second sidewalls 405, 407 may also be respective portions of a single curved sidewall.

[0066] An edge length of the recess 401 can, for example, be a few µm up to a few 100 µm.

[0067] A diameter of the wafer 201 can be, for example, 150 mm, 200 mm or 300 mm.

[0068] Using a photolithography process and, for example, an etching process, such as plasma etching, the desired recess 401 is etched into the wafer 201. After applying and structuring a seed layer and an insulating layer, material is grown in the etched recess using an electrogalvanic plating process, i.e., a deposition process. This will be explained further below.

[0069] Fig. 5 shows a conformal deposition of an electrically conductive seed layer, i.e., an electrically conductive germ layer, made of, for example, a 20 nm to 300 nm thick metal such as Ta, TaN, Cu, Ti, TiN, NiFe, Cr, or another conductive material, or a layer sequence comprising a combination thereof. The germ layer is designated by reference numeral 501. The germ layer 501 completely covers the front side of the wafer 204, thus covering, in particular, the sidewalls 405, 407, and the bottom 403. Thus, a continuously extending germ layer is formed within the meaning of the description.

[0070] According to Fig. 6, a dielectric material is deposited. Such a dielectric material is, for example, SiO2 or Si3N4 or Al2O3 or the like, or a layer combination thereof. It is provided that the dielectric material covers the entire front side of the wafer 204, so that the seed layer 501 is completely covered by the correspondingly formed dielectric layer, denoted by reference numeral 601.

[0071] Fig. 7 shows wafer 201 during a photolithographic process, according to which a photoresist 701 is applied to wafer 201 and removed again in individual areas by means of exposure and development (photolithography). Accordingly, photoresist 701 was removed from the bottom 403 and from the edge region 705 of wafer 201. The edge region 705 extends from the edge 703 to a predetermined distance from the edge 703. Edge 703 here refers to the outer wafer edge.

[0072] Thus, in particular, a photolithography process is carried out such that the bottom 403 of the recess 401 is free of photoresist 701 and that side walls 405, 407 are covered with photoresist and that the further surface 203, i.e. the non-etched surface 203 (the surface outside the recesses), of the substrate 201 is covered with photoresist 701 and that the edge region 705 is free of photoresist 701.

[0073] To overcome high topographies, a spray resist process can be used, for example. However, another method for applying the resist can also be used.

[0074] According to Fig. 8, the dielectric material, i.e., the dielectric layer 601 not covered by photoresist 701, is etched. Thus, an etching of the dielectric material takes place. An etch stop occurs in the photoresist-free or resist-free areas at the bottom 403 of the recess 401 and in the edge region 705 on the seed layer 501. Fig. Figure 8 shows an anisotropic etching process, i.e., a directed etch, with high selectivity (etch rate ratio between the dielectric layer and photoresist). This means that the etching progress is directed toward the bottom of the recess (anisotropic), and the etch rate of the dielectric material is higher than that of the photoresist and the seed layer. This ensures that the edge of the recess remains covered with dielectric material. Following the etching process, the photoresist is removed. The isotropy (ratio between the lateral and vertical etch rate), the selectivity of the etching process (ratio between the etch rates of the dielectric material and the resist), and the thickness of the resist layer on the sidewalls must be coordinated so that after etching, the sidewalls are still at least partially covered with dielectric material.

[0075] In the Fig. In the illustration shown in Figure 8, the resist or photoresist 701 has already been removed.

[0076] The result is a structure that meets the requirements of a subsequent electroplating process: The bottom 403 of the recess 401 is provided with an electrically conductive layer, the seed layer 501, which has a continuous electrical contact up to the wafer edge region 705 and / or up to the wafer edge 703, so that electrical contacting of the seed layer 501 can take place within the wafer edge region 705.

[0077] All areas where no magnetic material is to grow, i.e. the side walls 405, 407 and the unetched surface 203 of the wafer 201, have an electrically insulating layer, the dielectric layer 601, on the surface.

[0078] The edge region 705 of the wafer 201 is free of electrically insulating material and can thus be used as an electrical connection for the electroplating process.

[0079] Due to the anisotropic etching, parts of the dielectric layer 601 can remain on the seed layer 501 in the region of the bottom 403 of the recess in the region of the transition between the sidewalls 405, 407 and the bottom 403. Reference numerals 801 and 803 identify these regions.

[0080] According to Fig. 9, within the scope of such an electroplating process, a magnetic material is grown on the seed layer 501 covering the bottom 403 of the depression 401 in order to form an element 901 that at least partially influences a magnetic field, i.e. a magnetic flux conducting element.

[0081] The magnetic material is or includes, for example, NiFe.

[0082] Influencing within the meaning of the description includes, for example, a (re)direction and a resulting strengthening or weakening of the magnetic field at the sensing element or the change of the directional components of the magnetic field at the sensing element.

[0083] Fig. 10 shows the Fig. 9 after a chemical-mechanical polishing process on the surface 203 of the wafer 201, according to which the dielectric layer 601, the seed layer 501 and a part of the SiO2 layer 205 are removed in order to achieve a planar surface.

[0084] The result is a magnetic element up to several µm thick, which can be, for example, a shielding element, a deflection element, an attenuation element, or an amplification element for an external magnetic field, in the recess 401 of the wafer 201, without the wafer 201 being exposed to significantly increased stress. Furthermore, such a wafer has a flat surface that is particularly suitable for further processing using standard semiconductor processes.

[0085] A flat surface, as defined by this description, can be a surface with low topography, i.e., a surface that has few elevations or depressions in the Z-direction, i.e., in the perpendicular direction relative to the front side of the wafer, or generally the substrate. A planarized surface, as defined by this description, can be a surface that initially had a topography and, after the planarization process, no longer has a topography, thus also being a flat surface.

[0086] The Fig. 11 to 13 show analogous to the Fig. 8 to 10 the corresponding steps, whereby the difference in the context of etching, as it is related to Fig. 7 and Fig. 8 was described, according to Fig. 11, isotropic and / or less selective etching takes place. Isotropic here means etching with similar etch rates in all directions, including the sidewalls. Less selective in this context means a similar etch rate for the dielectric material and the resist. This reduces the size of the feet 801 and 803 described in the first variant.

[0087] Fig. 14 shows a magnetic sensor 1400 which uses the Fig. 10. The function of the magnetic flux guiding element in this case is to partially redirect magnetic fields in a planar direction (i.e., parallel to the wafer surface) toward the magnetic flux guiding element, thereby reducing and / or changing the direction of the magnetic field on the sensing element and thus creating a weakening effect for the sensor function and expanding the sensing range.

[0088] Two magnetic sensing elements, a first magnetic sensing element 1401 and a second magnetic sensing element 1403, were formed above element 901. From above, the two magnetic sensing elements 1401, 1403 can be electrically contacted with a common electrically conductive contact structure 1405. From below, the two magnetic sensing elements 1401, 1403 each have their own electrically conductive contact structure 1407, 1409 for electrically contacting the corresponding magnetic sensing element 1401, 1403. Here, the electrically conductive contacting structure 1407 contacts the first magnetic sensing element 1401 from below and connects it to the first protective diode 207. Here, the electrically conductive contacting structure 1409 contacts the second magnetic sensing element 1403 from below and electrically connects it to the second protective diode 209.However, the interconnection of any number of sensing elements can also be carried out differently than shown here in a suitable manner using a combination of series and parallel circuits and / or a Wheatstone bridge circuit using the upper and lower contact structures shown or other contact structures not shown.

[0089] The electrically conductive contacting structures 1405, 1407, 1409 and the two magnetic sensing elements 1401, 1403 are located within an electrically insulating layer 1411 or electrically insulating layer sequence.

[0090] Fig. 15 shows a wafer at a time in a method for manufacturing a magnetic sensor, which corresponds to the time according to Fig. 9 or Fig. 12. The Fig. 15 is essentially analogous to the wafer 201 shown in Fig. 12. This means that isotropic etching has also taken place here, so that the feet 801 and 803 are reduced in size until they are no longer present. In this example, a further dielectric layer 1501 is applied between surface 203 and dielectric layer 205, which together with dielectric layer 205 form a dielectric layer system. For example, the further dielectric layer 1501 is a SiN layer, and for example, the dielectric layer 205 is a SiO2 layer.

[0091] Another difference of the Fig. 15 shown wafer 201 to the one in Fig. A feature of the wafer 201 shown in Figure 12 is that the side walls 405, 407 do not run perpendicular to the bottom 403, but rather at an angle. The recess 401 thus has angled side walls or inner walls. In cross-section, a funnel shape is thus formed. The recess 401 thus has a funnel shape. In other words, the recess 401 is a funnel-shaped recess.

[0092] The recess 401 is thus formed such that it has (slightly) inclined side walls. For example, the angle between the bottom 403 and one of the side walls 405, 407 of the recess 401 can be between 90° and 110°, so that the bottom area of ​​the recess 401 is smaller than the opening of the recess 401 at the substrate surface 203, i.e., in this case, at the wafer surface, and the bottom 403 of the recess 401 lies laterally within the region of the opening at the substrate surface 203. This has the advantage that, despite alignment inaccuracies, the edges of the photoresist regions are reliably formed on the inclined side walls 405, 407 of the recess 401 and not within the bottom area or outside the recess. Thus, despite adjustment inaccuracies, at least part of the side walls 405, 407 (in particular the upper part) is protected in any case and, on the other hand, no feet 801, 803 made of dielectric material are created, as described above.This can, for example, also be combined with a spacer process in which, in addition to (before or after) the described steps, the deposition and structuring of an additional dielectric material takes place. A combination of conformal deposition and anisotropic etching of the additional dielectric material can create an additional layer of dielectric material, particularly on the sidewalls of the recess. This has the advantage of a self-aligning process and thus a reduction in the number of feet at the bottom of the recess in combination with sufficient dielectric material on the sidewalls.

[0093] Fig. 16 shows a wafer 201 in a plan view of the front side 204. The wafer 201 is, for example, analogous to the wafer shown in Fig. 14, but has a plurality of magnetic sensors 1400, which are analogous to the magnetic sensor 1400 according to Fig. 14 or, for example, different from the magnetic sensor 1400 according to Fig. 14. Thus, the multiple magnetic sensors 1400 are divided according to Fig. 16 a common wafer.

[0094] The image also shows two edge zones: The outer edge zone 705 corresponds to the contact zone, where the electrically conductive layer is not covered with the dielectric material. An inner edge zone 1601 corresponds to the sealing zone. It is completely covered with dielectric material and can be used for sealing (mechanically and electrically) between the electroplating bath and the contacted wafer edge.

[0095] For example, in a general embodiment, it can be provided that after the formation of at least one magnetic sensing element, one or more further magnetic flux conducting elements are formed such that they are arranged higher than the at least one magnetic sensing element with respect to the front side of the substrate.

[0096] In other words, after forming at least one magnetic sensing element, additional magnetic flux deflectors and / or additional magnetic shielding elements can be formed such that they are arranged higher than the at least one magnetic sensing element relative to the front side of the substrate. Since these additional elements are applied after the sensing elements have been manufactured, planarization of the surface is not absolutely necessary, which can eliminate the need for corresponding planarization processes. Furthermore, a conventional semiconductor process can advantageously be used to manufacture these additional elements, making the entire process efficient.

[0097] In summary, the concept described here is based in particular on, for example, first etching a recess several micrometers deep into the surface of a substrate, such as a silicon wafer or an SiO2 wafer. After applying a seed layer and applying and structuring a dielectric layer, magnetic material is grown in the etched silicon structures using an electrogalvanic plating process. For example, one or more of the following steps are envisaged: Creating a patterned photoresist mask and / or a patterned hard mask and plasma etching the desired structures (depression(s)) in the silicon wafer, i.e., in the silicon material, particularly several micrometers deep. Known methods, such as plasma or wet etching, can be used to etch deep silicon structures. The process can also be applied to an SiO2 wafer; in this case, the depression is etched into the SiO.

[0098] For example, a deposition, in particular a conformal deposition, of the dielectric conductive seed layer is carried out, for example 20 nm to 300 nm thick metal such as Ta, TaN, Cu, Ti, TiN, NiFe or another conductive material or a layer combination of these.

[0099] For example, a dielectric material is deposited, in particular conformally deposited, for example SiO2 or SiOx or Si3N4 or SiON or Al2O3 or the like or a layer combination of these.

[0100] For example, a photolithography process is performed. This is done in such a way that the bottom of the recess is free of any photolithographic material, especially a resist.

[0101] The photolithography process is carried out at least in such a way that the side walls of the recess are at least partially covered with a photolithographic material, in particular a resist.

[0102] For example, the photolithography process is carried out in such a way that the unetched surface (i.e. the surface outside the recesses minus the edge area) of the substrate is covered with a photolithographic material, in particular a resist.

[0103] For example, the photolithography process is carried out in such a way that a wafer edge and in particular a corresponding edge region is free of a photolithographic material, in particular a resist.

[0104] In order to overcome high topographies during the resist coating process, for example, a spray resist process can (but does not have to) be carried out.

[0105] For example, an etching of the dielectric material is performed. This involves removing the dielectric material from the resist-free areas at the bottom of the recess and at the edge, stopping at the conductive material, i.e., the seed layer.

[0106] For example, the photolithographic material, especially the resist, is removed.

[0107] The result is, for example, a structure that meets the requirements of a subsequent electroplating process: The bottom of the recess is provided with an electrically conductive layer, which provides continuous electrical contact up to the wafer edge. All areas except the edge area 705, in which no material is to grow, i.e. the side walls and the surface of the wafer outside the at least one recess, have an electrically insulating layer. The wafer edge is at least partially free of electrically insulating material and can serve as an electrical connection during the electroplating process.

[0108] For example, an electroplating process can now be carried out using such a structure, whereby during the electroplating process the magnetic material, for example NiFe, grows in the open areas starting from the bottom of the recess.

[0109] After the magnetic material has grown, i.e. after the magnetic flux guiding element has been formed, another dielectric layer can be applied.

[0110] Subsequently, for example, a chemical-mechanical polishing process can be carried out to remove part of the dielectric on the surface of the silicon wafer, i.e. to planarize the surface and reduce the surface topography.

[0111] The chemical-mechanical polishing process can, for example, also be continued to such an extent that, after complete removal of the upper dielectric layer, at least in some areas, additional parts of the other dielectric layer, the seed layer, the carrier material and the magnetic material are removed in order to further planarize the surface and, in particular, to reduce the distance of the magnetic flux conducting element to the substrate surface and thus to the sensing elements applied later.

[0112] The result is, in particular, an element up to several µm thick made of a soft magnetic material, which can at least partially influence an external magnetic field, i.e., in particular, deflect it and thereby achieve an amplification, attenuation, and / or change in the direction of the magnetic field on the sensing element, i.e., a magnetic flux conducting element. This element is formed in the recess. The method described here has the advantage, for example, that the wafer is not exposed to significantly increased stress and does not bend excessively. Furthermore, the method presented here has the technical advantage that, after production of the element from magnetic material, a planar surface of the substrate, i.e., in particular of the silicon or SiO2 wafer, is achieved, which is advantageously suitable for further processing using standard semiconductor processes and, in particular, for the arrangement of magnetic sensing elements.

[0113] As already mentioned in connection with the Fig. 8 and Fig.As explained in Figure 11, the dielectric layer can be etched isotropically or anisotropically. If the etching is performed with a high anisotropic etching fraction and high selectivity between photolithographic material, in particular resist, the dielectric material, and the seed layer, foot-like structures made of dielectric material can be formed at the bottom of the recess, along the sidewalls, which can also be referred to as walls. If the etching is performed with a higher isotropic etching fraction and / or low selectivity of the etching rate to the resist, such foot-like structures consisting of the dielectric material can be formed to a lesser extent in the region of the bottom or even avoided entirely. Alternatively, the recesses can also be formed such that they have slightly slanted sidewalls.For example, the angle between the bottom and the sidewall of the recess can be between 90° and 110°, so that the bottom area of ​​the recess is smaller than the opening of the recess at the substrate surface, and the bottom of the recess lies within the area of ​​the opening at the substrate surface. This has the advantage that, despite alignment inaccuracies, the edges of the photoresist regions are reliably formed on the sloped sidewalls and not inside the bottom area or outside the recess. This ensures that, despite alignment inaccuracies, at least part of the sidewalls (especially the upper part) is protected in any case, and, secondly, no feet made of dielectric material are created as described above.This can also be combined with a spacer process, in which, in addition to (before or after) the described steps, the deposition and structuring of an additional dielectric material is performed. A combination of conformal deposition and anisotropic etching of the additional dielectric material can create an additional layer of dielectric material, particularly on the sidewalls of the recess. This has the advantage of a self-aligning process and thus a reduction in the number of feet at the bottom of the recess, in combination with sufficient dielectric material on the sidewalls.

[0114] Thus, based on the concept presented here, the problem of topography and wafer stress can be advantageously solved by electroplating into applied and structured resist or dielectric layers by producing the structures in the semiconductor substrate, in particular a silicon or SiO2 wafer, itself, i.e. by producing one or more recesses in the wafer, wherein the electrically conductive layer, i.e. the seed layer, is deposited over this topography and areas in which no material is to grow are covered with a dielectric.

[0115] With the concept presented here, magnetic material up to several µm thick can be advantageously deposited by selective electroplating.

[0116] Furthermore, the wafer surface at the end of the electroplating process can advantageously have no or only a slight topography, making it suitable for efficient further processing with standard semiconductor processes.

[0117] In contrast to the known prior art described above, the method presented here creates little or no additional wafer bow, i.e., wafer warpage, since no thick material with a different expansion coefficient than silicon is applied to the wafer surface. Instead, only very thin layers (e.g., 20–300 nm) are deposited in recesses in the substrate (silicon or SiO2). Thus, recesses or a depression are provided in the wafer in which the magnetic material is to grow. This allows the problem of wafer bow, with all its consequences, to be efficiently solved or at least significantly reduced.

[0118] If the method involves the use of a protective diode, i.e., a so-called EMC diode (EMC stands for electromagnetic compatibility), or other electrical or electronic circuits that may be electrically connected to the magnetic sensing element(s), these can advantageously be fabricated in advance in the wafer when using a silicon wafer. Unlike the prior art described above, this does not pose a problem because they can be arranged on the wafer surface next to the etched or plated structures. Contacting is significantly simpler and saves space, since the concept presented here does not require a thick dielectric layer, which would otherwise have to be used to create electrical contact structures.

[0119] Thus, in particular, a plated element made of magnetic material is created which, unlike in the prior art described above, will be surrounded by substrate material, separated by at least one layer of dielectrics, at least on the side walls of the recess, and a layer of seed layer, on the bottom of the recess and on the side walls of the recess.

Claims

[1] A method for manufacturing a magnetic sensor (1400), comprising the following steps: Creating (101) at least one recess (401) in a surface (203) of a front side (204) of a substrate (201), Depositing (103) an electrically conductive seed material on the surface (203) of the substrate (201) and on surfaces including a bottom (403) of the at least one recess (401) in order to form an electrically conductive seed layer (501) extending continuously from an edge region (705) of the substrate (201) into the recess (401), which can be electrically contacted in the edge region (705) of the substrate (201), Depositing (105) an electrically insulating, in particular dielectric, material onto the electrically conductive seed layer (501) to form an electrically insulating, in particular dielectric, layer (601) on the electrically conductive seed layer (501), Removing (107) the electrically insulating layer (601) at the respective bottom (403) of the at least one depression (401) and, in particular at least locally, in the edge region (705) of the substrate (201), so that the electrically conductive seed layer (501) at the respective bottom (403) of the at least one depression (401) and in the edge region (705) of the substrate (201) is uncovered by the electrically insulating layer (601), Carrying out (109) an electroplating process in order to grow a magnetic material on a surface of the electrically conductive seed layer (501) facing away from the respective bottom (403) of the at least one depression (401) in order to form at least one magnetic flux conducting element (901), Forming (111) at least one magnetic sensing element (1405, 1407, 1409) connected to the substrate (201) in such a way that it is arranged higher than the at least one magnetic flux conducting element (901) consisting of galvanically grown magnetic material with respect to the front side (204) of the substrate (201). [2] Method according to claim 1, wherein the removal of the electrically insulating layer comprises performing a photolithographic process, according to which an at least local removal of the electrically insulating, in particular dielectric, layer to be removed from the electrically conductive seed layer (501) is carried out by means of an etching process. [3] Method according to claim 1 or 2, wherein after carrying out the electroplating process and in particular after depositing a further dielectric layer, a chemical-mechanical polishing process is carried out on the surface (203) of the substrate (201) in order to form a planar surface. [4] A method according to any one of the preceding claims, wherein the seed material comprises one or more of the following materials: Ta, TaN, Cu, Ti, TiN, Cr and NiFe. [5] Method according to one of the preceding claims, wherein the electrically conductive seed material is deposited on the bottom (403) of the recess (401) such that a layer thickness of the electrically conductive seed layer (501) on the bottom (403) of the recess (401) lies in an open or semi-open or closed interval of 20 nm to 300 nm. [6] Method according to one of the preceding claims, wherein the electrically conductive seed layer (501) is structured such that at least one electrically conductive, in particular conductor-like, structure formed from the seed material is formed starting from the edge region (705) of the substrate (201) into the region of the at least one recess (401). [7] A method according to any one of the preceding claims, wherein the dielectric material comprises one or more of the following materials: SiO2, SiON, SiOx, Si3N4 and Al2O3. [8] Method according to one of the preceding claims, wherein a spacer process is carried out to reinforce the electrically insulating material on one or more side walls (405, 407) of the at least one recess (401) before the deposition of the electrically insulating material. [9] Magnetic sensor (1400), comprising: a substrate (201), wherein at least one recess (401) is formed in a surface (203) of a front side (204) of the substrate (201), wherein an electrically conductive seed layer (501) is formed on the surface (203) of the substrate (201) and on surfaces including a bottom (403) of the at least one depression (401), extending continuously from an edge region (705) of the substrate (201) into the depression (401), wherein, in particular on the surface of the electrically conductive seed layer (501), an electrically insulating, in particular dielectric, layer (601) is formed, wherein the electrically conductive seed layer (501) is uncovered by the electrically insulating layer (601) at the respective bottom (403) of the at least one depression (401) and in the edge region (705) of the substrate (201), in particular at least locally, wherein at least one magnetic flux conducting element (901) made of a galvanically grown magnetic material is formed on the electrically conductive seed layer (501) at the respective bottom (403) of the at least one depression (401), wherein at least one magnetic sensing element (1405, 1407, 1409) connected to the substrate (201) is formed such that it is arranged higher with respect to the front side (204) of the substrate (201) than the at least one magnetic flux conducting element (901) consisting of galvanically grown, magnetic material.

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