Four K splicing processor and four K splicing display system

By designing a 4K splicing processor and using FPGA chips and TVS array chips to process 4K resolution signals, the splicing display system structure is simplified, the device complexity problem is solved, and the high-definition improvement from 1080P to 4K is achieved, providing a clearer image display effect.

CN105516619AInactive Publication Date: 2016-04-20SHENZHEN WEIGUAN VIEWS TECH LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHENZHEN WEIGUAN VIEWS TECH LTD
Filing Date
2016-01-26
Publication Date
2016-04-20
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The existing splicing display system has complicated equipment and is prone to problems that affect normal operation. It is difficult to meet users' needs for high resolution and high image quality.

Method used

A 4K splicing processor is designed, which uses FPGA chips and TVS array chips to realize 4K resolution signal processing and loop-through through DisplayPort signal line connectors, simplifying the system structure and eliminating the need for signal distributors and other equipment.

🎯Benefits of technology

It reduces the complexity of the 4K splicing display system and improves the image display effect. It is upgraded from 1080P to 4K ultra-high-definition display. The display effect is clearer and more realistic. It supports a variety of video image signal types, and has intelligent temperature control and multi-functional system parameters. choose.

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Abstract

The embodiment of the invention discloses a 4K splicing processor and a 4K splicing display system. The 4K splicing processor comprises a driving circuit used for processing a 4K resolution signal, the driving circuit comprises an FPGA chip U5, TVS array chips U10, U11, U12 and U13 and DP signal line connectors CN9 and CN10; the model of the U5 is Spartan-6, the models of the U10, the U11, the U12 and the U13 are all RClamp0524P, the CN9 is connected with the U5 through the U10 and the U11, and the CN10 is connected with the U5 through the U12 and the U13; the U5 receives the input 4K resolution signal through the CN9 to process the 4K resolution signal and outputs the processed 4K resolution signal through the CN10 to achieve 4K resolution signal looping. According to the 4K splicing processor and the 4K splicing display system, the problem that 4K splicing display system equipment is complex is solved.
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