Three-level power semiconductor module with one induction surface

Abstract

A three-level power semiconductor module is presented, comprising an electrically insulating substrate with a normal direction, a plurality of conductor tracks for carrying a first, second, and third DC load potential, arranged on this substrate, each with a power semiconductor device arranged on an associated conductor track, an internal interconnection device having a top surface, consisting of a first electrically conductive and a first electrically insulating film, the interconnection device having a first, a second, and a third film conductor track each for carrying an associated DC load potential, and an electrically conductive induction surface, which is electrically insulated from the film conductor tracks, arranged in the power semiconductor module, the induction surface covering all three film conductor tracks.

Description

[0001] The invention describes a three-level power semiconductor module with an electrically insulating substrate, with a plurality of conductor tracks for carrying a first, second and third DC load potential, arranged on this substrate, each with a power semiconductor component, preferably with a large band gap, each arranged on an associated conductor track, with an internal connecting device which has a top side made of a first electrically conductive and a first electrically insulating film, wherein the connecting device has a first, a second and a third film conductor track, each for carrying an associated DC load potential.

[0002] DE 10 2013 104 949 B3 discloses a power semiconductor module comprising a substrate, a power semiconductor component, a connecting device, load connection devices, and a pressure device. The substrate has electrically insulated conductor tracks, and a power semiconductor component is arranged on one conductor track. The connecting device is designed as a film composite with an electrically conductive and an electrically insulating film and has a first and a second main surface. The power semiconductor module is internally connected to the circuitry.The pressure device has a pressure body with a first recess from which a pressure element is arranged to protrude, wherein the pressure element presses on a section of the second main surface of the film composite and this section is arranged in projection along the normal direction of the power semiconductor component within the surface of the power semiconductor component.

[0003] WO 2022 / 009482 A1 discloses a power semiconductor module equipped with a power semiconductor element, a power semiconductor device, and a circuit board. The circuit board comprises an insulating substrate, a first emitter conductor pattern provided on a main surface of the insulating substrate, and a first gate conductor pattern provided on a main surface of the insulating substrate. The first gate conductor pattern is positioned along a first edge of the first emitter conductor pattern when viewed from a planar view of the main surface of the insulating substrate.

[0004] DE 10 2020 200 106 A1 discloses a contact arrangement. The contact arrangement comprises a circuit carrier, in particular a ceramic one, and a flexible printed circuit board. The flexible printed circuit board is connected to the circuit carrier. The contact arrangement has at least one semiconductor, in particular a semiconductor switch or power semiconductor switch, connected to the circuit carrier, wherein an electrical terminal of the semiconductor is connected to the flexible printed circuit board by means of a bonding wire. The flexible printed circuit board rests on the circuit carrier with at least one surface portion.

[0005] DE 197 32 723 A1 discloses a low-inductance circuit arrangement of the power class with one or more low-inductance commutation circuits, DC and AC load connections and at least one low-inductance intermediate circuit, wherein the positive and negative current connections are assigned at least one metal sheet in close proximity at a minimized distance.

[0006] In view of these circumstances and the need to integrate a three-level topology into a generic power semiconductor module, the invention is based on the object of keeping the internal parasitic inductances of the resulting power semiconductor module occurring during operation as low as possible.

[0007] This object is achieved according to the invention by a three-level power semiconductor module with an electrically insulating substrate with a normal direction, with a plurality of conductor tracks for carrying a first, second and third DC load potential, arranged on this substrate, each with a power semiconductor component, preferably with a large band gap, each arranged on an associated conductor track, with an internal connecting device which, viewed in the normal direction, has a top side made of a first electrically conductive and a first electrically insulating film, wherein the connecting device has a first, a second and a third film conductor track, each for carrying an associated DC load potential, and wherein an electrically conductive induction surface, which is arranged electrically insulated from the film conductor tracks, is arranged in the power semiconductor module,where the induction surface covers all three foil conductor tracks.,

[0008] A foil conductor track is understood here and below to mean an electrically conductive section of an electrically conductive foil of the connecting device, which is electrically insulated from other sections of the same foil.

[0009] It can be advantageous if the induction surface is arranged so that it is electrically insulated from the substrate, the power semiconductor component, and all external connection elements. Thus, there is no electrically conductive connection between the induction surface and another component of the power semiconductor module. During operation of the power semiconductor module, the induction surface thus exhibits a so-called floating potential.

[0010] It may be preferred if a printing device with a bottom side facing the substrate is arranged in the normal direction above the connecting device and wherein the induction surface is arranged between the top side of the connecting device and this bottom side of the printing device.

[0011] It may also be preferred if one of the foil conductor tracks is formed from a second electrically conductive foil.

[0012] In particular, it may be advantageous if the induction surface covers at least two of the foil conductor tracks, preferably in those sections in which they do not overlap, by at least 40%, preferably by at least 60% and particularly preferably by at least 80%.

[0013] It may also be advantageous if the induction surface covers all foil conductor tracks, preferably in those sections in which they do not overlap, by at least 30%, preferably by at least 50% and particularly preferably by at least 70%.

[0014] It may be preferred if the induction surface is formed as a metallic layer with a thickness between 20µm and 150µm, preferably between 30µm and 60µm, and further preferably made of copper or aluminum.

[0015] In a first alternative, it may be advantageous if the induction surface, viewed in the normal direction, is arranged in a material-to-material manner on one, preferably a second, insulating film of the connecting device, preferably being designed as a film itself, and the insulating film electrically insulates the induction surface from the film conductor tracks.

[0016] In a second alternative, it may be advantageous if the induction surface is arranged at a distance from the connecting device when viewed in the normal direction.

[0017] In a third alternative, it may be advantageous if the induction surface is arranged directly on the underside of the printing device. In this case, it may be particularly advantageous if the induction surface is designed as an induction layer and is preferably arranged on a rigid part of the printing device as part of a coating process.

[0018] It is understood that the features and configurations of the power semiconductor module mentioned above and below can be implemented individually or in any combination to achieve improvements. In particular, the features mentioned above and explained here or below can be used not only in the specified combinations, but also in other non-exclusive combinations or on their own, without departing from the scope of the present invention.

[0019] Further explanations of the invention, advantageous details and features emerge from the following description of the Fig. 1 to 6 schematically illustrated embodiments of the invention or of respective parts thereof. Fig. 1 shows a first embodiment of a power semiconductor module according to the invention. Fig. 2 shows a section of a second embodiment of a power semiconductor module according to the invention. Fig. 3 shows a section of a third embodiment of a power semiconductor module according to the invention. Fig. 4 shows an arrangement of foil conductor tracks and an induction surface. Fig. 5 and Fig. 6 shows a further arrangement of foil conductor tracks and an induction surface.

[0020] Fig. 1 shows a schematic exploded view of a first embodiment of a power semiconductor module 1 according to the invention and a cooling device, here a liquid cooling device 14, therefor. A conventional housing is not shown for reasons of clarity. It shows a substrate 2, which is generally of conventional design, with a normal direction N, an insulating body 20, and conductor tracks 22, 24, 26 arranged thereon, each electrically insulated from one another, which have different potentials, in particular load potentials, but also auxiliary potentials, in particular switching and measuring potentials, of the power semiconductor module. Specifically shown here are three conductor tracks 22, 24, 26 for carrying a first, second, and third DC load potential, as is typical for a three-level half-bridge topology.

[0021] A power semiconductor component 5 is arranged on each of these conductor tracks 24, 26, which is conventionally designed as a single switch, here purely as an example as a wide-bandgap MOSFET, more precisely as a silicon carbide MOSFET. The power semiconductor components 5, more precisely their first contact surfaces of the first metallization, are electrically connected in a materially conductive manner to the respectively assigned conductor tracks 24, 26, preferably by means of a pressure-sintered connection 4.

[0022] The internal connections of the three-level power semiconductor module 1 are formed by means of a connecting device 3 made of a film composite, which in this embodiment alternately comprises two electrically conductive films 30, 34 and an electrically insulating film 32 arranged therebetween. In particular, the conductive films 30, 34 of the connecting device 3 are structured and thus form film conductor tracks that are electrically insulated from one another, see also Fig. 4 to 6. These foil conductor tracks basically connect the respective power semiconductor components 5, more precisely their second contact surface on the side facing away from the substrate 2, and conductor tracks 24 of the substrate 2 to one another in a circuit-appropriate manner. In this embodiment, the respective sections of the foil conductor tracks are integrally connected to the contact surfaces of the substrate 2 by means of a pressure-sintered connection 4. Basically, the connecting device 3 has a first, a second, and a third foil conductor track, each for carrying an associated first, second, and third DC load potential. These foil conductor tracks can all be formed from an electrically conductive foil. It can also be advantageous to form two foil conductor tracks from one electrically conductive foil and the third from a different electrically conductive foil.

[0023] For external electrical connection, the power electronics power semiconductor module 1 has load and auxiliary connection elements. Two conventional variants, a press-pin connection element 10 and a spring connection element 12, are shown here purely as examples. The press-pin connection element 10 is connected by a contact foot to a conductor track 22 of the substrate 2 in a materially bonded manner, advantageously by means of a pressure-sintered connection or a welded connection, preferably a laser-welded connection. In principle, parts of the connecting device 3 itself can also be designed as load or auxiliary connection elements. The auxiliary connection elements not shown, such as gate or sensor connections, are also designed in a conventional manner.

[0024] The pressure device 7 has a first main surface facing the substrate 2 and a second main surface facing away from the substrate 2. For clarity, it is shown here spaced apart from the connecting device 3. The pressure device 7 consists of a pressure body 72 and a plurality of pressure elements (two are shown). The pressure body 72 is designed to be particularly rigid in order to be able to transmit the pressure applied to it homogeneously to the pressure elements. The pressure elements are arranged in a recess in the pressure body, which is designed as a depression extending from a first main surface.

[0025] The arrangement further comprises the liquid cooling device 14, the surface of which is covered with a heat-conducting layer 140, on which the three-level power semiconductor module 1, more precisely its substrate 2 and its housing (not shown), are arranged.

[0026] The arrangement further comprises a pressure introduction device arranged above the connecting device. By means of this pressure introduction device, which (not shown) rests against the heat sink, pressure 70 is introduced onto the pressure body 72. This pressure is transferred directly to the film composite 3 as a partial pressure 74 by means of the pressure elements. The introduced pressure presses the entire substrate 2 onto the heat sink 14.

[0027] According to the invention, the three-level power semiconductor module 1 has an electrically conductive induction surface 6. This induction surface 6 is arranged so as to be electrically insulated from the foil conductor tracks of the connecting device 3 and yet, viewed in the normal direction N, is arranged as closely as possible to these foil conductor tracks. Crucial to the function of the induction surface 6 is that it covers all three foil conductor tracks, which, during operation, have the first, second, and third DC load potentials, more precisely, a positive DC load potential, a negative DC load potential, and a neutral DC load potential. During operation of the three-level power semiconductor module, the current flow through the foil conductor tracks induces a magnetic field in the area enclosed by them. This field induces eddy currents in the induction surface, which counteract the magnetic field and thus weaken it.The lower the field strength of the induced magnetic fields, the higher the possible switching speeds of the power semiconductor components. To achieve this, it is necessary to cover the first, second, and third foil conductors over as large an area as possible.

[0028] Fig. Figure 2 shows a section of a second embodiment of a power semiconductor module according to the invention. Here, the substrate 2 and the power semiconductor component 5 are analogous to the first embodiment according to Fig. 1. The conventional connecting device 3, in turn, has two electrically conductive foils 30, 34, which form the first, second, and third conductor tracks. An electrically insulating foil 32 is arranged between the two electrically conductive foils 30, 34. Also shown is a via 304 between the two electrically conductive foils 30, 34.

[0029] This conventional connecting device 3 is further developed according to the invention by the arrangement of a second electrically insulating film 600 directly, i.e., without any gap, on the upper side 340 of the connecting device 3. The induction surface 6 is arranged directly, i.e., without any gap, on this second electrically insulating film 600. The respective connections are made by means of an adhesive bond.

[0030] The induction surface 6 itself is formed as an aluminum foil 60 with a thickness of 50 µm, which is thin compared to the electrically conductive foils 30, 34. In a plane orthogonal to the normal direction N, the second electrically insulating foil 600 completely overlaps the induction surface 6 formed as foil 60, thus electrically insulating the induction surface 6 from the connecting device 3.

[0031] Fig. Figure 3 shows a section of a third embodiment of a power semiconductor module according to the invention. It shows the pressure body 72 with a pressure device 7, analogous to that according to Fig. 1, but with a further developed design. The printing device comprises a rigid printing body 722 and a cushion element 720. This elastic cushion element 720 is arranged in a recess of the printing body 722 on the side facing away from the substrate. The elastic cushion element 720 has a plurality of printing elements that extend through associated passages of the printing body and protrude on the side facing the substrate.

[0032] On the underside 724 of the printing device 7 facing the substrate, more precisely here the printing body 722, the induction surface 6 is arranged, which is thus arranged between the upper side 340 of the connecting device 3 and this underside 724 of the printing device 7. In this embodiment, the induction surface 6 is arranged directly on the underside 724 of the printing device 7 and is formed as an induction layer 62. This induction layer 62 is applied to a rigid partial body 722 of the printing device 7 as part of a coating process, purely by way of example as part of a cold gas spraying process. The thickness of the induction layer is 80 µm here, although it can also be reduced to 40 µm, and is made of copper.

[0033] Fig. Figure 4 shows, schematically and not to scale, an arrangement of foil conductor tracks 360, 362, 364 and an induction surface 6. Shown are a first, a second, and a third foil conductor track 360, 362, 364 in a plan view from the normal direction N. These foil conductor tracks 360, 362, 364 are all formed from a single electrically conductive foil of a connecting device 3. Therefore, the individual foil conductor tracks 360, 362, 364 do not overlap. According to the invention, the induction surface 6 covers all of these foil conductor tracks 360, 362, 364.

[0034] Fig. 5 and Fig. 6 show schematically and not to scale a further arrangement of foil conductor tracks 360,366,364 and an induction surface 6. Shown in Fig. 5 shows a first, a second, and a third foil conductor track 360, 366, 364 in a plan view from the normal direction. The first and third foil conductor tracks 360, 364 are formed from an electrically conductive film of a connecting device 3, while the second foil conductor track 366 is formed from a second electrically conductive film of the connecting device 3. Therefore, this second foil conductor track 366 can overlap both the first and the third conductor tracks 360, 364 purely by way of example.

[0035] The Fig. 6 additionally shown induction surface 6 covers according to the invention all of these foil conductor tracks 360,366,364.

Claims

[1] Three-level power semiconductor module (1) with an electrically insulating substrate (2) with a normal direction (N), with a plurality of conductor tracks (22, 24, 26) for carrying a first, second and third DC load potential, arranged on this substrate (2), each with a power semiconductor component (5), preferably with a large band gap, each arranged on an associated conductor track (24, 26), with an internal connecting device (3) which, viewed in the normal direction (N), has an upper side (340) made of a first electrically conductive and a first electrically insulating film, wherein the connecting device (3) has a first, a second and a third film conductor track (360, 362, 364, 366), each for carrying an associated DC load potential, and wherein an electrically conductive induction surface (6) which is arranged electrically insulated from the film conductor tracks (360, 362, 364, 366),is arranged in the power semiconductor module (1), wherein the induction surface (6) covers all three foil conductor tracks (360,362,364,366). [2] Power semiconductor module according to claim 1, wherein the induction surface (6) is arranged electrically insulated from the substrate (2), from the power semiconductor component (5) and from all external connection elements. [3] Power semiconductor module according to one of the preceding claims, wherein a pressure device (7) with a bottom side (724) facing the substrate (2) is arranged above the connecting device (3) in the normal direction (N), and wherein the induction surface (6) is arranged between the top side 340 of the connecting device (3) and this bottom side (724) of the pressure device (7). [4] Power semiconductor module according to one of the preceding claims, wherein one of the foil conductor tracks (366) is formed from a second electrically conductive foil (34). [5] Power semiconductor module according to one of the preceding claims, wherein the induction surface (6) covers at least two of the foil conductor tracks (360, 362, 364, 366), preferably in those sections in which they do not overlap themselves, by at least 40%, preferably by at least 60% and particularly preferably by at least 80%. [6] Power semiconductor module according to one of the preceding claims, wherein the induction surface (6) covers all foil conductor tracks (360, 362, 364, 366), preferably in those sections in which they do not overlap themselves, by at least 30%, preferably by at least 50% and particularly preferably by at least 70%. [7] Power semiconductor module according to one of the preceding claims, wherein the induction surface (6) is formed as a metallic layer with a thickness between 20µm and 150µm, preferably between 30µm and 60µm, and further preferably made of copper or aluminum. [8] Power semiconductor module according to one of claims 1 to 7, wherein the induction surface (6) viewed in the normal direction (N) is arranged in a materially bonded manner on one, preferably a second, insulating film (600) of the connecting device (3), preferably being designed as a film (60) itself, and the insulating film (600) electrically insulates the induction surface (6, 60) from the film conductor tracks (360, 362, 364, 366). [9] Power semiconductor module according to one of claims 1 to 7, wherein the induction surface (6) is arranged at a distance from the connecting device (3) as viewed in the normal direction (N). [10] Power semiconductor module according to one of claims 1 to 7, wherein the induction surface (6) is arranged directly on the underside (724) of the pressure device (7). [11] Power semiconductor module according to claim 10, wherein the induction surface (6) is formed as an induction layer (62) and is preferably arranged on a rigid partial body (722) of the printing device (7) as part of a coating process.

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